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1803c37d58ab94c6012dc4fb74b0c8cc942fc2fe
[deliverable/linux.git] / drivers / tty / serial / altera_uart.c
1 /*
2 * altera_uart.c -- Altera UART driver
3 *
4 * Based on mcf.c -- Freescale ColdFire UART driver
5 *
6 * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
7 * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw>
8 * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/timer.h>
19 #include <linux/interrupt.h>
20 #include <linux/module.h>
21 #include <linux/console.h>
22 #include <linux/tty.h>
23 #include <linux/tty_flip.h>
24 #include <linux/serial.h>
25 #include <linux/serial_core.h>
26 #include <linux/platform_device.h>
27 #include <linux/of.h>
28 #include <linux/io.h>
29 #include <linux/altera_uart.h>
30
31 #define DRV_NAME "altera_uart"
32 #define SERIAL_ALTERA_MAJOR 204
33 #define SERIAL_ALTERA_MINOR 213
34
35 /*
36 * Altera UART register definitions according to the Nios UART datasheet:
37 * http://www.altera.com/literature/ds/ds_nios_uart.pdf
38 */
39
40 #define ALTERA_UART_SIZE 32
41
42 #define ALTERA_UART_RXDATA_REG 0
43 #define ALTERA_UART_TXDATA_REG 4
44 #define ALTERA_UART_STATUS_REG 8
45 #define ALTERA_UART_CONTROL_REG 12
46 #define ALTERA_UART_DIVISOR_REG 16
47 #define ALTERA_UART_EOP_REG 20
48
49 #define ALTERA_UART_STATUS_PE_MSK 0x0001 /* parity error */
50 #define ALTERA_UART_STATUS_FE_MSK 0x0002 /* framing error */
51 #define ALTERA_UART_STATUS_BRK_MSK 0x0004 /* break */
52 #define ALTERA_UART_STATUS_ROE_MSK 0x0008 /* RX overrun error */
53 #define ALTERA_UART_STATUS_TOE_MSK 0x0010 /* TX overrun error */
54 #define ALTERA_UART_STATUS_TMT_MSK 0x0020 /* TX shift register state */
55 #define ALTERA_UART_STATUS_TRDY_MSK 0x0040 /* TX ready */
56 #define ALTERA_UART_STATUS_RRDY_MSK 0x0080 /* RX ready */
57 #define ALTERA_UART_STATUS_E_MSK 0x0100 /* exception condition */
58 #define ALTERA_UART_STATUS_DCTS_MSK 0x0400 /* CTS logic-level change */
59 #define ALTERA_UART_STATUS_CTS_MSK 0x0800 /* CTS logic state */
60 #define ALTERA_UART_STATUS_EOP_MSK 0x1000 /* EOP written/read */
61
62 /* Enable interrupt on... */
63 #define ALTERA_UART_CONTROL_PE_MSK 0x0001 /* ...parity error */
64 #define ALTERA_UART_CONTROL_FE_MSK 0x0002 /* ...framing error */
65 #define ALTERA_UART_CONTROL_BRK_MSK 0x0004 /* ...break */
66 #define ALTERA_UART_CONTROL_ROE_MSK 0x0008 /* ...RX overrun */
67 #define ALTERA_UART_CONTROL_TOE_MSK 0x0010 /* ...TX overrun */
68 #define ALTERA_UART_CONTROL_TMT_MSK 0x0020 /* ...TX shift register empty */
69 #define ALTERA_UART_CONTROL_TRDY_MSK 0x0040 /* ...TX ready */
70 #define ALTERA_UART_CONTROL_RRDY_MSK 0x0080 /* ...RX ready */
71 #define ALTERA_UART_CONTROL_E_MSK 0x0100 /* ...exception*/
72
73 #define ALTERA_UART_CONTROL_TRBK_MSK 0x0200 /* TX break */
74 #define ALTERA_UART_CONTROL_DCTS_MSK 0x0400 /* Interrupt on CTS change */
75 #define ALTERA_UART_CONTROL_RTS_MSK 0x0800 /* RTS signal */
76 #define ALTERA_UART_CONTROL_EOP_MSK 0x1000 /* Interrupt on EOP */
77
78 /*
79 * Local per-uart structure.
80 */
81 struct altera_uart {
82 struct uart_port port;
83 struct timer_list tmr;
84 unsigned int sigs; /* Local copy of line sigs */
85 unsigned short imr; /* Local IMR mirror */
86 };
87
88 static u32 altera_uart_readl(struct uart_port *port, int reg)
89 {
90 struct altera_uart_platform_uart *platp = port->private_data;
91
92 return readl(port->membase + (reg << platp->bus_shift));
93 }
94
95 static void altera_uart_writel(struct uart_port *port, u32 dat, int reg)
96 {
97 struct altera_uart_platform_uart *platp = port->private_data;
98
99 writel(dat, port->membase + (reg << platp->bus_shift));
100 }
101
102 static unsigned int altera_uart_tx_empty(struct uart_port *port)
103 {
104 return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
105 ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0;
106 }
107
108 static unsigned int altera_uart_get_mctrl(struct uart_port *port)
109 {
110 struct altera_uart *pp = container_of(port, struct altera_uart, port);
111 unsigned int sigs;
112
113 sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
114 ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0;
115 sigs |= (pp->sigs & TIOCM_RTS);
116
117 return sigs;
118 }
119
120 static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs)
121 {
122 struct altera_uart *pp = container_of(port, struct altera_uart, port);
123
124 pp->sigs = sigs;
125 if (sigs & TIOCM_RTS)
126 pp->imr |= ALTERA_UART_CONTROL_RTS_MSK;
127 else
128 pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK;
129 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
130 }
131
132 static void altera_uart_start_tx(struct uart_port *port)
133 {
134 struct altera_uart *pp = container_of(port, struct altera_uart, port);
135
136 pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK;
137 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
138 }
139
140 static void altera_uart_stop_tx(struct uart_port *port)
141 {
142 struct altera_uart *pp = container_of(port, struct altera_uart, port);
143
144 pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
145 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
146 }
147
148 static void altera_uart_stop_rx(struct uart_port *port)
149 {
150 struct altera_uart *pp = container_of(port, struct altera_uart, port);
151
152 pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK;
153 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
154 }
155
156 static void altera_uart_break_ctl(struct uart_port *port, int break_state)
157 {
158 struct altera_uart *pp = container_of(port, struct altera_uart, port);
159 unsigned long flags;
160
161 spin_lock_irqsave(&port->lock, flags);
162 if (break_state == -1)
163 pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK;
164 else
165 pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;
166 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
167 spin_unlock_irqrestore(&port->lock, flags);
168 }
169
170 static void altera_uart_enable_ms(struct uart_port *port)
171 {
172 }
173
174 static void altera_uart_set_termios(struct uart_port *port,
175 struct ktermios *termios,
176 struct ktermios *old)
177 {
178 unsigned long flags;
179 unsigned int baud, baudclk;
180
181 baud = uart_get_baud_rate(port, termios, old, 0, 4000000);
182 baudclk = port->uartclk / baud;
183
184 if (old)
185 tty_termios_copy_hw(termios, old);
186 tty_termios_encode_baud_rate(termios, baud, baud);
187
188 spin_lock_irqsave(&port->lock, flags);
189 uart_update_timeout(port, termios->c_cflag, baud);
190 altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
191 spin_unlock_irqrestore(&port->lock, flags);
192 }
193
194 static void altera_uart_rx_chars(struct altera_uart *pp)
195 {
196 struct uart_port *port = &pp->port;
197 unsigned char ch, flag;
198 unsigned short status;
199
200 while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) &
201 ALTERA_UART_STATUS_RRDY_MSK) {
202 ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
203 flag = TTY_NORMAL;
204 port->icount.rx++;
205
206 if (status & ALTERA_UART_STATUS_E_MSK) {
207 altera_uart_writel(port, status,
208 ALTERA_UART_STATUS_REG);
209
210 if (status & ALTERA_UART_STATUS_BRK_MSK) {
211 port->icount.brk++;
212 if (uart_handle_break(port))
213 continue;
214 } else if (status & ALTERA_UART_STATUS_PE_MSK) {
215 port->icount.parity++;
216 } else if (status & ALTERA_UART_STATUS_ROE_MSK) {
217 port->icount.overrun++;
218 } else if (status & ALTERA_UART_STATUS_FE_MSK) {
219 port->icount.frame++;
220 }
221
222 status &= port->read_status_mask;
223
224 if (status & ALTERA_UART_STATUS_BRK_MSK)
225 flag = TTY_BREAK;
226 else if (status & ALTERA_UART_STATUS_PE_MSK)
227 flag = TTY_PARITY;
228 else if (status & ALTERA_UART_STATUS_FE_MSK)
229 flag = TTY_FRAME;
230 }
231
232 if (uart_handle_sysrq_char(port, ch))
233 continue;
234 uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch,
235 flag);
236 }
237
238 tty_flip_buffer_push(port->state->port.tty);
239 }
240
241 static void altera_uart_tx_chars(struct altera_uart *pp)
242 {
243 struct uart_port *port = &pp->port;
244 struct circ_buf *xmit = &port->state->xmit;
245
246 if (port->x_char) {
247 /* Send special char - probably flow control */
248 altera_uart_writel(port, port->x_char, ALTERA_UART_TXDATA_REG);
249 port->x_char = 0;
250 port->icount.tx++;
251 return;
252 }
253
254 while (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
255 ALTERA_UART_STATUS_TRDY_MSK) {
256 if (xmit->head == xmit->tail)
257 break;
258 altera_uart_writel(port, xmit->buf[xmit->tail],
259 ALTERA_UART_TXDATA_REG);
260 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
261 port->icount.tx++;
262 }
263
264 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
265 uart_write_wakeup(port);
266
267 if (xmit->head == xmit->tail) {
268 pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
269 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
270 }
271 }
272
273 static irqreturn_t altera_uart_interrupt(int irq, void *data)
274 {
275 struct uart_port *port = data;
276 struct altera_uart *pp = container_of(port, struct altera_uart, port);
277 unsigned int isr;
278
279 isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr;
280
281 spin_lock(&port->lock);
282 if (isr & ALTERA_UART_STATUS_RRDY_MSK)
283 altera_uart_rx_chars(pp);
284 if (isr & ALTERA_UART_STATUS_TRDY_MSK)
285 altera_uart_tx_chars(pp);
286 spin_unlock(&port->lock);
287
288 return IRQ_RETVAL(isr);
289 }
290
291 static void altera_uart_timer(unsigned long data)
292 {
293 struct uart_port *port = (void *)data;
294 struct altera_uart *pp = container_of(port, struct altera_uart, port);
295
296 altera_uart_interrupt(0, port);
297 mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
298 }
299
300 static void altera_uart_config_port(struct uart_port *port, int flags)
301 {
302 port->type = PORT_ALTERA_UART;
303
304 /* Clear mask, so no surprise interrupts. */
305 altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG);
306 /* Clear status register */
307 altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG);
308 }
309
310 static int altera_uart_startup(struct uart_port *port)
311 {
312 struct altera_uart *pp = container_of(port, struct altera_uart, port);
313 unsigned long flags;
314 int ret;
315
316 if (!port->irq) {
317 setup_timer(&pp->tmr, altera_uart_timer, (unsigned long)port);
318 mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
319 return 0;
320 }
321
322 ret = request_irq(port->irq, altera_uart_interrupt, IRQF_DISABLED,
323 DRV_NAME, port);
324 if (ret) {
325 pr_err(DRV_NAME ": unable to attach Altera UART %d "
326 "interrupt vector=%d\n", port->line, port->irq);
327 return ret;
328 }
329
330 spin_lock_irqsave(&port->lock, flags);
331
332 /* Enable RX interrupts now */
333 pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;
334 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
335
336 spin_unlock_irqrestore(&port->lock, flags);
337
338 return 0;
339 }
340
341 static void altera_uart_shutdown(struct uart_port *port)
342 {
343 struct altera_uart *pp = container_of(port, struct altera_uart, port);
344 unsigned long flags;
345
346 spin_lock_irqsave(&port->lock, flags);
347
348 /* Disable all interrupts now */
349 pp->imr = 0;
350 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
351
352 spin_unlock_irqrestore(&port->lock, flags);
353
354 if (port->irq)
355 free_irq(port->irq, port);
356 else
357 del_timer_sync(&pp->tmr);
358 }
359
360 static const char *altera_uart_type(struct uart_port *port)
361 {
362 return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL;
363 }
364
365 static int altera_uart_request_port(struct uart_port *port)
366 {
367 /* UARTs always present */
368 return 0;
369 }
370
371 static void altera_uart_release_port(struct uart_port *port)
372 {
373 /* Nothing to release... */
374 }
375
376 static int altera_uart_verify_port(struct uart_port *port,
377 struct serial_struct *ser)
378 {
379 if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART))
380 return -EINVAL;
381 return 0;
382 }
383
384 /*
385 * Define the basic serial functions we support.
386 */
387 static struct uart_ops altera_uart_ops = {
388 .tx_empty = altera_uart_tx_empty,
389 .get_mctrl = altera_uart_get_mctrl,
390 .set_mctrl = altera_uart_set_mctrl,
391 .start_tx = altera_uart_start_tx,
392 .stop_tx = altera_uart_stop_tx,
393 .stop_rx = altera_uart_stop_rx,
394 .enable_ms = altera_uart_enable_ms,
395 .break_ctl = altera_uart_break_ctl,
396 .startup = altera_uart_startup,
397 .shutdown = altera_uart_shutdown,
398 .set_termios = altera_uart_set_termios,
399 .type = altera_uart_type,
400 .request_port = altera_uart_request_port,
401 .release_port = altera_uart_release_port,
402 .config_port = altera_uart_config_port,
403 .verify_port = altera_uart_verify_port,
404 };
405
406 static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS];
407
408 #if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE)
409
410 int __init early_altera_uart_setup(struct altera_uart_platform_uart *platp)
411 {
412 struct uart_port *port;
413 int i;
414
415 for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS && platp[i].mapbase; i++) {
416 port = &altera_uart_ports[i].port;
417
418 port->line = i;
419 port->type = PORT_ALTERA_UART;
420 port->mapbase = platp[i].mapbase;
421 port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
422 port->iotype = SERIAL_IO_MEM;
423 port->irq = platp[i].irq;
424 port->uartclk = platp[i].uartclk;
425 port->flags = UPF_BOOT_AUTOCONF;
426 port->ops = &altera_uart_ops;
427 port->private_data = platp;
428 }
429
430 return 0;
431 }
432
433 static void altera_uart_console_putc(struct uart_port *port, const char c)
434 {
435 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
436 ALTERA_UART_STATUS_TRDY_MSK))
437 cpu_relax();
438
439 writel(c, port->membase + ALTERA_UART_TXDATA_REG);
440 }
441
442 static void altera_uart_console_write(struct console *co, const char *s,
443 unsigned int count)
444 {
445 struct uart_port *port = &(altera_uart_ports + co->index)->port;
446
447 for (; count; count--, s++) {
448 altera_uart_console_putc(port, *s);
449 if (*s == '\n')
450 altera_uart_console_putc(port, '\r');
451 }
452 }
453
454 static int __init altera_uart_console_setup(struct console *co, char *options)
455 {
456 struct uart_port *port;
457 int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE;
458 int bits = 8;
459 int parity = 'n';
460 int flow = 'n';
461
462 if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
463 return -EINVAL;
464 port = &altera_uart_ports[co->index].port;
465 if (!port->membase)
466 return -ENODEV;
467
468 if (options)
469 uart_parse_options(options, &baud, &parity, &bits, &flow);
470
471 return uart_set_options(port, co, baud, parity, bits, flow);
472 }
473
474 static struct uart_driver altera_uart_driver;
475
476 static struct console altera_uart_console = {
477 .name = "ttyAL",
478 .write = altera_uart_console_write,
479 .device = uart_console_device,
480 .setup = altera_uart_console_setup,
481 .flags = CON_PRINTBUFFER,
482 .index = -1,
483 .data = &altera_uart_driver,
484 };
485
486 static int __init altera_uart_console_init(void)
487 {
488 register_console(&altera_uart_console);
489 return 0;
490 }
491
492 console_initcall(altera_uart_console_init);
493
494 #define ALTERA_UART_CONSOLE (&altera_uart_console)
495
496 #else
497
498 #define ALTERA_UART_CONSOLE NULL
499
500 #endif /* CONFIG_ALTERA_UART_CONSOLE */
501
502 /*
503 * Define the altera_uart UART driver structure.
504 */
505 static struct uart_driver altera_uart_driver = {
506 .owner = THIS_MODULE,
507 .driver_name = DRV_NAME,
508 .dev_name = "ttyAL",
509 .major = SERIAL_ALTERA_MAJOR,
510 .minor = SERIAL_ALTERA_MINOR,
511 .nr = CONFIG_SERIAL_ALTERA_UART_MAXPORTS,
512 .cons = ALTERA_UART_CONSOLE,
513 };
514
515 #ifdef CONFIG_OF
516 static int altera_uart_get_of_uartclk(struct platform_device *pdev,
517 struct uart_port *port)
518 {
519 int len;
520 const __be32 *clk;
521
522 clk = of_get_property(pdev->dev.of_node, "clock-frequency", &len);
523 if (!clk || len < sizeof(__be32))
524 return -ENODEV;
525
526 port->uartclk = be32_to_cpup(clk);
527
528 return 0;
529 }
530 #else
531 static int altera_uart_get_of_uartclk(struct platform_device *pdev,
532 struct uart_port *port)
533 {
534 return -ENODEV;
535 }
536 #endif /* CONFIG_OF */
537
538 static int __devinit altera_uart_probe(struct platform_device *pdev)
539 {
540 struct altera_uart_platform_uart *platp = pdev->dev.platform_data;
541 struct uart_port *port;
542 struct resource *res_mem;
543 struct resource *res_irq;
544 int i = pdev->id;
545 int ret;
546
547 /* -1 emphasizes that the platform must have one port, no .N suffix */
548 if (i == -1)
549 i = 0;
550
551 if (i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
552 return -EINVAL;
553
554 port = &altera_uart_ports[i].port;
555
556 res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
557 if (res_mem)
558 port->mapbase = res_mem->start;
559 else if (platp->mapbase)
560 port->mapbase = platp->mapbase;
561 else
562 return -EINVAL;
563
564 res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
565 if (res_irq)
566 port->irq = res_irq->start;
567 else if (platp->irq)
568 port->irq = platp->irq;
569
570 /* Check platform data first so we can override device node data */
571 if (platp)
572 port->uartclk = platp->uartclk;
573 else {
574 ret = altera_uart_get_of_uartclk(pdev, port);
575 if (ret)
576 return ret;
577 }
578
579 port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
580 if (!port->membase)
581 return -ENOMEM;
582
583 port->line = i;
584 port->type = PORT_ALTERA_UART;
585 port->iotype = SERIAL_IO_MEM;
586 port->ops = &altera_uart_ops;
587 port->flags = UPF_BOOT_AUTOCONF;
588 port->private_data = platp;
589
590 uart_add_one_port(&altera_uart_driver, port);
591
592 return 0;
593 }
594
595 static int __devexit altera_uart_remove(struct platform_device *pdev)
596 {
597 struct uart_port *port = &altera_uart_ports[pdev->id].port;
598
599 uart_remove_one_port(&altera_uart_driver, port);
600 return 0;
601 }
602
603 #ifdef CONFIG_OF
604 static struct of_device_id altera_uart_match[] = {
605 { .compatible = "ALTR,uart-1.0", },
606 {},
607 };
608 MODULE_DEVICE_TABLE(of, altera_uart_match);
609 #else
610 #define altera_uart_match NULL
611 #endif /* CONFIG_OF */
612
613 static struct platform_driver altera_uart_platform_driver = {
614 .probe = altera_uart_probe,
615 .remove = __devexit_p(altera_uart_remove),
616 .driver = {
617 .name = DRV_NAME,
618 .owner = THIS_MODULE,
619 .of_match_table = altera_uart_match,
620 },
621 };
622
623 static int __init altera_uart_init(void)
624 {
625 int rc;
626
627 rc = uart_register_driver(&altera_uart_driver);
628 if (rc)
629 return rc;
630 rc = platform_driver_register(&altera_uart_platform_driver);
631 if (rc) {
632 uart_unregister_driver(&altera_uart_driver);
633 return rc;
634 }
635 return 0;
636 }
637
638 static void __exit altera_uart_exit(void)
639 {
640 platform_driver_unregister(&altera_uart_platform_driver);
641 uart_unregister_driver(&altera_uart_driver);
642 }
643
644 module_init(altera_uart_init);
645 module_exit(altera_uart_exit);
646
647 MODULE_DESCRIPTION("Altera UART driver");
648 MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
649 MODULE_LICENSE("GPL");
650 MODULE_ALIAS("platform:" DRV_NAME);
651 MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_ALTERA_MAJOR);
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