tty: ar933x_uart: use the clk API to get the uart clock
[deliverable/linux.git] / drivers / tty / serial / ar933x_uart.c
1 /*
2 * Atheros AR933X SoC built-in UART driver
3 *
4 * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
11 */
12
13 #include <linux/module.h>
14 #include <linux/ioport.h>
15 #include <linux/init.h>
16 #include <linux/console.h>
17 #include <linux/sysrq.h>
18 #include <linux/delay.h>
19 #include <linux/platform_device.h>
20 #include <linux/tty.h>
21 #include <linux/tty_flip.h>
22 #include <linux/serial_core.h>
23 #include <linux/serial.h>
24 #include <linux/slab.h>
25 #include <linux/io.h>
26 #include <linux/irq.h>
27 #include <linux/clk.h>
28
29 #include <asm/div64.h>
30
31 #include <asm/mach-ath79/ar933x_uart.h>
32
33 #define DRIVER_NAME "ar933x-uart"
34
35 #define AR933X_UART_MAX_SCALE 0xff
36 #define AR933X_UART_MAX_STEP 0xffff
37
38 #define AR933X_UART_MIN_BAUD 300
39 #define AR933X_UART_MAX_BAUD 3000000
40
41 #define AR933X_DUMMY_STATUS_RD 0x01
42
43 static struct uart_driver ar933x_uart_driver;
44
45 struct ar933x_uart_port {
46 struct uart_port port;
47 unsigned int ier; /* shadow Interrupt Enable Register */
48 unsigned int min_baud;
49 unsigned int max_baud;
50 struct clk *clk;
51 };
52
53 static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
54 int offset)
55 {
56 return readl(up->port.membase + offset);
57 }
58
59 static inline void ar933x_uart_write(struct ar933x_uart_port *up,
60 int offset, unsigned int value)
61 {
62 writel(value, up->port.membase + offset);
63 }
64
65 static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
66 unsigned int offset,
67 unsigned int mask,
68 unsigned int val)
69 {
70 unsigned int t;
71
72 t = ar933x_uart_read(up, offset);
73 t &= ~mask;
74 t |= val;
75 ar933x_uart_write(up, offset, t);
76 }
77
78 static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
79 unsigned int offset,
80 unsigned int val)
81 {
82 ar933x_uart_rmw(up, offset, 0, val);
83 }
84
85 static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
86 unsigned int offset,
87 unsigned int val)
88 {
89 ar933x_uart_rmw(up, offset, val, 0);
90 }
91
92 static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
93 {
94 up->ier |= AR933X_UART_INT_TX_EMPTY;
95 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
96 }
97
98 static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
99 {
100 up->ier &= ~AR933X_UART_INT_TX_EMPTY;
101 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
102 }
103
104 static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
105 {
106 unsigned int rdata;
107
108 rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
109 rdata |= AR933X_UART_DATA_TX_CSR;
110 ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
111 }
112
113 static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
114 {
115 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
116 unsigned long flags;
117 unsigned int rdata;
118
119 spin_lock_irqsave(&up->port.lock, flags);
120 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
121 spin_unlock_irqrestore(&up->port.lock, flags);
122
123 return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
124 }
125
126 static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
127 {
128 return TIOCM_CAR;
129 }
130
131 static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
132 {
133 }
134
135 static void ar933x_uart_start_tx(struct uart_port *port)
136 {
137 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
138
139 ar933x_uart_start_tx_interrupt(up);
140 }
141
142 static void ar933x_uart_stop_tx(struct uart_port *port)
143 {
144 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
145
146 ar933x_uart_stop_tx_interrupt(up);
147 }
148
149 static void ar933x_uart_stop_rx(struct uart_port *port)
150 {
151 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
152
153 up->ier &= ~AR933X_UART_INT_RX_VALID;
154 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
155 }
156
157 static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
158 {
159 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
160 unsigned long flags;
161
162 spin_lock_irqsave(&up->port.lock, flags);
163 if (break_state == -1)
164 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
165 AR933X_UART_CS_TX_BREAK);
166 else
167 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
168 AR933X_UART_CS_TX_BREAK);
169 spin_unlock_irqrestore(&up->port.lock, flags);
170 }
171
172 static void ar933x_uart_enable_ms(struct uart_port *port)
173 {
174 }
175
176 /*
177 * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17))
178 */
179 static unsigned long ar933x_uart_get_baud(unsigned int clk,
180 unsigned int scale,
181 unsigned int step)
182 {
183 u64 t;
184 u32 div;
185
186 div = (2 << 16) * (scale + 1);
187 t = clk;
188 t *= step;
189 t += (div / 2);
190 do_div(t, div);
191
192 return t;
193 }
194
195 static void ar933x_uart_get_scale_step(unsigned int clk,
196 unsigned int baud,
197 unsigned int *scale,
198 unsigned int *step)
199 {
200 unsigned int tscale;
201 long min_diff;
202
203 *scale = 0;
204 *step = 0;
205
206 min_diff = baud;
207 for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) {
208 u64 tstep;
209 int diff;
210
211 tstep = baud * (tscale + 1);
212 tstep *= (2 << 16);
213 do_div(tstep, clk);
214
215 if (tstep > AR933X_UART_MAX_STEP)
216 break;
217
218 diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud);
219 if (diff < min_diff) {
220 min_diff = diff;
221 *scale = tscale;
222 *step = tstep;
223 }
224 }
225 }
226
227 static void ar933x_uart_set_termios(struct uart_port *port,
228 struct ktermios *new,
229 struct ktermios *old)
230 {
231 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
232 unsigned int cs;
233 unsigned long flags;
234 unsigned int baud, scale, step;
235
236 /* Only CS8 is supported */
237 new->c_cflag &= ~CSIZE;
238 new->c_cflag |= CS8;
239
240 /* Only one stop bit is supported */
241 new->c_cflag &= ~CSTOPB;
242
243 cs = 0;
244 if (new->c_cflag & PARENB) {
245 if (!(new->c_cflag & PARODD))
246 cs |= AR933X_UART_CS_PARITY_EVEN;
247 else
248 cs |= AR933X_UART_CS_PARITY_ODD;
249 } else {
250 cs |= AR933X_UART_CS_PARITY_NONE;
251 }
252
253 /* Mark/space parity is not supported */
254 new->c_cflag &= ~CMSPAR;
255
256 baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud);
257 ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step);
258
259 /*
260 * Ok, we're now changing the port state. Do it with
261 * interrupts disabled.
262 */
263 spin_lock_irqsave(&up->port.lock, flags);
264
265 /* disable the UART */
266 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
267 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S);
268
269 /* Update the per-port timeout. */
270 uart_update_timeout(port, new->c_cflag, baud);
271
272 up->port.ignore_status_mask = 0;
273
274 /* ignore all characters if CREAD is not set */
275 if ((new->c_cflag & CREAD) == 0)
276 up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
277
278 ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
279 scale << AR933X_UART_CLOCK_SCALE_S | step);
280
281 /* setup configuration register */
282 ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
283
284 /* enable host interrupt */
285 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
286 AR933X_UART_CS_HOST_INT_EN);
287
288 /* reenable the UART */
289 ar933x_uart_rmw(up, AR933X_UART_CS_REG,
290 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,
291 AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S);
292
293 spin_unlock_irqrestore(&up->port.lock, flags);
294
295 if (tty_termios_baud_rate(new))
296 tty_termios_encode_baud_rate(new, baud, baud);
297 }
298
299 static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
300 {
301 struct tty_port *port = &up->port.state->port;
302 int max_count = 256;
303
304 do {
305 unsigned int rdata;
306 unsigned char ch;
307
308 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
309 if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
310 break;
311
312 /* remove the character from the FIFO */
313 ar933x_uart_write(up, AR933X_UART_DATA_REG,
314 AR933X_UART_DATA_RX_CSR);
315
316 up->port.icount.rx++;
317 ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
318
319 if (uart_handle_sysrq_char(&up->port, ch))
320 continue;
321
322 if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
323 tty_insert_flip_char(port, ch, TTY_NORMAL);
324 } while (max_count-- > 0);
325
326 spin_unlock(&up->port.lock);
327 tty_flip_buffer_push(port);
328 spin_lock(&up->port.lock);
329 }
330
331 static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
332 {
333 struct circ_buf *xmit = &up->port.state->xmit;
334 int count;
335
336 if (uart_tx_stopped(&up->port))
337 return;
338
339 count = up->port.fifosize;
340 do {
341 unsigned int rdata;
342
343 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
344 if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
345 break;
346
347 if (up->port.x_char) {
348 ar933x_uart_putc(up, up->port.x_char);
349 up->port.icount.tx++;
350 up->port.x_char = 0;
351 continue;
352 }
353
354 if (uart_circ_empty(xmit))
355 break;
356
357 ar933x_uart_putc(up, xmit->buf[xmit->tail]);
358
359 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
360 up->port.icount.tx++;
361 } while (--count > 0);
362
363 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
364 uart_write_wakeup(&up->port);
365
366 if (!uart_circ_empty(xmit))
367 ar933x_uart_start_tx_interrupt(up);
368 }
369
370 static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
371 {
372 struct ar933x_uart_port *up = dev_id;
373 unsigned int status;
374
375 status = ar933x_uart_read(up, AR933X_UART_CS_REG);
376 if ((status & AR933X_UART_CS_HOST_INT) == 0)
377 return IRQ_NONE;
378
379 spin_lock(&up->port.lock);
380
381 status = ar933x_uart_read(up, AR933X_UART_INT_REG);
382 status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
383
384 if (status & AR933X_UART_INT_RX_VALID) {
385 ar933x_uart_write(up, AR933X_UART_INT_REG,
386 AR933X_UART_INT_RX_VALID);
387 ar933x_uart_rx_chars(up);
388 }
389
390 if (status & AR933X_UART_INT_TX_EMPTY) {
391 ar933x_uart_write(up, AR933X_UART_INT_REG,
392 AR933X_UART_INT_TX_EMPTY);
393 ar933x_uart_stop_tx_interrupt(up);
394 ar933x_uart_tx_chars(up);
395 }
396
397 spin_unlock(&up->port.lock);
398
399 return IRQ_HANDLED;
400 }
401
402 static int ar933x_uart_startup(struct uart_port *port)
403 {
404 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
405 unsigned long flags;
406 int ret;
407
408 ret = request_irq(up->port.irq, ar933x_uart_interrupt,
409 up->port.irqflags, dev_name(up->port.dev), up);
410 if (ret)
411 return ret;
412
413 spin_lock_irqsave(&up->port.lock, flags);
414
415 /* Enable HOST interrupts */
416 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
417 AR933X_UART_CS_HOST_INT_EN);
418
419 /* Enable RX interrupts */
420 up->ier = AR933X_UART_INT_RX_VALID;
421 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
422
423 spin_unlock_irqrestore(&up->port.lock, flags);
424
425 return 0;
426 }
427
428 static void ar933x_uart_shutdown(struct uart_port *port)
429 {
430 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
431
432 /* Disable all interrupts */
433 up->ier = 0;
434 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
435
436 /* Disable break condition */
437 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
438 AR933X_UART_CS_TX_BREAK);
439
440 free_irq(up->port.irq, up);
441 }
442
443 static const char *ar933x_uart_type(struct uart_port *port)
444 {
445 return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
446 }
447
448 static void ar933x_uart_release_port(struct uart_port *port)
449 {
450 /* Nothing to release ... */
451 }
452
453 static int ar933x_uart_request_port(struct uart_port *port)
454 {
455 /* UARTs always present */
456 return 0;
457 }
458
459 static void ar933x_uart_config_port(struct uart_port *port, int flags)
460 {
461 if (flags & UART_CONFIG_TYPE)
462 port->type = PORT_AR933X;
463 }
464
465 static int ar933x_uart_verify_port(struct uart_port *port,
466 struct serial_struct *ser)
467 {
468 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
469
470 if (ser->type != PORT_UNKNOWN &&
471 ser->type != PORT_AR933X)
472 return -EINVAL;
473
474 if (ser->irq < 0 || ser->irq >= NR_IRQS)
475 return -EINVAL;
476
477 if (ser->baud_base < up->min_baud ||
478 ser->baud_base > up->max_baud)
479 return -EINVAL;
480
481 return 0;
482 }
483
484 static struct uart_ops ar933x_uart_ops = {
485 .tx_empty = ar933x_uart_tx_empty,
486 .set_mctrl = ar933x_uart_set_mctrl,
487 .get_mctrl = ar933x_uart_get_mctrl,
488 .stop_tx = ar933x_uart_stop_tx,
489 .start_tx = ar933x_uart_start_tx,
490 .stop_rx = ar933x_uart_stop_rx,
491 .enable_ms = ar933x_uart_enable_ms,
492 .break_ctl = ar933x_uart_break_ctl,
493 .startup = ar933x_uart_startup,
494 .shutdown = ar933x_uart_shutdown,
495 .set_termios = ar933x_uart_set_termios,
496 .type = ar933x_uart_type,
497 .release_port = ar933x_uart_release_port,
498 .request_port = ar933x_uart_request_port,
499 .config_port = ar933x_uart_config_port,
500 .verify_port = ar933x_uart_verify_port,
501 };
502
503 #ifdef CONFIG_SERIAL_AR933X_CONSOLE
504
505 static struct ar933x_uart_port *
506 ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
507
508 static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
509 {
510 unsigned int status;
511 unsigned int timeout = 60000;
512
513 /* Wait up to 60ms for the character(s) to be sent. */
514 do {
515 status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
516 if (--timeout == 0)
517 break;
518 udelay(1);
519 } while ((status & AR933X_UART_DATA_TX_CSR) == 0);
520 }
521
522 static void ar933x_uart_console_putchar(struct uart_port *port, int ch)
523 {
524 struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
525
526 ar933x_uart_wait_xmitr(up);
527 ar933x_uart_putc(up, ch);
528 }
529
530 static void ar933x_uart_console_write(struct console *co, const char *s,
531 unsigned int count)
532 {
533 struct ar933x_uart_port *up = ar933x_console_ports[co->index];
534 unsigned long flags;
535 unsigned int int_en;
536 int locked = 1;
537
538 local_irq_save(flags);
539
540 if (up->port.sysrq)
541 locked = 0;
542 else if (oops_in_progress)
543 locked = spin_trylock(&up->port.lock);
544 else
545 spin_lock(&up->port.lock);
546
547 /*
548 * First save the IER then disable the interrupts
549 */
550 int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
551 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
552
553 uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
554
555 /*
556 * Finally, wait for transmitter to become empty
557 * and restore the IER
558 */
559 ar933x_uart_wait_xmitr(up);
560 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
561
562 ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
563
564 if (locked)
565 spin_unlock(&up->port.lock);
566
567 local_irq_restore(flags);
568 }
569
570 static int ar933x_uart_console_setup(struct console *co, char *options)
571 {
572 struct ar933x_uart_port *up;
573 int baud = 115200;
574 int bits = 8;
575 int parity = 'n';
576 int flow = 'n';
577
578 if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
579 return -EINVAL;
580
581 up = ar933x_console_ports[co->index];
582 if (!up)
583 return -ENODEV;
584
585 if (options)
586 uart_parse_options(options, &baud, &parity, &bits, &flow);
587
588 return uart_set_options(&up->port, co, baud, parity, bits, flow);
589 }
590
591 static struct console ar933x_uart_console = {
592 .name = "ttyATH",
593 .write = ar933x_uart_console_write,
594 .device = uart_console_device,
595 .setup = ar933x_uart_console_setup,
596 .flags = CON_PRINTBUFFER,
597 .index = -1,
598 .data = &ar933x_uart_driver,
599 };
600
601 static void ar933x_uart_add_console_port(struct ar933x_uart_port *up)
602 {
603 ar933x_console_ports[up->port.line] = up;
604 }
605
606 #define AR933X_SERIAL_CONSOLE (&ar933x_uart_console)
607
608 #else
609
610 static inline void ar933x_uart_add_console_port(struct ar933x_uart_port *up) {}
611
612 #define AR933X_SERIAL_CONSOLE NULL
613
614 #endif /* CONFIG_SERIAL_AR933X_CONSOLE */
615
616 static struct uart_driver ar933x_uart_driver = {
617 .owner = THIS_MODULE,
618 .driver_name = DRIVER_NAME,
619 .dev_name = "ttyATH",
620 .nr = CONFIG_SERIAL_AR933X_NR_UARTS,
621 .cons = AR933X_SERIAL_CONSOLE,
622 };
623
624 static int ar933x_uart_probe(struct platform_device *pdev)
625 {
626 struct ar933x_uart_port *up;
627 struct uart_port *port;
628 struct resource *mem_res;
629 struct resource *irq_res;
630 unsigned int baud;
631 int id;
632 int ret;
633
634 id = pdev->id;
635 if (id == -1)
636 id = 0;
637
638 if (id > CONFIG_SERIAL_AR933X_NR_UARTS)
639 return -EINVAL;
640
641 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
642 if (!irq_res) {
643 dev_err(&pdev->dev, "no IRQ resource\n");
644 return -EINVAL;
645 }
646
647 up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port),
648 GFP_KERNEL);
649 if (!up)
650 return -ENOMEM;
651
652 up->clk = devm_clk_get(&pdev->dev, "uart");
653 if (IS_ERR(up->clk)) {
654 dev_err(&pdev->dev, "unable to get UART clock\n");
655 return PTR_ERR(up->clk);
656 }
657
658 port = &up->port;
659
660 mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
661 port->membase = devm_ioremap_resource(&pdev->dev, mem_res);
662 if (IS_ERR(port->membase))
663 return PTR_ERR(port->membase);
664
665 ret = clk_prepare_enable(up->clk);
666 if (ret)
667 return ret;
668
669 port->uartclk = clk_get_rate(up->clk);
670 if (!port->uartclk) {
671 ret = -EINVAL;
672 goto err_disable_clk;
673 }
674
675 port->mapbase = mem_res->start;
676 port->line = id;
677 port->irq = irq_res->start;
678 port->dev = &pdev->dev;
679 port->type = PORT_AR933X;
680 port->iotype = UPIO_MEM32;
681
682 port->regshift = 2;
683 port->fifosize = AR933X_UART_FIFO_SIZE;
684 port->ops = &ar933x_uart_ops;
685
686 baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1);
687 up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD);
688
689 baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP);
690 up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD);
691
692 ar933x_uart_add_console_port(up);
693
694 ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
695 if (ret)
696 goto err_disable_clk;
697
698 platform_set_drvdata(pdev, up);
699 return 0;
700
701 err_disable_clk:
702 clk_disable_unprepare(up->clk);
703 return ret;
704 }
705
706 static int ar933x_uart_remove(struct platform_device *pdev)
707 {
708 struct ar933x_uart_port *up;
709
710 up = platform_get_drvdata(pdev);
711
712 if (up) {
713 uart_remove_one_port(&ar933x_uart_driver, &up->port);
714 clk_disable_unprepare(up->clk);
715 }
716
717 return 0;
718 }
719
720 static struct platform_driver ar933x_uart_platform_driver = {
721 .probe = ar933x_uart_probe,
722 .remove = ar933x_uart_remove,
723 .driver = {
724 .name = DRIVER_NAME,
725 .owner = THIS_MODULE,
726 },
727 };
728
729 static int __init ar933x_uart_init(void)
730 {
731 int ret;
732
733 ar933x_uart_driver.nr = CONFIG_SERIAL_AR933X_NR_UARTS;
734 ret = uart_register_driver(&ar933x_uart_driver);
735 if (ret)
736 goto err_out;
737
738 ret = platform_driver_register(&ar933x_uart_platform_driver);
739 if (ret)
740 goto err_unregister_uart_driver;
741
742 return 0;
743
744 err_unregister_uart_driver:
745 uart_unregister_driver(&ar933x_uart_driver);
746 err_out:
747 return ret;
748 }
749
750 static void __exit ar933x_uart_exit(void)
751 {
752 platform_driver_unregister(&ar933x_uart_platform_driver);
753 uart_unregister_driver(&ar933x_uart_driver);
754 }
755
756 module_init(ar933x_uart_init);
757 module_exit(ar933x_uart_exit);
758
759 MODULE_DESCRIPTION("Atheros AR933X UART driver");
760 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
761 MODULE_LICENSE("GPL v2");
762 MODULE_ALIAS("platform:" DRIVER_NAME);
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