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tty: remove use of __devexit
[deliverable/linux.git] / drivers / tty / serial / bfin_uart.c
1 /*
2 * Blackfin On-Chip Serial Driver
3 *
4 * Copyright 2006-2011 Analog Devices Inc.
5 *
6 * Enter bugs at http://blackfin.uclinux.org/
7 *
8 * Licensed under the GPL-2 or later.
9 */
10
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
12 #define SUPPORT_SYSRQ
13 #endif
14
15 #define DRIVER_NAME "bfin-uart"
16 #define pr_fmt(fmt) DRIVER_NAME ": " fmt
17
18 #include <linux/module.h>
19 #include <linux/ioport.h>
20 #include <linux/gfp.h>
21 #include <linux/io.h>
22 #include <linux/init.h>
23 #include <linux/console.h>
24 #include <linux/sysrq.h>
25 #include <linux/platform_device.h>
26 #include <linux/tty.h>
27 #include <linux/tty_flip.h>
28 #include <linux/serial_core.h>
29 #include <linux/gpio.h>
30 #include <linux/irq.h>
31 #include <linux/kgdb.h>
32 #include <linux/slab.h>
33 #include <linux/dma-mapping.h>
34
35 #include <asm/portmux.h>
36 #include <asm/cacheflush.h>
37 #include <asm/dma.h>
38 #include <asm/bfin_serial.h>
39
40 #ifdef CONFIG_SERIAL_BFIN_MODULE
41 # undef CONFIG_EARLY_PRINTK
42 #endif
43
44 #ifdef CONFIG_SERIAL_BFIN_MODULE
45 # undef CONFIG_EARLY_PRINTK
46 #endif
47
48 /* UART name and device definitions */
49 #define BFIN_SERIAL_DEV_NAME "ttyBF"
50 #define BFIN_SERIAL_MAJOR 204
51 #define BFIN_SERIAL_MINOR 64
52
53 static struct bfin_serial_port *bfin_serial_ports[BFIN_UART_NR_PORTS];
54
55 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
56 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
57
58 # ifndef CONFIG_SERIAL_BFIN_PIO
59 # error KGDB only support UART in PIO mode.
60 # endif
61
62 static int kgdboc_port_line;
63 static int kgdboc_break_enabled;
64 #endif
65 /*
66 * Setup for console. Argument comes from the menuconfig
67 */
68 #define DMA_RX_XCOUNT 512
69 #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
70
71 #define DMA_RX_FLUSH_JIFFIES (HZ / 50)
72
73 #ifdef CONFIG_SERIAL_BFIN_DMA
74 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
75 #else
76 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
77 #endif
78
79 static void bfin_serial_reset_irda(struct uart_port *port);
80
81 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
82 defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
83 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
84 {
85 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
86 if (uart->cts_pin < 0)
87 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
88
89 /* CTS PIN is negative assertive. */
90 if (UART_GET_CTS(uart))
91 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
92 else
93 return TIOCM_DSR | TIOCM_CAR;
94 }
95
96 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
97 {
98 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
99 if (uart->rts_pin < 0)
100 return;
101
102 /* RTS PIN is negative assertive. */
103 if (mctrl & TIOCM_RTS)
104 UART_ENABLE_RTS(uart);
105 else
106 UART_DISABLE_RTS(uart);
107 }
108
109 /*
110 * Handle any change of modem status signal.
111 */
112 static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
113 {
114 struct bfin_serial_port *uart = dev_id;
115 unsigned int status = bfin_serial_get_mctrl(&uart->port);
116 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
117 struct tty_struct *tty = uart->port.state->port.tty;
118
119 UART_CLEAR_SCTS(uart);
120 if (tty->hw_stopped) {
121 if (status) {
122 tty->hw_stopped = 0;
123 uart_write_wakeup(&uart->port);
124 }
125 } else {
126 if (!status)
127 tty->hw_stopped = 1;
128 }
129 #endif
130 uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
131
132 return IRQ_HANDLED;
133 }
134 #else
135 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
136 {
137 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
138 }
139
140 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
141 {
142 }
143 #endif
144
145 /*
146 * interrupts are disabled on entry
147 */
148 static void bfin_serial_stop_tx(struct uart_port *port)
149 {
150 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
151 #ifdef CONFIG_SERIAL_BFIN_DMA
152 struct circ_buf *xmit = &uart->port.state->xmit;
153 #endif
154
155 while (!(UART_GET_LSR(uart) & TEMT))
156 cpu_relax();
157
158 #ifdef CONFIG_SERIAL_BFIN_DMA
159 disable_dma(uart->tx_dma_channel);
160 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
161 uart->port.icount.tx += uart->tx_count;
162 uart->tx_count = 0;
163 uart->tx_done = 1;
164 #else
165 #if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
166 /* Clear TFI bit */
167 UART_PUT_LSR(uart, TFI);
168 #endif
169 UART_CLEAR_IER(uart, ETBEI);
170 #endif
171 }
172
173 /*
174 * port is locked and interrupts are disabled
175 */
176 static void bfin_serial_start_tx(struct uart_port *port)
177 {
178 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
179 struct tty_struct *tty = uart->port.state->port.tty;
180
181 /*
182 * To avoid losting RX interrupt, we reset IR function
183 * before sending data.
184 */
185 if (tty->termios.c_line == N_IRDA)
186 bfin_serial_reset_irda(port);
187
188 #ifdef CONFIG_SERIAL_BFIN_DMA
189 if (uart->tx_done)
190 bfin_serial_dma_tx_chars(uart);
191 #else
192 UART_SET_IER(uart, ETBEI);
193 bfin_serial_tx_chars(uart);
194 #endif
195 }
196
197 /*
198 * Interrupts are enabled
199 */
200 static void bfin_serial_stop_rx(struct uart_port *port)
201 {
202 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
203
204 UART_CLEAR_IER(uart, ERBFI);
205 }
206
207 /*
208 * Set the modem control timer to fire immediately.
209 */
210 static void bfin_serial_enable_ms(struct uart_port *port)
211 {
212 }
213
214
215 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
216 # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
217 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
218 #else
219 # define UART_GET_ANOMALY_THRESHOLD(uart) 0
220 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
221 #endif
222
223 #ifdef CONFIG_SERIAL_BFIN_PIO
224 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
225 {
226 struct tty_struct *tty = NULL;
227 unsigned int status, ch, flg;
228 static struct timeval anomaly_start = { .tv_sec = 0 };
229
230 status = UART_GET_LSR(uart);
231 UART_CLEAR_LSR(uart);
232
233 ch = UART_GET_CHAR(uart);
234 uart->port.icount.rx++;
235
236 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
237 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
238 if (kgdb_connected && kgdboc_port_line == uart->port.line
239 && kgdboc_break_enabled)
240 if (ch == 0x3) {/* Ctrl + C */
241 kgdb_breakpoint();
242 return;
243 }
244
245 if (!uart->port.state || !uart->port.state->port.tty)
246 return;
247 #endif
248 tty = uart->port.state->port.tty;
249
250 if (ANOMALY_05000363) {
251 /* The BF533 (and BF561) family of processors have a nice anomaly
252 * where they continuously generate characters for a "single" break.
253 * We have to basically ignore this flood until the "next" valid
254 * character comes across. Due to the nature of the flood, it is
255 * not possible to reliably catch bytes that are sent too quickly
256 * after this break. So application code talking to the Blackfin
257 * which sends a break signal must allow at least 1.5 character
258 * times after the end of the break for things to stabilize. This
259 * timeout was picked as it must absolutely be larger than 1
260 * character time +/- some percent. So 1.5 sounds good. All other
261 * Blackfin families operate properly. Woo.
262 */
263 if (anomaly_start.tv_sec) {
264 struct timeval curr;
265 suseconds_t usecs;
266
267 if ((~ch & (~ch + 1)) & 0xff)
268 goto known_good_char;
269
270 do_gettimeofday(&curr);
271 if (curr.tv_sec - anomaly_start.tv_sec > 1)
272 goto known_good_char;
273
274 usecs = 0;
275 if (curr.tv_sec != anomaly_start.tv_sec)
276 usecs += USEC_PER_SEC;
277 usecs += curr.tv_usec - anomaly_start.tv_usec;
278
279 if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
280 goto known_good_char;
281
282 if (ch)
283 anomaly_start.tv_sec = 0;
284 else
285 anomaly_start = curr;
286
287 return;
288
289 known_good_char:
290 status &= ~BI;
291 anomaly_start.tv_sec = 0;
292 }
293 }
294
295 if (status & BI) {
296 if (ANOMALY_05000363)
297 if (bfin_revid() < 5)
298 do_gettimeofday(&anomaly_start);
299 uart->port.icount.brk++;
300 if (uart_handle_break(&uart->port))
301 goto ignore_char;
302 status &= ~(PE | FE);
303 }
304 if (status & PE)
305 uart->port.icount.parity++;
306 if (status & OE)
307 uart->port.icount.overrun++;
308 if (status & FE)
309 uart->port.icount.frame++;
310
311 status &= uart->port.read_status_mask;
312
313 if (status & BI)
314 flg = TTY_BREAK;
315 else if (status & PE)
316 flg = TTY_PARITY;
317 else if (status & FE)
318 flg = TTY_FRAME;
319 else
320 flg = TTY_NORMAL;
321
322 if (uart_handle_sysrq_char(&uart->port, ch))
323 goto ignore_char;
324
325 uart_insert_char(&uart->port, status, OE, ch, flg);
326
327 ignore_char:
328 tty_flip_buffer_push(tty);
329 }
330
331 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
332 {
333 struct circ_buf *xmit = &uart->port.state->xmit;
334
335 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
336 #if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
337 /* Clear TFI bit */
338 UART_PUT_LSR(uart, TFI);
339 #endif
340 /* Anomaly notes:
341 * 05000215 - we always clear ETBEI within last UART TX
342 * interrupt to end a string. It is always set
343 * when start a new tx.
344 */
345 UART_CLEAR_IER(uart, ETBEI);
346 return;
347 }
348
349 if (uart->port.x_char) {
350 UART_PUT_CHAR(uart, uart->port.x_char);
351 uart->port.icount.tx++;
352 uart->port.x_char = 0;
353 }
354
355 while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
356 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
357 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
358 uart->port.icount.tx++;
359 }
360
361 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
362 uart_write_wakeup(&uart->port);
363 }
364
365 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
366 {
367 struct bfin_serial_port *uart = dev_id;
368
369 while (UART_GET_LSR(uart) & DR)
370 bfin_serial_rx_chars(uart);
371
372 return IRQ_HANDLED;
373 }
374
375 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
376 {
377 struct bfin_serial_port *uart = dev_id;
378
379 spin_lock(&uart->port.lock);
380 if (UART_GET_LSR(uart) & THRE)
381 bfin_serial_tx_chars(uart);
382 spin_unlock(&uart->port.lock);
383
384 return IRQ_HANDLED;
385 }
386 #endif
387
388 #ifdef CONFIG_SERIAL_BFIN_DMA
389 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
390 {
391 struct circ_buf *xmit = &uart->port.state->xmit;
392
393 uart->tx_done = 0;
394
395 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
396 uart->tx_count = 0;
397 uart->tx_done = 1;
398 return;
399 }
400
401 if (uart->port.x_char) {
402 UART_PUT_CHAR(uart, uart->port.x_char);
403 uart->port.icount.tx++;
404 uart->port.x_char = 0;
405 }
406
407 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
408 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
409 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
410 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
411 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
412 set_dma_config(uart->tx_dma_channel,
413 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
414 INTR_ON_BUF,
415 DIMENSION_LINEAR,
416 DATA_SIZE_8,
417 DMA_SYNC_RESTART));
418 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
419 set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
420 set_dma_x_modify(uart->tx_dma_channel, 1);
421 SSYNC();
422 enable_dma(uart->tx_dma_channel);
423
424 UART_SET_IER(uart, ETBEI);
425 }
426
427 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
428 {
429 struct tty_struct *tty = uart->port.state->port.tty;
430 int i, flg, status;
431
432 status = UART_GET_LSR(uart);
433 UART_CLEAR_LSR(uart);
434
435 uart->port.icount.rx +=
436 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
437 UART_XMIT_SIZE);
438
439 if (status & BI) {
440 uart->port.icount.brk++;
441 if (uart_handle_break(&uart->port))
442 goto dma_ignore_char;
443 status &= ~(PE | FE);
444 }
445 if (status & PE)
446 uart->port.icount.parity++;
447 if (status & OE)
448 uart->port.icount.overrun++;
449 if (status & FE)
450 uart->port.icount.frame++;
451
452 status &= uart->port.read_status_mask;
453
454 if (status & BI)
455 flg = TTY_BREAK;
456 else if (status & PE)
457 flg = TTY_PARITY;
458 else if (status & FE)
459 flg = TTY_FRAME;
460 else
461 flg = TTY_NORMAL;
462
463 for (i = uart->rx_dma_buf.tail; ; i++) {
464 if (i >= UART_XMIT_SIZE)
465 i = 0;
466 if (i == uart->rx_dma_buf.head)
467 break;
468 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
469 uart_insert_char(&uart->port, status, OE,
470 uart->rx_dma_buf.buf[i], flg);
471 }
472
473 dma_ignore_char:
474 tty_flip_buffer_push(tty);
475 }
476
477 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
478 {
479 int x_pos, pos;
480 unsigned long flags;
481
482 spin_lock_irqsave(&uart->rx_lock, flags);
483
484 /* 2D DMA RX buffer ring is used. Because curr_y_count and
485 * curr_x_count can't be read as an atomic operation,
486 * curr_y_count should be read before curr_x_count. When
487 * curr_x_count is read, curr_y_count may already indicate
488 * next buffer line. But, the position calculated here is
489 * still indicate the old line. The wrong position data may
490 * be smaller than current buffer tail, which cause garbages
491 * are received if it is not prohibit.
492 */
493 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
494 x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
495 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
496 if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
497 uart->rx_dma_nrows = 0;
498 x_pos = DMA_RX_XCOUNT - x_pos;
499 if (x_pos == DMA_RX_XCOUNT)
500 x_pos = 0;
501
502 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
503 /* Ignore receiving data if new position is in the same line of
504 * current buffer tail and small.
505 */
506 if (pos > uart->rx_dma_buf.tail ||
507 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
508 uart->rx_dma_buf.head = pos;
509 bfin_serial_dma_rx_chars(uart);
510 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
511 }
512
513 spin_unlock_irqrestore(&uart->rx_lock, flags);
514
515 mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
516 }
517
518 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
519 {
520 struct bfin_serial_port *uart = dev_id;
521 struct circ_buf *xmit = &uart->port.state->xmit;
522
523 spin_lock(&uart->port.lock);
524 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
525 disable_dma(uart->tx_dma_channel);
526 clear_dma_irqstat(uart->tx_dma_channel);
527 /* Anomaly notes:
528 * 05000215 - we always clear ETBEI within last UART TX
529 * interrupt to end a string. It is always set
530 * when start a new tx.
531 */
532 UART_CLEAR_IER(uart, ETBEI);
533 uart->port.icount.tx += uart->tx_count;
534 if (!(xmit->tail == 0 && xmit->head == 0)) {
535 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
536
537 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
538 uart_write_wakeup(&uart->port);
539 }
540
541 bfin_serial_dma_tx_chars(uart);
542 }
543
544 spin_unlock(&uart->port.lock);
545 return IRQ_HANDLED;
546 }
547
548 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
549 {
550 struct bfin_serial_port *uart = dev_id;
551 unsigned int irqstat;
552 int x_pos, pos;
553
554 spin_lock(&uart->rx_lock);
555 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
556 clear_dma_irqstat(uart->rx_dma_channel);
557
558 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
559 x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
560 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
561 if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
562 uart->rx_dma_nrows = 0;
563
564 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
565 if (pos > uart->rx_dma_buf.tail ||
566 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
567 uart->rx_dma_buf.head = pos;
568 bfin_serial_dma_rx_chars(uart);
569 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
570 }
571
572 spin_unlock(&uart->rx_lock);
573
574 return IRQ_HANDLED;
575 }
576 #endif
577
578 /*
579 * Return TIOCSER_TEMT when transmitter is not busy.
580 */
581 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
582 {
583 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
584 unsigned int lsr;
585
586 lsr = UART_GET_LSR(uart);
587 if (lsr & TEMT)
588 return TIOCSER_TEMT;
589 else
590 return 0;
591 }
592
593 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
594 {
595 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
596 u32 lcr = UART_GET_LCR(uart);
597 if (break_state)
598 lcr |= SB;
599 else
600 lcr &= ~SB;
601 UART_PUT_LCR(uart, lcr);
602 SSYNC();
603 }
604
605 static int bfin_serial_startup(struct uart_port *port)
606 {
607 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
608
609 #ifdef CONFIG_SERIAL_BFIN_DMA
610 dma_addr_t dma_handle;
611
612 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
613 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
614 return -EBUSY;
615 }
616
617 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
618 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
619 free_dma(uart->rx_dma_channel);
620 return -EBUSY;
621 }
622
623 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
624 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
625
626 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
627 uart->rx_dma_buf.head = 0;
628 uart->rx_dma_buf.tail = 0;
629 uart->rx_dma_nrows = 0;
630
631 set_dma_config(uart->rx_dma_channel,
632 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
633 INTR_ON_ROW, DIMENSION_2D,
634 DATA_SIZE_8,
635 DMA_SYNC_RESTART));
636 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
637 set_dma_x_modify(uart->rx_dma_channel, 1);
638 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
639 set_dma_y_modify(uart->rx_dma_channel, 1);
640 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
641 enable_dma(uart->rx_dma_channel);
642
643 uart->rx_dma_timer.data = (unsigned long)(uart);
644 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
645 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
646 add_timer(&(uart->rx_dma_timer));
647 #else
648 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
649 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
650 if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
651 kgdboc_break_enabled = 0;
652 else {
653 # endif
654 if (request_irq(uart->rx_irq, bfin_serial_rx_int, 0,
655 "BFIN_UART_RX", uart)) {
656 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
657 return -EBUSY;
658 }
659
660 if (request_irq
661 (uart->tx_irq, bfin_serial_tx_int, 0,
662 "BFIN_UART_TX", uart)) {
663 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
664 free_irq(uart->rx_irq, uart);
665 return -EBUSY;
666 }
667
668 # ifdef CONFIG_BF54x
669 {
670 /*
671 * UART2 and UART3 on BF548 share interrupt PINs and DMA
672 * controllers with SPORT2 and SPORT3. UART rx and tx
673 * interrupts are generated in PIO mode only when configure
674 * their peripheral mapping registers properly, which means
675 * request corresponding DMA channels in PIO mode as well.
676 */
677 unsigned uart_dma_ch_rx, uart_dma_ch_tx;
678
679 switch (uart->rx_irq) {
680 case IRQ_UART3_RX:
681 uart_dma_ch_rx = CH_UART3_RX;
682 uart_dma_ch_tx = CH_UART3_TX;
683 break;
684 case IRQ_UART2_RX:
685 uart_dma_ch_rx = CH_UART2_RX;
686 uart_dma_ch_tx = CH_UART2_TX;
687 break;
688 default:
689 uart_dma_ch_rx = uart_dma_ch_tx = 0;
690 break;
691 };
692
693 if (uart_dma_ch_rx &&
694 request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
695 printk(KERN_NOTICE"Fail to attach UART interrupt\n");
696 free_irq(uart->rx_irq, uart);
697 free_irq(uart->tx_irq, uart);
698 return -EBUSY;
699 }
700 if (uart_dma_ch_tx &&
701 request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
702 printk(KERN_NOTICE "Fail to attach UART interrupt\n");
703 free_dma(uart_dma_ch_rx);
704 free_irq(uart->rx_irq, uart);
705 free_irq(uart->tx_irq, uart);
706 return -EBUSY;
707 }
708 }
709 # endif
710 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
711 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
712 }
713 # endif
714 #endif
715
716 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
717 if (uart->cts_pin >= 0) {
718 if (request_irq(gpio_to_irq(uart->cts_pin),
719 bfin_serial_mctrl_cts_int,
720 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
721 0, "BFIN_UART_CTS", uart)) {
722 uart->cts_pin = -1;
723 pr_info("Unable to attach BlackFin UART CTS interrupt. So, disable it.\n");
724 }
725 }
726 if (uart->rts_pin >= 0) {
727 if (gpio_request(uart->rts_pin, DRIVER_NAME)) {
728 pr_info("fail to request RTS PIN at GPIO_%d\n", uart->rts_pin);
729 uart->rts_pin = -1;
730 } else
731 gpio_direction_output(uart->rts_pin, 0);
732 }
733 #endif
734 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
735 if (uart->cts_pin >= 0) {
736 if (request_irq(uart->status_irq, bfin_serial_mctrl_cts_int,
737 IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) {
738 uart->cts_pin = -1;
739 dev_info(port->dev, "Unable to attach BlackFin UART Modem Status interrupt.\n");
740 }
741
742 /* CTS RTS PINs are negative assertive. */
743 UART_PUT_MCR(uart, UART_GET_MCR(uart) | ACTS);
744 UART_SET_IER(uart, EDSSI);
745 }
746 #endif
747
748 UART_SET_IER(uart, ERBFI);
749 return 0;
750 }
751
752 static void bfin_serial_shutdown(struct uart_port *port)
753 {
754 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
755
756 #ifdef CONFIG_SERIAL_BFIN_DMA
757 disable_dma(uart->tx_dma_channel);
758 free_dma(uart->tx_dma_channel);
759 disable_dma(uart->rx_dma_channel);
760 free_dma(uart->rx_dma_channel);
761 del_timer(&(uart->rx_dma_timer));
762 dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
763 #else
764 #ifdef CONFIG_BF54x
765 switch (uart->port.irq) {
766 case IRQ_UART3_RX:
767 free_dma(CH_UART3_RX);
768 free_dma(CH_UART3_TX);
769 break;
770 case IRQ_UART2_RX:
771 free_dma(CH_UART2_RX);
772 free_dma(CH_UART2_TX);
773 break;
774 default:
775 break;
776 };
777 #endif
778 free_irq(uart->rx_irq, uart);
779 free_irq(uart->tx_irq, uart);
780 #endif
781
782 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
783 if (uart->cts_pin >= 0)
784 free_irq(gpio_to_irq(uart->cts_pin), uart);
785 if (uart->rts_pin >= 0)
786 gpio_free(uart->rts_pin);
787 #endif
788 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
789 if (uart->cts_pin >= 0)
790 free_irq(uart->status_irq, uart);
791 #endif
792 }
793
794 static void
795 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
796 struct ktermios *old)
797 {
798 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
799 unsigned long flags;
800 unsigned int baud, quot;
801 unsigned int ier, lcr = 0;
802
803 switch (termios->c_cflag & CSIZE) {
804 case CS8:
805 lcr = WLS(8);
806 break;
807 case CS7:
808 lcr = WLS(7);
809 break;
810 case CS6:
811 lcr = WLS(6);
812 break;
813 case CS5:
814 lcr = WLS(5);
815 break;
816 default:
817 printk(KERN_ERR "%s: word lengh not supported\n",
818 __func__);
819 }
820
821 /* Anomaly notes:
822 * 05000231 - STOP bit is always set to 1 whatever the user is set.
823 */
824 if (termios->c_cflag & CSTOPB) {
825 if (ANOMALY_05000231)
826 printk(KERN_WARNING "STOP bits other than 1 is not "
827 "supported in case of anomaly 05000231.\n");
828 else
829 lcr |= STB;
830 }
831 if (termios->c_cflag & PARENB)
832 lcr |= PEN;
833 if (!(termios->c_cflag & PARODD))
834 lcr |= EPS;
835 if (termios->c_cflag & CMSPAR)
836 lcr |= STP;
837
838 spin_lock_irqsave(&uart->port.lock, flags);
839
840 port->read_status_mask = OE;
841 if (termios->c_iflag & INPCK)
842 port->read_status_mask |= (FE | PE);
843 if (termios->c_iflag & (BRKINT | PARMRK))
844 port->read_status_mask |= BI;
845
846 /*
847 * Characters to ignore
848 */
849 port->ignore_status_mask = 0;
850 if (termios->c_iflag & IGNPAR)
851 port->ignore_status_mask |= FE | PE;
852 if (termios->c_iflag & IGNBRK) {
853 port->ignore_status_mask |= BI;
854 /*
855 * If we're ignoring parity and break indicators,
856 * ignore overruns too (for real raw support).
857 */
858 if (termios->c_iflag & IGNPAR)
859 port->ignore_status_mask |= OE;
860 }
861
862 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
863 quot = uart_get_divisor(port, baud);
864
865 /* If discipline is not IRDA, apply ANOMALY_05000230 */
866 if (termios->c_line != N_IRDA)
867 quot -= ANOMALY_05000230;
868
869 UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
870
871 /* Disable UART */
872 ier = UART_GET_IER(uart);
873 UART_PUT_GCTL(uart, UART_GET_GCTL(uart) & ~UCEN);
874 UART_DISABLE_INTS(uart);
875
876 /* Set DLAB in LCR to Access CLK */
877 UART_SET_DLAB(uart);
878
879 UART_PUT_CLK(uart, quot);
880 SSYNC();
881
882 /* Clear DLAB in LCR to Access THR RBR IER */
883 UART_CLEAR_DLAB(uart);
884
885 UART_PUT_LCR(uart, (UART_GET_LCR(uart) & ~LCR_MASK) | lcr);
886
887 /* Enable UART */
888 UART_ENABLE_INTS(uart, ier);
889 UART_PUT_GCTL(uart, UART_GET_GCTL(uart) | UCEN);
890
891 /* Port speed changed, update the per-port timeout. */
892 uart_update_timeout(port, termios->c_cflag, baud);
893
894 spin_unlock_irqrestore(&uart->port.lock, flags);
895 }
896
897 static const char *bfin_serial_type(struct uart_port *port)
898 {
899 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
900
901 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
902 }
903
904 /*
905 * Release the memory region(s) being used by 'port'.
906 */
907 static void bfin_serial_release_port(struct uart_port *port)
908 {
909 }
910
911 /*
912 * Request the memory region(s) being used by 'port'.
913 */
914 static int bfin_serial_request_port(struct uart_port *port)
915 {
916 return 0;
917 }
918
919 /*
920 * Configure/autoconfigure the port.
921 */
922 static void bfin_serial_config_port(struct uart_port *port, int flags)
923 {
924 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
925
926 if (flags & UART_CONFIG_TYPE &&
927 bfin_serial_request_port(&uart->port) == 0)
928 uart->port.type = PORT_BFIN;
929 }
930
931 /*
932 * Verify the new serial_struct (for TIOCSSERIAL).
933 * The only change we allow are to the flags and type, and
934 * even then only between PORT_BFIN and PORT_UNKNOWN
935 */
936 static int
937 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
938 {
939 return 0;
940 }
941
942 /*
943 * Enable the IrDA function if tty->ldisc.num is N_IRDA.
944 * In other cases, disable IrDA function.
945 */
946 static void bfin_serial_set_ldisc(struct uart_port *port, int ld)
947 {
948 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
949 unsigned int val;
950
951 switch (ld) {
952 case N_IRDA:
953 val = UART_GET_GCTL(uart);
954 val |= (UMOD_IRDA | RPOLC);
955 UART_PUT_GCTL(uart, val);
956 break;
957 default:
958 val = UART_GET_GCTL(uart);
959 val &= ~(UMOD_MASK | RPOLC);
960 UART_PUT_GCTL(uart, val);
961 }
962 }
963
964 static void bfin_serial_reset_irda(struct uart_port *port)
965 {
966 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
967 unsigned int val;
968
969 val = UART_GET_GCTL(uart);
970 val &= ~(UMOD_MASK | RPOLC);
971 UART_PUT_GCTL(uart, val);
972 SSYNC();
973 val |= (UMOD_IRDA | RPOLC);
974 UART_PUT_GCTL(uart, val);
975 SSYNC();
976 }
977
978 #ifdef CONFIG_CONSOLE_POLL
979 /* Anomaly notes:
980 * 05000099 - Because we only use THRE in poll_put and DR in poll_get,
981 * losing other bits of UART_LSR is not a problem here.
982 */
983 static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
984 {
985 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
986
987 while (!(UART_GET_LSR(uart) & THRE))
988 cpu_relax();
989
990 UART_CLEAR_DLAB(uart);
991 UART_PUT_CHAR(uart, (unsigned char)chr);
992 }
993
994 static int bfin_serial_poll_get_char(struct uart_port *port)
995 {
996 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
997 unsigned char chr;
998
999 while (!(UART_GET_LSR(uart) & DR))
1000 cpu_relax();
1001
1002 UART_CLEAR_DLAB(uart);
1003 chr = UART_GET_CHAR(uart);
1004
1005 return chr;
1006 }
1007 #endif
1008
1009 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
1010 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
1011 static void bfin_kgdboc_port_shutdown(struct uart_port *port)
1012 {
1013 if (kgdboc_break_enabled) {
1014 kgdboc_break_enabled = 0;
1015 bfin_serial_shutdown(port);
1016 }
1017 }
1018
1019 static int bfin_kgdboc_port_startup(struct uart_port *port)
1020 {
1021 kgdboc_port_line = port->line;
1022 kgdboc_break_enabled = !bfin_serial_startup(port);
1023 return 0;
1024 }
1025 #endif
1026
1027 static struct uart_ops bfin_serial_pops = {
1028 .tx_empty = bfin_serial_tx_empty,
1029 .set_mctrl = bfin_serial_set_mctrl,
1030 .get_mctrl = bfin_serial_get_mctrl,
1031 .stop_tx = bfin_serial_stop_tx,
1032 .start_tx = bfin_serial_start_tx,
1033 .stop_rx = bfin_serial_stop_rx,
1034 .enable_ms = bfin_serial_enable_ms,
1035 .break_ctl = bfin_serial_break_ctl,
1036 .startup = bfin_serial_startup,
1037 .shutdown = bfin_serial_shutdown,
1038 .set_termios = bfin_serial_set_termios,
1039 .set_ldisc = bfin_serial_set_ldisc,
1040 .type = bfin_serial_type,
1041 .release_port = bfin_serial_release_port,
1042 .request_port = bfin_serial_request_port,
1043 .config_port = bfin_serial_config_port,
1044 .verify_port = bfin_serial_verify_port,
1045 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
1046 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
1047 .kgdboc_port_startup = bfin_kgdboc_port_startup,
1048 .kgdboc_port_shutdown = bfin_kgdboc_port_shutdown,
1049 #endif
1050 #ifdef CONFIG_CONSOLE_POLL
1051 .poll_put_char = bfin_serial_poll_put_char,
1052 .poll_get_char = bfin_serial_poll_get_char,
1053 #endif
1054 };
1055
1056 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1057 /*
1058 * If the port was already initialised (eg, by a boot loader),
1059 * try to determine the current setup.
1060 */
1061 static void __init
1062 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1063 int *parity, int *bits)
1064 {
1065 unsigned int status;
1066
1067 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
1068 if (status == (ERBFI | ETBEI)) {
1069 /* ok, the port was enabled */
1070 u32 lcr, clk;
1071
1072 lcr = UART_GET_LCR(uart);
1073
1074 *parity = 'n';
1075 if (lcr & PEN) {
1076 if (lcr & EPS)
1077 *parity = 'e';
1078 else
1079 *parity = 'o';
1080 }
1081 *bits = ((lcr & WLS_MASK) >> WLS_OFFSET) + 5;
1082
1083 /* Set DLAB in LCR to Access CLK */
1084 UART_SET_DLAB(uart);
1085
1086 clk = UART_GET_CLK(uart);
1087
1088 /* Clear DLAB in LCR to Access THR RBR IER */
1089 UART_CLEAR_DLAB(uart);
1090
1091 *baud = get_sclk() / (16*clk);
1092 }
1093 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
1094 }
1095
1096 static struct uart_driver bfin_serial_reg;
1097
1098 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1099 {
1100 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1101 while (!(UART_GET_LSR(uart) & THRE))
1102 barrier();
1103 UART_PUT_CHAR(uart, ch);
1104 }
1105
1106 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1107 defined (CONFIG_EARLY_PRINTK) */
1108
1109 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1110 #define CLASS_BFIN_CONSOLE "bfin-console"
1111 /*
1112 * Interrupts are disabled on entering
1113 */
1114 static void
1115 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1116 {
1117 struct bfin_serial_port *uart = bfin_serial_ports[co->index];
1118 unsigned long flags;
1119
1120 spin_lock_irqsave(&uart->port.lock, flags);
1121 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1122 spin_unlock_irqrestore(&uart->port.lock, flags);
1123
1124 }
1125
1126 static int __init
1127 bfin_serial_console_setup(struct console *co, char *options)
1128 {
1129 struct bfin_serial_port *uart;
1130 int baud = 57600;
1131 int bits = 8;
1132 int parity = 'n';
1133 # if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1134 defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1135 int flow = 'r';
1136 # else
1137 int flow = 'n';
1138 # endif
1139
1140 /*
1141 * Check whether an invalid uart number has been specified, and
1142 * if so, search for the first available port that does have
1143 * console support.
1144 */
1145 if (co->index < 0 || co->index >= BFIN_UART_NR_PORTS)
1146 return -ENODEV;
1147
1148 uart = bfin_serial_ports[co->index];
1149 if (!uart)
1150 return -ENODEV;
1151
1152 if (options)
1153 uart_parse_options(options, &baud, &parity, &bits, &flow);
1154 else
1155 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1156
1157 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1158 }
1159
1160 static struct console bfin_serial_console = {
1161 .name = BFIN_SERIAL_DEV_NAME,
1162 .write = bfin_serial_console_write,
1163 .device = uart_console_device,
1164 .setup = bfin_serial_console_setup,
1165 .flags = CON_PRINTBUFFER,
1166 .index = -1,
1167 .data = &bfin_serial_reg,
1168 };
1169 #define BFIN_SERIAL_CONSOLE (&bfin_serial_console)
1170 #else
1171 #define BFIN_SERIAL_CONSOLE NULL
1172 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1173
1174 #ifdef CONFIG_EARLY_PRINTK
1175 static struct bfin_serial_port bfin_earlyprintk_port;
1176 #define CLASS_BFIN_EARLYPRINTK "bfin-earlyprintk"
1177
1178 /*
1179 * Interrupts are disabled on entering
1180 */
1181 static void
1182 bfin_earlyprintk_console_write(struct console *co, const char *s, unsigned int count)
1183 {
1184 unsigned long flags;
1185
1186 if (bfin_earlyprintk_port.port.line != co->index)
1187 return;
1188
1189 spin_lock_irqsave(&bfin_earlyprintk_port.port.lock, flags);
1190 uart_console_write(&bfin_earlyprintk_port.port, s, count,
1191 bfin_serial_console_putchar);
1192 spin_unlock_irqrestore(&bfin_earlyprintk_port.port.lock, flags);
1193 }
1194
1195 /*
1196 * This should have a .setup or .early_setup in it, but then things get called
1197 * without the command line options, and the baud rate gets messed up - so
1198 * don't let the common infrastructure play with things. (see calls to setup
1199 * & earlysetup in ./kernel/printk.c:register_console()
1200 */
1201 static struct __initdata console bfin_early_serial_console = {
1202 .name = "early_BFuart",
1203 .write = bfin_earlyprintk_console_write,
1204 .device = uart_console_device,
1205 .flags = CON_PRINTBUFFER,
1206 .index = -1,
1207 .data = &bfin_serial_reg,
1208 };
1209 #endif
1210
1211 static struct uart_driver bfin_serial_reg = {
1212 .owner = THIS_MODULE,
1213 .driver_name = DRIVER_NAME,
1214 .dev_name = BFIN_SERIAL_DEV_NAME,
1215 .major = BFIN_SERIAL_MAJOR,
1216 .minor = BFIN_SERIAL_MINOR,
1217 .nr = BFIN_UART_NR_PORTS,
1218 .cons = BFIN_SERIAL_CONSOLE,
1219 };
1220
1221 static int bfin_serial_suspend(struct platform_device *pdev, pm_message_t state)
1222 {
1223 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1224
1225 return uart_suspend_port(&bfin_serial_reg, &uart->port);
1226 }
1227
1228 static int bfin_serial_resume(struct platform_device *pdev)
1229 {
1230 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1231
1232 return uart_resume_port(&bfin_serial_reg, &uart->port);
1233 }
1234
1235 static int bfin_serial_probe(struct platform_device *pdev)
1236 {
1237 struct resource *res;
1238 struct bfin_serial_port *uart = NULL;
1239 int ret = 0;
1240
1241 if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
1242 dev_err(&pdev->dev, "Wrong bfin uart platform device id.\n");
1243 return -ENOENT;
1244 }
1245
1246 if (bfin_serial_ports[pdev->id] == NULL) {
1247
1248 uart = kzalloc(sizeof(*uart), GFP_KERNEL);
1249 if (!uart) {
1250 dev_err(&pdev->dev,
1251 "fail to malloc bfin_serial_port\n");
1252 return -ENOMEM;
1253 }
1254 bfin_serial_ports[pdev->id] = uart;
1255
1256 #ifdef CONFIG_EARLY_PRINTK
1257 if (!(bfin_earlyprintk_port.port.membase
1258 && bfin_earlyprintk_port.port.line == pdev->id)) {
1259 /*
1260 * If the peripheral PINs of current port is allocated
1261 * in earlyprintk probe stage, don't do it again.
1262 */
1263 #endif
1264 ret = peripheral_request_list(
1265 (unsigned short *)pdev->dev.platform_data, DRIVER_NAME);
1266 if (ret) {
1267 dev_err(&pdev->dev,
1268 "fail to request bfin serial peripherals\n");
1269 goto out_error_free_mem;
1270 }
1271 #ifdef CONFIG_EARLY_PRINTK
1272 }
1273 #endif
1274
1275 spin_lock_init(&uart->port.lock);
1276 uart->port.uartclk = get_sclk();
1277 uart->port.fifosize = BFIN_UART_TX_FIFO_SIZE;
1278 uart->port.ops = &bfin_serial_pops;
1279 uart->port.line = pdev->id;
1280 uart->port.iotype = UPIO_MEM;
1281 uart->port.flags = UPF_BOOT_AUTOCONF;
1282
1283 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1284 if (res == NULL) {
1285 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
1286 ret = -ENOENT;
1287 goto out_error_free_peripherals;
1288 }
1289
1290 uart->port.membase = ioremap(res->start, resource_size(res));
1291 if (!uart->port.membase) {
1292 dev_err(&pdev->dev, "Cannot map uart IO\n");
1293 ret = -ENXIO;
1294 goto out_error_free_peripherals;
1295 }
1296 uart->port.mapbase = res->start;
1297
1298 uart->tx_irq = platform_get_irq(pdev, 0);
1299 if (uart->tx_irq < 0) {
1300 dev_err(&pdev->dev, "No uart TX IRQ specified\n");
1301 ret = -ENOENT;
1302 goto out_error_unmap;
1303 }
1304
1305 uart->rx_irq = platform_get_irq(pdev, 1);
1306 if (uart->rx_irq < 0) {
1307 dev_err(&pdev->dev, "No uart RX IRQ specified\n");
1308 ret = -ENOENT;
1309 goto out_error_unmap;
1310 }
1311 uart->port.irq = uart->rx_irq;
1312
1313 uart->status_irq = platform_get_irq(pdev, 2);
1314 if (uart->status_irq < 0) {
1315 dev_err(&pdev->dev, "No uart status IRQ specified\n");
1316 ret = -ENOENT;
1317 goto out_error_unmap;
1318 }
1319
1320 #ifdef CONFIG_SERIAL_BFIN_DMA
1321 spin_lock_init(&uart->rx_lock);
1322 uart->tx_done = 1;
1323 uart->tx_count = 0;
1324
1325 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1326 if (res == NULL) {
1327 dev_err(&pdev->dev, "No uart TX DMA channel specified\n");
1328 ret = -ENOENT;
1329 goto out_error_unmap;
1330 }
1331 uart->tx_dma_channel = res->start;
1332
1333 res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
1334 if (res == NULL) {
1335 dev_err(&pdev->dev, "No uart RX DMA channel specified\n");
1336 ret = -ENOENT;
1337 goto out_error_unmap;
1338 }
1339 uart->rx_dma_channel = res->start;
1340
1341 init_timer(&(uart->rx_dma_timer));
1342 #endif
1343
1344 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1345 defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1346 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1347 if (res == NULL)
1348 uart->cts_pin = -1;
1349 else {
1350 uart->cts_pin = res->start;
1351 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1352 uart->port.flags |= ASYNC_CTS_FLOW;
1353 #endif
1354 }
1355
1356 res = platform_get_resource(pdev, IORESOURCE_IO, 1);
1357 if (res == NULL)
1358 uart->rts_pin = -1;
1359 else
1360 uart->rts_pin = res->start;
1361 #endif
1362 }
1363
1364 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1365 if (!is_early_platform_device(pdev)) {
1366 #endif
1367 uart = bfin_serial_ports[pdev->id];
1368 uart->port.dev = &pdev->dev;
1369 dev_set_drvdata(&pdev->dev, uart);
1370 ret = uart_add_one_port(&bfin_serial_reg, &uart->port);
1371 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1372 }
1373 #endif
1374
1375 if (!ret)
1376 return 0;
1377
1378 if (uart) {
1379 out_error_unmap:
1380 iounmap(uart->port.membase);
1381 out_error_free_peripherals:
1382 peripheral_free_list(
1383 (unsigned short *)pdev->dev.platform_data);
1384 out_error_free_mem:
1385 kfree(uart);
1386 bfin_serial_ports[pdev->id] = NULL;
1387 }
1388
1389 return ret;
1390 }
1391
1392 static int bfin_serial_remove(struct platform_device *pdev)
1393 {
1394 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1395
1396 dev_set_drvdata(&pdev->dev, NULL);
1397
1398 if (uart) {
1399 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1400 iounmap(uart->port.membase);
1401 peripheral_free_list(
1402 (unsigned short *)pdev->dev.platform_data);
1403 kfree(uart);
1404 bfin_serial_ports[pdev->id] = NULL;
1405 }
1406
1407 return 0;
1408 }
1409
1410 static struct platform_driver bfin_serial_driver = {
1411 .probe = bfin_serial_probe,
1412 .remove = bfin_serial_remove,
1413 .suspend = bfin_serial_suspend,
1414 .resume = bfin_serial_resume,
1415 .driver = {
1416 .name = DRIVER_NAME,
1417 .owner = THIS_MODULE,
1418 },
1419 };
1420
1421 #if defined(CONFIG_SERIAL_BFIN_CONSOLE)
1422 static __initdata struct early_platform_driver early_bfin_serial_driver = {
1423 .class_str = CLASS_BFIN_CONSOLE,
1424 .pdrv = &bfin_serial_driver,
1425 .requested_id = EARLY_PLATFORM_ID_UNSET,
1426 };
1427
1428 static int __init bfin_serial_rs_console_init(void)
1429 {
1430 early_platform_driver_register(&early_bfin_serial_driver, DRIVER_NAME);
1431
1432 early_platform_driver_probe(CLASS_BFIN_CONSOLE, BFIN_UART_NR_PORTS, 0);
1433
1434 register_console(&bfin_serial_console);
1435
1436 return 0;
1437 }
1438 console_initcall(bfin_serial_rs_console_init);
1439 #endif
1440
1441 #ifdef CONFIG_EARLY_PRINTK
1442 /*
1443 * Memory can't be allocated dynamically during earlyprink init stage.
1444 * So, do individual probe for earlyprink with a static uart port variable.
1445 */
1446 static int bfin_earlyprintk_probe(struct platform_device *pdev)
1447 {
1448 struct resource *res;
1449 int ret;
1450
1451 if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
1452 dev_err(&pdev->dev, "Wrong earlyprintk platform device id.\n");
1453 return -ENOENT;
1454 }
1455
1456 ret = peripheral_request_list(
1457 (unsigned short *)pdev->dev.platform_data, DRIVER_NAME);
1458 if (ret) {
1459 dev_err(&pdev->dev,
1460 "fail to request bfin serial peripherals\n");
1461 return ret;
1462 }
1463
1464 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1465 if (res == NULL) {
1466 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
1467 ret = -ENOENT;
1468 goto out_error_free_peripherals;
1469 }
1470
1471 bfin_earlyprintk_port.port.membase = ioremap(res->start,
1472 resource_size(res));
1473 if (!bfin_earlyprintk_port.port.membase) {
1474 dev_err(&pdev->dev, "Cannot map uart IO\n");
1475 ret = -ENXIO;
1476 goto out_error_free_peripherals;
1477 }
1478 bfin_earlyprintk_port.port.mapbase = res->start;
1479 bfin_earlyprintk_port.port.line = pdev->id;
1480 bfin_earlyprintk_port.port.uartclk = get_sclk();
1481 bfin_earlyprintk_port.port.fifosize = BFIN_UART_TX_FIFO_SIZE;
1482 spin_lock_init(&bfin_earlyprintk_port.port.lock);
1483
1484 return 0;
1485
1486 out_error_free_peripherals:
1487 peripheral_free_list(
1488 (unsigned short *)pdev->dev.platform_data);
1489
1490 return ret;
1491 }
1492
1493 static struct platform_driver bfin_earlyprintk_driver = {
1494 .probe = bfin_earlyprintk_probe,
1495 .driver = {
1496 .name = DRIVER_NAME,
1497 .owner = THIS_MODULE,
1498 },
1499 };
1500
1501 static __initdata struct early_platform_driver early_bfin_earlyprintk_driver = {
1502 .class_str = CLASS_BFIN_EARLYPRINTK,
1503 .pdrv = &bfin_earlyprintk_driver,
1504 .requested_id = EARLY_PLATFORM_ID_UNSET,
1505 };
1506
1507 struct console __init *bfin_earlyserial_init(unsigned int port,
1508 unsigned int cflag)
1509 {
1510 struct ktermios t;
1511 char port_name[20];
1512
1513 if (port < 0 || port >= BFIN_UART_NR_PORTS)
1514 return NULL;
1515
1516 /*
1517 * Only probe resource of the given port in earlyprintk boot arg.
1518 * The expected port id should be indicated in port name string.
1519 */
1520 snprintf(port_name, 20, DRIVER_NAME ".%d", port);
1521 early_platform_driver_register(&early_bfin_earlyprintk_driver,
1522 port_name);
1523 early_platform_driver_probe(CLASS_BFIN_EARLYPRINTK, 1, 0);
1524
1525 if (!bfin_earlyprintk_port.port.membase)
1526 return NULL;
1527
1528 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1529 /*
1530 * If we are using early serial, don't let the normal console rewind
1531 * log buffer, since that causes things to be printed multiple times
1532 */
1533 bfin_serial_console.flags &= ~CON_PRINTBUFFER;
1534 #endif
1535
1536 bfin_early_serial_console.index = port;
1537 t.c_cflag = cflag;
1538 t.c_iflag = 0;
1539 t.c_oflag = 0;
1540 t.c_lflag = ICANON;
1541 t.c_line = port;
1542 bfin_serial_set_termios(&bfin_earlyprintk_port.port, &t, &t);
1543
1544 return &bfin_early_serial_console;
1545 }
1546 #endif /* CONFIG_EARLY_PRINTK */
1547
1548 static int __init bfin_serial_init(void)
1549 {
1550 int ret;
1551
1552 pr_info("Blackfin serial driver\n");
1553
1554 ret = uart_register_driver(&bfin_serial_reg);
1555 if (ret) {
1556 pr_err("failed to register %s:%d\n",
1557 bfin_serial_reg.driver_name, ret);
1558 }
1559
1560 ret = platform_driver_register(&bfin_serial_driver);
1561 if (ret) {
1562 pr_err("fail to register bfin uart\n");
1563 uart_unregister_driver(&bfin_serial_reg);
1564 }
1565
1566 return ret;
1567 }
1568
1569 static void __exit bfin_serial_exit(void)
1570 {
1571 platform_driver_unregister(&bfin_serial_driver);
1572 uart_unregister_driver(&bfin_serial_reg);
1573 }
1574
1575
1576 module_init(bfin_serial_init);
1577 module_exit(bfin_serial_exit);
1578
1579 MODULE_AUTHOR("Sonic Zhang, Aubrey Li");
1580 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1581 MODULE_LICENSE("GPL");
1582 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1583 MODULE_ALIAS("platform:bfin-uart");
Linux kernel - Deliverables
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