2 * SC268xx.c: Serial driver for Philiphs SC2681/SC2692 devices.
4 * Copyright (C) 2006,2007 Thomas Bogendörfer (tsbogend@alpha.franken.de)
7 #include <linux/module.h>
8 #include <linux/kernel.h>
9 #include <linux/errno.h>
10 #include <linux/tty.h>
11 #include <linux/tty_flip.h>
12 #include <linux/major.h>
13 #include <linux/circ_buf.h>
14 #include <linux/serial.h>
15 #include <linux/sysrq.h>
16 #include <linux/console.h>
17 #include <linux/spinlock.h>
18 #include <linux/slab.h>
19 #include <linux/delay.h>
20 #include <linux/init.h>
21 #include <linux/platform_device.h>
22 #include <linux/irq.h>
25 #warning "Please try migrate to use new driver SCCNXP and report the status" \
26 "in the linux-serial mailing list."
28 #if defined(CONFIG_MAGIC_SYSRQ)
32 #include <linux/serial_core.h>
34 #define SC26XX_MAJOR 204
35 #define SC26XX_MINOR_START 205
38 struct uart_sc26xx_port
{
39 struct uart_port port
[2];
49 /* register common to both ports */
56 #define WR_OPR_SET 0x38
57 #define WR_OPR_CLR 0x3C
59 /* access common register */
60 #define READ_SC(p, r) readb((p)->membase + RD_##r)
61 #define WRITE_SC(p, r, v) writeb((v), (p)->membase + WR_##r)
63 /* register per port */
64 #define RD_PORT_MRx 0x00
65 #define RD_PORT_SR 0x04
66 #define RD_PORT_RHR 0x0c
68 #define WR_PORT_MRx 0x00
69 #define WR_PORT_CSR 0x04
70 #define WR_PORT_CR 0x08
71 #define WR_PORT_THR 0x0c
74 #define SR_BREAK (1 << 7)
75 #define SR_FRAME (1 << 6)
76 #define SR_PARITY (1 << 5)
77 #define SR_OVERRUN (1 << 4)
78 #define SR_TXRDY (1 << 2)
79 #define SR_RXRDY (1 << 0)
81 #define CR_RES_MR (1 << 4)
82 #define CR_RES_RX (2 << 4)
83 #define CR_RES_TX (3 << 4)
84 #define CR_STRT_BRK (6 << 4)
85 #define CR_STOP_BRK (7 << 4)
86 #define CR_DIS_TX (1 << 3)
87 #define CR_ENA_TX (1 << 2)
88 #define CR_DIS_RX (1 << 1)
89 #define CR_ENA_RX (1 << 0)
92 #define ISR_RXRDYB (1 << 5)
93 #define ISR_TXRDYB (1 << 4)
94 #define ISR_RXRDYA (1 << 1)
95 #define ISR_TXRDYA (1 << 0)
98 #define IMR_RXRDY (1 << 1)
99 #define IMR_TXRDY (1 << 0)
101 /* access port register */
102 static inline u8
read_sc_port(struct uart_port
*p
, u8 reg
)
104 return readb(p
->membase
+ p
->line
* 0x20 + reg
);
107 static inline void write_sc_port(struct uart_port
*p
, u8 reg
, u8 val
)
109 writeb(val
, p
->membase
+ p
->line
* 0x20 + reg
);
112 #define READ_SC_PORT(p, r) read_sc_port(p, RD_PORT_##r)
113 #define WRITE_SC_PORT(p, r, v) write_sc_port(p, WR_PORT_##r, v)
115 static void sc26xx_enable_irq(struct uart_port
*port
, int mask
)
117 struct uart_sc26xx_port
*up
;
118 int line
= port
->line
;
121 up
= container_of(port
, struct uart_sc26xx_port
, port
[0]);
123 up
->imr
|= mask
<< (line
* 4);
124 WRITE_SC(port
, IMR
, up
->imr
);
127 static void sc26xx_disable_irq(struct uart_port
*port
, int mask
)
129 struct uart_sc26xx_port
*up
;
130 int line
= port
->line
;
133 up
= container_of(port
, struct uart_sc26xx_port
, port
[0]);
135 up
->imr
&= ~(mask
<< (line
* 4));
136 WRITE_SC(port
, IMR
, up
->imr
);
139 static struct tty_struct
*receive_chars(struct uart_port
*port
)
141 struct tty_struct
*tty
= NULL
;
147 if (port
->state
!= NULL
) /* Unopened serial console */
148 tty
= port
->state
->port
.tty
;
150 while (limit
-- > 0) {
151 status
= READ_SC_PORT(port
, SR
);
152 if (!(status
& SR_RXRDY
))
154 ch
= READ_SC_PORT(port
, RHR
);
159 if (unlikely(status
& (SR_BREAK
| SR_FRAME
|
160 SR_PARITY
| SR_OVERRUN
))) {
161 if (status
& SR_BREAK
) {
162 status
&= ~(SR_PARITY
| SR_FRAME
);
164 if (uart_handle_break(port
))
166 } else if (status
& SR_PARITY
)
167 port
->icount
.parity
++;
168 else if (status
& SR_FRAME
)
169 port
->icount
.frame
++;
170 if (status
& SR_OVERRUN
)
171 port
->icount
.overrun
++;
173 status
&= port
->read_status_mask
;
174 if (status
& SR_BREAK
)
176 else if (status
& SR_PARITY
)
178 else if (status
& SR_FRAME
)
182 if (uart_handle_sysrq_char(port
, ch
))
185 if (status
& port
->ignore_status_mask
)
188 tty_insert_flip_char(tty
, ch
, flag
);
193 static void transmit_chars(struct uart_port
*port
)
195 struct circ_buf
*xmit
;
200 xmit
= &port
->state
->xmit
;
201 if (uart_circ_empty(xmit
) || uart_tx_stopped(port
)) {
202 sc26xx_disable_irq(port
, IMR_TXRDY
);
205 while (!uart_circ_empty(xmit
)) {
206 if (!(READ_SC_PORT(port
, SR
) & SR_TXRDY
))
209 WRITE_SC_PORT(port
, THR
, xmit
->buf
[xmit
->tail
]);
210 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
213 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
214 uart_write_wakeup(port
);
217 static irqreturn_t
sc26xx_interrupt(int irq
, void *dev_id
)
219 struct uart_sc26xx_port
*up
= dev_id
;
220 struct tty_struct
*tty
;
224 spin_lock_irqsave(&up
->port
[0].lock
, flags
);
227 isr
= READ_SC(&up
->port
[0], ISR
);
228 if (isr
& ISR_TXRDYA
)
229 transmit_chars(&up
->port
[0]);
230 if (isr
& ISR_RXRDYA
)
231 tty
= receive_chars(&up
->port
[0]);
233 spin_unlock(&up
->port
[0].lock
);
236 tty_flip_buffer_push(tty
);
238 spin_lock(&up
->port
[1].lock
);
241 if (isr
& ISR_TXRDYB
)
242 transmit_chars(&up
->port
[1]);
243 if (isr
& ISR_RXRDYB
)
244 tty
= receive_chars(&up
->port
[1]);
246 spin_unlock_irqrestore(&up
->port
[1].lock
, flags
);
249 tty_flip_buffer_push(tty
);
254 /* port->lock is not held. */
255 static unsigned int sc26xx_tx_empty(struct uart_port
*port
)
257 return (READ_SC_PORT(port
, SR
) & SR_TXRDY
) ? TIOCSER_TEMT
: 0;
260 /* port->lock held by caller. */
261 static void sc26xx_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
263 struct uart_sc26xx_port
*up
;
264 int line
= port
->line
;
267 up
= container_of(port
, struct uart_sc26xx_port
, port
[0]);
269 if (up
->dtr_mask
[line
]) {
270 if (mctrl
& TIOCM_DTR
)
271 WRITE_SC(port
, OPR_SET
, up
->dtr_mask
[line
]);
273 WRITE_SC(port
, OPR_CLR
, up
->dtr_mask
[line
]);
275 if (up
->rts_mask
[line
]) {
276 if (mctrl
& TIOCM_RTS
)
277 WRITE_SC(port
, OPR_SET
, up
->rts_mask
[line
]);
279 WRITE_SC(port
, OPR_CLR
, up
->rts_mask
[line
]);
283 /* port->lock is held by caller and interrupts are disabled. */
284 static unsigned int sc26xx_get_mctrl(struct uart_port
*port
)
286 struct uart_sc26xx_port
*up
;
287 int line
= port
->line
;
288 unsigned int mctrl
= TIOCM_DSR
| TIOCM_CTS
| TIOCM_CAR
;
292 up
= container_of(port
, struct uart_sc26xx_port
, port
[0]);
293 ipr
= READ_SC(port
, IPR
) ^ 0xff;
295 if (up
->dsr_mask
[line
]) {
297 mctrl
|= ipr
& up
->dsr_mask
[line
] ? TIOCM_DSR
: 0;
299 if (up
->cts_mask
[line
]) {
301 mctrl
|= ipr
& up
->cts_mask
[line
] ? TIOCM_CTS
: 0;
303 if (up
->dcd_mask
[line
]) {
305 mctrl
|= ipr
& up
->dcd_mask
[line
] ? TIOCM_CAR
: 0;
307 if (up
->ri_mask
[line
]) {
309 mctrl
|= ipr
& up
->ri_mask
[line
] ? TIOCM_RNG
: 0;
314 /* port->lock held by caller. */
315 static void sc26xx_stop_tx(struct uart_port
*port
)
320 /* port->lock held by caller. */
321 static void sc26xx_start_tx(struct uart_port
*port
)
323 struct circ_buf
*xmit
= &port
->state
->xmit
;
325 while (!uart_circ_empty(xmit
)) {
326 if (!(READ_SC_PORT(port
, SR
) & SR_TXRDY
)) {
327 sc26xx_enable_irq(port
, IMR_TXRDY
);
330 WRITE_SC_PORT(port
, THR
, xmit
->buf
[xmit
->tail
]);
331 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
336 /* port->lock held by caller. */
337 static void sc26xx_stop_rx(struct uart_port
*port
)
341 /* port->lock held by caller. */
342 static void sc26xx_enable_ms(struct uart_port
*port
)
346 /* port->lock is not held. */
347 static void sc26xx_break_ctl(struct uart_port
*port
, int break_state
)
349 if (break_state
== -1)
350 WRITE_SC_PORT(port
, CR
, CR_STRT_BRK
);
352 WRITE_SC_PORT(port
, CR
, CR_STOP_BRK
);
355 /* port->lock is not held. */
356 static int sc26xx_startup(struct uart_port
*port
)
358 sc26xx_disable_irq(port
, IMR_TXRDY
| IMR_RXRDY
);
359 WRITE_SC(port
, OPCR
, 0);
361 /* reset tx and rx */
362 WRITE_SC_PORT(port
, CR
, CR_RES_RX
);
363 WRITE_SC_PORT(port
, CR
, CR_RES_TX
);
366 WRITE_SC_PORT(port
, CR
, CR_ENA_TX
| CR_ENA_RX
);
369 sc26xx_enable_irq(port
, IMR_RXRDY
);
373 /* port->lock is not held. */
374 static void sc26xx_shutdown(struct uart_port
*port
)
376 /* disable interrupst */
377 sc26xx_disable_irq(port
, IMR_TXRDY
| IMR_RXRDY
);
380 WRITE_SC_PORT(port
, CR
, CR_DIS_TX
| CR_DIS_RX
);
383 /* port->lock is not held. */
384 static void sc26xx_set_termios(struct uart_port
*port
, struct ktermios
*termios
,
385 struct ktermios
*old
)
387 unsigned int baud
= uart_get_baud_rate(port
, termios
, old
, 0, 4000000);
388 unsigned int quot
= uart_get_divisor(port
, baud
);
389 unsigned int iflag
, cflag
;
393 spin_lock_irqsave(&port
->lock
, flags
);
395 while ((READ_SC_PORT(port
, SR
) & ((1 << 3) | (1 << 2))) != 0xc)
398 WRITE_SC_PORT(port
, CR
, CR_DIS_TX
| CR_DIS_RX
);
400 iflag
= termios
->c_iflag
;
401 cflag
= termios
->c_cflag
;
403 port
->read_status_mask
= SR_OVERRUN
;
405 port
->read_status_mask
|= SR_PARITY
| SR_FRAME
;
406 if (iflag
& (BRKINT
| PARMRK
))
407 port
->read_status_mask
|= SR_BREAK
;
409 port
->ignore_status_mask
= 0;
411 port
->ignore_status_mask
|= SR_BREAK
;
412 if ((cflag
& CREAD
) == 0)
413 port
->ignore_status_mask
|= SR_BREAK
| SR_FRAME
|
414 SR_PARITY
| SR_OVERRUN
;
416 switch (cflag
& CSIZE
) {
434 if (cflag
& PARENB
) {
477 WRITE_SC_PORT(port
, CR
, CR_RES_MR
);
478 WRITE_SC_PORT(port
, MRx
, mr1
);
479 WRITE_SC_PORT(port
, MRx
, mr2
);
481 WRITE_SC(port
, ACR
, 0x80);
482 WRITE_SC_PORT(port
, CSR
, csr
);
484 /* reset tx and rx */
485 WRITE_SC_PORT(port
, CR
, CR_RES_RX
);
486 WRITE_SC_PORT(port
, CR
, CR_RES_TX
);
488 WRITE_SC_PORT(port
, CR
, CR_ENA_TX
| CR_ENA_RX
);
489 while ((READ_SC_PORT(port
, SR
) & ((1 << 3) | (1 << 2))) != 0xc)
493 uart_update_timeout(port
, cflag
,
494 (port
->uartclk
/ (16 * quot
)));
496 spin_unlock_irqrestore(&port
->lock
, flags
);
499 static const char *sc26xx_type(struct uart_port
*port
)
504 static void sc26xx_release_port(struct uart_port
*port
)
508 static int sc26xx_request_port(struct uart_port
*port
)
513 static void sc26xx_config_port(struct uart_port
*port
, int flags
)
517 static int sc26xx_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
522 static struct uart_ops sc26xx_ops
= {
523 .tx_empty
= sc26xx_tx_empty
,
524 .set_mctrl
= sc26xx_set_mctrl
,
525 .get_mctrl
= sc26xx_get_mctrl
,
526 .stop_tx
= sc26xx_stop_tx
,
527 .start_tx
= sc26xx_start_tx
,
528 .stop_rx
= sc26xx_stop_rx
,
529 .enable_ms
= sc26xx_enable_ms
,
530 .break_ctl
= sc26xx_break_ctl
,
531 .startup
= sc26xx_startup
,
532 .shutdown
= sc26xx_shutdown
,
533 .set_termios
= sc26xx_set_termios
,
535 .release_port
= sc26xx_release_port
,
536 .request_port
= sc26xx_request_port
,
537 .config_port
= sc26xx_config_port
,
538 .verify_port
= sc26xx_verify_port
,
541 static struct uart_port
*sc26xx_port
;
543 #ifdef CONFIG_SERIAL_SC26XX_CONSOLE
544 static void sc26xx_console_putchar(struct uart_port
*port
, char c
)
549 spin_lock_irqsave(&port
->lock
, flags
);
551 while (limit
-- > 0) {
552 if (READ_SC_PORT(port
, SR
) & SR_TXRDY
) {
553 WRITE_SC_PORT(port
, THR
, c
);
559 spin_unlock_irqrestore(&port
->lock
, flags
);
562 static void sc26xx_console_write(struct console
*con
, const char *s
, unsigned n
)
564 struct uart_port
*port
= sc26xx_port
;
567 for (i
= 0; i
< n
; i
++) {
569 sc26xx_console_putchar(port
, '\r');
570 sc26xx_console_putchar(port
, *s
++);
574 static int __init
sc26xx_console_setup(struct console
*con
, char *options
)
576 struct uart_port
*port
= sc26xx_port
;
582 if (port
->type
!= PORT_SC26XX
)
585 printk(KERN_INFO
"Console: ttySC%d (SC26XX)\n", con
->index
);
587 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
589 return uart_set_options(port
, con
, baud
, parity
, bits
, flow
);
592 static struct uart_driver sc26xx_reg
;
593 static struct console sc26xx_console
= {
595 .write
= sc26xx_console_write
,
596 .device
= uart_console_device
,
597 .setup
= sc26xx_console_setup
,
598 .flags
= CON_PRINTBUFFER
,
602 #define SC26XX_CONSOLE &sc26xx_console
604 #define SC26XX_CONSOLE NULL
607 static struct uart_driver sc26xx_reg
= {
608 .owner
= THIS_MODULE
,
609 .driver_name
= "SC26xx",
611 .major
= SC26XX_MAJOR
,
612 .minor
= SC26XX_MINOR_START
,
614 .cons
= SC26XX_CONSOLE
,
617 static u8
sc26xx_flags2mask(unsigned int flags
, unsigned int bitpos
)
619 unsigned int bit
= (flags
>> bitpos
) & 15;
621 return bit
? (1 << (bit
- 1)) : 0;
624 static void __devinit
sc26xx_init_masks(struct uart_sc26xx_port
*up
,
625 int line
, unsigned int data
)
627 up
->dtr_mask
[line
] = sc26xx_flags2mask(data
, 0);
628 up
->rts_mask
[line
] = sc26xx_flags2mask(data
, 4);
629 up
->dsr_mask
[line
] = sc26xx_flags2mask(data
, 8);
630 up
->cts_mask
[line
] = sc26xx_flags2mask(data
, 12);
631 up
->dcd_mask
[line
] = sc26xx_flags2mask(data
, 16);
632 up
->ri_mask
[line
] = sc26xx_flags2mask(data
, 20);
635 static int __devinit
sc26xx_probe(struct platform_device
*dev
)
637 struct resource
*res
;
638 struct uart_sc26xx_port
*up
;
639 unsigned int *sc26xx_data
= dev
->dev
.platform_data
;
642 res
= platform_get_resource(dev
, IORESOURCE_MEM
, 0);
646 up
= kzalloc(sizeof *up
, GFP_KERNEL
);
650 up
->port
[0].line
= 0;
651 up
->port
[0].ops
= &sc26xx_ops
;
652 up
->port
[0].type
= PORT_SC26XX
;
653 up
->port
[0].uartclk
= (29491200 / 16); /* arbitrary */
655 up
->port
[0].mapbase
= res
->start
;
656 up
->port
[0].membase
= ioremap_nocache(up
->port
[0].mapbase
, 0x40);
657 up
->port
[0].iotype
= UPIO_MEM
;
658 up
->port
[0].irq
= platform_get_irq(dev
, 0);
660 up
->port
[0].dev
= &dev
->dev
;
662 sc26xx_init_masks(up
, 0, sc26xx_data
[0]);
664 sc26xx_port
= &up
->port
[0];
666 up
->port
[1].line
= 1;
667 up
->port
[1].ops
= &sc26xx_ops
;
668 up
->port
[1].type
= PORT_SC26XX
;
669 up
->port
[1].uartclk
= (29491200 / 16); /* arbitrary */
671 up
->port
[1].mapbase
= up
->port
[0].mapbase
;
672 up
->port
[1].membase
= up
->port
[0].membase
;
673 up
->port
[1].iotype
= UPIO_MEM
;
674 up
->port
[1].irq
= up
->port
[0].irq
;
676 up
->port
[1].dev
= &dev
->dev
;
678 sc26xx_init_masks(up
, 1, sc26xx_data
[1]);
680 err
= uart_register_driver(&sc26xx_reg
);
684 sc26xx_reg
.tty_driver
->name_base
= sc26xx_reg
.minor
;
686 err
= uart_add_one_port(&sc26xx_reg
, &up
->port
[0]);
688 goto out_unregister_driver
;
690 err
= uart_add_one_port(&sc26xx_reg
, &up
->port
[1]);
692 goto out_remove_port0
;
694 err
= request_irq(up
->port
[0].irq
, sc26xx_interrupt
, 0, "sc26xx", up
);
696 goto out_remove_ports
;
698 dev_set_drvdata(&dev
->dev
, up
);
702 uart_remove_one_port(&sc26xx_reg
, &up
->port
[1]);
704 uart_remove_one_port(&sc26xx_reg
, &up
->port
[0]);
706 out_unregister_driver
:
707 uart_unregister_driver(&sc26xx_reg
);
716 static int __exit
sc26xx_driver_remove(struct platform_device
*dev
)
718 struct uart_sc26xx_port
*up
= dev_get_drvdata(&dev
->dev
);
720 free_irq(up
->port
[0].irq
, up
);
722 uart_remove_one_port(&sc26xx_reg
, &up
->port
[0]);
723 uart_remove_one_port(&sc26xx_reg
, &up
->port
[1]);
725 uart_unregister_driver(&sc26xx_reg
);
730 dev_set_drvdata(&dev
->dev
, NULL
);
734 static struct platform_driver sc26xx_driver
= {
735 .probe
= sc26xx_probe
,
736 .remove
= __devexit_p(sc26xx_driver_remove
),
739 .owner
= THIS_MODULE
,
743 module_platform_driver(sc26xx_driver
);
745 MODULE_AUTHOR("Thomas Bogendörfer");
746 MODULE_DESCRIPTION("SC681/SC2692 serial driver");
747 MODULE_VERSION("1.0");
748 MODULE_LICENSE("GPL");
749 MODULE_ALIAS("platform:SC26xx");