2 * ci13xxx_udc.c - MIPS USB IP core family device controller
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
14 * Description: MIPS USB IP core family device controller
15 * Currently it only supports IP part number CI13412
17 * This driver is composed of several blocks:
18 * - HW: hardware interface
19 * - DBG: debug facilities (optional)
21 * - ISR: interrupts handling
22 * - ENDPT: endpoint operations (Gadget API)
23 * - GADGET: gadget operations (Gadget API)
24 * - BUS: bus glue code, bus abstraction layer
25 * - PCI: PCI core interface and PCI resources (interrupts, memory...)
28 * - CONFIG_USB_GADGET_DEBUG_FILES: enable debug facilities
29 * - STALL_IN: non-empty bulk-in pipes cannot be halted
30 * if defined mass storage compliance succeeds but with warnings
34 * if undefined usbtest 13 fails
35 * - TRACE: enable function tracing (depends on DEBUG)
38 * - Chapter 9 & Mass Storage Compliance with Gadget File Storage
39 * - Chapter 9 Compliance with Gadget Zero (STALL_IN undefined)
40 * - Normal & LPM support
43 * - OK: 0-12, 13 (STALL_IN defined) & 14
44 * - Not Supported: 15 & 16 (ISO)
48 * - Isochronous & Interrupt Traffic
49 * - Handle requests which spawns into several TDs
50 * - GET_STATUS(device) - always reports 0
51 * - Gadget API (majority of optional features)
52 * - Suspend & Remote Wakeup
54 #include <linux/device.h>
55 #include <linux/dmapool.h>
56 #include <linux/dma-mapping.h>
57 #include <linux/init.h>
58 #include <linux/interrupt.h>
60 #include <linux/irq.h>
61 #include <linux/kernel.h>
62 #include <linux/module.h>
63 #include <linux/pci.h>
64 #include <linux/usb/ch9.h>
65 #include <linux/usb/gadget.h>
67 #include "ci13xxx_udc.h"
70 /******************************************************************************
72 *****************************************************************************/
73 /* ctrl register bank access */
74 static DEFINE_SPINLOCK(udc_lock
);
77 #define UDC_DRIVER_NAME "ci13xxx_udc"
79 /* control endpoint description */
80 static const struct usb_endpoint_descriptor
82 .bLength
= USB_DT_ENDPOINT_SIZE
,
83 .bDescriptorType
= USB_DT_ENDPOINT
,
85 .bmAttributes
= USB_ENDPOINT_XFER_CONTROL
,
86 .wMaxPacketSize
= cpu_to_le16(CTRL_PAYLOAD_MAX
),
90 static struct ci13xxx
*_udc
;
92 /* Interrupt statistics */
110 * ffs_nr: find first (least significant) bit set
111 * @x: the word to search
113 * This function returns bit number (instead of position)
115 static int ffs_nr(u32 x
)
122 /******************************************************************************
124 *****************************************************************************/
125 /* register bank descriptor */
127 unsigned lpm
; /* is LPM? */
128 void __iomem
*abs
; /* bus map offset */
129 void __iomem
*cap
; /* bus map offset + CAP offset + CAP data */
130 size_t size
; /* bank size */
133 /* UDC register map */
134 #define ABS_CAPLENGTH (0x100UL)
135 #define ABS_HCCPARAMS (0x108UL)
136 #define ABS_DCCPARAMS (0x124UL)
137 #define ABS_TESTMODE (hw_bank.lpm ? 0x0FCUL : 0x138UL)
138 /* offset to CAPLENTGH (addr + data) */
139 #define CAP_USBCMD (0x000UL)
140 #define CAP_USBSTS (0x004UL)
141 #define CAP_USBINTR (0x008UL)
142 #define CAP_DEVICEADDR (0x014UL)
143 #define CAP_ENDPTLISTADDR (0x018UL)
144 #define CAP_PORTSC (0x044UL)
145 #define CAP_DEVLC (0x084UL)
146 #define CAP_USBMODE (hw_bank.lpm ? 0x0C8UL : 0x068UL)
147 #define CAP_ENDPTSETUPSTAT (hw_bank.lpm ? 0x0D8UL : 0x06CUL)
148 #define CAP_ENDPTPRIME (hw_bank.lpm ? 0x0DCUL : 0x070UL)
149 #define CAP_ENDPTFLUSH (hw_bank.lpm ? 0x0E0UL : 0x074UL)
150 #define CAP_ENDPTSTAT (hw_bank.lpm ? 0x0E4UL : 0x078UL)
151 #define CAP_ENDPTCOMPLETE (hw_bank.lpm ? 0x0E8UL : 0x07CUL)
152 #define CAP_ENDPTCTRL (hw_bank.lpm ? 0x0ECUL : 0x080UL)
153 #define CAP_LAST (hw_bank.lpm ? 0x12CUL : 0x0C0UL)
155 /* maximum number of enpoints: valid only after hw_device_reset() */
156 static unsigned hw_ep_max
;
159 * hw_ep_bit: calculates the bit number
160 * @num: endpoint number
161 * @dir: endpoint direction
163 * This function returns bit number
165 static inline int hw_ep_bit(int num
, int dir
)
167 return num
+ (dir
? 16 : 0);
171 * hw_aread: reads from register bitfield
172 * @addr: address relative to bus map
173 * @mask: bitfield mask
175 * This function returns register bitfield data
177 static u32
hw_aread(u32 addr
, u32 mask
)
179 return ioread32(addr
+ hw_bank
.abs
) & mask
;
183 * hw_awrite: writes to register bitfield
184 * @addr: address relative to bus map
185 * @mask: bitfield mask
188 static void hw_awrite(u32 addr
, u32 mask
, u32 data
)
190 iowrite32(hw_aread(addr
, ~mask
) | (data
& mask
),
195 * hw_cread: reads from register bitfield
196 * @addr: address relative to CAP offset plus content
197 * @mask: bitfield mask
199 * This function returns register bitfield data
201 static u32
hw_cread(u32 addr
, u32 mask
)
203 return ioread32(addr
+ hw_bank
.cap
) & mask
;
207 * hw_cwrite: writes to register bitfield
208 * @addr: address relative to CAP offset plus content
209 * @mask: bitfield mask
212 static void hw_cwrite(u32 addr
, u32 mask
, u32 data
)
214 iowrite32(hw_cread(addr
, ~mask
) | (data
& mask
),
219 * hw_ctest_and_clear: tests & clears register bitfield
220 * @addr: address relative to CAP offset plus content
221 * @mask: bitfield mask
223 * This function returns register bitfield data
225 static u32
hw_ctest_and_clear(u32 addr
, u32 mask
)
227 u32 reg
= hw_cread(addr
, mask
);
229 iowrite32(reg
, addr
+ hw_bank
.cap
);
234 * hw_ctest_and_write: tests & writes register bitfield
235 * @addr: address relative to CAP offset plus content
236 * @mask: bitfield mask
239 * This function returns register bitfield data
241 static u32
hw_ctest_and_write(u32 addr
, u32 mask
, u32 data
)
243 u32 reg
= hw_cread(addr
, ~0);
245 iowrite32((reg
& ~mask
) | (data
& mask
), addr
+ hw_bank
.cap
);
246 return (reg
& mask
) >> ffs_nr(mask
);
250 * hw_device_reset: resets chip (execute without interruption)
251 * @base: register base address
253 * This function returns an error code
255 static int hw_device_reset(void __iomem
*base
)
259 /* bank is a module variable */
262 hw_bank
.cap
= hw_bank
.abs
;
263 hw_bank
.cap
+= ABS_CAPLENGTH
;
264 hw_bank
.cap
+= ioread8(hw_bank
.cap
);
266 reg
= hw_aread(ABS_HCCPARAMS
, HCCPARAMS_LEN
) >> ffs_nr(HCCPARAMS_LEN
);
268 hw_bank
.size
= hw_bank
.cap
- hw_bank
.abs
;
269 hw_bank
.size
+= CAP_LAST
;
270 hw_bank
.size
/= sizeof(u32
);
272 /* should flush & stop before reset */
273 hw_cwrite(CAP_ENDPTFLUSH
, ~0, ~0);
274 hw_cwrite(CAP_USBCMD
, USBCMD_RS
, 0);
276 hw_cwrite(CAP_USBCMD
, USBCMD_RST
, USBCMD_RST
);
277 while (hw_cread(CAP_USBCMD
, USBCMD_RST
))
278 udelay(10); /* not RTOS friendly */
280 /* USBMODE should be configured step by step */
281 hw_cwrite(CAP_USBMODE
, USBMODE_CM
, USBMODE_CM_IDLE
);
282 hw_cwrite(CAP_USBMODE
, USBMODE_CM
, USBMODE_CM_DEVICE
);
283 hw_cwrite(CAP_USBMODE
, USBMODE_SLOM
, USBMODE_SLOM
); /* HW >= 2.3 */
285 if (hw_cread(CAP_USBMODE
, USBMODE_CM
) != USBMODE_CM_DEVICE
) {
286 pr_err("cannot enter in device mode");
287 pr_err("lpm = %i", hw_bank
.lpm
);
291 reg
= hw_aread(ABS_DCCPARAMS
, DCCPARAMS_DEN
) >> ffs_nr(DCCPARAMS_DEN
);
292 if (reg
== 0 || reg
> ENDPT_MAX
)
295 hw_ep_max
= reg
; /* cache hw ENDPT_MAX */
297 /* setup lock mode ? */
299 /* ENDPTSETUPSTAT is '0' by default */
301 /* HCSPARAMS.bf.ppc SHOULD BE zero for device */
307 * hw_device_state: enables/disables interrupts & starts/stops device (execute
308 * without interruption)
309 * @dma: 0 => disable, !0 => enable and set dma engine
311 * This function returns an error code
313 static int hw_device_state(u32 dma
)
316 hw_cwrite(CAP_ENDPTLISTADDR
, ~0, dma
);
317 /* interrupt, error, port change, reset, sleep/suspend */
318 hw_cwrite(CAP_USBINTR
, ~0,
319 USBi_UI
|USBi_UEI
|USBi_PCI
|USBi_URI
|USBi_SLI
);
320 hw_cwrite(CAP_USBCMD
, USBCMD_RS
, USBCMD_RS
);
322 hw_cwrite(CAP_USBCMD
, USBCMD_RS
, 0);
323 hw_cwrite(CAP_USBINTR
, ~0, 0);
329 * hw_ep_flush: flush endpoint fifo (execute without interruption)
330 * @num: endpoint number
331 * @dir: endpoint direction
333 * This function returns an error code
335 static int hw_ep_flush(int num
, int dir
)
337 int n
= hw_ep_bit(num
, dir
);
340 /* flush any pending transfer */
341 hw_cwrite(CAP_ENDPTFLUSH
, BIT(n
), BIT(n
));
342 while (hw_cread(CAP_ENDPTFLUSH
, BIT(n
)))
344 } while (hw_cread(CAP_ENDPTSTAT
, BIT(n
)));
350 * hw_ep_disable: disables endpoint (execute without interruption)
351 * @num: endpoint number
352 * @dir: endpoint direction
354 * This function returns an error code
356 static int hw_ep_disable(int num
, int dir
)
358 hw_ep_flush(num
, dir
);
359 hw_cwrite(CAP_ENDPTCTRL
+ num
* sizeof(u32
),
360 dir
? ENDPTCTRL_TXE
: ENDPTCTRL_RXE
, 0);
365 * hw_ep_enable: enables endpoint (execute without interruption)
366 * @num: endpoint number
367 * @dir: endpoint direction
368 * @type: endpoint type
370 * This function returns an error code
372 static int hw_ep_enable(int num
, int dir
, int type
)
377 mask
= ENDPTCTRL_TXT
; /* type */
378 data
= type
<< ffs_nr(mask
);
380 mask
|= ENDPTCTRL_TXS
; /* unstall */
381 mask
|= ENDPTCTRL_TXR
; /* reset data toggle */
382 data
|= ENDPTCTRL_TXR
;
383 mask
|= ENDPTCTRL_TXE
; /* enable */
384 data
|= ENDPTCTRL_TXE
;
386 mask
= ENDPTCTRL_RXT
; /* type */
387 data
= type
<< ffs_nr(mask
);
389 mask
|= ENDPTCTRL_RXS
; /* unstall */
390 mask
|= ENDPTCTRL_RXR
; /* reset data toggle */
391 data
|= ENDPTCTRL_RXR
;
392 mask
|= ENDPTCTRL_RXE
; /* enable */
393 data
|= ENDPTCTRL_RXE
;
395 hw_cwrite(CAP_ENDPTCTRL
+ num
* sizeof(u32
), mask
, data
);
400 * hw_ep_get_halt: return endpoint halt status
401 * @num: endpoint number
402 * @dir: endpoint direction
404 * This function returns 1 if endpoint halted
406 static int hw_ep_get_halt(int num
, int dir
)
408 u32 mask
= dir
? ENDPTCTRL_TXS
: ENDPTCTRL_RXS
;
410 return hw_cread(CAP_ENDPTCTRL
+ num
* sizeof(u32
), mask
) ? 1 : 0;
414 * hw_ep_is_primed: test if endpoint is primed (execute without interruption)
415 * @num: endpoint number
416 * @dir: endpoint direction
418 * This function returns true if endpoint primed
420 static int hw_ep_is_primed(int num
, int dir
)
422 u32 reg
= hw_cread(CAP_ENDPTPRIME
, ~0) | hw_cread(CAP_ENDPTSTAT
, ~0);
424 return test_bit(hw_ep_bit(num
, dir
), (void *)®
);
428 * hw_test_and_clear_setup_status: test & clear setup status (execute without
430 * @n: bit number (endpoint)
432 * This function returns setup status
434 static int hw_test_and_clear_setup_status(int n
)
436 return hw_ctest_and_clear(CAP_ENDPTSETUPSTAT
, BIT(n
));
440 * hw_ep_prime: primes endpoint (execute without interruption)
441 * @num: endpoint number
442 * @dir: endpoint direction
443 * @is_ctrl: true if control endpoint
445 * This function returns an error code
447 static int hw_ep_prime(int num
, int dir
, int is_ctrl
)
449 int n
= hw_ep_bit(num
, dir
);
451 /* the caller should flush first */
452 if (hw_ep_is_primed(num
, dir
))
455 if (is_ctrl
&& dir
== RX
&& hw_cread(CAP_ENDPTSETUPSTAT
, BIT(num
)))
458 hw_cwrite(CAP_ENDPTPRIME
, BIT(n
), BIT(n
));
460 while (hw_cread(CAP_ENDPTPRIME
, BIT(n
)))
462 if (is_ctrl
&& dir
== RX
&& hw_cread(CAP_ENDPTSETUPSTAT
, BIT(num
)))
465 /* status shoult be tested according with manual but it doesn't work */
470 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
471 * without interruption)
472 * @num: endpoint number
473 * @dir: endpoint direction
474 * @value: true => stall, false => unstall
476 * This function returns an error code
478 static int hw_ep_set_halt(int num
, int dir
, int value
)
480 if (value
!= 0 && value
!= 1)
484 u32 addr
= CAP_ENDPTCTRL
+ num
* sizeof(u32
);
485 u32 mask_xs
= dir
? ENDPTCTRL_TXS
: ENDPTCTRL_RXS
;
486 u32 mask_xr
= dir
? ENDPTCTRL_TXR
: ENDPTCTRL_RXR
;
488 /* data toggle - reserved for EP0 but it's in ESS */
489 hw_cwrite(addr
, mask_xs
|mask_xr
, value
? mask_xs
: mask_xr
);
491 } while (value
!= hw_ep_get_halt(num
, dir
));
497 * hw_intr_clear: disables interrupt & clears interrupt status (execute without
501 * This function returns an error code
503 static int hw_intr_clear(int n
)
508 hw_cwrite(CAP_USBINTR
, BIT(n
), 0);
509 hw_cwrite(CAP_USBSTS
, BIT(n
), BIT(n
));
514 * hw_intr_force: enables interrupt & forces interrupt status (execute without
518 * This function returns an error code
520 static int hw_intr_force(int n
)
525 hw_awrite(ABS_TESTMODE
, TESTMODE_FORCE
, TESTMODE_FORCE
);
526 hw_cwrite(CAP_USBINTR
, BIT(n
), BIT(n
));
527 hw_cwrite(CAP_USBSTS
, BIT(n
), BIT(n
));
528 hw_awrite(ABS_TESTMODE
, TESTMODE_FORCE
, 0);
533 * hw_is_port_high_speed: test if port is high speed
535 * This function returns true if high speed port
537 static int hw_port_is_high_speed(void)
539 return hw_bank
.lpm
? hw_cread(CAP_DEVLC
, DEVLC_PSPD
) :
540 hw_cread(CAP_PORTSC
, PORTSC_HSP
);
544 * hw_port_test_get: reads port test mode value
546 * This function returns port test mode value
548 static u8
hw_port_test_get(void)
550 return hw_cread(CAP_PORTSC
, PORTSC_PTC
) >> ffs_nr(PORTSC_PTC
);
554 * hw_port_test_set: writes port test mode (execute without interruption)
557 * This function returns an error code
559 static int hw_port_test_set(u8 mode
)
561 const u8 TEST_MODE_MAX
= 7;
563 if (mode
> TEST_MODE_MAX
)
566 hw_cwrite(CAP_PORTSC
, PORTSC_PTC
, mode
<< ffs_nr(PORTSC_PTC
));
571 * hw_read_intr_enable: returns interrupt enable register
573 * This function returns register data
575 static u32
hw_read_intr_enable(void)
577 return hw_cread(CAP_USBINTR
, ~0);
581 * hw_read_intr_status: returns interrupt status register
583 * This function returns register data
585 static u32
hw_read_intr_status(void)
587 return hw_cread(CAP_USBSTS
, ~0);
591 * hw_register_read: reads all device registers (execute without interruption)
592 * @buf: destination buffer
595 * This function returns number of registers read
597 static size_t hw_register_read(u32
*buf
, size_t size
)
601 if (size
> hw_bank
.size
)
604 for (i
= 0; i
< size
; i
++)
605 buf
[i
] = hw_aread(i
* sizeof(u32
), ~0);
611 * hw_register_write: writes to register
612 * @addr: register address
613 * @data: register value
615 * This function returns an error code
617 static int hw_register_write(u16 addr
, u32 data
)
622 if (addr
>= hw_bank
.size
)
628 hw_awrite(addr
, ~0, data
);
633 * hw_test_and_clear_complete: test & clear complete status (execute without
635 * @n: bit number (endpoint)
637 * This function returns complete status
639 static int hw_test_and_clear_complete(int n
)
641 return hw_ctest_and_clear(CAP_ENDPTCOMPLETE
, BIT(n
));
645 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
646 * without interruption)
648 * This function returns active interrutps
650 static u32
hw_test_and_clear_intr_active(void)
652 u32 reg
= hw_read_intr_status() & hw_read_intr_enable();
654 hw_cwrite(CAP_USBSTS
, ~0, reg
);
659 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
662 * This function returns guard value
664 static int hw_test_and_clear_setup_guard(void)
666 return hw_ctest_and_write(CAP_USBCMD
, USBCMD_SUTW
, 0);
670 * hw_test_and_set_setup_guard: test & set setup guard (execute without
673 * This function returns guard value
675 static int hw_test_and_set_setup_guard(void)
677 return hw_ctest_and_write(CAP_USBCMD
, USBCMD_SUTW
, USBCMD_SUTW
);
681 * hw_usb_set_address: configures USB address (execute without interruption)
682 * @value: new USB address
684 * This function returns an error code
686 static int hw_usb_set_address(u8 value
)
689 hw_cwrite(CAP_DEVICEADDR
, DEVICEADDR_USBADR
| DEVICEADDR_USBADRA
,
690 value
<< ffs_nr(DEVICEADDR_USBADR
) | DEVICEADDR_USBADRA
);
695 * hw_usb_reset: restart device after a bus reset (execute without
698 * This function returns an error code
700 static int hw_usb_reset(void)
702 hw_usb_set_address(0);
704 /* ESS flushes only at end?!? */
705 hw_cwrite(CAP_ENDPTFLUSH
, ~0, ~0); /* flush all EPs */
707 /* clear setup token semaphores */
708 hw_cwrite(CAP_ENDPTSETUPSTAT
, 0, 0); /* writes its content */
710 /* clear complete status */
711 hw_cwrite(CAP_ENDPTCOMPLETE
, 0, 0); /* writes its content */
713 /* wait until all bits cleared */
714 while (hw_cread(CAP_ENDPTPRIME
, ~0))
715 udelay(10); /* not RTOS friendly */
717 /* reset all endpoints ? */
719 /* reset internal status and wait for further instructions
720 no need to verify the port reset status (ESS does it) */
725 /******************************************************************************
727 *****************************************************************************/
729 * show_device: prints information about device capabilities and status
731 * Check "device.h" for details
733 static ssize_t
show_device(struct device
*dev
, struct device_attribute
*attr
,
736 struct ci13xxx
*udc
= container_of(dev
, struct ci13xxx
, gadget
.dev
);
737 struct usb_gadget
*gadget
= &udc
->gadget
;
740 dbg_trace("[%s] %p\n", __func__
, buf
);
741 if (attr
== NULL
|| buf
== NULL
) {
742 dev_err(dev
, "[%s] EINVAL\n", __func__
);
746 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "speed = %d\n",
748 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "is_dualspeed = %d\n",
749 gadget
->is_dualspeed
);
750 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "is_otg = %d\n",
752 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "is_a_peripheral = %d\n",
753 gadget
->is_a_peripheral
);
754 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "b_hnp_enable = %d\n",
755 gadget
->b_hnp_enable
);
756 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "a_hnp_support = %d\n",
757 gadget
->a_hnp_support
);
758 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "a_alt_hnp_support = %d\n",
759 gadget
->a_alt_hnp_support
);
760 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "name = %s\n",
761 (gadget
->name
? gadget
->name
: ""));
765 static DEVICE_ATTR(device
, S_IRUSR
, show_device
, NULL
);
768 * show_driver: prints information about attached gadget (if any)
770 * Check "device.h" for details
772 static ssize_t
show_driver(struct device
*dev
, struct device_attribute
*attr
,
775 struct ci13xxx
*udc
= container_of(dev
, struct ci13xxx
, gadget
.dev
);
776 struct usb_gadget_driver
*driver
= udc
->driver
;
779 dbg_trace("[%s] %p\n", __func__
, buf
);
780 if (attr
== NULL
|| buf
== NULL
) {
781 dev_err(dev
, "[%s] EINVAL\n", __func__
);
786 return scnprintf(buf
, PAGE_SIZE
,
787 "There is no gadget attached!\n");
789 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "function = %s\n",
790 (driver
->function
? driver
->function
: ""));
791 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "max speed = %d\n",
796 static DEVICE_ATTR(driver
, S_IRUSR
, show_driver
, NULL
);
798 /* Maximum event message length */
799 #define DBG_DATA_MSG 64UL
801 /* Maximum event messages */
802 #define DBG_DATA_MAX 128UL
804 /* Event buffer descriptor */
806 char (buf
[DBG_DATA_MAX
])[DBG_DATA_MSG
]; /* buffer */
807 unsigned idx
; /* index */
808 unsigned tty
; /* print to console? */
809 rwlock_t lck
; /* lock */
813 .lck
= __RW_LOCK_UNLOCKED(lck
)
817 * dbg_dec: decrements debug event index
820 static void dbg_dec(unsigned *idx
)
822 *idx
= (*idx
- 1) & (DBG_DATA_MAX
-1);
826 * dbg_inc: increments debug event index
829 static void dbg_inc(unsigned *idx
)
831 *idx
= (*idx
+ 1) & (DBG_DATA_MAX
-1);
835 * dbg_print: prints the common part of the event
836 * @addr: endpoint address
839 * @extra: extra information
841 static void dbg_print(u8 addr
, const char *name
, int status
, const char *extra
)
847 write_lock_irqsave(&dbg_data
.lck
, flags
);
849 do_gettimeofday(&tval
);
850 stamp
= tval
.tv_sec
& 0xFFFF; /* 2^32 = 4294967296. Limit to 4096s */
851 stamp
= stamp
* 1000000 + tval
.tv_usec
;
853 scnprintf(dbg_data
.buf
[dbg_data
.idx
], DBG_DATA_MSG
,
854 "%04X\t» %02X %-7.7s %4i «\t%s\n",
855 stamp
, addr
, name
, status
, extra
);
857 dbg_inc(&dbg_data
.idx
);
859 write_unlock_irqrestore(&dbg_data
.lck
, flags
);
861 if (dbg_data
.tty
!= 0)
862 pr_notice("%04X\t» %02X %-7.7s %4i «\t%s\n",
863 stamp
, addr
, name
, status
, extra
);
867 * dbg_done: prints a DONE event
868 * @addr: endpoint address
869 * @td: transfer descriptor
872 static void dbg_done(u8 addr
, const u32 token
, int status
)
874 char msg
[DBG_DATA_MSG
];
876 scnprintf(msg
, sizeof(msg
), "%d %02X",
877 (int)(token
& TD_TOTAL_BYTES
) >> ffs_nr(TD_TOTAL_BYTES
),
878 (int)(token
& TD_STATUS
) >> ffs_nr(TD_STATUS
));
879 dbg_print(addr
, "DONE", status
, msg
);
883 * dbg_event: prints a generic event
884 * @addr: endpoint address
888 static void dbg_event(u8 addr
, const char *name
, int status
)
891 dbg_print(addr
, name
, status
, "");
895 * dbg_queue: prints a QUEUE event
896 * @addr: endpoint address
900 static void dbg_queue(u8 addr
, const struct usb_request
*req
, int status
)
902 char msg
[DBG_DATA_MSG
];
905 scnprintf(msg
, sizeof(msg
),
906 "%d %d", !req
->no_interrupt
, req
->length
);
907 dbg_print(addr
, "QUEUE", status
, msg
);
912 * dbg_setup: prints a SETUP event
913 * @addr: endpoint address
914 * @req: setup request
916 static void dbg_setup(u8 addr
, const struct usb_ctrlrequest
*req
)
918 char msg
[DBG_DATA_MSG
];
921 scnprintf(msg
, sizeof(msg
),
922 "%02X %02X %04X %04X %d", req
->bRequestType
,
923 req
->bRequest
, le16_to_cpu(req
->wValue
),
924 le16_to_cpu(req
->wIndex
), le16_to_cpu(req
->wLength
));
925 dbg_print(addr
, "SETUP", 0, msg
);
930 * show_events: displays the event buffer
932 * Check "device.h" for details
934 static ssize_t
show_events(struct device
*dev
, struct device_attribute
*attr
,
938 unsigned i
, j
, n
= 0;
940 dbg_trace("[%s] %p\n", __func__
, buf
);
941 if (attr
== NULL
|| buf
== NULL
) {
942 dev_err(dev
, "[%s] EINVAL\n", __func__
);
946 read_lock_irqsave(&dbg_data
.lck
, flags
);
949 for (dbg_dec(&i
); i
!= dbg_data
.idx
; dbg_dec(&i
)) {
950 n
+= strlen(dbg_data
.buf
[i
]);
951 if (n
>= PAGE_SIZE
) {
952 n
-= strlen(dbg_data
.buf
[i
]);
956 for (j
= 0, dbg_inc(&i
); j
< n
; dbg_inc(&i
))
957 j
+= scnprintf(buf
+ j
, PAGE_SIZE
- j
,
958 "%s", dbg_data
.buf
[i
]);
960 read_unlock_irqrestore(&dbg_data
.lck
, flags
);
966 * store_events: configure if events are going to be also printed to console
968 * Check "device.h" for details
970 static ssize_t
store_events(struct device
*dev
, struct device_attribute
*attr
,
971 const char *buf
, size_t count
)
975 dbg_trace("[%s] %p, %d\n", __func__
, buf
, count
);
976 if (attr
== NULL
|| buf
== NULL
) {
977 dev_err(dev
, "[%s] EINVAL\n", __func__
);
981 if (sscanf(buf
, "%u", &tty
) != 1 || tty
> 1) {
982 dev_err(dev
, "<1|0>: enable|disable console log\n");
987 dev_info(dev
, "tty = %u", dbg_data
.tty
);
992 static DEVICE_ATTR(events
, S_IRUSR
| S_IWUSR
, show_events
, store_events
);
995 * show_inters: interrupt status, enable status and historic
997 * Check "device.h" for details
999 static ssize_t
show_inters(struct device
*dev
, struct device_attribute
*attr
,
1002 struct ci13xxx
*udc
= container_of(dev
, struct ci13xxx
, gadget
.dev
);
1003 unsigned long flags
;
1005 unsigned i
, j
, n
= 0;
1007 dbg_trace("[%s] %p\n", __func__
, buf
);
1008 if (attr
== NULL
|| buf
== NULL
) {
1009 dev_err(dev
, "[%s] EINVAL\n", __func__
);
1013 spin_lock_irqsave(udc
->lock
, flags
);
1015 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
,
1016 "status = %08x\n", hw_read_intr_status());
1017 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
,
1018 "enable = %08x\n", hw_read_intr_enable());
1020 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "*test = %d\n",
1021 isr_statistics
.test
);
1022 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "» ui = %d\n",
1024 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "» uei = %d\n",
1025 isr_statistics
.uei
);
1026 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "» pci = %d\n",
1027 isr_statistics
.pci
);
1028 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "» uri = %d\n",
1029 isr_statistics
.uri
);
1030 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "» sli = %d\n",
1031 isr_statistics
.sli
);
1032 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "*none = %d\n",
1033 isr_statistics
.none
);
1034 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "*hndl = %d\n",
1035 isr_statistics
.hndl
.cnt
);
1037 for (i
= isr_statistics
.hndl
.idx
, j
= 0; j
<= ISR_MASK
; j
++, i
++) {
1039 intr
= isr_statistics
.hndl
.buf
[i
];
1042 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "ui ");
1044 if (USBi_UEI
& intr
)
1045 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "uei ");
1047 if (USBi_PCI
& intr
)
1048 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "pci ");
1050 if (USBi_URI
& intr
)
1051 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "uri ");
1053 if (USBi_SLI
& intr
)
1054 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "sli ");
1057 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "??? ");
1058 if (isr_statistics
.hndl
.buf
[i
])
1059 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
, "\n");
1062 spin_unlock_irqrestore(udc
->lock
, flags
);
1068 * store_inters: enable & force or disable an individual interrutps
1069 * (to be used for test purposes only)
1071 * Check "device.h" for details
1073 static ssize_t
store_inters(struct device
*dev
, struct device_attribute
*attr
,
1074 const char *buf
, size_t count
)
1076 struct ci13xxx
*udc
= container_of(dev
, struct ci13xxx
, gadget
.dev
);
1077 unsigned long flags
;
1080 dbg_trace("[%s] %p, %d\n", __func__
, buf
, count
);
1081 if (attr
== NULL
|| buf
== NULL
) {
1082 dev_err(dev
, "[%s] EINVAL\n", __func__
);
1086 if (sscanf(buf
, "%u %u", &en
, &bit
) != 2 || en
> 1) {
1087 dev_err(dev
, "<1|0> <bit>: enable|disable interrupt");
1091 spin_lock_irqsave(udc
->lock
, flags
);
1093 if (hw_intr_force(bit
))
1094 dev_err(dev
, "invalid bit number\n");
1096 isr_statistics
.test
++;
1098 if (hw_intr_clear(bit
))
1099 dev_err(dev
, "invalid bit number\n");
1101 spin_unlock_irqrestore(udc
->lock
, flags
);
1106 static DEVICE_ATTR(inters
, S_IRUSR
| S_IWUSR
, show_inters
, store_inters
);
1109 * show_port_test: reads port test mode
1111 * Check "device.h" for details
1113 static ssize_t
show_port_test(struct device
*dev
,
1114 struct device_attribute
*attr
, char *buf
)
1116 struct ci13xxx
*udc
= container_of(dev
, struct ci13xxx
, gadget
.dev
);
1117 unsigned long flags
;
1120 dbg_trace("[%s] %p\n", __func__
, buf
);
1121 if (attr
== NULL
|| buf
== NULL
) {
1122 dev_err(dev
, "[%s] EINVAL\n", __func__
);
1126 spin_lock_irqsave(udc
->lock
, flags
);
1127 mode
= hw_port_test_get();
1128 spin_unlock_irqrestore(udc
->lock
, flags
);
1130 return scnprintf(buf
, PAGE_SIZE
, "mode = %u\n", mode
);
1134 * store_port_test: writes port test mode
1136 * Check "device.h" for details
1138 static ssize_t
store_port_test(struct device
*dev
,
1139 struct device_attribute
*attr
,
1140 const char *buf
, size_t count
)
1142 struct ci13xxx
*udc
= container_of(dev
, struct ci13xxx
, gadget
.dev
);
1143 unsigned long flags
;
1146 dbg_trace("[%s] %p, %d\n", __func__
, buf
, count
);
1147 if (attr
== NULL
|| buf
== NULL
) {
1148 dev_err(dev
, "[%s] EINVAL\n", __func__
);
1152 if (sscanf(buf
, "%u", &mode
) != 1) {
1153 dev_err(dev
, "<mode>: set port test mode");
1157 spin_lock_irqsave(udc
->lock
, flags
);
1158 if (hw_port_test_set(mode
))
1159 dev_err(dev
, "invalid mode\n");
1160 spin_unlock_irqrestore(udc
->lock
, flags
);
1165 static DEVICE_ATTR(port_test
, S_IRUSR
| S_IWUSR
,
1166 show_port_test
, store_port_test
);
1169 * show_qheads: DMA contents of all queue heads
1171 * Check "device.h" for details
1173 static ssize_t
show_qheads(struct device
*dev
, struct device_attribute
*attr
,
1176 struct ci13xxx
*udc
= container_of(dev
, struct ci13xxx
, gadget
.dev
);
1177 unsigned long flags
;
1178 unsigned i
, j
, n
= 0;
1180 dbg_trace("[%s] %p\n", __func__
, buf
);
1181 if (attr
== NULL
|| buf
== NULL
) {
1182 dev_err(dev
, "[%s] EINVAL\n", __func__
);
1186 spin_lock_irqsave(udc
->lock
, flags
);
1187 for (i
= 0; i
< hw_ep_max
; i
++) {
1188 struct ci13xxx_ep
*mEp
= &udc
->ci13xxx_ep
[i
];
1189 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
,
1190 "EP=%02i: RX=%08X TX=%08X\n",
1191 i
, (u32
)mEp
->qh
[RX
].dma
, (u32
)mEp
->qh
[TX
].dma
);
1192 for (j
= 0; j
< (sizeof(struct ci13xxx_qh
)/sizeof(u32
)); j
++) {
1193 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
,
1194 " %04X: %08X %08X\n", j
,
1195 *((u32
*)mEp
->qh
[RX
].ptr
+ j
),
1196 *((u32
*)mEp
->qh
[TX
].ptr
+ j
));
1199 spin_unlock_irqrestore(udc
->lock
, flags
);
1203 static DEVICE_ATTR(qheads
, S_IRUSR
, show_qheads
, NULL
);
1206 * show_registers: dumps all registers
1208 * Check "device.h" for details
1210 static ssize_t
show_registers(struct device
*dev
,
1211 struct device_attribute
*attr
, char *buf
)
1213 struct ci13xxx
*udc
= container_of(dev
, struct ci13xxx
, gadget
.dev
);
1214 unsigned long flags
;
1216 unsigned i
, k
, n
= 0;
1218 dbg_trace("[%s] %p\n", __func__
, buf
);
1219 if (attr
== NULL
|| buf
== NULL
) {
1220 dev_err(dev
, "[%s] EINVAL\n", __func__
);
1224 spin_lock_irqsave(udc
->lock
, flags
);
1225 k
= hw_register_read(dump
, sizeof(dump
)/sizeof(u32
));
1226 spin_unlock_irqrestore(udc
->lock
, flags
);
1228 for (i
= 0; i
< k
; i
++) {
1229 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
,
1230 "reg[0x%04X] = 0x%08X\n",
1231 i
* (unsigned)sizeof(u32
), dump
[i
]);
1238 * store_registers: writes value to register address
1240 * Check "device.h" for details
1242 static ssize_t
store_registers(struct device
*dev
,
1243 struct device_attribute
*attr
,
1244 const char *buf
, size_t count
)
1246 struct ci13xxx
*udc
= container_of(dev
, struct ci13xxx
, gadget
.dev
);
1247 unsigned long addr
, data
, flags
;
1249 dbg_trace("[%s] %p, %d\n", __func__
, buf
, count
);
1250 if (attr
== NULL
|| buf
== NULL
) {
1251 dev_err(dev
, "[%s] EINVAL\n", __func__
);
1255 if (sscanf(buf
, "%li %li", &addr
, &data
) != 2) {
1256 dev_err(dev
, "<addr> <data>: write data to register address");
1260 spin_lock_irqsave(udc
->lock
, flags
);
1261 if (hw_register_write(addr
, data
))
1262 dev_err(dev
, "invalid address range\n");
1263 spin_unlock_irqrestore(udc
->lock
, flags
);
1268 static DEVICE_ATTR(registers
, S_IRUSR
| S_IWUSR
,
1269 show_registers
, store_registers
);
1272 * show_requests: DMA contents of all requests currently queued (all endpts)
1274 * Check "device.h" for details
1276 static ssize_t
show_requests(struct device
*dev
, struct device_attribute
*attr
,
1279 struct ci13xxx
*udc
= container_of(dev
, struct ci13xxx
, gadget
.dev
);
1280 unsigned long flags
;
1281 struct list_head
*ptr
= NULL
;
1282 struct ci13xxx_req
*req
= NULL
;
1283 unsigned i
, j
, k
, n
= 0, qSize
= sizeof(struct ci13xxx_td
)/sizeof(u32
);
1285 dbg_trace("[%s] %p\n", __func__
, buf
);
1286 if (attr
== NULL
|| buf
== NULL
) {
1287 dev_err(dev
, "[%s] EINVAL\n", __func__
);
1291 spin_lock_irqsave(udc
->lock
, flags
);
1292 for (i
= 0; i
< hw_ep_max
; i
++)
1293 for (k
= RX
; k
<= TX
; k
++)
1294 list_for_each(ptr
, &udc
->ci13xxx_ep
[i
].qh
[k
].queue
)
1296 req
= list_entry(ptr
,
1297 struct ci13xxx_req
, queue
);
1299 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
,
1300 "EP=%02i: TD=%08X %s\n",
1302 ((k
== RX
) ? "RX" : "TX"));
1304 for (j
= 0; j
< qSize
; j
++)
1305 n
+= scnprintf(buf
+ n
, PAGE_SIZE
- n
,
1307 *((u32
*)req
->ptr
+ j
));
1309 spin_unlock_irqrestore(udc
->lock
, flags
);
1313 static DEVICE_ATTR(requests
, S_IRUSR
, show_requests
, NULL
);
1316 * dbg_create_files: initializes the attribute interface
1319 * This function returns an error code
1321 __maybe_unused
static int dbg_create_files(struct device
*dev
)
1327 retval
= device_create_file(dev
, &dev_attr_device
);
1330 retval
= device_create_file(dev
, &dev_attr_driver
);
1333 retval
= device_create_file(dev
, &dev_attr_events
);
1336 retval
= device_create_file(dev
, &dev_attr_inters
);
1339 retval
= device_create_file(dev
, &dev_attr_port_test
);
1342 retval
= device_create_file(dev
, &dev_attr_qheads
);
1345 retval
= device_create_file(dev
, &dev_attr_registers
);
1348 retval
= device_create_file(dev
, &dev_attr_requests
);
1354 device_remove_file(dev
, &dev_attr_registers
);
1356 device_remove_file(dev
, &dev_attr_qheads
);
1358 device_remove_file(dev
, &dev_attr_port_test
);
1360 device_remove_file(dev
, &dev_attr_inters
);
1362 device_remove_file(dev
, &dev_attr_events
);
1364 device_remove_file(dev
, &dev_attr_driver
);
1366 device_remove_file(dev
, &dev_attr_device
);
1372 * dbg_remove_files: destroys the attribute interface
1375 * This function returns an error code
1377 __maybe_unused
static int dbg_remove_files(struct device
*dev
)
1381 device_remove_file(dev
, &dev_attr_requests
);
1382 device_remove_file(dev
, &dev_attr_registers
);
1383 device_remove_file(dev
, &dev_attr_qheads
);
1384 device_remove_file(dev
, &dev_attr_port_test
);
1385 device_remove_file(dev
, &dev_attr_inters
);
1386 device_remove_file(dev
, &dev_attr_events
);
1387 device_remove_file(dev
, &dev_attr_driver
);
1388 device_remove_file(dev
, &dev_attr_device
);
1392 /******************************************************************************
1394 *****************************************************************************/
1396 * _usb_addr: calculates endpoint address from direction & number
1399 static inline u8
_usb_addr(struct ci13xxx_ep
*ep
)
1401 return ((ep
->dir
== TX
) ? USB_ENDPOINT_DIR_MASK
: 0) | ep
->num
;
1405 * _hardware_queue: configures a request at hardware level
1409 * This function returns an error code
1411 static int _hardware_enqueue(struct ci13xxx_ep
*mEp
, struct ci13xxx_req
*mReq
)
1415 trace("%p, %p", mEp
, mReq
);
1417 /* don't queue twice */
1418 if (mReq
->req
.status
== -EALREADY
)
1421 if (hw_ep_is_primed(mEp
->num
, mEp
->dir
))
1424 mReq
->req
.status
= -EALREADY
;
1426 if (mReq
->req
.length
&& !mReq
->req
.dma
) {
1428 dma_map_single(mEp
->device
, mReq
->req
.buf
,
1429 mReq
->req
.length
, mEp
->dir
?
1430 DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
1431 if (mReq
->req
.dma
== 0)
1439 * TODO - handle requests which spawns into several TDs
1441 memset(mReq
->ptr
, 0, sizeof(*mReq
->ptr
));
1442 mReq
->ptr
->next
|= TD_TERMINATE
;
1443 mReq
->ptr
->token
= mReq
->req
.length
<< ffs_nr(TD_TOTAL_BYTES
);
1444 mReq
->ptr
->token
&= TD_TOTAL_BYTES
;
1445 mReq
->ptr
->token
|= TD_IOC
;
1446 mReq
->ptr
->token
|= TD_STATUS_ACTIVE
;
1447 mReq
->ptr
->page
[0] = mReq
->req
.dma
;
1448 for (i
= 1; i
< 5; i
++)
1449 mReq
->ptr
->page
[i
] =
1450 (mReq
->req
.dma
+ i
* PAGE_SIZE
) & ~TD_RESERVED_MASK
;
1454 * At this point it's guaranteed exclusive access to qhead
1455 * (endpt is not primed) so it's no need to use tripwire
1457 mEp
->qh
[mEp
->dir
].ptr
->td
.next
= mReq
->dma
; /* TERMINATE = 0 */
1458 mEp
->qh
[mEp
->dir
].ptr
->td
.token
&= ~TD_STATUS
; /* clear status */
1459 if (mReq
->req
.zero
== 0)
1460 mEp
->qh
[mEp
->dir
].ptr
->cap
|= QH_ZLT
;
1462 mEp
->qh
[mEp
->dir
].ptr
->cap
&= ~QH_ZLT
;
1464 wmb(); /* synchronize before ep prime */
1466 return hw_ep_prime(mEp
->num
, mEp
->dir
,
1467 mEp
->type
== USB_ENDPOINT_XFER_CONTROL
);
1471 * _hardware_dequeue: handles a request at hardware level
1475 * This function returns an error code
1477 static int _hardware_dequeue(struct ci13xxx_ep
*mEp
, struct ci13xxx_req
*mReq
)
1479 trace("%p, %p", mEp
, mReq
);
1481 if (mReq
->req
.status
!= -EALREADY
)
1484 if (hw_ep_is_primed(mEp
->num
, mEp
->dir
))
1485 hw_ep_flush(mEp
->num
, mEp
->dir
);
1487 mReq
->req
.status
= 0;
1490 dma_unmap_single(mEp
->device
, mReq
->req
.dma
, mReq
->req
.length
,
1491 mEp
->dir
? DMA_TO_DEVICE
: DMA_FROM_DEVICE
);
1496 mReq
->req
.status
= mReq
->ptr
->token
& TD_STATUS
;
1497 if ((TD_STATUS_ACTIVE
& mReq
->req
.status
) != 0)
1498 mReq
->req
.status
= -ECONNRESET
;
1499 else if ((TD_STATUS_HALTED
& mReq
->req
.status
) != 0)
1500 mReq
->req
.status
= -1;
1501 else if ((TD_STATUS_DT_ERR
& mReq
->req
.status
) != 0)
1502 mReq
->req
.status
= -1;
1503 else if ((TD_STATUS_TR_ERR
& mReq
->req
.status
) != 0)
1504 mReq
->req
.status
= -1;
1506 mReq
->req
.actual
= mReq
->ptr
->token
& TD_TOTAL_BYTES
;
1507 mReq
->req
.actual
>>= ffs_nr(TD_TOTAL_BYTES
);
1508 mReq
->req
.actual
= mReq
->req
.length
- mReq
->req
.actual
;
1509 mReq
->req
.actual
= mReq
->req
.status
? 0 : mReq
->req
.actual
;
1511 return mReq
->req
.actual
;
1515 * _ep_nuke: dequeues all endpoint requests
1518 * This function returns an error code
1519 * Caller must hold lock
1521 static int _ep_nuke(struct ci13xxx_ep
*mEp
)
1522 __releases(mEp
->lock
)
1523 __acquires(mEp
->lock
)
1530 hw_ep_flush(mEp
->num
, mEp
->dir
);
1532 while (!list_empty(&mEp
->qh
[mEp
->dir
].queue
)) {
1534 /* pop oldest request */
1535 struct ci13xxx_req
*mReq
= \
1536 list_entry(mEp
->qh
[mEp
->dir
].queue
.next
,
1537 struct ci13xxx_req
, queue
);
1538 list_del_init(&mReq
->queue
);
1539 mReq
->req
.status
= -ESHUTDOWN
;
1541 if (!mReq
->req
.no_interrupt
&& mReq
->req
.complete
!= NULL
) {
1542 spin_unlock(mEp
->lock
);
1543 mReq
->req
.complete(&mEp
->ep
, &mReq
->req
);
1544 spin_lock(mEp
->lock
);
1551 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
1554 * This function returns an error code
1555 * Caller must hold lock
1557 static int _gadget_stop_activity(struct usb_gadget
*gadget
)
1558 __releases(udc
->lock
)
1559 __acquires(udc
->lock
)
1562 struct ci13xxx
*udc
= container_of(gadget
, struct ci13xxx
, gadget
);
1563 struct ci13xxx_ep
*mEp
= container_of(gadget
->ep0
,
1564 struct ci13xxx_ep
, ep
);
1566 trace("%p", gadget
);
1571 spin_unlock(udc
->lock
);
1573 /* flush all endpoints */
1574 gadget_for_each_ep(ep
, gadget
) {
1575 usb_ep_fifo_flush(ep
);
1577 usb_ep_fifo_flush(gadget
->ep0
);
1579 udc
->driver
->disconnect(gadget
);
1581 /* make sure to disable all endpoints */
1582 gadget_for_each_ep(ep
, gadget
) {
1585 usb_ep_disable(gadget
->ep0
);
1587 if (mEp
->status
!= NULL
) {
1588 usb_ep_free_request(gadget
->ep0
, mEp
->status
);
1592 spin_lock(udc
->lock
);
1597 /******************************************************************************
1599 *****************************************************************************/
1601 * isr_reset_handler: USB reset interrupt handler
1604 * This function resets USB engine after a bus reset occurred
1606 static void isr_reset_handler(struct ci13xxx
*udc
)
1607 __releases(udc
->lock
)
1608 __acquires(udc
->lock
)
1610 struct ci13xxx_ep
*mEp
= &udc
->ci13xxx_ep
[0];
1620 dbg_event(0xFF, "BUS RST", 0);
1622 retval
= _gadget_stop_activity(&udc
->gadget
);
1626 retval
= hw_usb_reset();
1630 spin_unlock(udc
->lock
);
1631 retval
= usb_ep_enable(&mEp
->ep
, &ctrl_endpt_desc
);
1633 mEp
->status
= usb_ep_alloc_request(&mEp
->ep
, GFP_KERNEL
);
1634 if (mEp
->status
== NULL
) {
1635 usb_ep_disable(&mEp
->ep
);
1639 spin_lock(udc
->lock
);
1643 err("error: %i", retval
);
1647 * isr_get_status_complete: get_status request complete function
1649 * @req: request handled
1651 * Caller must release lock
1653 static void isr_get_status_complete(struct usb_ep
*ep
, struct usb_request
*req
)
1655 trace("%p, %p", ep
, req
);
1657 if (ep
== NULL
|| req
== NULL
) {
1663 usb_ep_free_request(ep
, req
);
1667 * isr_get_status_response: get_status request response
1669 * @setup: setup request packet
1671 * This function returns an error code
1673 static int isr_get_status_response(struct ci13xxx_ep
*mEp
,
1674 struct usb_ctrlrequest
*setup
)
1675 __releases(mEp
->lock
)
1676 __acquires(mEp
->lock
)
1678 struct usb_request
*req
= NULL
;
1679 gfp_t gfp_flags
= GFP_ATOMIC
;
1680 int dir
, num
, retval
;
1682 trace("%p, %p", mEp
, setup
);
1684 if (mEp
== NULL
|| setup
== NULL
)
1687 spin_unlock(mEp
->lock
);
1688 req
= usb_ep_alloc_request(&mEp
->ep
, gfp_flags
);
1689 spin_lock(mEp
->lock
);
1693 req
->complete
= isr_get_status_complete
;
1695 req
->buf
= kzalloc(req
->length
, gfp_flags
);
1696 if (req
->buf
== NULL
) {
1701 if ((setup
->bRequestType
& USB_RECIP_MASK
) == USB_RECIP_DEVICE
) {
1702 /* TODO: D1 - Remote Wakeup; D0 - Self Powered */
1704 } else if ((setup
->bRequestType
& USB_RECIP_MASK
) \
1705 == USB_RECIP_ENDPOINT
) {
1706 dir
= (le16_to_cpu(setup
->wIndex
) & USB_ENDPOINT_DIR_MASK
) ?
1708 num
= le16_to_cpu(setup
->wIndex
) & USB_ENDPOINT_NUMBER_MASK
;
1709 *((u16
*)req
->buf
) = hw_ep_get_halt(num
, dir
);
1711 /* else do nothing; reserved for future use */
1713 spin_unlock(mEp
->lock
);
1714 retval
= usb_ep_queue(&mEp
->ep
, req
, gfp_flags
);
1715 spin_lock(mEp
->lock
);
1724 spin_unlock(mEp
->lock
);
1725 usb_ep_free_request(&mEp
->ep
, req
);
1726 spin_lock(mEp
->lock
);
1731 * isr_setup_status_phase: queues the status phase of a setup transation
1734 * This function returns an error code
1736 static int isr_setup_status_phase(struct ci13xxx_ep
*mEp
)
1737 __releases(mEp
->lock
)
1738 __acquires(mEp
->lock
)
1744 /* mEp is always valid & configured */
1746 if (mEp
->type
== USB_ENDPOINT_XFER_CONTROL
)
1747 mEp
->dir
= (mEp
->dir
== TX
) ? RX
: TX
;
1749 mEp
->status
->no_interrupt
= 1;
1751 spin_unlock(mEp
->lock
);
1752 retval
= usb_ep_queue(&mEp
->ep
, mEp
->status
, GFP_ATOMIC
);
1753 spin_lock(mEp
->lock
);
1759 * isr_tr_complete_low: transaction complete low level handler
1762 * This function returns an error code
1763 * Caller must hold lock
1765 static int isr_tr_complete_low(struct ci13xxx_ep
*mEp
)
1766 __releases(mEp
->lock
)
1767 __acquires(mEp
->lock
)
1769 struct ci13xxx_req
*mReq
;
1774 if (list_empty(&mEp
->qh
[mEp
->dir
].queue
))
1777 /* pop oldest request */
1778 mReq
= list_entry(mEp
->qh
[mEp
->dir
].queue
.next
,
1779 struct ci13xxx_req
, queue
);
1780 list_del_init(&mReq
->queue
);
1782 retval
= _hardware_dequeue(mEp
, mReq
);
1784 dbg_event(_usb_addr(mEp
), "DONE", retval
);
1788 dbg_done(_usb_addr(mEp
), mReq
->ptr
->token
, retval
);
1790 if (!mReq
->req
.no_interrupt
&& mReq
->req
.complete
!= NULL
) {
1791 spin_unlock(mEp
->lock
);
1792 mReq
->req
.complete(&mEp
->ep
, &mReq
->req
);
1793 spin_lock(mEp
->lock
);
1796 if (!list_empty(&mEp
->qh
[mEp
->dir
].queue
)) {
1797 mReq
= list_entry(mEp
->qh
[mEp
->dir
].queue
.next
,
1798 struct ci13xxx_req
, queue
);
1799 _hardware_enqueue(mEp
, mReq
);
1807 * isr_tr_complete_handler: transaction complete interrupt handler
1808 * @udc: UDC descriptor
1810 * This function handles traffic events
1812 static void isr_tr_complete_handler(struct ci13xxx
*udc
)
1813 __releases(udc
->lock
)
1814 __acquires(udc
->lock
)
1825 for (i
= 0; i
< hw_ep_max
; i
++) {
1826 struct ci13xxx_ep
*mEp
= &udc
->ci13xxx_ep
[i
];
1827 int type
, num
, err
= -EINVAL
;
1828 struct usb_ctrlrequest req
;
1831 if (mEp
->desc
== NULL
)
1832 continue; /* not configured */
1834 if ((mEp
->dir
== RX
&& hw_test_and_clear_complete(i
)) ||
1835 (mEp
->dir
== TX
&& hw_test_and_clear_complete(i
+ 16))) {
1836 err
= isr_tr_complete_low(mEp
);
1837 if (mEp
->type
== USB_ENDPOINT_XFER_CONTROL
) {
1838 if (err
> 0) /* needs status phase */
1839 err
= isr_setup_status_phase(mEp
);
1841 dbg_event(_usb_addr(mEp
),
1843 spin_unlock(udc
->lock
);
1844 if (usb_ep_set_halt(&mEp
->ep
))
1845 err("error: ep_set_halt");
1846 spin_lock(udc
->lock
);
1851 if (mEp
->type
!= USB_ENDPOINT_XFER_CONTROL
||
1852 !hw_test_and_clear_setup_status(i
))
1856 warn("ctrl traffic received at endpoint");
1860 /* read_setup_packet */
1862 hw_test_and_set_setup_guard();
1863 memcpy(&req
, &mEp
->qh
[RX
].ptr
->setup
, sizeof(req
));
1864 } while (!hw_test_and_clear_setup_guard());
1866 type
= req
.bRequestType
;
1868 mEp
->dir
= (type
& USB_DIR_IN
) ? TX
: RX
;
1870 dbg_setup(_usb_addr(mEp
), &req
);
1872 switch (req
.bRequest
) {
1873 case USB_REQ_CLEAR_FEATURE
:
1874 if (type
!= (USB_DIR_OUT
|USB_RECIP_ENDPOINT
) &&
1875 le16_to_cpu(req
.wValue
) != USB_ENDPOINT_HALT
)
1877 if (req
.wLength
!= 0)
1879 num
= le16_to_cpu(req
.wIndex
);
1880 num
&= USB_ENDPOINT_NUMBER_MASK
;
1881 if (!udc
->ci13xxx_ep
[num
].wedge
) {
1882 spin_unlock(udc
->lock
);
1883 err
= usb_ep_clear_halt(
1884 &udc
->ci13xxx_ep
[num
].ep
);
1885 spin_lock(udc
->lock
);
1889 err
= isr_setup_status_phase(mEp
);
1891 case USB_REQ_GET_STATUS
:
1892 if (type
!= (USB_DIR_IN
|USB_RECIP_DEVICE
) &&
1893 type
!= (USB_DIR_IN
|USB_RECIP_ENDPOINT
) &&
1894 type
!= (USB_DIR_IN
|USB_RECIP_INTERFACE
))
1896 if (le16_to_cpu(req
.wLength
) != 2 ||
1897 le16_to_cpu(req
.wValue
) != 0)
1899 err
= isr_get_status_response(mEp
, &req
);
1901 case USB_REQ_SET_ADDRESS
:
1902 if (type
!= (USB_DIR_OUT
|USB_RECIP_DEVICE
))
1904 if (le16_to_cpu(req
.wLength
) != 0 ||
1905 le16_to_cpu(req
.wIndex
) != 0)
1907 err
= hw_usb_set_address((u8
)le16_to_cpu(req
.wValue
));
1910 err
= isr_setup_status_phase(mEp
);
1912 case USB_REQ_SET_FEATURE
:
1913 if (type
!= (USB_DIR_OUT
|USB_RECIP_ENDPOINT
) &&
1914 le16_to_cpu(req
.wValue
) != USB_ENDPOINT_HALT
)
1916 if (req
.wLength
!= 0)
1918 num
= le16_to_cpu(req
.wIndex
);
1919 num
&= USB_ENDPOINT_NUMBER_MASK
;
1921 spin_unlock(udc
->lock
);
1922 err
= usb_ep_set_halt(&udc
->ci13xxx_ep
[num
].ep
);
1923 spin_lock(udc
->lock
);
1926 err
= isr_setup_status_phase(mEp
);
1930 if (req
.wLength
== 0) /* no data phase */
1933 spin_unlock(udc
->lock
);
1934 err
= udc
->driver
->setup(&udc
->gadget
, &req
);
1935 spin_lock(udc
->lock
);
1940 dbg_event(_usb_addr(mEp
), "ERROR", err
);
1942 spin_unlock(udc
->lock
);
1943 if (usb_ep_set_halt(&mEp
->ep
))
1944 err("error: ep_set_halt");
1945 spin_lock(udc
->lock
);
1950 /******************************************************************************
1952 *****************************************************************************/
1954 * ep_enable: configure endpoint, making it usable
1956 * Check usb_ep_enable() at "usb_gadget.h" for details
1958 static int ep_enable(struct usb_ep
*ep
,
1959 const struct usb_endpoint_descriptor
*desc
)
1961 struct ci13xxx_ep
*mEp
= container_of(ep
, struct ci13xxx_ep
, ep
);
1962 int direction
, retval
= 0;
1963 unsigned long flags
;
1965 trace("%p, %p", ep
, desc
);
1967 if (ep
== NULL
|| desc
== NULL
)
1970 spin_lock_irqsave(mEp
->lock
, flags
);
1972 /* only internal SW should enable ctrl endpts */
1976 if (!list_empty(&mEp
->qh
[mEp
->dir
].queue
))
1977 warn("enabling a non-empty endpoint!");
1979 mEp
->dir
= (desc
->bEndpointAddress
& USB_ENDPOINT_DIR_MASK
) ? TX
: RX
;
1980 mEp
->num
= desc
->bEndpointAddress
& USB_ENDPOINT_NUMBER_MASK
;
1981 mEp
->type
= desc
->bmAttributes
& USB_ENDPOINT_XFERTYPE_MASK
;
1983 mEp
->ep
.maxpacket
= __constant_le16_to_cpu(desc
->wMaxPacketSize
);
1985 direction
= mEp
->dir
;
1987 dbg_event(_usb_addr(mEp
), "ENABLE", 0);
1989 mEp
->qh
[mEp
->dir
].ptr
->cap
= 0;
1991 if (mEp
->type
== USB_ENDPOINT_XFER_CONTROL
)
1992 mEp
->qh
[mEp
->dir
].ptr
->cap
|= QH_IOS
;
1993 else if (mEp
->type
== USB_ENDPOINT_XFER_ISOC
)
1994 mEp
->qh
[mEp
->dir
].ptr
->cap
&= ~QH_MULT
;
1996 mEp
->qh
[mEp
->dir
].ptr
->cap
&= ~QH_ZLT
;
1998 mEp
->qh
[mEp
->dir
].ptr
->cap
|=
1999 (mEp
->ep
.maxpacket
<< ffs_nr(QH_MAX_PKT
)) & QH_MAX_PKT
;
2000 mEp
->qh
[mEp
->dir
].ptr
->td
.next
|= TD_TERMINATE
; /* needed? */
2002 retval
|= hw_ep_enable(mEp
->num
, mEp
->dir
, mEp
->type
);
2004 if (mEp
->type
== USB_ENDPOINT_XFER_CONTROL
)
2005 mEp
->dir
= (mEp
->dir
== TX
) ? RX
: TX
;
2007 } while (mEp
->dir
!= direction
);
2009 spin_unlock_irqrestore(mEp
->lock
, flags
);
2014 * ep_disable: endpoint is no longer usable
2016 * Check usb_ep_disable() at "usb_gadget.h" for details
2018 static int ep_disable(struct usb_ep
*ep
)
2020 struct ci13xxx_ep
*mEp
= container_of(ep
, struct ci13xxx_ep
, ep
);
2021 int direction
, retval
= 0;
2022 unsigned long flags
;
2028 else if (mEp
->desc
== NULL
)
2031 spin_lock_irqsave(mEp
->lock
, flags
);
2033 /* only internal SW should disable ctrl endpts */
2035 direction
= mEp
->dir
;
2037 dbg_event(_usb_addr(mEp
), "DISABLE", 0);
2039 retval
|= _ep_nuke(mEp
);
2040 retval
|= hw_ep_disable(mEp
->num
, mEp
->dir
);
2042 if (mEp
->type
== USB_ENDPOINT_XFER_CONTROL
)
2043 mEp
->dir
= (mEp
->dir
== TX
) ? RX
: TX
;
2045 } while (mEp
->dir
!= direction
);
2049 spin_unlock_irqrestore(mEp
->lock
, flags
);
2054 * ep_alloc_request: allocate a request object to use with this endpoint
2056 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
2058 static struct usb_request
*ep_alloc_request(struct usb_ep
*ep
, gfp_t gfp_flags
)
2060 struct ci13xxx_ep
*mEp
= container_of(ep
, struct ci13xxx_ep
, ep
);
2061 struct ci13xxx_req
*mReq
= NULL
;
2062 unsigned long flags
;
2064 trace("%p, %i", ep
, gfp_flags
);
2071 spin_lock_irqsave(mEp
->lock
, flags
);
2073 mReq
= kzalloc(sizeof(struct ci13xxx_req
), gfp_flags
);
2075 INIT_LIST_HEAD(&mReq
->queue
);
2077 mReq
->ptr
= dma_pool_alloc(mEp
->td_pool
, gfp_flags
,
2079 if (mReq
->ptr
== NULL
) {
2085 dbg_event(_usb_addr(mEp
), "ALLOC", mReq
== NULL
);
2087 spin_unlock_irqrestore(mEp
->lock
, flags
);
2089 return (mReq
== NULL
) ? NULL
: &mReq
->req
;
2093 * ep_free_request: frees a request object
2095 * Check usb_ep_free_request() at "usb_gadget.h" for details
2097 static void ep_free_request(struct usb_ep
*ep
, struct usb_request
*req
)
2099 struct ci13xxx_ep
*mEp
= container_of(ep
, struct ci13xxx_ep
, ep
);
2100 struct ci13xxx_req
*mReq
= container_of(req
, struct ci13xxx_req
, req
);
2101 unsigned long flags
;
2103 trace("%p, %p", ep
, req
);
2105 if (ep
== NULL
|| req
== NULL
) {
2108 } else if (!list_empty(&mReq
->queue
)) {
2113 spin_lock_irqsave(mEp
->lock
, flags
);
2116 dma_pool_free(mEp
->td_pool
, mReq
->ptr
, mReq
->dma
);
2119 dbg_event(_usb_addr(mEp
), "FREE", 0);
2121 spin_unlock_irqrestore(mEp
->lock
, flags
);
2125 * ep_queue: queues (submits) an I/O request to an endpoint
2127 * Check usb_ep_queue()* at usb_gadget.h" for details
2129 static int ep_queue(struct usb_ep
*ep
, struct usb_request
*req
,
2130 gfp_t __maybe_unused gfp_flags
)
2132 struct ci13xxx_ep
*mEp
= container_of(ep
, struct ci13xxx_ep
, ep
);
2133 struct ci13xxx_req
*mReq
= container_of(req
, struct ci13xxx_req
, req
);
2135 unsigned long flags
;
2137 trace("%p, %p, %X", ep
, req
, gfp_flags
);
2139 if (ep
== NULL
|| req
== NULL
|| mEp
->desc
== NULL
)
2142 spin_lock_irqsave(mEp
->lock
, flags
);
2144 if (mEp
->type
== USB_ENDPOINT_XFER_CONTROL
&&
2145 !list_empty(&mEp
->qh
[mEp
->dir
].queue
)) {
2147 retval
= -EOVERFLOW
;
2148 warn("endpoint ctrl %X nuked", _usb_addr(mEp
));
2151 /* first nuke then test link, e.g. previous status has not sent */
2152 if (!list_empty(&mReq
->queue
)) {
2154 err("request already in queue");
2158 if (req
->length
> (4 * PAGE_SIZE
)) {
2159 req
->length
= (4 * PAGE_SIZE
);
2161 warn("request length truncated");
2164 dbg_queue(_usb_addr(mEp
), req
, retval
);
2167 mReq
->req
.status
= -EINPROGRESS
;
2168 mReq
->req
.actual
= 0;
2169 list_add_tail(&mReq
->queue
, &mEp
->qh
[mEp
->dir
].queue
);
2171 retval
= _hardware_enqueue(mEp
, mReq
);
2172 if (retval
== -EALREADY
|| retval
== -EBUSY
) {
2173 dbg_event(_usb_addr(mEp
), "QUEUE", retval
);
2178 spin_unlock_irqrestore(mEp
->lock
, flags
);
2183 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
2185 * Check usb_ep_dequeue() at "usb_gadget.h" for details
2187 static int ep_dequeue(struct usb_ep
*ep
, struct usb_request
*req
)
2189 struct ci13xxx_ep
*mEp
= container_of(ep
, struct ci13xxx_ep
, ep
);
2190 struct ci13xxx_req
*mReq
= container_of(req
, struct ci13xxx_req
, req
);
2191 unsigned long flags
;
2193 trace("%p, %p", ep
, req
);
2195 if (ep
== NULL
|| req
== NULL
|| mEp
->desc
== NULL
||
2196 list_empty(&mReq
->queue
) || list_empty(&mEp
->qh
[mEp
->dir
].queue
))
2199 spin_lock_irqsave(mEp
->lock
, flags
);
2201 dbg_event(_usb_addr(mEp
), "DEQUEUE", 0);
2203 if (mReq
->req
.status
== -EALREADY
)
2204 _hardware_dequeue(mEp
, mReq
);
2207 list_del_init(&mReq
->queue
);
2208 req
->status
= -ECONNRESET
;
2210 if (!mReq
->req
.no_interrupt
&& mReq
->req
.complete
!= NULL
) {
2211 spin_unlock(mEp
->lock
);
2212 mReq
->req
.complete(&mEp
->ep
, &mReq
->req
);
2213 spin_lock(mEp
->lock
);
2216 spin_unlock_irqrestore(mEp
->lock
, flags
);
2221 * ep_set_halt: sets the endpoint halt feature
2223 * Check usb_ep_set_halt() at "usb_gadget.h" for details
2225 static int ep_set_halt(struct usb_ep
*ep
, int value
)
2227 struct ci13xxx_ep
*mEp
= container_of(ep
, struct ci13xxx_ep
, ep
);
2228 int direction
, retval
= 0;
2229 unsigned long flags
;
2231 trace("%p, %i", ep
, value
);
2233 if (ep
== NULL
|| mEp
->desc
== NULL
)
2236 spin_lock_irqsave(mEp
->lock
, flags
);
2239 /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
2240 if (value
&& mEp
->type
== USB_ENDPOINT_XFER_BULK
&& mEp
->dir
== TX
&&
2241 !list_empty(&mEp
->qh
[mEp
->dir
].queue
)) {
2242 spin_unlock_irqrestore(mEp
->lock
, flags
);
2247 direction
= mEp
->dir
;
2249 dbg_event(_usb_addr(mEp
), "HALT", value
);
2250 retval
|= hw_ep_set_halt(mEp
->num
, mEp
->dir
, value
);
2255 if (mEp
->type
== USB_ENDPOINT_XFER_CONTROL
)
2256 mEp
->dir
= (mEp
->dir
== TX
) ? RX
: TX
;
2258 } while (mEp
->dir
!= direction
);
2260 spin_unlock_irqrestore(mEp
->lock
, flags
);
2265 * ep_set_wedge: sets the halt feature and ignores clear requests
2267 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
2269 static int ep_set_wedge(struct usb_ep
*ep
)
2271 struct ci13xxx_ep
*mEp
= container_of(ep
, struct ci13xxx_ep
, ep
);
2272 unsigned long flags
;
2276 if (ep
== NULL
|| mEp
->desc
== NULL
)
2279 spin_lock_irqsave(mEp
->lock
, flags
);
2281 dbg_event(_usb_addr(mEp
), "WEDGE", 0);
2284 spin_unlock_irqrestore(mEp
->lock
, flags
);
2286 return usb_ep_set_halt(ep
);
2290 * ep_fifo_flush: flushes contents of a fifo
2292 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
2294 static void ep_fifo_flush(struct usb_ep
*ep
)
2296 struct ci13xxx_ep
*mEp
= container_of(ep
, struct ci13xxx_ep
, ep
);
2297 unsigned long flags
;
2302 err("%02X: -EINVAL", _usb_addr(mEp
));
2306 spin_lock_irqsave(mEp
->lock
, flags
);
2308 dbg_event(_usb_addr(mEp
), "FFLUSH", 0);
2309 hw_ep_flush(mEp
->num
, mEp
->dir
);
2311 spin_unlock_irqrestore(mEp
->lock
, flags
);
2315 * Endpoint-specific part of the API to the USB controller hardware
2316 * Check "usb_gadget.h" for details
2318 static const struct usb_ep_ops usb_ep_ops
= {
2319 .enable
= ep_enable
,
2320 .disable
= ep_disable
,
2321 .alloc_request
= ep_alloc_request
,
2322 .free_request
= ep_free_request
,
2324 .dequeue
= ep_dequeue
,
2325 .set_halt
= ep_set_halt
,
2326 .set_wedge
= ep_set_wedge
,
2327 .fifo_flush
= ep_fifo_flush
,
2330 /******************************************************************************
2332 *****************************************************************************/
2334 * Device operations part of the API to the USB controller hardware,
2335 * which don't involve endpoints (or i/o)
2336 * Check "usb_gadget.h" for details
2338 static const struct usb_gadget_ops usb_gadget_ops
;
2341 * usb_gadget_register_driver: register a gadget driver
2343 * Check usb_gadget_register_driver() at "usb_gadget.h" for details
2344 * Interrupts are enabled here
2346 int usb_gadget_register_driver(struct usb_gadget_driver
*driver
)
2348 struct ci13xxx
*udc
= _udc
;
2349 unsigned long i
, k
, flags
;
2350 int retval
= -ENOMEM
;
2352 trace("%p", driver
);
2354 if (driver
== NULL
||
2355 driver
->bind
== NULL
||
2356 driver
->unbind
== NULL
||
2357 driver
->setup
== NULL
||
2358 driver
->disconnect
== NULL
||
2359 driver
->suspend
== NULL
||
2360 driver
->resume
== NULL
)
2362 else if (udc
== NULL
)
2364 else if (udc
->driver
!= NULL
)
2367 /* alloc resources */
2368 udc
->qh_pool
= dma_pool_create("ci13xxx_qh", &udc
->gadget
.dev
,
2369 sizeof(struct ci13xxx_qh
),
2371 if (udc
->qh_pool
== NULL
)
2374 udc
->td_pool
= dma_pool_create("ci13xxx_td", &udc
->gadget
.dev
,
2375 sizeof(struct ci13xxx_td
),
2377 if (udc
->td_pool
== NULL
) {
2378 dma_pool_destroy(udc
->qh_pool
);
2379 udc
->qh_pool
= NULL
;
2383 spin_lock_irqsave(udc
->lock
, flags
);
2385 info("hw_ep_max = %d", hw_ep_max
);
2387 udc
->driver
= driver
;
2388 udc
->gadget
.ops
= NULL
;
2389 udc
->gadget
.dev
.driver
= NULL
;
2392 for (i
= 0; i
< hw_ep_max
; i
++) {
2393 struct ci13xxx_ep
*mEp
= &udc
->ci13xxx_ep
[i
];
2395 scnprintf(mEp
->name
, sizeof(mEp
->name
), "ep%i", (int)i
);
2397 mEp
->lock
= udc
->lock
;
2398 mEp
->device
= &udc
->gadget
.dev
;
2399 mEp
->td_pool
= udc
->td_pool
;
2401 mEp
->ep
.name
= mEp
->name
;
2402 mEp
->ep
.ops
= &usb_ep_ops
;
2403 mEp
->ep
.maxpacket
= CTRL_PAYLOAD_MAX
;
2405 /* this allocation cannot be random */
2406 for (k
= RX
; k
<= TX
; k
++) {
2407 INIT_LIST_HEAD(&mEp
->qh
[k
].queue
);
2408 mEp
->qh
[k
].ptr
= dma_pool_alloc(udc
->qh_pool
,
2411 if (mEp
->qh
[k
].ptr
== NULL
)
2414 memset(mEp
->qh
[k
].ptr
, 0,
2415 sizeof(*mEp
->qh
[k
].ptr
));
2418 udc
->gadget
.ep0
= &mEp
->ep
;
2420 list_add_tail(&mEp
->ep
.ep_list
, &udc
->gadget
.ep_list
);
2426 driver
->driver
.bus
= NULL
;
2427 udc
->gadget
.ops
= &usb_gadget_ops
;
2428 udc
->gadget
.dev
.driver
= &driver
->driver
;
2430 spin_unlock_irqrestore(udc
->lock
, flags
);
2431 retval
= driver
->bind(&udc
->gadget
); /* MAY SLEEP */
2432 spin_lock_irqsave(udc
->lock
, flags
);
2435 udc
->gadget
.ops
= NULL
;
2436 udc
->gadget
.dev
.driver
= NULL
;
2440 retval
= hw_device_state(udc
->ci13xxx_ep
[0].qh
[RX
].dma
);
2443 spin_unlock_irqrestore(udc
->lock
, flags
);
2445 usb_gadget_unregister_driver(driver
);
2448 EXPORT_SYMBOL(usb_gadget_register_driver
);
2451 * usb_gadget_unregister_driver: unregister a gadget driver
2453 * Check usb_gadget_unregister_driver() at "usb_gadget.h" for details
2455 int usb_gadget_unregister_driver(struct usb_gadget_driver
*driver
)
2457 struct ci13xxx
*udc
= _udc
;
2458 unsigned long i
, k
, flags
;
2460 trace("%p", driver
);
2462 if (driver
== NULL
||
2463 driver
->bind
== NULL
||
2464 driver
->unbind
== NULL
||
2465 driver
->setup
== NULL
||
2466 driver
->disconnect
== NULL
||
2467 driver
->suspend
== NULL
||
2468 driver
->resume
== NULL
||
2469 driver
!= udc
->driver
)
2472 spin_lock_irqsave(udc
->lock
, flags
);
2477 if (udc
->gadget
.ops
!= NULL
) {
2478 _gadget_stop_activity(&udc
->gadget
);
2480 spin_unlock_irqrestore(udc
->lock
, flags
);
2481 driver
->unbind(&udc
->gadget
); /* MAY SLEEP */
2482 spin_lock_irqsave(udc
->lock
, flags
);
2484 udc
->gadget
.ops
= NULL
;
2485 udc
->gadget
.dev
.driver
= NULL
;
2488 /* free resources */
2489 for (i
= 0; i
< hw_ep_max
; i
++) {
2490 struct ci13xxx_ep
*mEp
= &udc
->ci13xxx_ep
[i
];
2493 udc
->gadget
.ep0
= NULL
;
2494 else if (!list_empty(&mEp
->ep
.ep_list
))
2495 list_del_init(&mEp
->ep
.ep_list
);
2497 for (k
= RX
; k
<= TX
; k
++)
2498 if (mEp
->qh
[k
].ptr
!= NULL
)
2499 dma_pool_free(udc
->qh_pool
,
2500 mEp
->qh
[k
].ptr
, mEp
->qh
[k
].dma
);
2505 spin_unlock_irqrestore(udc
->lock
, flags
);
2507 if (udc
->td_pool
!= NULL
) {
2508 dma_pool_destroy(udc
->td_pool
);
2509 udc
->td_pool
= NULL
;
2511 if (udc
->qh_pool
!= NULL
) {
2512 dma_pool_destroy(udc
->qh_pool
);
2513 udc
->qh_pool
= NULL
;
2518 EXPORT_SYMBOL(usb_gadget_unregister_driver
);
2520 /******************************************************************************
2522 *****************************************************************************/
2524 * udc_irq: global interrupt handler
2526 * This function returns IRQ_HANDLED if the IRQ has been handled
2527 * It locks access to registers
2529 static irqreturn_t
udc_irq(void)
2531 struct ci13xxx
*udc
= _udc
;
2542 spin_lock(udc
->lock
);
2543 intr
= hw_test_and_clear_intr_active();
2545 isr_statistics
.hndl
.buf
[isr_statistics
.hndl
.idx
++] = intr
;
2546 isr_statistics
.hndl
.idx
&= ISR_MASK
;
2547 isr_statistics
.hndl
.cnt
++;
2549 /* order defines priority - do NOT change it */
2550 if (USBi_URI
& intr
) {
2551 isr_statistics
.uri
++;
2552 isr_reset_handler(udc
);
2554 if (USBi_PCI
& intr
) {
2555 isr_statistics
.pci
++;
2556 udc
->gadget
.speed
= hw_port_is_high_speed() ?
2557 USB_SPEED_HIGH
: USB_SPEED_FULL
;
2559 if (USBi_UEI
& intr
)
2560 isr_statistics
.uei
++;
2561 if (USBi_UI
& intr
) {
2562 isr_statistics
.ui
++;
2563 isr_tr_complete_handler(udc
);
2565 if (USBi_SLI
& intr
)
2566 isr_statistics
.sli
++;
2567 retval
= IRQ_HANDLED
;
2569 isr_statistics
.none
++;
2572 spin_unlock(udc
->lock
);
2578 * udc_release: driver release function
2581 * Currently does nothing
2583 static void udc_release(struct device
*dev
)
2592 * udc_probe: parent probe must call this to initialize UDC
2593 * @dev: parent device
2594 * @regs: registers base address
2595 * @name: driver name
2597 * This function returns an error code
2598 * No interrupts active, the IRQ has not been requested yet
2599 * Kernel assumes 32-bit DMA operations by default, no need to dma_set_mask
2601 static int udc_probe(struct device
*dev
, void __iomem
*regs
, const char *name
)
2603 struct ci13xxx
*udc
;
2606 trace("%p, %p, %p", dev
, regs
, name
);
2608 if (dev
== NULL
|| regs
== NULL
|| name
== NULL
)
2611 udc
= kzalloc(sizeof(struct ci13xxx
), GFP_KERNEL
);
2615 udc
->lock
= &udc_lock
;
2617 retval
= hw_device_reset(regs
);
2621 udc
->gadget
.ops
= NULL
;
2622 udc
->gadget
.speed
= USB_SPEED_UNKNOWN
;
2623 udc
->gadget
.is_dualspeed
= 1;
2624 udc
->gadget
.is_otg
= 0;
2625 udc
->gadget
.name
= name
;
2627 INIT_LIST_HEAD(&udc
->gadget
.ep_list
);
2628 udc
->gadget
.ep0
= NULL
;
2630 dev_set_name(&udc
->gadget
.dev
, "gadget");
2631 udc
->gadget
.dev
.dma_mask
= dev
->dma_mask
;
2632 udc
->gadget
.dev
.parent
= dev
;
2633 udc
->gadget
.dev
.release
= udc_release
;
2635 retval
= device_register(&udc
->gadget
.dev
);
2639 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
2640 retval
= dbg_create_files(&udc
->gadget
.dev
);
2643 device_unregister(&udc
->gadget
.dev
);
2651 err("error = %i", retval
);
2658 * udc_remove: parent remove must call this to remove UDC
2660 * No interrupts active, the IRQ has been released
2662 static void udc_remove(void)
2664 struct ci13xxx
*udc
= _udc
;
2671 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
2672 dbg_remove_files(&udc
->gadget
.dev
);
2674 device_unregister(&udc
->gadget
.dev
);
2680 /******************************************************************************
2682 *****************************************************************************/
2684 * ci13xxx_pci_irq: interrut handler
2686 * @pdev: USB Device Controller interrupt source
2688 * This function returns IRQ_HANDLED if the IRQ has been handled
2689 * This is an ISR don't trace, use attribute interface instead
2691 static irqreturn_t
ci13xxx_pci_irq(int irq
, void *pdev
)
2694 dev_err(&((struct pci_dev
*)pdev
)->dev
, "Invalid IRQ0 usage!");
2701 * ci13xxx_pci_probe: PCI probe
2702 * @pdev: USB device controller being probed
2703 * @id: PCI hotplug ID connecting controller to UDC framework
2705 * This function returns an error code
2706 * Allocates basic PCI resources for this USB device controller, and then
2707 * invokes the udc_probe() method to start the UDC associated with it
2709 static int __devinit
ci13xxx_pci_probe(struct pci_dev
*pdev
,
2710 const struct pci_device_id
*id
)
2712 void __iomem
*regs
= NULL
;
2718 retval
= pci_enable_device(pdev
);
2723 dev_err(&pdev
->dev
, "No IRQ, check BIOS/PCI setup!");
2725 goto disable_device
;
2728 retval
= pci_request_regions(pdev
, UDC_DRIVER_NAME
);
2730 goto disable_device
;
2732 /* BAR 0 holds all the registers */
2733 regs
= pci_iomap(pdev
, 0, 0);
2735 dev_err(&pdev
->dev
, "Error mapping memory!");
2737 goto release_regions
;
2739 pci_set_drvdata(pdev
, (__force
void *)regs
);
2741 pci_set_master(pdev
);
2742 pci_try_set_mwi(pdev
);
2744 retval
= udc_probe(&pdev
->dev
, regs
, UDC_DRIVER_NAME
);
2748 /* our device does not have MSI capability */
2750 retval
= request_irq(pdev
->irq
, ci13xxx_pci_irq
, IRQF_SHARED
,
2751 UDC_DRIVER_NAME
, pdev
);
2760 pci_iounmap(pdev
, regs
);
2762 pci_release_regions(pdev
);
2764 pci_disable_device(pdev
);
2770 * ci13xxx_pci_remove: PCI remove
2771 * @pdev: USB Device Controller being removed
2773 * Reverses the effect of ci13xxx_pci_probe(),
2774 * first invoking the udc_remove() and then releases
2775 * all PCI resources allocated for this USB device controller
2777 static void __devexit
ci13xxx_pci_remove(struct pci_dev
*pdev
)
2779 free_irq(pdev
->irq
, pdev
);
2781 pci_iounmap(pdev
, (__force
void __iomem
*)pci_get_drvdata(pdev
));
2782 pci_release_regions(pdev
);
2783 pci_disable_device(pdev
);
2788 * PCI device structure
2790 * Check "pci.h" for details
2792 static DEFINE_PCI_DEVICE_TABLE(ci13xxx_pci_id_table
) = {
2793 { PCI_DEVICE(0x153F, 0x1004) },
2794 { PCI_DEVICE(0x153F, 0x1006) },
2795 { 0, 0, 0, 0, 0, 0, 0 /* end: all zeroes */ }
2797 MODULE_DEVICE_TABLE(pci
, ci13xxx_pci_id_table
);
2799 static struct pci_driver ci13xxx_pci_driver
= {
2800 .name
= UDC_DRIVER_NAME
,
2801 .id_table
= ci13xxx_pci_id_table
,
2802 .probe
= ci13xxx_pci_probe
,
2803 .remove
= __devexit_p(ci13xxx_pci_remove
),
2807 * ci13xxx_pci_init: module init
2811 static int __init
ci13xxx_pci_init(void)
2813 return pci_register_driver(&ci13xxx_pci_driver
);
2815 module_init(ci13xxx_pci_init
);
2818 * ci13xxx_pci_exit: module exit
2822 static void __exit
ci13xxx_pci_exit(void)
2824 pci_unregister_driver(&ci13xxx_pci_driver
);
2826 module_exit(ci13xxx_pci_exit
);
2828 MODULE_AUTHOR("MIPS - David Lopo <dlopo@chipidea.mips.com>");
2829 MODULE_DESCRIPTION("MIPS CI13XXX USB Peripheral Controller");
2830 MODULE_LICENSE("GPL");
2831 MODULE_VERSION("June 2008");