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Merge git://git.infradead.org/battery-2.6
[deliverable/linux.git] / drivers / usb / gadget / m66592-udc.c
1 /*
2 * M66592 UDC (USB gadget)
3 *
4 * Copyright (C) 2006-2007 Renesas Solutions Corp.
5 *
6 * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 *
21 */
22
23 #include <linux/module.h>
24 #include <linux/kernel.h>
25 #include <linux/sched.h>
26 #include <linux/smp_lock.h>
27 #include <linux/errno.h>
28 #include <linux/init.h>
29 #include <linux/timer.h>
30 #include <linux/delay.h>
31 #include <linux/list.h>
32 #include <linux/interrupt.h>
33 #include <linux/platform_device.h>
34 #include <linux/usb/ch9.h>
35 #include <linux/usb_gadget.h>
36
37 #include <asm/io.h>
38 #include <asm/irq.h>
39 #include <asm/system.h>
40
41 #include "m66592-udc.h"
42
43 MODULE_DESCRIPTION("M66592 USB gadget driiver");
44 MODULE_LICENSE("GPL");
45 MODULE_AUTHOR("Yoshihiro Shimoda");
46
47 #define DRIVER_VERSION "29 May 2007"
48
49 /* module parameters */
50 static unsigned short clock = M66592_XTAL24;
51 module_param(clock, ushort, 0644);
52 MODULE_PARM_DESC(clock, "input clock: 48MHz=32768, 24MHz=16384, 12MHz=0(default=16384)");
53 static unsigned short vif = M66592_LDRV;
54 module_param(vif, ushort, 0644);
55 MODULE_PARM_DESC(vif, "input VIF: 3.3V=32768, 1.5V=0(default=32768)");
56 static unsigned short endian = 0;
57 module_param(endian, ushort, 0644);
58 MODULE_PARM_DESC(endian, "data endian: big=256, little=0(default=0)");
59 static unsigned short irq_sense = M66592_INTL;
60 module_param(irq_sense, ushort, 0644);
61 MODULE_PARM_DESC(irq_sense, "IRQ sense: low level=2, falling edge=0(default=2)");
62
63 static const char udc_name[] = "m66592_udc";
64 static const char *m66592_ep_name[] = {
65 "ep0", "ep1", "ep2", "ep3", "ep4", "ep5", "ep6", "ep7"
66 };
67
68 static void disable_controller(struct m66592 *m66592);
69 static void irq_ep0_write(struct m66592_ep *ep, struct m66592_request *req);
70 static void irq_packet_write(struct m66592_ep *ep, struct m66592_request *req);
71 static int m66592_queue(struct usb_ep *_ep, struct usb_request *_req,
72 gfp_t gfp_flags);
73
74 static void transfer_complete(struct m66592_ep *ep,
75 struct m66592_request *req,
76 int status);
77 /*-------------------------------------------------------------------------*/
78 static inline u16 get_usb_speed(struct m66592 *m66592)
79 {
80 return (m66592_read(m66592, M66592_DVSTCTR) & M66592_RHST);
81 }
82
83 static void enable_pipe_irq(struct m66592 *m66592, u16 pipenum,
84 unsigned long reg)
85 {
86 u16 tmp;
87
88 tmp = m66592_read(m66592, M66592_INTENB0);
89 m66592_bclr(m66592, M66592_BEMPE | M66592_NRDYE | M66592_BRDYE,
90 M66592_INTENB0);
91 m66592_bset(m66592, (1 << pipenum), reg);
92 m66592_write(m66592, tmp, M66592_INTENB0);
93 }
94
95 static void disable_pipe_irq(struct m66592 *m66592, u16 pipenum,
96 unsigned long reg)
97 {
98 u16 tmp;
99
100 tmp = m66592_read(m66592, M66592_INTENB0);
101 m66592_bclr(m66592, M66592_BEMPE | M66592_NRDYE | M66592_BRDYE,
102 M66592_INTENB0);
103 m66592_bclr(m66592, (1 << pipenum), reg);
104 m66592_write(m66592, tmp, M66592_INTENB0);
105 }
106
107 static void m66592_usb_connect(struct m66592 *m66592)
108 {
109 m66592_bset(m66592, M66592_CTRE, M66592_INTENB0);
110 m66592_bset(m66592, M66592_WDST | M66592_RDST | M66592_CMPL,
111 M66592_INTENB0);
112 m66592_bset(m66592, M66592_BEMPE | M66592_BRDYE, M66592_INTENB0);
113
114 m66592_bset(m66592, M66592_DPRPU, M66592_SYSCFG);
115 }
116
117 static void m66592_usb_disconnect(struct m66592 *m66592)
118 {
119 m66592_bclr(m66592, M66592_CTRE, M66592_INTENB0);
120 m66592_bclr(m66592, M66592_WDST | M66592_RDST | M66592_CMPL,
121 M66592_INTENB0);
122 m66592_bclr(m66592, M66592_BEMPE | M66592_BRDYE, M66592_INTENB0);
123 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
124
125 m66592->gadget.speed = USB_SPEED_UNKNOWN;
126 spin_unlock(&m66592->lock);
127 m66592->driver->disconnect(&m66592->gadget);
128 spin_lock(&m66592->lock);
129
130 disable_controller(m66592);
131 INIT_LIST_HEAD(&m66592->ep[0].queue);
132 }
133
134 static inline u16 control_reg_get_pid(struct m66592 *m66592, u16 pipenum)
135 {
136 u16 pid = 0;
137 unsigned long offset;
138
139 if (pipenum == 0)
140 pid = m66592_read(m66592, M66592_DCPCTR) & M66592_PID;
141 else if (pipenum < M66592_MAX_NUM_PIPE) {
142 offset = get_pipectr_addr(pipenum);
143 pid = m66592_read(m66592, offset) & M66592_PID;
144 } else
145 printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum);
146
147 return pid;
148 }
149
150 static inline void control_reg_set_pid(struct m66592 *m66592, u16 pipenum,
151 u16 pid)
152 {
153 unsigned long offset;
154
155 if (pipenum == 0)
156 m66592_mdfy(m66592, pid, M66592_PID, M66592_DCPCTR);
157 else if (pipenum < M66592_MAX_NUM_PIPE) {
158 offset = get_pipectr_addr(pipenum);
159 m66592_mdfy(m66592, pid, M66592_PID, offset);
160 } else
161 printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum);
162 }
163
164 static inline void pipe_start(struct m66592 *m66592, u16 pipenum)
165 {
166 control_reg_set_pid(m66592, pipenum, M66592_PID_BUF);
167 }
168
169 static inline void pipe_stop(struct m66592 *m66592, u16 pipenum)
170 {
171 control_reg_set_pid(m66592, pipenum, M66592_PID_NAK);
172 }
173
174 static inline void pipe_stall(struct m66592 *m66592, u16 pipenum)
175 {
176 control_reg_set_pid(m66592, pipenum, M66592_PID_STALL);
177 }
178
179 static inline u16 control_reg_get(struct m66592 *m66592, u16 pipenum)
180 {
181 u16 ret = 0;
182 unsigned long offset;
183
184 if (pipenum == 0)
185 ret = m66592_read(m66592, M66592_DCPCTR);
186 else if (pipenum < M66592_MAX_NUM_PIPE) {
187 offset = get_pipectr_addr(pipenum);
188 ret = m66592_read(m66592, offset);
189 } else
190 printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum);
191
192 return ret;
193 }
194
195 static inline void control_reg_sqclr(struct m66592 *m66592, u16 pipenum)
196 {
197 unsigned long offset;
198
199 pipe_stop(m66592, pipenum);
200
201 if (pipenum == 0)
202 m66592_bset(m66592, M66592_SQCLR, M66592_DCPCTR);
203 else if (pipenum < M66592_MAX_NUM_PIPE) {
204 offset = get_pipectr_addr(pipenum);
205 m66592_bset(m66592, M66592_SQCLR, offset);
206 } else
207 printk(KERN_ERR "unexpect pipe num(%d)\n", pipenum);
208 }
209
210 static inline int get_buffer_size(struct m66592 *m66592, u16 pipenum)
211 {
212 u16 tmp;
213 int size;
214
215 if (pipenum == 0) {
216 tmp = m66592_read(m66592, M66592_DCPCFG);
217 if ((tmp & M66592_CNTMD) != 0)
218 size = 256;
219 else {
220 tmp = m66592_read(m66592, M66592_DCPMAXP);
221 size = tmp & M66592_MAXP;
222 }
223 } else {
224 m66592_write(m66592, pipenum, M66592_PIPESEL);
225 tmp = m66592_read(m66592, M66592_PIPECFG);
226 if ((tmp & M66592_CNTMD) != 0) {
227 tmp = m66592_read(m66592, M66592_PIPEBUF);
228 size = ((tmp >> 10) + 1) * 64;
229 } else {
230 tmp = m66592_read(m66592, M66592_PIPEMAXP);
231 size = tmp & M66592_MXPS;
232 }
233 }
234
235 return size;
236 }
237
238 static inline void pipe_change(struct m66592 *m66592, u16 pipenum)
239 {
240 struct m66592_ep *ep = m66592->pipenum2ep[pipenum];
241
242 if (ep->use_dma)
243 return;
244
245 m66592_mdfy(m66592, pipenum, M66592_CURPIPE, ep->fifosel);
246
247 ndelay(450);
248
249 m66592_bset(m66592, M66592_MBW, ep->fifosel);
250 }
251
252 static int pipe_buffer_setting(struct m66592 *m66592,
253 struct m66592_pipe_info *info)
254 {
255 u16 bufnum = 0, buf_bsize = 0;
256 u16 pipecfg = 0;
257
258 if (info->pipe == 0)
259 return -EINVAL;
260
261 m66592_write(m66592, info->pipe, M66592_PIPESEL);
262
263 if (info->dir_in)
264 pipecfg |= M66592_DIR;
265 pipecfg |= info->type;
266 pipecfg |= info->epnum;
267 switch (info->type) {
268 case M66592_INT:
269 bufnum = 4 + (info->pipe - M66592_BASE_PIPENUM_INT);
270 buf_bsize = 0;
271 break;
272 case M66592_BULK:
273 bufnum = m66592->bi_bufnum +
274 (info->pipe - M66592_BASE_PIPENUM_BULK) * 16;
275 m66592->bi_bufnum += 16;
276 buf_bsize = 7;
277 pipecfg |= M66592_DBLB;
278 if (!info->dir_in)
279 pipecfg |= M66592_SHTNAK;
280 break;
281 case M66592_ISO:
282 bufnum = m66592->bi_bufnum +
283 (info->pipe - M66592_BASE_PIPENUM_ISOC) * 16;
284 m66592->bi_bufnum += 16;
285 buf_bsize = 7;
286 break;
287 }
288 if (m66592->bi_bufnum > M66592_MAX_BUFNUM) {
289 printk(KERN_ERR "m66592 pipe memory is insufficient(%d)\n",
290 m66592->bi_bufnum);
291 return -ENOMEM;
292 }
293
294 m66592_write(m66592, pipecfg, M66592_PIPECFG);
295 m66592_write(m66592, (buf_bsize << 10) | (bufnum), M66592_PIPEBUF);
296 m66592_write(m66592, info->maxpacket, M66592_PIPEMAXP);
297 if (info->interval)
298 info->interval--;
299 m66592_write(m66592, info->interval, M66592_PIPEPERI);
300
301 return 0;
302 }
303
304 static void pipe_buffer_release(struct m66592 *m66592,
305 struct m66592_pipe_info *info)
306 {
307 if (info->pipe == 0)
308 return;
309
310 switch (info->type) {
311 case M66592_BULK:
312 if (is_bulk_pipe(info->pipe))
313 m66592->bi_bufnum -= 16;
314 break;
315 case M66592_ISO:
316 if (is_isoc_pipe(info->pipe))
317 m66592->bi_bufnum -= 16;
318 break;
319 }
320
321 if (is_bulk_pipe(info->pipe)) {
322 m66592->bulk--;
323 } else if (is_interrupt_pipe(info->pipe))
324 m66592->interrupt--;
325 else if (is_isoc_pipe(info->pipe)) {
326 m66592->isochronous--;
327 if (info->type == M66592_BULK)
328 m66592->bulk--;
329 } else
330 printk(KERN_ERR "ep_release: unexpect pipenum (%d)\n",
331 info->pipe);
332 }
333
334 static void pipe_initialize(struct m66592_ep *ep)
335 {
336 struct m66592 *m66592 = ep->m66592;
337
338 m66592_mdfy(m66592, 0, M66592_CURPIPE, ep->fifosel);
339
340 m66592_write(m66592, M66592_ACLRM, ep->pipectr);
341 m66592_write(m66592, 0, ep->pipectr);
342 m66592_write(m66592, M66592_SQCLR, ep->pipectr);
343 if (ep->use_dma) {
344 m66592_mdfy(m66592, ep->pipenum, M66592_CURPIPE, ep->fifosel);
345
346 ndelay(450);
347
348 m66592_bset(m66592, M66592_MBW, ep->fifosel);
349 }
350 }
351
352 static void m66592_ep_setting(struct m66592 *m66592, struct m66592_ep *ep,
353 const struct usb_endpoint_descriptor *desc,
354 u16 pipenum, int dma)
355 {
356 if ((pipenum != 0) && dma) {
357 if (m66592->num_dma == 0) {
358 m66592->num_dma++;
359 ep->use_dma = 1;
360 ep->fifoaddr = M66592_D0FIFO;
361 ep->fifosel = M66592_D0FIFOSEL;
362 ep->fifoctr = M66592_D0FIFOCTR;
363 ep->fifotrn = M66592_D0FIFOTRN;
364 } else if (m66592->num_dma == 1) {
365 m66592->num_dma++;
366 ep->use_dma = 1;
367 ep->fifoaddr = M66592_D1FIFO;
368 ep->fifosel = M66592_D1FIFOSEL;
369 ep->fifoctr = M66592_D1FIFOCTR;
370 ep->fifotrn = M66592_D1FIFOTRN;
371 } else {
372 ep->use_dma = 0;
373 ep->fifoaddr = M66592_CFIFO;
374 ep->fifosel = M66592_CFIFOSEL;
375 ep->fifoctr = M66592_CFIFOCTR;
376 ep->fifotrn = 0;
377 }
378 } else {
379 ep->use_dma = 0;
380 ep->fifoaddr = M66592_CFIFO;
381 ep->fifosel = M66592_CFIFOSEL;
382 ep->fifoctr = M66592_CFIFOCTR;
383 ep->fifotrn = 0;
384 }
385
386 ep->pipectr = get_pipectr_addr(pipenum);
387 ep->pipenum = pipenum;
388 ep->ep.maxpacket = desc->wMaxPacketSize;
389 m66592->pipenum2ep[pipenum] = ep;
390 m66592->epaddr2ep[desc->bEndpointAddress&USB_ENDPOINT_NUMBER_MASK] = ep;
391 INIT_LIST_HEAD(&ep->queue);
392 }
393
394 static void m66592_ep_release(struct m66592_ep *ep)
395 {
396 struct m66592 *m66592 = ep->m66592;
397 u16 pipenum = ep->pipenum;
398
399 if (pipenum == 0)
400 return;
401
402 if (ep->use_dma)
403 m66592->num_dma--;
404 ep->pipenum = 0;
405 ep->busy = 0;
406 ep->use_dma = 0;
407 }
408
409 static int alloc_pipe_config(struct m66592_ep *ep,
410 const struct usb_endpoint_descriptor *desc)
411 {
412 struct m66592 *m66592 = ep->m66592;
413 struct m66592_pipe_info info;
414 int dma = 0;
415 int *counter;
416 int ret;
417
418 ep->desc = desc;
419
420 BUG_ON(ep->pipenum);
421
422 switch(desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
423 case USB_ENDPOINT_XFER_BULK:
424 if (m66592->bulk >= M66592_MAX_NUM_BULK) {
425 if (m66592->isochronous >= M66592_MAX_NUM_ISOC) {
426 printk(KERN_ERR "bulk pipe is insufficient\n");
427 return -ENODEV;
428 } else {
429 info.pipe = M66592_BASE_PIPENUM_ISOC +
430 m66592->isochronous;
431 counter = &m66592->isochronous;
432 }
433 } else {
434 info.pipe = M66592_BASE_PIPENUM_BULK + m66592->bulk;
435 counter = &m66592->bulk;
436 }
437 info.type = M66592_BULK;
438 dma = 1;
439 break;
440 case USB_ENDPOINT_XFER_INT:
441 if (m66592->interrupt >= M66592_MAX_NUM_INT) {
442 printk(KERN_ERR "interrupt pipe is insufficient\n");
443 return -ENODEV;
444 }
445 info.pipe = M66592_BASE_PIPENUM_INT + m66592->interrupt;
446 info.type = M66592_INT;
447 counter = &m66592->interrupt;
448 break;
449 case USB_ENDPOINT_XFER_ISOC:
450 if (m66592->isochronous >= M66592_MAX_NUM_ISOC) {
451 printk(KERN_ERR "isochronous pipe is insufficient\n");
452 return -ENODEV;
453 }
454 info.pipe = M66592_BASE_PIPENUM_ISOC + m66592->isochronous;
455 info.type = M66592_ISO;
456 counter = &m66592->isochronous;
457 break;
458 default:
459 printk(KERN_ERR "unexpect xfer type\n");
460 return -EINVAL;
461 }
462 ep->type = info.type;
463
464 info.epnum = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
465 info.maxpacket = desc->wMaxPacketSize;
466 info.interval = desc->bInterval;
467 if (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK)
468 info.dir_in = 1;
469 else
470 info.dir_in = 0;
471
472 ret = pipe_buffer_setting(m66592, &info);
473 if (ret < 0) {
474 printk(KERN_ERR "pipe_buffer_setting fail\n");
475 return ret;
476 }
477
478 (*counter)++;
479 if ((counter == &m66592->isochronous) && info.type == M66592_BULK)
480 m66592->bulk++;
481
482 m66592_ep_setting(m66592, ep, desc, info.pipe, dma);
483 pipe_initialize(ep);
484
485 return 0;
486 }
487
488 static int free_pipe_config(struct m66592_ep *ep)
489 {
490 struct m66592 *m66592 = ep->m66592;
491 struct m66592_pipe_info info;
492
493 info.pipe = ep->pipenum;
494 info.type = ep->type;
495 pipe_buffer_release(m66592, &info);
496 m66592_ep_release(ep);
497
498 return 0;
499 }
500
501 /*-------------------------------------------------------------------------*/
502 static void pipe_irq_enable(struct m66592 *m66592, u16 pipenum)
503 {
504 enable_irq_ready(m66592, pipenum);
505 enable_irq_nrdy(m66592, pipenum);
506 }
507
508 static void pipe_irq_disable(struct m66592 *m66592, u16 pipenum)
509 {
510 disable_irq_ready(m66592, pipenum);
511 disable_irq_nrdy(m66592, pipenum);
512 }
513
514 /* if complete is true, gadget driver complete function is not call */
515 static void control_end(struct m66592 *m66592, unsigned ccpl)
516 {
517 m66592->ep[0].internal_ccpl = ccpl;
518 pipe_start(m66592, 0);
519 m66592_bset(m66592, M66592_CCPL, M66592_DCPCTR);
520 }
521
522 static void start_ep0_write(struct m66592_ep *ep, struct m66592_request *req)
523 {
524 struct m66592 *m66592 = ep->m66592;
525
526 pipe_change(m66592, ep->pipenum);
527 m66592_mdfy(m66592, M66592_ISEL | M66592_PIPE0,
528 (M66592_ISEL | M66592_CURPIPE),
529 M66592_CFIFOSEL);
530 m66592_write(m66592, M66592_BCLR, ep->fifoctr);
531 if (req->req.length == 0) {
532 m66592_bset(m66592, M66592_BVAL, ep->fifoctr);
533 pipe_start(m66592, 0);
534 transfer_complete(ep, req, 0);
535 } else {
536 m66592_write(m66592, ~M66592_BEMP0, M66592_BEMPSTS);
537 irq_ep0_write(ep, req);
538 }
539 }
540
541 static void start_packet_write(struct m66592_ep *ep, struct m66592_request *req)
542 {
543 struct m66592 *m66592 = ep->m66592;
544 u16 tmp;
545
546 pipe_change(m66592, ep->pipenum);
547 disable_irq_empty(m66592, ep->pipenum);
548 pipe_start(m66592, ep->pipenum);
549
550 tmp = m66592_read(m66592, ep->fifoctr);
551 if (unlikely((tmp & M66592_FRDY) == 0))
552 pipe_irq_enable(m66592, ep->pipenum);
553 else
554 irq_packet_write(ep, req);
555 }
556
557 static void start_packet_read(struct m66592_ep *ep, struct m66592_request *req)
558 {
559 struct m66592 *m66592 = ep->m66592;
560 u16 pipenum = ep->pipenum;
561
562 if (ep->pipenum == 0) {
563 m66592_mdfy(m66592, M66592_PIPE0,
564 (M66592_ISEL | M66592_CURPIPE),
565 M66592_CFIFOSEL);
566 m66592_write(m66592, M66592_BCLR, ep->fifoctr);
567 pipe_start(m66592, pipenum);
568 pipe_irq_enable(m66592, pipenum);
569 } else {
570 if (ep->use_dma) {
571 m66592_bset(m66592, M66592_TRCLR, ep->fifosel);
572 pipe_change(m66592, pipenum);
573 m66592_bset(m66592, M66592_TRENB, ep->fifosel);
574 m66592_write(m66592,
575 (req->req.length + ep->ep.maxpacket - 1) /
576 ep->ep.maxpacket, ep->fifotrn);
577 }
578 pipe_start(m66592, pipenum); /* trigger once */
579 pipe_irq_enable(m66592, pipenum);
580 }
581 }
582
583 static void start_packet(struct m66592_ep *ep, struct m66592_request *req)
584 {
585 if (ep->desc->bEndpointAddress & USB_DIR_IN)
586 start_packet_write(ep, req);
587 else
588 start_packet_read(ep, req);
589 }
590
591 static void start_ep0(struct m66592_ep *ep, struct m66592_request *req)
592 {
593 u16 ctsq;
594
595 ctsq = m66592_read(ep->m66592, M66592_INTSTS0) & M66592_CTSQ;
596
597 switch (ctsq) {
598 case M66592_CS_RDDS:
599 start_ep0_write(ep, req);
600 break;
601 case M66592_CS_WRDS:
602 start_packet_read(ep, req);
603 break;
604
605 case M66592_CS_WRND:
606 control_end(ep->m66592, 0);
607 break;
608 default:
609 printk(KERN_ERR "start_ep0: unexpect ctsq(%x)\n", ctsq);
610 break;
611 }
612 }
613
614 static void init_controller(struct m66592 *m66592)
615 {
616 m66592_bset(m66592, (vif & M66592_LDRV) | (endian & M66592_BIGEND),
617 M66592_PINCFG);
618 m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */
619 m66592_mdfy(m66592, clock & M66592_XTAL, M66592_XTAL, M66592_SYSCFG);
620
621 m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG);
622 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
623 m66592_bset(m66592, M66592_USBE, M66592_SYSCFG);
624
625 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG);
626
627 msleep(3);
628
629 m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG);
630
631 msleep(1);
632
633 m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG);
634
635 m66592_bset(m66592, irq_sense & M66592_INTL, M66592_INTENB1);
636 m66592_write(m66592, M66592_BURST | M66592_CPU_ADR_RD_WR,
637 M66592_DMA0CFG);
638 }
639
640 static void disable_controller(struct m66592 *m66592)
641 {
642 m66592_bclr(m66592, M66592_SCKE, M66592_SYSCFG);
643 udelay(1);
644 m66592_bclr(m66592, M66592_PLLC, M66592_SYSCFG);
645 udelay(1);
646 m66592_bclr(m66592, M66592_RCKE, M66592_SYSCFG);
647 udelay(1);
648 m66592_bclr(m66592, M66592_XCKE, M66592_SYSCFG);
649 }
650
651 static void m66592_start_xclock(struct m66592 *m66592)
652 {
653 u16 tmp;
654
655 tmp = m66592_read(m66592, M66592_SYSCFG);
656 if (!(tmp & M66592_XCKE))
657 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG);
658 }
659
660 /*-------------------------------------------------------------------------*/
661 static void transfer_complete(struct m66592_ep *ep,
662 struct m66592_request *req,
663 int status)
664 {
665 int restart = 0;
666
667 if (unlikely(ep->pipenum == 0)) {
668 if (ep->internal_ccpl) {
669 ep->internal_ccpl = 0;
670 return;
671 }
672 }
673
674 list_del_init(&req->queue);
675 if (ep->m66592->gadget.speed == USB_SPEED_UNKNOWN)
676 req->req.status = -ESHUTDOWN;
677 else
678 req->req.status = status;
679
680 if (!list_empty(&ep->queue))
681 restart = 1;
682
683 if (likely(req->req.complete))
684 req->req.complete(&ep->ep, &req->req);
685
686 if (restart) {
687 req = list_entry(ep->queue.next, struct m66592_request, queue);
688 if (ep->desc)
689 start_packet(ep, req);
690 }
691 }
692
693 static void irq_ep0_write(struct m66592_ep *ep, struct m66592_request *req)
694 {
695 int i;
696 volatile u16 tmp;
697 unsigned bufsize;
698 size_t size;
699 void *buf;
700 u16 pipenum = ep->pipenum;
701 struct m66592 *m66592 = ep->m66592;
702
703 pipe_change(m66592, pipenum);
704 m66592_bset(m66592, M66592_ISEL, ep->fifosel);
705
706 i = 0;
707 do {
708 tmp = m66592_read(m66592, ep->fifoctr);
709 if (i++ > 100000) {
710 printk(KERN_ERR "pipe0 is busy. maybe cpu i/o bus"
711 "conflict. please power off this controller.");
712 return;
713 }
714 ndelay(1);
715 } while ((tmp & M66592_FRDY) == 0);
716
717 /* prepare parameters */
718 bufsize = get_buffer_size(m66592, pipenum);
719 buf = req->req.buf + req->req.actual;
720 size = min(bufsize, req->req.length - req->req.actual);
721
722 /* write fifo */
723 if (req->req.buf) {
724 if (size > 0)
725 m66592_write_fifo(m66592, ep->fifoaddr, buf, size);
726 if ((size == 0) || ((size % ep->ep.maxpacket) != 0))
727 m66592_bset(m66592, M66592_BVAL, ep->fifoctr);
728 }
729
730 /* update parameters */
731 req->req.actual += size;
732
733 /* check transfer finish */
734 if ((!req->req.zero && (req->req.actual == req->req.length)) ||
735 (size % ep->ep.maxpacket) || (size == 0)) {
736 disable_irq_ready(m66592, pipenum);
737 disable_irq_empty(m66592, pipenum);
738 } else {
739 disable_irq_ready(m66592, pipenum);
740 enable_irq_empty(m66592, pipenum);
741 }
742 pipe_start(m66592, pipenum);
743 }
744
745 static void irq_packet_write(struct m66592_ep *ep, struct m66592_request *req)
746 {
747 u16 tmp;
748 unsigned bufsize;
749 size_t size;
750 void *buf;
751 u16 pipenum = ep->pipenum;
752 struct m66592 *m66592 = ep->m66592;
753
754 pipe_change(m66592, pipenum);
755 tmp = m66592_read(m66592, ep->fifoctr);
756 if (unlikely((tmp & M66592_FRDY) == 0)) {
757 pipe_stop(m66592, pipenum);
758 pipe_irq_disable(m66592, pipenum);
759 printk(KERN_ERR "write fifo not ready. pipnum=%d\n", pipenum);
760 return;
761 }
762
763 /* prepare parameters */
764 bufsize = get_buffer_size(m66592, pipenum);
765 buf = req->req.buf + req->req.actual;
766 size = min(bufsize, req->req.length - req->req.actual);
767
768 /* write fifo */
769 if (req->req.buf) {
770 m66592_write_fifo(m66592, ep->fifoaddr, buf, size);
771 if ((size == 0) || ((size % ep->ep.maxpacket) != 0) ||
772 ((bufsize != ep->ep.maxpacket) && (bufsize > size)))
773 m66592_bset(m66592, M66592_BVAL, ep->fifoctr);
774 }
775
776 /* update parameters */
777 req->req.actual += size;
778 /* check transfer finish */
779 if ((!req->req.zero && (req->req.actual == req->req.length)) ||
780 (size % ep->ep.maxpacket) || (size == 0)) {
781 disable_irq_ready(m66592, pipenum);
782 enable_irq_empty(m66592, pipenum);
783 } else {
784 disable_irq_empty(m66592, pipenum);
785 pipe_irq_enable(m66592, pipenum);
786 }
787 }
788
789 static void irq_packet_read(struct m66592_ep *ep, struct m66592_request *req)
790 {
791 u16 tmp;
792 int rcv_len, bufsize, req_len;
793 int size;
794 void *buf;
795 u16 pipenum = ep->pipenum;
796 struct m66592 *m66592 = ep->m66592;
797 int finish = 0;
798
799 pipe_change(m66592, pipenum);
800 tmp = m66592_read(m66592, ep->fifoctr);
801 if (unlikely((tmp & M66592_FRDY) == 0)) {
802 req->req.status = -EPIPE;
803 pipe_stop(m66592, pipenum);
804 pipe_irq_disable(m66592, pipenum);
805 printk(KERN_ERR "read fifo not ready");
806 return;
807 }
808
809 /* prepare parameters */
810 rcv_len = tmp & M66592_DTLN;
811 bufsize = get_buffer_size(m66592, pipenum);
812
813 buf = req->req.buf + req->req.actual;
814 req_len = req->req.length - req->req.actual;
815 if (rcv_len < bufsize)
816 size = min(rcv_len, req_len);
817 else
818 size = min(bufsize, req_len);
819
820 /* update parameters */
821 req->req.actual += size;
822
823 /* check transfer finish */
824 if ((!req->req.zero && (req->req.actual == req->req.length)) ||
825 (size % ep->ep.maxpacket) || (size == 0)) {
826 pipe_stop(m66592, pipenum);
827 pipe_irq_disable(m66592, pipenum);
828 finish = 1;
829 }
830
831 /* read fifo */
832 if (req->req.buf) {
833 if (size == 0)
834 m66592_write(m66592, M66592_BCLR, ep->fifoctr);
835 else
836 m66592_read_fifo(m66592, ep->fifoaddr, buf, size);
837 }
838
839 if ((ep->pipenum != 0) && finish)
840 transfer_complete(ep, req, 0);
841 }
842
843 static void irq_pipe_ready(struct m66592 *m66592, u16 status, u16 enb)
844 {
845 u16 check;
846 u16 pipenum;
847 struct m66592_ep *ep;
848 struct m66592_request *req;
849
850 if ((status & M66592_BRDY0) && (enb & M66592_BRDY0)) {
851 m66592_write(m66592, ~M66592_BRDY0, M66592_BRDYSTS);
852 m66592_mdfy(m66592, M66592_PIPE0, M66592_CURPIPE,
853 M66592_CFIFOSEL);
854
855 ep = &m66592->ep[0];
856 req = list_entry(ep->queue.next, struct m66592_request, queue);
857 irq_packet_read(ep, req);
858 } else {
859 for (pipenum = 1; pipenum < M66592_MAX_NUM_PIPE; pipenum++) {
860 check = 1 << pipenum;
861 if ((status & check) && (enb & check)) {
862 m66592_write(m66592, ~check, M66592_BRDYSTS);
863 ep = m66592->pipenum2ep[pipenum];
864 req = list_entry(ep->queue.next,
865 struct m66592_request, queue);
866 if (ep->desc->bEndpointAddress & USB_DIR_IN)
867 irq_packet_write(ep, req);
868 else
869 irq_packet_read(ep, req);
870 }
871 }
872 }
873 }
874
875 static void irq_pipe_empty(struct m66592 *m66592, u16 status, u16 enb)
876 {
877 u16 tmp;
878 u16 check;
879 u16 pipenum;
880 struct m66592_ep *ep;
881 struct m66592_request *req;
882
883 if ((status & M66592_BEMP0) && (enb & M66592_BEMP0)) {
884 m66592_write(m66592, ~M66592_BEMP0, M66592_BEMPSTS);
885
886 ep = &m66592->ep[0];
887 req = list_entry(ep->queue.next, struct m66592_request, queue);
888 irq_ep0_write(ep, req);
889 } else {
890 for (pipenum = 1; pipenum < M66592_MAX_NUM_PIPE; pipenum++) {
891 check = 1 << pipenum;
892 if ((status & check) && (enb & check)) {
893 m66592_write(m66592, ~check, M66592_BEMPSTS);
894 tmp = control_reg_get(m66592, pipenum);
895 if ((tmp & M66592_INBUFM) == 0) {
896 disable_irq_empty(m66592, pipenum);
897 pipe_irq_disable(m66592, pipenum);
898 pipe_stop(m66592, pipenum);
899 ep = m66592->pipenum2ep[pipenum];
900 req = list_entry(ep->queue.next,
901 struct m66592_request,
902 queue);
903 if (!list_empty(&ep->queue))
904 transfer_complete(ep, req, 0);
905 }
906 }
907 }
908 }
909 }
910
911 static void get_status(struct m66592 *m66592, struct usb_ctrlrequest *ctrl)
912 {
913 struct m66592_ep *ep;
914 u16 pid;
915 u16 status = 0;
916
917 switch (ctrl->bRequestType & USB_RECIP_MASK) {
918 case USB_RECIP_DEVICE:
919 status = 1; /* selfpower */
920 break;
921 case USB_RECIP_INTERFACE:
922 status = 0;
923 break;
924 case USB_RECIP_ENDPOINT:
925 ep = m66592->epaddr2ep[ctrl->wIndex&USB_ENDPOINT_NUMBER_MASK];
926 pid = control_reg_get_pid(m66592, ep->pipenum);
927 if (pid == M66592_PID_STALL)
928 status = 1;
929 else
930 status = 0;
931 break;
932 default:
933 pipe_stall(m66592, 0);
934 return; /* exit */
935 }
936
937 *m66592->ep0_buf = status;
938 m66592->ep0_req->buf = m66592->ep0_buf;
939 m66592->ep0_req->length = 2;
940 /* AV: what happens if we get called again before that gets through? */
941 m66592_queue(m66592->gadget.ep0, m66592->ep0_req, GFP_KERNEL);
942 }
943
944 static void clear_feature(struct m66592 *m66592, struct usb_ctrlrequest *ctrl)
945 {
946 switch (ctrl->bRequestType & USB_RECIP_MASK) {
947 case USB_RECIP_DEVICE:
948 control_end(m66592, 1);
949 break;
950 case USB_RECIP_INTERFACE:
951 control_end(m66592, 1);
952 break;
953 case USB_RECIP_ENDPOINT: {
954 struct m66592_ep *ep;
955 struct m66592_request *req;
956
957 ep = m66592->epaddr2ep[ctrl->wIndex&USB_ENDPOINT_NUMBER_MASK];
958 pipe_stop(m66592, ep->pipenum);
959 control_reg_sqclr(m66592, ep->pipenum);
960
961 control_end(m66592, 1);
962
963 req = list_entry(ep->queue.next,
964 struct m66592_request, queue);
965 if (ep->busy) {
966 ep->busy = 0;
967 if (list_empty(&ep->queue))
968 break;
969 start_packet(ep, req);
970 } else if (!list_empty(&ep->queue))
971 pipe_start(m66592, ep->pipenum);
972 }
973 break;
974 default:
975 pipe_stall(m66592, 0);
976 break;
977 }
978 }
979
980 static void set_feature(struct m66592 *m66592, struct usb_ctrlrequest *ctrl)
981 {
982
983 switch (ctrl->bRequestType & USB_RECIP_MASK) {
984 case USB_RECIP_DEVICE:
985 control_end(m66592, 1);
986 break;
987 case USB_RECIP_INTERFACE:
988 control_end(m66592, 1);
989 break;
990 case USB_RECIP_ENDPOINT: {
991 struct m66592_ep *ep;
992
993 ep = m66592->epaddr2ep[ctrl->wIndex&USB_ENDPOINT_NUMBER_MASK];
994 pipe_stall(m66592, ep->pipenum);
995
996 control_end(m66592, 1);
997 }
998 break;
999 default:
1000 pipe_stall(m66592, 0);
1001 break;
1002 }
1003 }
1004
1005 /* if return value is true, call class driver's setup() */
1006 static int setup_packet(struct m66592 *m66592, struct usb_ctrlrequest *ctrl)
1007 {
1008 u16 *p = (u16 *)ctrl;
1009 unsigned long offset = M66592_USBREQ;
1010 int i, ret = 0;
1011
1012 /* read fifo */
1013 m66592_write(m66592, ~M66592_VALID, M66592_INTSTS0);
1014
1015 for (i = 0; i < 4; i++)
1016 p[i] = m66592_read(m66592, offset + i*2);
1017
1018 /* check request */
1019 if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
1020 switch (ctrl->bRequest) {
1021 case USB_REQ_GET_STATUS:
1022 get_status(m66592, ctrl);
1023 break;
1024 case USB_REQ_CLEAR_FEATURE:
1025 clear_feature(m66592, ctrl);
1026 break;
1027 case USB_REQ_SET_FEATURE:
1028 set_feature(m66592, ctrl);
1029 break;
1030 default:
1031 ret = 1;
1032 break;
1033 }
1034 } else
1035 ret = 1;
1036 return ret;
1037 }
1038
1039 static void m66592_update_usb_speed(struct m66592 *m66592)
1040 {
1041 u16 speed = get_usb_speed(m66592);
1042
1043 switch (speed) {
1044 case M66592_HSMODE:
1045 m66592->gadget.speed = USB_SPEED_HIGH;
1046 break;
1047 case M66592_FSMODE:
1048 m66592->gadget.speed = USB_SPEED_FULL;
1049 break;
1050 default:
1051 m66592->gadget.speed = USB_SPEED_UNKNOWN;
1052 printk(KERN_ERR "USB speed unknown\n");
1053 }
1054 }
1055
1056 static void irq_device_state(struct m66592 *m66592)
1057 {
1058 u16 dvsq;
1059
1060 dvsq = m66592_read(m66592, M66592_INTSTS0) & M66592_DVSQ;
1061 m66592_write(m66592, ~M66592_DVST, M66592_INTSTS0);
1062
1063 if (dvsq == M66592_DS_DFLT) { /* bus reset */
1064 m66592->driver->disconnect(&m66592->gadget);
1065 m66592_update_usb_speed(m66592);
1066 }
1067 if (m66592->old_dvsq == M66592_DS_CNFG && dvsq != M66592_DS_CNFG)
1068 m66592_update_usb_speed(m66592);
1069 if ((dvsq == M66592_DS_CNFG || dvsq == M66592_DS_ADDS) &&
1070 m66592->gadget.speed == USB_SPEED_UNKNOWN)
1071 m66592_update_usb_speed(m66592);
1072
1073 m66592->old_dvsq = dvsq;
1074 }
1075
1076 static void irq_control_stage(struct m66592 *m66592)
1077 {
1078 struct usb_ctrlrequest ctrl;
1079 u16 ctsq;
1080
1081 ctsq = m66592_read(m66592, M66592_INTSTS0) & M66592_CTSQ;
1082 m66592_write(m66592, ~M66592_CTRT, M66592_INTSTS0);
1083
1084 switch (ctsq) {
1085 case M66592_CS_IDST: {
1086 struct m66592_ep *ep;
1087 struct m66592_request *req;
1088 ep = &m66592->ep[0];
1089 req = list_entry(ep->queue.next, struct m66592_request, queue);
1090 transfer_complete(ep, req, 0);
1091 }
1092 break;
1093
1094 case M66592_CS_RDDS:
1095 case M66592_CS_WRDS:
1096 case M66592_CS_WRND:
1097 if (setup_packet(m66592, &ctrl)) {
1098 if (m66592->driver->setup(&m66592->gadget, &ctrl) < 0)
1099 pipe_stall(m66592, 0);
1100 }
1101 break;
1102 case M66592_CS_RDSS:
1103 case M66592_CS_WRSS:
1104 control_end(m66592, 0);
1105 break;
1106 default:
1107 printk(KERN_ERR "ctrl_stage: unexpect ctsq(%x)\n", ctsq);
1108 break;
1109 }
1110 }
1111
1112 static irqreturn_t m66592_irq(int irq, void *_m66592)
1113 {
1114 struct m66592 *m66592 = _m66592;
1115 u16 intsts0;
1116 u16 intenb0;
1117 u16 brdysts, nrdysts, bempsts;
1118 u16 brdyenb, nrdyenb, bempenb;
1119 u16 savepipe;
1120 u16 mask0;
1121
1122 intsts0 = m66592_read(m66592, M66592_INTSTS0);
1123 intenb0 = m66592_read(m66592, M66592_INTENB0);
1124
1125 savepipe = m66592_read(m66592, M66592_CFIFOSEL);
1126
1127 mask0 = intsts0 & intenb0;
1128 if (mask0) {
1129 brdysts = m66592_read(m66592, M66592_BRDYSTS);
1130 nrdysts = m66592_read(m66592, M66592_NRDYSTS);
1131 bempsts = m66592_read(m66592, M66592_BEMPSTS);
1132 brdyenb = m66592_read(m66592, M66592_BRDYENB);
1133 nrdyenb = m66592_read(m66592, M66592_NRDYENB);
1134 bempenb = m66592_read(m66592, M66592_BEMPENB);
1135
1136 if (mask0 & M66592_VBINT) {
1137 m66592_write(m66592, (u16)~M66592_VBINT,
1138 M66592_INTSTS0);
1139 m66592_start_xclock(m66592);
1140
1141 /* start vbus sampling */
1142 m66592->old_vbus = m66592_read(m66592, M66592_INTSTS0)
1143 & M66592_VBSTS;
1144 m66592->scount = M66592_MAX_SAMPLING;
1145
1146 mod_timer(&m66592->timer,
1147 jiffies + msecs_to_jiffies(50));
1148 }
1149 if (intsts0 & M66592_DVSQ)
1150 irq_device_state(m66592);
1151
1152 if ((intsts0 & M66592_BRDY) && (intenb0 & M66592_BRDYE) &&
1153 (brdysts & brdyenb)) {
1154 irq_pipe_ready(m66592, brdysts, brdyenb);
1155 }
1156 if ((intsts0 & M66592_BEMP) && (intenb0 & M66592_BEMPE) &&
1157 (bempsts & bempenb)) {
1158 irq_pipe_empty(m66592, bempsts, bempenb);
1159 }
1160
1161 if (intsts0 & M66592_CTRT)
1162 irq_control_stage(m66592);
1163 }
1164
1165 m66592_write(m66592, savepipe, M66592_CFIFOSEL);
1166
1167 return IRQ_HANDLED;
1168 }
1169
1170 static void m66592_timer(unsigned long _m66592)
1171 {
1172 struct m66592 *m66592 = (struct m66592 *)_m66592;
1173 unsigned long flags;
1174 u16 tmp;
1175
1176 spin_lock_irqsave(&m66592->lock, flags);
1177 tmp = m66592_read(m66592, M66592_SYSCFG);
1178 if (!(tmp & M66592_RCKE)) {
1179 m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG);
1180 udelay(10);
1181 m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG);
1182 }
1183 if (m66592->scount > 0) {
1184 tmp = m66592_read(m66592, M66592_INTSTS0) & M66592_VBSTS;
1185 if (tmp == m66592->old_vbus) {
1186 m66592->scount--;
1187 if (m66592->scount == 0) {
1188 if (tmp == M66592_VBSTS)
1189 m66592_usb_connect(m66592);
1190 else
1191 m66592_usb_disconnect(m66592);
1192 } else {
1193 mod_timer(&m66592->timer,
1194 jiffies + msecs_to_jiffies(50));
1195 }
1196 } else {
1197 m66592->scount = M66592_MAX_SAMPLING;
1198 m66592->old_vbus = tmp;
1199 mod_timer(&m66592->timer,
1200 jiffies + msecs_to_jiffies(50));
1201 }
1202 }
1203 spin_unlock_irqrestore(&m66592->lock, flags);
1204 }
1205
1206 /*-------------------------------------------------------------------------*/
1207 static int m66592_enable(struct usb_ep *_ep,
1208 const struct usb_endpoint_descriptor *desc)
1209 {
1210 struct m66592_ep *ep;
1211
1212 ep = container_of(_ep, struct m66592_ep, ep);
1213 return alloc_pipe_config(ep, desc);
1214 }
1215
1216 static int m66592_disable(struct usb_ep *_ep)
1217 {
1218 struct m66592_ep *ep;
1219 struct m66592_request *req;
1220 unsigned long flags;
1221
1222 ep = container_of(_ep, struct m66592_ep, ep);
1223 BUG_ON(!ep);
1224
1225 while (!list_empty(&ep->queue)) {
1226 req = list_entry(ep->queue.next, struct m66592_request, queue);
1227 spin_lock_irqsave(&ep->m66592->lock, flags);
1228 transfer_complete(ep, req, -ECONNRESET);
1229 spin_unlock_irqrestore(&ep->m66592->lock, flags);
1230 }
1231
1232 pipe_irq_disable(ep->m66592, ep->pipenum);
1233 return free_pipe_config(ep);
1234 }
1235
1236 static struct usb_request *m66592_alloc_request(struct usb_ep *_ep,
1237 gfp_t gfp_flags)
1238 {
1239 struct m66592_request *req;
1240
1241 req = kzalloc(sizeof(struct m66592_request), gfp_flags);
1242 if (!req)
1243 return NULL;
1244
1245 INIT_LIST_HEAD(&req->queue);
1246
1247 return &req->req;
1248 }
1249
1250 static void m66592_free_request(struct usb_ep *_ep, struct usb_request *_req)
1251 {
1252 struct m66592_request *req;
1253
1254 req = container_of(_req, struct m66592_request, req);
1255 kfree(req);
1256 }
1257
1258 static int m66592_queue(struct usb_ep *_ep, struct usb_request *_req,
1259 gfp_t gfp_flags)
1260 {
1261 struct m66592_ep *ep;
1262 struct m66592_request *req;
1263 unsigned long flags;
1264 int request = 0;
1265
1266 ep = container_of(_ep, struct m66592_ep, ep);
1267 req = container_of(_req, struct m66592_request, req);
1268
1269 if (ep->m66592->gadget.speed == USB_SPEED_UNKNOWN)
1270 return -ESHUTDOWN;
1271
1272 spin_lock_irqsave(&ep->m66592->lock, flags);
1273
1274 if (list_empty(&ep->queue))
1275 request = 1;
1276
1277 list_add_tail(&req->queue, &ep->queue);
1278 req->req.actual = 0;
1279 req->req.status = -EINPROGRESS;
1280
1281 if (ep->desc == 0) /* control */
1282 start_ep0(ep, req);
1283 else {
1284 if (request && !ep->busy)
1285 start_packet(ep, req);
1286 }
1287
1288 spin_unlock_irqrestore(&ep->m66592->lock, flags);
1289
1290 return 0;
1291 }
1292
1293 static int m66592_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1294 {
1295 struct m66592_ep *ep;
1296 struct m66592_request *req;
1297 unsigned long flags;
1298
1299 ep = container_of(_ep, struct m66592_ep, ep);
1300 req = container_of(_req, struct m66592_request, req);
1301
1302 spin_lock_irqsave(&ep->m66592->lock, flags);
1303 if (!list_empty(&ep->queue))
1304 transfer_complete(ep, req, -ECONNRESET);
1305 spin_unlock_irqrestore(&ep->m66592->lock, flags);
1306
1307 return 0;
1308 }
1309
1310 static int m66592_set_halt(struct usb_ep *_ep, int value)
1311 {
1312 struct m66592_ep *ep;
1313 struct m66592_request *req;
1314 unsigned long flags;
1315 int ret = 0;
1316
1317 ep = container_of(_ep, struct m66592_ep, ep);
1318 req = list_entry(ep->queue.next, struct m66592_request, queue);
1319
1320 spin_lock_irqsave(&ep->m66592->lock, flags);
1321 if (!list_empty(&ep->queue)) {
1322 ret = -EAGAIN;
1323 goto out;
1324 }
1325 if (value) {
1326 ep->busy = 1;
1327 pipe_stall(ep->m66592, ep->pipenum);
1328 } else {
1329 ep->busy = 0;
1330 pipe_stop(ep->m66592, ep->pipenum);
1331 }
1332
1333 out:
1334 spin_unlock_irqrestore(&ep->m66592->lock, flags);
1335 return ret;
1336 }
1337
1338 static int m66592_fifo_status(struct usb_ep *_ep)
1339 {
1340 return -EOPNOTSUPP;
1341 }
1342
1343 static void m66592_fifo_flush(struct usb_ep *_ep)
1344 {
1345 struct m66592_ep *ep;
1346 unsigned long flags;
1347
1348 ep = container_of(_ep, struct m66592_ep, ep);
1349 spin_lock_irqsave(&ep->m66592->lock, flags);
1350 if (list_empty(&ep->queue) && !ep->busy) {
1351 pipe_stop(ep->m66592, ep->pipenum);
1352 m66592_bclr(ep->m66592, M66592_BCLR, ep->fifoctr);
1353 }
1354 spin_unlock_irqrestore(&ep->m66592->lock, flags);
1355 }
1356
1357 static struct usb_ep_ops m66592_ep_ops = {
1358 .enable = m66592_enable,
1359 .disable = m66592_disable,
1360
1361 .alloc_request = m66592_alloc_request,
1362 .free_request = m66592_free_request,
1363
1364 .queue = m66592_queue,
1365 .dequeue = m66592_dequeue,
1366
1367 .set_halt = m66592_set_halt,
1368 .fifo_status = m66592_fifo_status,
1369 .fifo_flush = m66592_fifo_flush,
1370 };
1371
1372 /*-------------------------------------------------------------------------*/
1373 static struct m66592 *the_controller;
1374
1375 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1376 {
1377 struct m66592 *m66592 = the_controller;
1378 int retval;
1379
1380 if (!driver ||
1381 driver->speed != USB_SPEED_HIGH ||
1382 !driver->bind ||
1383 !driver->unbind ||
1384 !driver->setup)
1385 return -EINVAL;
1386 if (!m66592)
1387 return -ENODEV;
1388 if (m66592->driver)
1389 return -EBUSY;
1390
1391 /* hook up the driver */
1392 driver->driver.bus = NULL;
1393 m66592->driver = driver;
1394 m66592->gadget.dev.driver = &driver->driver;
1395
1396 retval = device_add(&m66592->gadget.dev);
1397 if (retval) {
1398 printk(KERN_ERR "device_add error (%d)\n", retval);
1399 goto error;
1400 }
1401
1402 retval = driver->bind (&m66592->gadget);
1403 if (retval) {
1404 printk(KERN_ERR "bind to driver error (%d)\n", retval);
1405 device_del(&m66592->gadget.dev);
1406 goto error;
1407 }
1408
1409 m66592_bset(m66592, M66592_VBSE | M66592_URST, M66592_INTENB0);
1410 if (m66592_read(m66592, M66592_INTSTS0) & M66592_VBSTS) {
1411 m66592_start_xclock(m66592);
1412 /* start vbus sampling */
1413 m66592->old_vbus = m66592_read(m66592,
1414 M66592_INTSTS0) & M66592_VBSTS;
1415 m66592->scount = M66592_MAX_SAMPLING;
1416 mod_timer(&m66592->timer,
1417 jiffies + msecs_to_jiffies(50));
1418 }
1419
1420 return 0;
1421
1422 error:
1423 m66592->driver = NULL;
1424 m66592->gadget.dev.driver = NULL;
1425
1426 return retval;
1427 }
1428 EXPORT_SYMBOL(usb_gadget_register_driver);
1429
1430 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1431 {
1432 struct m66592 *m66592 = the_controller;
1433 unsigned long flags;
1434
1435 spin_lock_irqsave(&m66592->lock, flags);
1436 if (m66592->gadget.speed != USB_SPEED_UNKNOWN)
1437 m66592_usb_disconnect(m66592);
1438 spin_unlock_irqrestore(&m66592->lock, flags);
1439
1440 m66592_bclr(m66592, M66592_VBSE | M66592_URST, M66592_INTENB0);
1441
1442 driver->unbind(&m66592->gadget);
1443
1444 init_controller(m66592);
1445 disable_controller(m66592);
1446
1447 device_del(&m66592->gadget.dev);
1448 m66592->driver = NULL;
1449 return 0;
1450 }
1451 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1452
1453 /*-------------------------------------------------------------------------*/
1454 static int m66592_get_frame(struct usb_gadget *_gadget)
1455 {
1456 struct m66592 *m66592 = gadget_to_m66592(_gadget);
1457 return m66592_read(m66592, M66592_FRMNUM) & 0x03FF;
1458 }
1459
1460 static struct usb_gadget_ops m66592_gadget_ops = {
1461 .get_frame = m66592_get_frame,
1462 };
1463
1464 #if defined(CONFIG_PM)
1465 static int m66592_suspend(struct platform_device *pdev, pm_message_t state)
1466 {
1467 pdev->dev.power.power_state = state;
1468 return 0;
1469 }
1470
1471 static int m66592_resume(struct platform_device *pdev)
1472 {
1473 pdev->dev.power.power_state = PMSG_ON;
1474 return 0;
1475 }
1476 #else /* if defined(CONFIG_PM) */
1477 #define m66592_suspend NULL
1478 #define m66592_resume NULL
1479 #endif
1480
1481 static int __init_or_module m66592_remove(struct platform_device *pdev)
1482 {
1483 struct m66592 *m66592 = dev_get_drvdata(&pdev->dev);
1484
1485 del_timer_sync(&m66592->timer);
1486 iounmap(m66592->reg);
1487 free_irq(platform_get_irq(pdev, 0), m66592);
1488 kfree(m66592);
1489 return 0;
1490 }
1491
1492 #define resource_len(r) (((r)->end - (r)->start) + 1)
1493 static int __init m66592_probe(struct platform_device *pdev)
1494 {
1495 struct resource *res = NULL;
1496 int irq = -1;
1497 void __iomem *reg = NULL;
1498 struct m66592 *m66592 = NULL;
1499 int ret = 0;
1500 int i;
1501
1502 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
1503 (char *)udc_name);
1504 if (!res) {
1505 ret = -ENODEV;
1506 printk(KERN_ERR "platform_get_resource_byname error.\n");
1507 goto clean_up;
1508 }
1509
1510 irq = platform_get_irq(pdev, 0);
1511 if (irq < 0) {
1512 ret = -ENODEV;
1513 printk(KERN_ERR "platform_get_irq error.\n");
1514 goto clean_up;
1515 }
1516
1517 reg = ioremap(res->start, resource_len(res));
1518 if (reg == NULL) {
1519 ret = -ENOMEM;
1520 printk(KERN_ERR "ioremap error.\n");
1521 goto clean_up;
1522 }
1523
1524 /* initialize ucd */
1525 m66592 = kzalloc(sizeof(struct m66592), GFP_KERNEL);
1526 if (m66592 == NULL) {
1527 printk(KERN_ERR "kzalloc error\n");
1528 goto clean_up;
1529 }
1530
1531 spin_lock_init(&m66592->lock);
1532 dev_set_drvdata(&pdev->dev, m66592);
1533
1534 m66592->gadget.ops = &m66592_gadget_ops;
1535 device_initialize(&m66592->gadget.dev);
1536 strcpy(m66592->gadget.dev.bus_id, "gadget");
1537 m66592->gadget.is_dualspeed = 1;
1538 m66592->gadget.dev.parent = &pdev->dev;
1539 m66592->gadget.dev.dma_mask = pdev->dev.dma_mask;
1540 m66592->gadget.dev.release = pdev->dev.release;
1541 m66592->gadget.name = udc_name;
1542
1543 init_timer(&m66592->timer);
1544 m66592->timer.function = m66592_timer;
1545 m66592->timer.data = (unsigned long)m66592;
1546 m66592->reg = reg;
1547
1548 m66592->bi_bufnum = M66592_BASE_BUFNUM;
1549
1550 ret = request_irq(irq, m66592_irq, IRQF_DISABLED | IRQF_SHARED,
1551 udc_name, m66592);
1552 if (ret < 0) {
1553 printk(KERN_ERR "request_irq error (%d)\n", ret);
1554 goto clean_up;
1555 }
1556
1557 INIT_LIST_HEAD(&m66592->gadget.ep_list);
1558 m66592->gadget.ep0 = &m66592->ep[0].ep;
1559 INIT_LIST_HEAD(&m66592->gadget.ep0->ep_list);
1560 for (i = 0; i < M66592_MAX_NUM_PIPE; i++) {
1561 struct m66592_ep *ep = &m66592->ep[i];
1562
1563 if (i != 0) {
1564 INIT_LIST_HEAD(&m66592->ep[i].ep.ep_list);
1565 list_add_tail(&m66592->ep[i].ep.ep_list,
1566 &m66592->gadget.ep_list);
1567 }
1568 ep->m66592 = m66592;
1569 INIT_LIST_HEAD(&ep->queue);
1570 ep->ep.name = m66592_ep_name[i];
1571 ep->ep.ops = &m66592_ep_ops;
1572 ep->ep.maxpacket = 512;
1573 }
1574 m66592->ep[0].ep.maxpacket = 64;
1575 m66592->ep[0].pipenum = 0;
1576 m66592->ep[0].fifoaddr = M66592_CFIFO;
1577 m66592->ep[0].fifosel = M66592_CFIFOSEL;
1578 m66592->ep[0].fifoctr = M66592_CFIFOCTR;
1579 m66592->ep[0].fifotrn = 0;
1580 m66592->ep[0].pipectr = get_pipectr_addr(0);
1581 m66592->pipenum2ep[0] = &m66592->ep[0];
1582 m66592->epaddr2ep[0] = &m66592->ep[0];
1583
1584 the_controller = m66592;
1585
1586 /* AV: leaks */
1587 m66592->ep0_req = m66592_alloc_request(&m66592->ep[0].ep, GFP_KERNEL);
1588 if (m66592->ep0_req == NULL)
1589 goto clean_up;
1590 /* AV: leaks, and do we really need it separately allocated? */
1591 m66592->ep0_buf = kzalloc(2, GFP_KERNEL);
1592 if (m66592->ep0_buf == NULL)
1593 goto clean_up;
1594
1595 init_controller(m66592);
1596
1597 printk("driver %s, %s\n", udc_name, DRIVER_VERSION);
1598 return 0;
1599
1600 clean_up:
1601 if (m66592) {
1602 if (m66592->ep0_req)
1603 m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req);
1604 kfree(m66592);
1605 }
1606 if (reg)
1607 iounmap(reg);
1608
1609 return ret;
1610 }
1611
1612 /*-------------------------------------------------------------------------*/
1613 static struct platform_driver m66592_driver = {
1614 .probe = m66592_probe,
1615 .remove = m66592_remove,
1616 .suspend = m66592_suspend,
1617 .resume = m66592_resume,
1618 .driver = {
1619 .name = (char *) udc_name,
1620 },
1621 };
1622
1623 static int __init m66592_udc_init(void)
1624 {
1625 return platform_driver_register(&m66592_driver);
1626 }
1627 module_init(m66592_udc_init);
1628
1629 static void __exit m66592_udc_cleanup(void)
1630 {
1631 platform_driver_unregister(&m66592_driver);
1632 }
1633 module_exit(m66592_udc_cleanup);
1634
Linux kernel - Deliverables
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