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Merge tag 'sound-fix-3.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai...
[deliverable/linux.git] / drivers / usb / gadget / s3c2410_udc.c
1 /*
2 * linux/drivers/usb/gadget/s3c2410_udc.c
3 *
4 * Samsung S3C24xx series on-chip full speed USB device controllers
5 *
6 * Copyright (C) 2004-2007 Herbert Pötzl - Arnaud Patard
7 * Additional cleanups by Ben Dooks <ben-linux@fluff.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15 #define pr_fmt(fmt) "s3c2410_udc: " fmt
16
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/delay.h>
20 #include <linux/ioport.h>
21 #include <linux/sched.h>
22 #include <linux/slab.h>
23 #include <linux/errno.h>
24 #include <linux/init.h>
25 #include <linux/timer.h>
26 #include <linux/list.h>
27 #include <linux/interrupt.h>
28 #include <linux/platform_device.h>
29 #include <linux/clk.h>
30 #include <linux/gpio.h>
31 #include <linux/prefetch.h>
32 #include <linux/io.h>
33
34 #include <linux/debugfs.h>
35 #include <linux/seq_file.h>
36
37 #include <linux/usb.h>
38 #include <linux/usb/gadget.h>
39
40 #include <asm/byteorder.h>
41 #include <asm/irq.h>
42 #include <asm/unaligned.h>
43 #include <mach/irqs.h>
44
45 #include <mach/hardware.h>
46
47 #include <plat/regs-udc.h>
48 #include <linux/platform_data/usb-s3c2410_udc.h>
49
50
51 #include "s3c2410_udc.h"
52
53 #define DRIVER_DESC "S3C2410 USB Device Controller Gadget"
54 #define DRIVER_VERSION "29 Apr 2007"
55 #define DRIVER_AUTHOR "Herbert Pötzl <herbert@13thfloor.at>, " \
56 "Arnaud Patard <arnaud.patard@rtp-net.org>"
57
58 static const char gadget_name[] = "s3c2410_udc";
59 static const char driver_desc[] = DRIVER_DESC;
60
61 static struct s3c2410_udc *the_controller;
62 static struct clk *udc_clock;
63 static struct clk *usb_bus_clock;
64 static void __iomem *base_addr;
65 static u64 rsrc_start;
66 static u64 rsrc_len;
67 static struct dentry *s3c2410_udc_debugfs_root;
68
69 static inline u32 udc_read(u32 reg)
70 {
71 return readb(base_addr + reg);
72 }
73
74 static inline void udc_write(u32 value, u32 reg)
75 {
76 writeb(value, base_addr + reg);
77 }
78
79 static inline void udc_writeb(void __iomem *base, u32 value, u32 reg)
80 {
81 writeb(value, base + reg);
82 }
83
84 static struct s3c2410_udc_mach_info *udc_info;
85
86 /*************************** DEBUG FUNCTION ***************************/
87 #define DEBUG_NORMAL 1
88 #define DEBUG_VERBOSE 2
89
90 #ifdef CONFIG_USB_S3C2410_DEBUG
91 #define USB_S3C2410_DEBUG_LEVEL 0
92
93 static uint32_t s3c2410_ticks = 0;
94
95 static int dprintk(int level, const char *fmt, ...)
96 {
97 static char printk_buf[1024];
98 static long prevticks;
99 static int invocation;
100 va_list args;
101 int len;
102
103 if (level > USB_S3C2410_DEBUG_LEVEL)
104 return 0;
105
106 if (s3c2410_ticks != prevticks) {
107 prevticks = s3c2410_ticks;
108 invocation = 0;
109 }
110
111 len = scnprintf(printk_buf,
112 sizeof(printk_buf), "%1lu.%02d USB: ",
113 prevticks, invocation++);
114
115 va_start(args, fmt);
116 len = vscnprintf(printk_buf+len,
117 sizeof(printk_buf)-len, fmt, args);
118 va_end(args);
119
120 pr_debug("%s", printk_buf);
121 return len;
122 }
123 #else
124 static int dprintk(int level, const char *fmt, ...)
125 {
126 return 0;
127 }
128 #endif
129 static int s3c2410_udc_debugfs_seq_show(struct seq_file *m, void *p)
130 {
131 u32 addr_reg, pwr_reg, ep_int_reg, usb_int_reg;
132 u32 ep_int_en_reg, usb_int_en_reg, ep0_csr;
133 u32 ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2;
134 u32 ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2;
135
136 addr_reg = udc_read(S3C2410_UDC_FUNC_ADDR_REG);
137 pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
138 ep_int_reg = udc_read(S3C2410_UDC_EP_INT_REG);
139 usb_int_reg = udc_read(S3C2410_UDC_USB_INT_REG);
140 ep_int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
141 usb_int_en_reg = udc_read(S3C2410_UDC_USB_INT_EN_REG);
142 udc_write(0, S3C2410_UDC_INDEX_REG);
143 ep0_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
144 udc_write(1, S3C2410_UDC_INDEX_REG);
145 ep1_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
146 ep1_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
147 ep1_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
148 ep1_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
149 udc_write(2, S3C2410_UDC_INDEX_REG);
150 ep2_i_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
151 ep2_i_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
152 ep2_o_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
153 ep2_o_csr2 = udc_read(S3C2410_UDC_IN_CSR2_REG);
154
155 seq_printf(m, "FUNC_ADDR_REG : 0x%04X\n"
156 "PWR_REG : 0x%04X\n"
157 "EP_INT_REG : 0x%04X\n"
158 "USB_INT_REG : 0x%04X\n"
159 "EP_INT_EN_REG : 0x%04X\n"
160 "USB_INT_EN_REG : 0x%04X\n"
161 "EP0_CSR : 0x%04X\n"
162 "EP1_I_CSR1 : 0x%04X\n"
163 "EP1_I_CSR2 : 0x%04X\n"
164 "EP1_O_CSR1 : 0x%04X\n"
165 "EP1_O_CSR2 : 0x%04X\n"
166 "EP2_I_CSR1 : 0x%04X\n"
167 "EP2_I_CSR2 : 0x%04X\n"
168 "EP2_O_CSR1 : 0x%04X\n"
169 "EP2_O_CSR2 : 0x%04X\n",
170 addr_reg, pwr_reg, ep_int_reg, usb_int_reg,
171 ep_int_en_reg, usb_int_en_reg, ep0_csr,
172 ep1_i_csr1, ep1_i_csr2, ep1_o_csr1, ep1_o_csr2,
173 ep2_i_csr1, ep2_i_csr2, ep2_o_csr1, ep2_o_csr2
174 );
175
176 return 0;
177 }
178
179 static int s3c2410_udc_debugfs_fops_open(struct inode *inode,
180 struct file *file)
181 {
182 return single_open(file, s3c2410_udc_debugfs_seq_show, NULL);
183 }
184
185 static const struct file_operations s3c2410_udc_debugfs_fops = {
186 .open = s3c2410_udc_debugfs_fops_open,
187 .read = seq_read,
188 .llseek = seq_lseek,
189 .release = single_release,
190 .owner = THIS_MODULE,
191 };
192
193 /* io macros */
194
195 static inline void s3c2410_udc_clear_ep0_opr(void __iomem *base)
196 {
197 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
198 udc_writeb(base, S3C2410_UDC_EP0_CSR_SOPKTRDY,
199 S3C2410_UDC_EP0_CSR_REG);
200 }
201
202 static inline void s3c2410_udc_clear_ep0_sst(void __iomem *base)
203 {
204 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
205 writeb(0x00, base + S3C2410_UDC_EP0_CSR_REG);
206 }
207
208 static inline void s3c2410_udc_clear_ep0_se(void __iomem *base)
209 {
210 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
211 udc_writeb(base, S3C2410_UDC_EP0_CSR_SSE, S3C2410_UDC_EP0_CSR_REG);
212 }
213
214 static inline void s3c2410_udc_set_ep0_ipr(void __iomem *base)
215 {
216 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
217 udc_writeb(base, S3C2410_UDC_EP0_CSR_IPKRDY, S3C2410_UDC_EP0_CSR_REG);
218 }
219
220 static inline void s3c2410_udc_set_ep0_de(void __iomem *base)
221 {
222 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
223 udc_writeb(base, S3C2410_UDC_EP0_CSR_DE, S3C2410_UDC_EP0_CSR_REG);
224 }
225
226 inline void s3c2410_udc_set_ep0_ss(void __iomem *b)
227 {
228 udc_writeb(b, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
229 udc_writeb(b, S3C2410_UDC_EP0_CSR_SENDSTL, S3C2410_UDC_EP0_CSR_REG);
230 }
231
232 static inline void s3c2410_udc_set_ep0_de_out(void __iomem *base)
233 {
234 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
235
236 udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY
237 | S3C2410_UDC_EP0_CSR_DE),
238 S3C2410_UDC_EP0_CSR_REG);
239 }
240
241 static inline void s3c2410_udc_set_ep0_sse_out(void __iomem *base)
242 {
243 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
244 udc_writeb(base, (S3C2410_UDC_EP0_CSR_SOPKTRDY
245 | S3C2410_UDC_EP0_CSR_SSE),
246 S3C2410_UDC_EP0_CSR_REG);
247 }
248
249 static inline void s3c2410_udc_set_ep0_de_in(void __iomem *base)
250 {
251 udc_writeb(base, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
252 udc_writeb(base, (S3C2410_UDC_EP0_CSR_IPKRDY
253 | S3C2410_UDC_EP0_CSR_DE),
254 S3C2410_UDC_EP0_CSR_REG);
255 }
256
257 /*------------------------- I/O ----------------------------------*/
258
259 /*
260 * s3c2410_udc_done
261 */
262 static void s3c2410_udc_done(struct s3c2410_ep *ep,
263 struct s3c2410_request *req, int status)
264 {
265 unsigned halted = ep->halted;
266
267 list_del_init(&req->queue);
268
269 if (likely(req->req.status == -EINPROGRESS))
270 req->req.status = status;
271 else
272 status = req->req.status;
273
274 ep->halted = 1;
275 req->req.complete(&ep->ep, &req->req);
276 ep->halted = halted;
277 }
278
279 static void s3c2410_udc_nuke(struct s3c2410_udc *udc,
280 struct s3c2410_ep *ep, int status)
281 {
282 /* Sanity check */
283 if (&ep->queue == NULL)
284 return;
285
286 while (!list_empty(&ep->queue)) {
287 struct s3c2410_request *req;
288 req = list_entry(ep->queue.next, struct s3c2410_request,
289 queue);
290 s3c2410_udc_done(ep, req, status);
291 }
292 }
293
294 static inline void s3c2410_udc_clear_ep_state(struct s3c2410_udc *dev)
295 {
296 unsigned i;
297
298 /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
299 * fifos, and pending transactions mustn't be continued in any case.
300 */
301
302 for (i = 1; i < S3C2410_ENDPOINTS; i++)
303 s3c2410_udc_nuke(dev, &dev->ep[i], -ECONNABORTED);
304 }
305
306 static inline int s3c2410_udc_fifo_count_out(void)
307 {
308 int tmp;
309
310 tmp = udc_read(S3C2410_UDC_OUT_FIFO_CNT2_REG) << 8;
311 tmp |= udc_read(S3C2410_UDC_OUT_FIFO_CNT1_REG);
312 return tmp;
313 }
314
315 /*
316 * s3c2410_udc_write_packet
317 */
318 static inline int s3c2410_udc_write_packet(int fifo,
319 struct s3c2410_request *req,
320 unsigned max)
321 {
322 unsigned len = min(req->req.length - req->req.actual, max);
323 u8 *buf = req->req.buf + req->req.actual;
324
325 prefetch(buf);
326
327 dprintk(DEBUG_VERBOSE, "%s %d %d %d %d\n", __func__,
328 req->req.actual, req->req.length, len, req->req.actual + len);
329
330 req->req.actual += len;
331
332 udelay(5);
333 writesb(base_addr + fifo, buf, len);
334 return len;
335 }
336
337 /*
338 * s3c2410_udc_write_fifo
339 *
340 * return: 0 = still running, 1 = completed, negative = errno
341 */
342 static int s3c2410_udc_write_fifo(struct s3c2410_ep *ep,
343 struct s3c2410_request *req)
344 {
345 unsigned count;
346 int is_last;
347 u32 idx;
348 int fifo_reg;
349 u32 ep_csr;
350
351 idx = ep->bEndpointAddress & 0x7F;
352 switch (idx) {
353 default:
354 idx = 0;
355 case 0:
356 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
357 break;
358 case 1:
359 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
360 break;
361 case 2:
362 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
363 break;
364 case 3:
365 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
366 break;
367 case 4:
368 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
369 break;
370 }
371
372 count = s3c2410_udc_write_packet(fifo_reg, req, ep->ep.maxpacket);
373
374 /* last packet is often short (sometimes a zlp) */
375 if (count != ep->ep.maxpacket)
376 is_last = 1;
377 else if (req->req.length != req->req.actual || req->req.zero)
378 is_last = 0;
379 else
380 is_last = 2;
381
382 /* Only ep0 debug messages are interesting */
383 if (idx == 0)
384 dprintk(DEBUG_NORMAL,
385 "Written ep%d %d.%d of %d b [last %d,z %d]\n",
386 idx, count, req->req.actual, req->req.length,
387 is_last, req->req.zero);
388
389 if (is_last) {
390 /* The order is important. It prevents sending 2 packets
391 * at the same time */
392
393 if (idx == 0) {
394 /* Reset signal => no need to say 'data sent' */
395 if (!(udc_read(S3C2410_UDC_USB_INT_REG)
396 & S3C2410_UDC_USBINT_RESET))
397 s3c2410_udc_set_ep0_de_in(base_addr);
398 ep->dev->ep0state = EP0_IDLE;
399 } else {
400 udc_write(idx, S3C2410_UDC_INDEX_REG);
401 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
402 udc_write(idx, S3C2410_UDC_INDEX_REG);
403 udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
404 S3C2410_UDC_IN_CSR1_REG);
405 }
406
407 s3c2410_udc_done(ep, req, 0);
408 is_last = 1;
409 } else {
410 if (idx == 0) {
411 /* Reset signal => no need to say 'data sent' */
412 if (!(udc_read(S3C2410_UDC_USB_INT_REG)
413 & S3C2410_UDC_USBINT_RESET))
414 s3c2410_udc_set_ep0_ipr(base_addr);
415 } else {
416 udc_write(idx, S3C2410_UDC_INDEX_REG);
417 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
418 udc_write(idx, S3C2410_UDC_INDEX_REG);
419 udc_write(ep_csr | S3C2410_UDC_ICSR1_PKTRDY,
420 S3C2410_UDC_IN_CSR1_REG);
421 }
422 }
423
424 return is_last;
425 }
426
427 static inline int s3c2410_udc_read_packet(int fifo, u8 *buf,
428 struct s3c2410_request *req, unsigned avail)
429 {
430 unsigned len;
431
432 len = min(req->req.length - req->req.actual, avail);
433 req->req.actual += len;
434
435 readsb(fifo + base_addr, buf, len);
436 return len;
437 }
438
439 /*
440 * return: 0 = still running, 1 = queue empty, negative = errno
441 */
442 static int s3c2410_udc_read_fifo(struct s3c2410_ep *ep,
443 struct s3c2410_request *req)
444 {
445 u8 *buf;
446 u32 ep_csr;
447 unsigned bufferspace;
448 int is_last = 1;
449 unsigned avail;
450 int fifo_count = 0;
451 u32 idx;
452 int fifo_reg;
453
454 idx = ep->bEndpointAddress & 0x7F;
455
456 switch (idx) {
457 default:
458 idx = 0;
459 case 0:
460 fifo_reg = S3C2410_UDC_EP0_FIFO_REG;
461 break;
462 case 1:
463 fifo_reg = S3C2410_UDC_EP1_FIFO_REG;
464 break;
465 case 2:
466 fifo_reg = S3C2410_UDC_EP2_FIFO_REG;
467 break;
468 case 3:
469 fifo_reg = S3C2410_UDC_EP3_FIFO_REG;
470 break;
471 case 4:
472 fifo_reg = S3C2410_UDC_EP4_FIFO_REG;
473 break;
474 }
475
476 if (!req->req.length)
477 return 1;
478
479 buf = req->req.buf + req->req.actual;
480 bufferspace = req->req.length - req->req.actual;
481 if (!bufferspace) {
482 dprintk(DEBUG_NORMAL, "%s: buffer full!\n", __func__);
483 return -1;
484 }
485
486 udc_write(idx, S3C2410_UDC_INDEX_REG);
487
488 fifo_count = s3c2410_udc_fifo_count_out();
489 dprintk(DEBUG_NORMAL, "%s fifo count : %d\n", __func__, fifo_count);
490
491 if (fifo_count > ep->ep.maxpacket)
492 avail = ep->ep.maxpacket;
493 else
494 avail = fifo_count;
495
496 fifo_count = s3c2410_udc_read_packet(fifo_reg, buf, req, avail);
497
498 /* checking this with ep0 is not accurate as we already
499 * read a control request
500 **/
501 if (idx != 0 && fifo_count < ep->ep.maxpacket) {
502 is_last = 1;
503 /* overflowed this request? flush extra data */
504 if (fifo_count != avail)
505 req->req.status = -EOVERFLOW;
506 } else {
507 is_last = (req->req.length <= req->req.actual) ? 1 : 0;
508 }
509
510 udc_write(idx, S3C2410_UDC_INDEX_REG);
511 fifo_count = s3c2410_udc_fifo_count_out();
512
513 /* Only ep0 debug messages are interesting */
514 if (idx == 0)
515 dprintk(DEBUG_VERBOSE, "%s fifo count : %d [last %d]\n",
516 __func__, fifo_count, is_last);
517
518 if (is_last) {
519 if (idx == 0) {
520 s3c2410_udc_set_ep0_de_out(base_addr);
521 ep->dev->ep0state = EP0_IDLE;
522 } else {
523 udc_write(idx, S3C2410_UDC_INDEX_REG);
524 ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
525 udc_write(idx, S3C2410_UDC_INDEX_REG);
526 udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
527 S3C2410_UDC_OUT_CSR1_REG);
528 }
529
530 s3c2410_udc_done(ep, req, 0);
531 } else {
532 if (idx == 0) {
533 s3c2410_udc_clear_ep0_opr(base_addr);
534 } else {
535 udc_write(idx, S3C2410_UDC_INDEX_REG);
536 ep_csr = udc_read(S3C2410_UDC_OUT_CSR1_REG);
537 udc_write(idx, S3C2410_UDC_INDEX_REG);
538 udc_write(ep_csr & ~S3C2410_UDC_OCSR1_PKTRDY,
539 S3C2410_UDC_OUT_CSR1_REG);
540 }
541 }
542
543 return is_last;
544 }
545
546 static int s3c2410_udc_read_fifo_crq(struct usb_ctrlrequest *crq)
547 {
548 unsigned char *outbuf = (unsigned char *)crq;
549 int bytes_read = 0;
550
551 udc_write(0, S3C2410_UDC_INDEX_REG);
552
553 bytes_read = s3c2410_udc_fifo_count_out();
554
555 dprintk(DEBUG_NORMAL, "%s: fifo_count=%d\n", __func__, bytes_read);
556
557 if (bytes_read > sizeof(struct usb_ctrlrequest))
558 bytes_read = sizeof(struct usb_ctrlrequest);
559
560 readsb(S3C2410_UDC_EP0_FIFO_REG + base_addr, outbuf, bytes_read);
561
562 dprintk(DEBUG_VERBOSE, "%s: len=%d %02x:%02x {%x,%x,%x}\n", __func__,
563 bytes_read, crq->bRequest, crq->bRequestType,
564 crq->wValue, crq->wIndex, crq->wLength);
565
566 return bytes_read;
567 }
568
569 static int s3c2410_udc_get_status(struct s3c2410_udc *dev,
570 struct usb_ctrlrequest *crq)
571 {
572 u16 status = 0;
573 u8 ep_num = crq->wIndex & 0x7F;
574 u8 is_in = crq->wIndex & USB_DIR_IN;
575
576 switch (crq->bRequestType & USB_RECIP_MASK) {
577 case USB_RECIP_INTERFACE:
578 break;
579
580 case USB_RECIP_DEVICE:
581 status = dev->devstatus;
582 break;
583
584 case USB_RECIP_ENDPOINT:
585 if (ep_num > 4 || crq->wLength > 2)
586 return 1;
587
588 if (ep_num == 0) {
589 udc_write(0, S3C2410_UDC_INDEX_REG);
590 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
591 status = status & S3C2410_UDC_EP0_CSR_SENDSTL;
592 } else {
593 udc_write(ep_num, S3C2410_UDC_INDEX_REG);
594 if (is_in) {
595 status = udc_read(S3C2410_UDC_IN_CSR1_REG);
596 status = status & S3C2410_UDC_ICSR1_SENDSTL;
597 } else {
598 status = udc_read(S3C2410_UDC_OUT_CSR1_REG);
599 status = status & S3C2410_UDC_OCSR1_SENDSTL;
600 }
601 }
602
603 status = status ? 1 : 0;
604 break;
605
606 default:
607 return 1;
608 }
609
610 /* Seems to be needed to get it working. ouch :( */
611 udelay(5);
612 udc_write(status & 0xFF, S3C2410_UDC_EP0_FIFO_REG);
613 udc_write(status >> 8, S3C2410_UDC_EP0_FIFO_REG);
614 s3c2410_udc_set_ep0_de_in(base_addr);
615
616 return 0;
617 }
618 /*------------------------- usb state machine -------------------------------*/
619 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value);
620
621 static void s3c2410_udc_handle_ep0_idle(struct s3c2410_udc *dev,
622 struct s3c2410_ep *ep,
623 struct usb_ctrlrequest *crq,
624 u32 ep0csr)
625 {
626 int len, ret, tmp;
627
628 /* start control request? */
629 if (!(ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY))
630 return;
631
632 s3c2410_udc_nuke(dev, ep, -EPROTO);
633
634 len = s3c2410_udc_read_fifo_crq(crq);
635 if (len != sizeof(*crq)) {
636 dprintk(DEBUG_NORMAL, "setup begin: fifo READ ERROR"
637 " wanted %d bytes got %d. Stalling out...\n",
638 sizeof(*crq), len);
639 s3c2410_udc_set_ep0_ss(base_addr);
640 return;
641 }
642
643 dprintk(DEBUG_NORMAL, "bRequest = %d bRequestType %d wLength = %d\n",
644 crq->bRequest, crq->bRequestType, crq->wLength);
645
646 /* cope with automagic for some standard requests. */
647 dev->req_std = (crq->bRequestType & USB_TYPE_MASK)
648 == USB_TYPE_STANDARD;
649 dev->req_config = 0;
650 dev->req_pending = 1;
651
652 switch (crq->bRequest) {
653 case USB_REQ_SET_CONFIGURATION:
654 dprintk(DEBUG_NORMAL, "USB_REQ_SET_CONFIGURATION ...\n");
655
656 if (crq->bRequestType == USB_RECIP_DEVICE) {
657 dev->req_config = 1;
658 s3c2410_udc_set_ep0_de_out(base_addr);
659 }
660 break;
661
662 case USB_REQ_SET_INTERFACE:
663 dprintk(DEBUG_NORMAL, "USB_REQ_SET_INTERFACE ...\n");
664
665 if (crq->bRequestType == USB_RECIP_INTERFACE) {
666 dev->req_config = 1;
667 s3c2410_udc_set_ep0_de_out(base_addr);
668 }
669 break;
670
671 case USB_REQ_SET_ADDRESS:
672 dprintk(DEBUG_NORMAL, "USB_REQ_SET_ADDRESS ...\n");
673
674 if (crq->bRequestType == USB_RECIP_DEVICE) {
675 tmp = crq->wValue & 0x7F;
676 dev->address = tmp;
677 udc_write((tmp | S3C2410_UDC_FUNCADDR_UPDATE),
678 S3C2410_UDC_FUNC_ADDR_REG);
679 s3c2410_udc_set_ep0_de_out(base_addr);
680 return;
681 }
682 break;
683
684 case USB_REQ_GET_STATUS:
685 dprintk(DEBUG_NORMAL, "USB_REQ_GET_STATUS ...\n");
686 s3c2410_udc_clear_ep0_opr(base_addr);
687
688 if (dev->req_std) {
689 if (!s3c2410_udc_get_status(dev, crq))
690 return;
691 }
692 break;
693
694 case USB_REQ_CLEAR_FEATURE:
695 s3c2410_udc_clear_ep0_opr(base_addr);
696
697 if (crq->bRequestType != USB_RECIP_ENDPOINT)
698 break;
699
700 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
701 break;
702
703 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 0);
704 s3c2410_udc_set_ep0_de_out(base_addr);
705 return;
706
707 case USB_REQ_SET_FEATURE:
708 s3c2410_udc_clear_ep0_opr(base_addr);
709
710 if (crq->bRequestType != USB_RECIP_ENDPOINT)
711 break;
712
713 if (crq->wValue != USB_ENDPOINT_HALT || crq->wLength != 0)
714 break;
715
716 s3c2410_udc_set_halt(&dev->ep[crq->wIndex & 0x7f].ep, 1);
717 s3c2410_udc_set_ep0_de_out(base_addr);
718 return;
719
720 default:
721 s3c2410_udc_clear_ep0_opr(base_addr);
722 break;
723 }
724
725 if (crq->bRequestType & USB_DIR_IN)
726 dev->ep0state = EP0_IN_DATA_PHASE;
727 else
728 dev->ep0state = EP0_OUT_DATA_PHASE;
729
730 if (!dev->driver)
731 return;
732
733 /* deliver the request to the gadget driver */
734 ret = dev->driver->setup(&dev->gadget, crq);
735 if (ret < 0) {
736 if (dev->req_config) {
737 dprintk(DEBUG_NORMAL, "config change %02x fail %d?\n",
738 crq->bRequest, ret);
739 return;
740 }
741
742 if (ret == -EOPNOTSUPP)
743 dprintk(DEBUG_NORMAL, "Operation not supported\n");
744 else
745 dprintk(DEBUG_NORMAL,
746 "dev->driver->setup failed. (%d)\n", ret);
747
748 udelay(5);
749 s3c2410_udc_set_ep0_ss(base_addr);
750 s3c2410_udc_set_ep0_de_out(base_addr);
751 dev->ep0state = EP0_IDLE;
752 /* deferred i/o == no response yet */
753 } else if (dev->req_pending) {
754 dprintk(DEBUG_VERBOSE, "dev->req_pending... what now?\n");
755 dev->req_pending = 0;
756 }
757
758 dprintk(DEBUG_VERBOSE, "ep0state %s\n", ep0states[dev->ep0state]);
759 }
760
761 static void s3c2410_udc_handle_ep0(struct s3c2410_udc *dev)
762 {
763 u32 ep0csr;
764 struct s3c2410_ep *ep = &dev->ep[0];
765 struct s3c2410_request *req;
766 struct usb_ctrlrequest crq;
767
768 if (list_empty(&ep->queue))
769 req = NULL;
770 else
771 req = list_entry(ep->queue.next, struct s3c2410_request, queue);
772
773 /* We make the assumption that S3C2410_UDC_IN_CSR1_REG equal to
774 * S3C2410_UDC_EP0_CSR_REG when index is zero */
775
776 udc_write(0, S3C2410_UDC_INDEX_REG);
777 ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
778
779 dprintk(DEBUG_NORMAL, "ep0csr %x ep0state %s\n",
780 ep0csr, ep0states[dev->ep0state]);
781
782 /* clear stall status */
783 if (ep0csr & S3C2410_UDC_EP0_CSR_SENTSTL) {
784 s3c2410_udc_nuke(dev, ep, -EPIPE);
785 dprintk(DEBUG_NORMAL, "... clear SENT_STALL ...\n");
786 s3c2410_udc_clear_ep0_sst(base_addr);
787 dev->ep0state = EP0_IDLE;
788 return;
789 }
790
791 /* clear setup end */
792 if (ep0csr & S3C2410_UDC_EP0_CSR_SE) {
793 dprintk(DEBUG_NORMAL, "... serviced SETUP_END ...\n");
794 s3c2410_udc_nuke(dev, ep, 0);
795 s3c2410_udc_clear_ep0_se(base_addr);
796 dev->ep0state = EP0_IDLE;
797 }
798
799 switch (dev->ep0state) {
800 case EP0_IDLE:
801 s3c2410_udc_handle_ep0_idle(dev, ep, &crq, ep0csr);
802 break;
803
804 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */
805 dprintk(DEBUG_NORMAL, "EP0_IN_DATA_PHASE ... what now?\n");
806 if (!(ep0csr & S3C2410_UDC_EP0_CSR_IPKRDY) && req)
807 s3c2410_udc_write_fifo(ep, req);
808 break;
809
810 case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */
811 dprintk(DEBUG_NORMAL, "EP0_OUT_DATA_PHASE ... what now?\n");
812 if ((ep0csr & S3C2410_UDC_EP0_CSR_OPKRDY) && req)
813 s3c2410_udc_read_fifo(ep, req);
814 break;
815
816 case EP0_END_XFER:
817 dprintk(DEBUG_NORMAL, "EP0_END_XFER ... what now?\n");
818 dev->ep0state = EP0_IDLE;
819 break;
820
821 case EP0_STALL:
822 dprintk(DEBUG_NORMAL, "EP0_STALL ... what now?\n");
823 dev->ep0state = EP0_IDLE;
824 break;
825 }
826 }
827
828 /*
829 * handle_ep - Manage I/O endpoints
830 */
831
832 static void s3c2410_udc_handle_ep(struct s3c2410_ep *ep)
833 {
834 struct s3c2410_request *req;
835 int is_in = ep->bEndpointAddress & USB_DIR_IN;
836 u32 ep_csr1;
837 u32 idx;
838
839 if (likely(!list_empty(&ep->queue)))
840 req = list_entry(ep->queue.next,
841 struct s3c2410_request, queue);
842 else
843 req = NULL;
844
845 idx = ep->bEndpointAddress & 0x7F;
846
847 if (is_in) {
848 udc_write(idx, S3C2410_UDC_INDEX_REG);
849 ep_csr1 = udc_read(S3C2410_UDC_IN_CSR1_REG);
850 dprintk(DEBUG_VERBOSE, "ep%01d write csr:%02x %d\n",
851 idx, ep_csr1, req ? 1 : 0);
852
853 if (ep_csr1 & S3C2410_UDC_ICSR1_SENTSTL) {
854 dprintk(DEBUG_VERBOSE, "st\n");
855 udc_write(idx, S3C2410_UDC_INDEX_REG);
856 udc_write(ep_csr1 & ~S3C2410_UDC_ICSR1_SENTSTL,
857 S3C2410_UDC_IN_CSR1_REG);
858 return;
859 }
860
861 if (!(ep_csr1 & S3C2410_UDC_ICSR1_PKTRDY) && req)
862 s3c2410_udc_write_fifo(ep, req);
863 } else {
864 udc_write(idx, S3C2410_UDC_INDEX_REG);
865 ep_csr1 = udc_read(S3C2410_UDC_OUT_CSR1_REG);
866 dprintk(DEBUG_VERBOSE, "ep%01d rd csr:%02x\n", idx, ep_csr1);
867
868 if (ep_csr1 & S3C2410_UDC_OCSR1_SENTSTL) {
869 udc_write(idx, S3C2410_UDC_INDEX_REG);
870 udc_write(ep_csr1 & ~S3C2410_UDC_OCSR1_SENTSTL,
871 S3C2410_UDC_OUT_CSR1_REG);
872 return;
873 }
874
875 if ((ep_csr1 & S3C2410_UDC_OCSR1_PKTRDY) && req)
876 s3c2410_udc_read_fifo(ep, req);
877 }
878 }
879
880 #include <mach/regs-irq.h>
881
882 /*
883 * s3c2410_udc_irq - interrupt handler
884 */
885 static irqreturn_t s3c2410_udc_irq(int dummy, void *_dev)
886 {
887 struct s3c2410_udc *dev = _dev;
888 int usb_status;
889 int usbd_status;
890 int pwr_reg;
891 int ep0csr;
892 int i;
893 u32 idx, idx2;
894 unsigned long flags;
895
896 spin_lock_irqsave(&dev->lock, flags);
897
898 /* Driver connected ? */
899 if (!dev->driver) {
900 /* Clear interrupts */
901 udc_write(udc_read(S3C2410_UDC_USB_INT_REG),
902 S3C2410_UDC_USB_INT_REG);
903 udc_write(udc_read(S3C2410_UDC_EP_INT_REG),
904 S3C2410_UDC_EP_INT_REG);
905 }
906
907 /* Save index */
908 idx = udc_read(S3C2410_UDC_INDEX_REG);
909
910 /* Read status registers */
911 usb_status = udc_read(S3C2410_UDC_USB_INT_REG);
912 usbd_status = udc_read(S3C2410_UDC_EP_INT_REG);
913 pwr_reg = udc_read(S3C2410_UDC_PWR_REG);
914
915 udc_writeb(base_addr, S3C2410_UDC_INDEX_EP0, S3C2410_UDC_INDEX_REG);
916 ep0csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
917
918 dprintk(DEBUG_NORMAL, "usbs=%02x, usbds=%02x, pwr=%02x ep0csr=%02x\n",
919 usb_status, usbd_status, pwr_reg, ep0csr);
920
921 /*
922 * Now, handle interrupts. There's two types :
923 * - Reset, Resume, Suspend coming -> usb_int_reg
924 * - EP -> ep_int_reg
925 */
926
927 /* RESET */
928 if (usb_status & S3C2410_UDC_USBINT_RESET) {
929 /* two kind of reset :
930 * - reset start -> pwr reg = 8
931 * - reset end -> pwr reg = 0
932 **/
933 dprintk(DEBUG_NORMAL, "USB reset csr %x pwr %x\n",
934 ep0csr, pwr_reg);
935
936 dev->gadget.speed = USB_SPEED_UNKNOWN;
937 udc_write(0x00, S3C2410_UDC_INDEX_REG);
938 udc_write((dev->ep[0].ep.maxpacket & 0x7ff) >> 3,
939 S3C2410_UDC_MAXP_REG);
940 dev->address = 0;
941
942 dev->ep0state = EP0_IDLE;
943 dev->gadget.speed = USB_SPEED_FULL;
944
945 /* clear interrupt */
946 udc_write(S3C2410_UDC_USBINT_RESET,
947 S3C2410_UDC_USB_INT_REG);
948
949 udc_write(idx, S3C2410_UDC_INDEX_REG);
950 spin_unlock_irqrestore(&dev->lock, flags);
951 return IRQ_HANDLED;
952 }
953
954 /* RESUME */
955 if (usb_status & S3C2410_UDC_USBINT_RESUME) {
956 dprintk(DEBUG_NORMAL, "USB resume\n");
957
958 /* clear interrupt */
959 udc_write(S3C2410_UDC_USBINT_RESUME,
960 S3C2410_UDC_USB_INT_REG);
961
962 if (dev->gadget.speed != USB_SPEED_UNKNOWN
963 && dev->driver
964 && dev->driver->resume)
965 dev->driver->resume(&dev->gadget);
966 }
967
968 /* SUSPEND */
969 if (usb_status & S3C2410_UDC_USBINT_SUSPEND) {
970 dprintk(DEBUG_NORMAL, "USB suspend\n");
971
972 /* clear interrupt */
973 udc_write(S3C2410_UDC_USBINT_SUSPEND,
974 S3C2410_UDC_USB_INT_REG);
975
976 if (dev->gadget.speed != USB_SPEED_UNKNOWN
977 && dev->driver
978 && dev->driver->suspend)
979 dev->driver->suspend(&dev->gadget);
980
981 dev->ep0state = EP0_IDLE;
982 }
983
984 /* EP */
985 /* control traffic */
986 /* check on ep0csr != 0 is not a good idea as clearing in_pkt_ready
987 * generate an interrupt
988 */
989 if (usbd_status & S3C2410_UDC_INT_EP0) {
990 dprintk(DEBUG_VERBOSE, "USB ep0 irq\n");
991 /* Clear the interrupt bit by setting it to 1 */
992 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_REG);
993 s3c2410_udc_handle_ep0(dev);
994 }
995
996 /* endpoint data transfers */
997 for (i = 1; i < S3C2410_ENDPOINTS; i++) {
998 u32 tmp = 1 << i;
999 if (usbd_status & tmp) {
1000 dprintk(DEBUG_VERBOSE, "USB ep%d irq\n", i);
1001
1002 /* Clear the interrupt bit by setting it to 1 */
1003 udc_write(tmp, S3C2410_UDC_EP_INT_REG);
1004 s3c2410_udc_handle_ep(&dev->ep[i]);
1005 }
1006 }
1007
1008 /* what else causes this interrupt? a receive! who is it? */
1009 if (!usb_status && !usbd_status && !pwr_reg && !ep0csr) {
1010 for (i = 1; i < S3C2410_ENDPOINTS; i++) {
1011 idx2 = udc_read(S3C2410_UDC_INDEX_REG);
1012 udc_write(i, S3C2410_UDC_INDEX_REG);
1013
1014 if (udc_read(S3C2410_UDC_OUT_CSR1_REG) & 0x1)
1015 s3c2410_udc_handle_ep(&dev->ep[i]);
1016
1017 /* restore index */
1018 udc_write(idx2, S3C2410_UDC_INDEX_REG);
1019 }
1020 }
1021
1022 dprintk(DEBUG_VERBOSE, "irq: %d s3c2410_udc_done.\n", IRQ_USBD);
1023
1024 /* Restore old index */
1025 udc_write(idx, S3C2410_UDC_INDEX_REG);
1026
1027 spin_unlock_irqrestore(&dev->lock, flags);
1028
1029 return IRQ_HANDLED;
1030 }
1031 /*------------------------- s3c2410_ep_ops ----------------------------------*/
1032
1033 static inline struct s3c2410_ep *to_s3c2410_ep(struct usb_ep *ep)
1034 {
1035 return container_of(ep, struct s3c2410_ep, ep);
1036 }
1037
1038 static inline struct s3c2410_udc *to_s3c2410_udc(struct usb_gadget *gadget)
1039 {
1040 return container_of(gadget, struct s3c2410_udc, gadget);
1041 }
1042
1043 static inline struct s3c2410_request *to_s3c2410_req(struct usb_request *req)
1044 {
1045 return container_of(req, struct s3c2410_request, req);
1046 }
1047
1048 /*
1049 * s3c2410_udc_ep_enable
1050 */
1051 static int s3c2410_udc_ep_enable(struct usb_ep *_ep,
1052 const struct usb_endpoint_descriptor *desc)
1053 {
1054 struct s3c2410_udc *dev;
1055 struct s3c2410_ep *ep;
1056 u32 max, tmp;
1057 unsigned long flags;
1058 u32 csr1, csr2;
1059 u32 int_en_reg;
1060
1061 ep = to_s3c2410_ep(_ep);
1062
1063 if (!_ep || !desc
1064 || _ep->name == ep0name
1065 || desc->bDescriptorType != USB_DT_ENDPOINT)
1066 return -EINVAL;
1067
1068 dev = ep->dev;
1069 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
1070 return -ESHUTDOWN;
1071
1072 max = usb_endpoint_maxp(desc) & 0x1fff;
1073
1074 local_irq_save(flags);
1075 _ep->maxpacket = max & 0x7ff;
1076 ep->ep.desc = desc;
1077 ep->halted = 0;
1078 ep->bEndpointAddress = desc->bEndpointAddress;
1079
1080 /* set max packet */
1081 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1082 udc_write(max >> 3, S3C2410_UDC_MAXP_REG);
1083
1084 /* set type, direction, address; reset fifo counters */
1085 if (desc->bEndpointAddress & USB_DIR_IN) {
1086 csr1 = S3C2410_UDC_ICSR1_FFLUSH|S3C2410_UDC_ICSR1_CLRDT;
1087 csr2 = S3C2410_UDC_ICSR2_MODEIN|S3C2410_UDC_ICSR2_DMAIEN;
1088
1089 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1090 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1091 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1092 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1093 } else {
1094 /* don't flush in fifo or it will cause endpoint interrupt */
1095 csr1 = S3C2410_UDC_ICSR1_CLRDT;
1096 csr2 = S3C2410_UDC_ICSR2_DMAIEN;
1097
1098 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1099 udc_write(csr1, S3C2410_UDC_IN_CSR1_REG);
1100 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1101 udc_write(csr2, S3C2410_UDC_IN_CSR2_REG);
1102
1103 csr1 = S3C2410_UDC_OCSR1_FFLUSH | S3C2410_UDC_OCSR1_CLRDT;
1104 csr2 = S3C2410_UDC_OCSR2_DMAIEN;
1105
1106 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1107 udc_write(csr1, S3C2410_UDC_OUT_CSR1_REG);
1108 udc_write(ep->num, S3C2410_UDC_INDEX_REG);
1109 udc_write(csr2, S3C2410_UDC_OUT_CSR2_REG);
1110 }
1111
1112 /* enable irqs */
1113 int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1114 udc_write(int_en_reg | (1 << ep->num), S3C2410_UDC_EP_INT_EN_REG);
1115
1116 /* print some debug message */
1117 tmp = desc->bEndpointAddress;
1118 dprintk(DEBUG_NORMAL, "enable %s(%d) ep%x%s-blk max %02x\n",
1119 _ep->name, ep->num, tmp,
1120 desc->bEndpointAddress & USB_DIR_IN ? "in" : "out", max);
1121
1122 local_irq_restore(flags);
1123 s3c2410_udc_set_halt(_ep, 0);
1124
1125 return 0;
1126 }
1127
1128 /*
1129 * s3c2410_udc_ep_disable
1130 */
1131 static int s3c2410_udc_ep_disable(struct usb_ep *_ep)
1132 {
1133 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1134 unsigned long flags;
1135 u32 int_en_reg;
1136
1137 if (!_ep || !ep->ep.desc) {
1138 dprintk(DEBUG_NORMAL, "%s not enabled\n",
1139 _ep ? ep->ep.name : NULL);
1140 return -EINVAL;
1141 }
1142
1143 local_irq_save(flags);
1144
1145 dprintk(DEBUG_NORMAL, "ep_disable: %s\n", _ep->name);
1146
1147 ep->ep.desc = NULL;
1148 ep->halted = 1;
1149
1150 s3c2410_udc_nuke(ep->dev, ep, -ESHUTDOWN);
1151
1152 /* disable irqs */
1153 int_en_reg = udc_read(S3C2410_UDC_EP_INT_EN_REG);
1154 udc_write(int_en_reg & ~(1<<ep->num), S3C2410_UDC_EP_INT_EN_REG);
1155
1156 local_irq_restore(flags);
1157
1158 dprintk(DEBUG_NORMAL, "%s disabled\n", _ep->name);
1159
1160 return 0;
1161 }
1162
1163 /*
1164 * s3c2410_udc_alloc_request
1165 */
1166 static struct usb_request *
1167 s3c2410_udc_alloc_request(struct usb_ep *_ep, gfp_t mem_flags)
1168 {
1169 struct s3c2410_request *req;
1170
1171 dprintk(DEBUG_VERBOSE, "%s(%p,%d)\n", __func__, _ep, mem_flags);
1172
1173 if (!_ep)
1174 return NULL;
1175
1176 req = kzalloc(sizeof(struct s3c2410_request), mem_flags);
1177 if (!req)
1178 return NULL;
1179
1180 INIT_LIST_HEAD(&req->queue);
1181 return &req->req;
1182 }
1183
1184 /*
1185 * s3c2410_udc_free_request
1186 */
1187 static void
1188 s3c2410_udc_free_request(struct usb_ep *_ep, struct usb_request *_req)
1189 {
1190 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1191 struct s3c2410_request *req = to_s3c2410_req(_req);
1192
1193 dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1194
1195 if (!ep || !_req || (!ep->ep.desc && _ep->name != ep0name))
1196 return;
1197
1198 WARN_ON(!list_empty(&req->queue));
1199 kfree(req);
1200 }
1201
1202 /*
1203 * s3c2410_udc_queue
1204 */
1205 static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req,
1206 gfp_t gfp_flags)
1207 {
1208 struct s3c2410_request *req = to_s3c2410_req(_req);
1209 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1210 struct s3c2410_udc *dev;
1211 u32 ep_csr = 0;
1212 int fifo_count = 0;
1213 unsigned long flags;
1214
1215 if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1216 dprintk(DEBUG_NORMAL, "%s: invalid args\n", __func__);
1217 return -EINVAL;
1218 }
1219
1220 dev = ep->dev;
1221 if (unlikely(!dev->driver
1222 || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1223 return -ESHUTDOWN;
1224 }
1225
1226 local_irq_save(flags);
1227
1228 if (unlikely(!_req || !_req->complete
1229 || !_req->buf || !list_empty(&req->queue))) {
1230 if (!_req)
1231 dprintk(DEBUG_NORMAL, "%s: 1 X X X\n", __func__);
1232 else {
1233 dprintk(DEBUG_NORMAL, "%s: 0 %01d %01d %01d\n",
1234 __func__, !_req->complete, !_req->buf,
1235 !list_empty(&req->queue));
1236 }
1237
1238 local_irq_restore(flags);
1239 return -EINVAL;
1240 }
1241
1242 _req->status = -EINPROGRESS;
1243 _req->actual = 0;
1244
1245 dprintk(DEBUG_VERBOSE, "%s: ep%x len %d\n",
1246 __func__, ep->bEndpointAddress, _req->length);
1247
1248 if (ep->bEndpointAddress) {
1249 udc_write(ep->bEndpointAddress & 0x7F, S3C2410_UDC_INDEX_REG);
1250
1251 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1252 ? S3C2410_UDC_IN_CSR1_REG
1253 : S3C2410_UDC_OUT_CSR1_REG);
1254 fifo_count = s3c2410_udc_fifo_count_out();
1255 } else {
1256 udc_write(0, S3C2410_UDC_INDEX_REG);
1257 ep_csr = udc_read(S3C2410_UDC_IN_CSR1_REG);
1258 fifo_count = s3c2410_udc_fifo_count_out();
1259 }
1260
1261 /* kickstart this i/o queue? */
1262 if (list_empty(&ep->queue) && !ep->halted) {
1263 if (ep->bEndpointAddress == 0 /* ep0 */) {
1264 switch (dev->ep0state) {
1265 case EP0_IN_DATA_PHASE:
1266 if (!(ep_csr&S3C2410_UDC_EP0_CSR_IPKRDY)
1267 && s3c2410_udc_write_fifo(ep,
1268 req)) {
1269 dev->ep0state = EP0_IDLE;
1270 req = NULL;
1271 }
1272 break;
1273
1274 case EP0_OUT_DATA_PHASE:
1275 if ((!_req->length)
1276 || ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1277 && s3c2410_udc_read_fifo(ep,
1278 req))) {
1279 dev->ep0state = EP0_IDLE;
1280 req = NULL;
1281 }
1282 break;
1283
1284 default:
1285 local_irq_restore(flags);
1286 return -EL2HLT;
1287 }
1288 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0
1289 && (!(ep_csr&S3C2410_UDC_OCSR1_PKTRDY))
1290 && s3c2410_udc_write_fifo(ep, req)) {
1291 req = NULL;
1292 } else if ((ep_csr & S3C2410_UDC_OCSR1_PKTRDY)
1293 && fifo_count
1294 && s3c2410_udc_read_fifo(ep, req)) {
1295 req = NULL;
1296 }
1297 }
1298
1299 /* pio or dma irq handler advances the queue. */
1300 if (likely(req))
1301 list_add_tail(&req->queue, &ep->queue);
1302
1303 local_irq_restore(flags);
1304
1305 dprintk(DEBUG_VERBOSE, "%s ok\n", __func__);
1306 return 0;
1307 }
1308
1309 /*
1310 * s3c2410_udc_dequeue
1311 */
1312 static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1313 {
1314 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1315 struct s3c2410_udc *udc;
1316 int retval = -EINVAL;
1317 unsigned long flags;
1318 struct s3c2410_request *req = NULL;
1319
1320 dprintk(DEBUG_VERBOSE, "%s(%p,%p)\n", __func__, _ep, _req);
1321
1322 if (!the_controller->driver)
1323 return -ESHUTDOWN;
1324
1325 if (!_ep || !_req)
1326 return retval;
1327
1328 udc = to_s3c2410_udc(ep->gadget);
1329
1330 local_irq_save(flags);
1331
1332 list_for_each_entry(req, &ep->queue, queue) {
1333 if (&req->req == _req) {
1334 list_del_init(&req->queue);
1335 _req->status = -ECONNRESET;
1336 retval = 0;
1337 break;
1338 }
1339 }
1340
1341 if (retval == 0) {
1342 dprintk(DEBUG_VERBOSE,
1343 "dequeued req %p from %s, len %d buf %p\n",
1344 req, _ep->name, _req->length, _req->buf);
1345
1346 s3c2410_udc_done(ep, req, -ECONNRESET);
1347 }
1348
1349 local_irq_restore(flags);
1350 return retval;
1351 }
1352
1353 /*
1354 * s3c2410_udc_set_halt
1355 */
1356 static int s3c2410_udc_set_halt(struct usb_ep *_ep, int value)
1357 {
1358 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1359 u32 ep_csr = 0;
1360 unsigned long flags;
1361 u32 idx;
1362
1363 if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
1364 dprintk(DEBUG_NORMAL, "%s: inval 2\n", __func__);
1365 return -EINVAL;
1366 }
1367
1368 local_irq_save(flags);
1369
1370 idx = ep->bEndpointAddress & 0x7F;
1371
1372 if (idx == 0) {
1373 s3c2410_udc_set_ep0_ss(base_addr);
1374 s3c2410_udc_set_ep0_de_out(base_addr);
1375 } else {
1376 udc_write(idx, S3C2410_UDC_INDEX_REG);
1377 ep_csr = udc_read((ep->bEndpointAddress & USB_DIR_IN)
1378 ? S3C2410_UDC_IN_CSR1_REG
1379 : S3C2410_UDC_OUT_CSR1_REG);
1380
1381 if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
1382 if (value)
1383 udc_write(ep_csr | S3C2410_UDC_ICSR1_SENDSTL,
1384 S3C2410_UDC_IN_CSR1_REG);
1385 else {
1386 ep_csr &= ~S3C2410_UDC_ICSR1_SENDSTL;
1387 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1388 ep_csr |= S3C2410_UDC_ICSR1_CLRDT;
1389 udc_write(ep_csr, S3C2410_UDC_IN_CSR1_REG);
1390 }
1391 } else {
1392 if (value)
1393 udc_write(ep_csr | S3C2410_UDC_OCSR1_SENDSTL,
1394 S3C2410_UDC_OUT_CSR1_REG);
1395 else {
1396 ep_csr &= ~S3C2410_UDC_OCSR1_SENDSTL;
1397 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1398 ep_csr |= S3C2410_UDC_OCSR1_CLRDT;
1399 udc_write(ep_csr, S3C2410_UDC_OUT_CSR1_REG);
1400 }
1401 }
1402 }
1403
1404 ep->halted = value ? 1 : 0;
1405 local_irq_restore(flags);
1406
1407 return 0;
1408 }
1409
1410 static const struct usb_ep_ops s3c2410_ep_ops = {
1411 .enable = s3c2410_udc_ep_enable,
1412 .disable = s3c2410_udc_ep_disable,
1413
1414 .alloc_request = s3c2410_udc_alloc_request,
1415 .free_request = s3c2410_udc_free_request,
1416
1417 .queue = s3c2410_udc_queue,
1418 .dequeue = s3c2410_udc_dequeue,
1419
1420 .set_halt = s3c2410_udc_set_halt,
1421 };
1422
1423 /*------------------------- usb_gadget_ops ----------------------------------*/
1424
1425 /*
1426 * s3c2410_udc_get_frame
1427 */
1428 static int s3c2410_udc_get_frame(struct usb_gadget *_gadget)
1429 {
1430 int tmp;
1431
1432 dprintk(DEBUG_VERBOSE, "%s()\n", __func__);
1433
1434 tmp = udc_read(S3C2410_UDC_FRAME_NUM2_REG) << 8;
1435 tmp |= udc_read(S3C2410_UDC_FRAME_NUM1_REG);
1436 return tmp;
1437 }
1438
1439 /*
1440 * s3c2410_udc_wakeup
1441 */
1442 static int s3c2410_udc_wakeup(struct usb_gadget *_gadget)
1443 {
1444 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1445 return 0;
1446 }
1447
1448 /*
1449 * s3c2410_udc_set_selfpowered
1450 */
1451 static int s3c2410_udc_set_selfpowered(struct usb_gadget *gadget, int value)
1452 {
1453 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1454
1455 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1456
1457 if (value)
1458 udc->devstatus |= (1 << USB_DEVICE_SELF_POWERED);
1459 else
1460 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1461
1462 return 0;
1463 }
1464
1465 static void s3c2410_udc_disable(struct s3c2410_udc *dev);
1466 static void s3c2410_udc_enable(struct s3c2410_udc *dev);
1467
1468 static int s3c2410_udc_set_pullup(struct s3c2410_udc *udc, int is_on)
1469 {
1470 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1471
1472 if (udc_info && (udc_info->udc_command ||
1473 gpio_is_valid(udc_info->pullup_pin))) {
1474
1475 if (is_on)
1476 s3c2410_udc_enable(udc);
1477 else {
1478 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1479 if (udc->driver && udc->driver->disconnect)
1480 udc->driver->disconnect(&udc->gadget);
1481
1482 }
1483 s3c2410_udc_disable(udc);
1484 }
1485 } else {
1486 return -EOPNOTSUPP;
1487 }
1488
1489 return 0;
1490 }
1491
1492 static int s3c2410_udc_vbus_session(struct usb_gadget *gadget, int is_active)
1493 {
1494 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1495
1496 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1497
1498 udc->vbus = (is_active != 0);
1499 s3c2410_udc_set_pullup(udc, is_active);
1500 return 0;
1501 }
1502
1503 static int s3c2410_udc_pullup(struct usb_gadget *gadget, int is_on)
1504 {
1505 struct s3c2410_udc *udc = to_s3c2410_udc(gadget);
1506
1507 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1508
1509 s3c2410_udc_set_pullup(udc, is_on ? 0 : 1);
1510 return 0;
1511 }
1512
1513 static irqreturn_t s3c2410_udc_vbus_irq(int irq, void *_dev)
1514 {
1515 struct s3c2410_udc *dev = _dev;
1516 unsigned int value;
1517
1518 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1519
1520 value = gpio_get_value(udc_info->vbus_pin) ? 1 : 0;
1521 if (udc_info->vbus_pin_inverted)
1522 value = !value;
1523
1524 if (value != dev->vbus)
1525 s3c2410_udc_vbus_session(&dev->gadget, value);
1526
1527 return IRQ_HANDLED;
1528 }
1529
1530 static int s3c2410_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1531 {
1532 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1533
1534 if (udc_info && udc_info->vbus_draw) {
1535 udc_info->vbus_draw(ma);
1536 return 0;
1537 }
1538
1539 return -ENOTSUPP;
1540 }
1541
1542 static int s3c2410_udc_start(struct usb_gadget *g,
1543 struct usb_gadget_driver *driver);
1544 static int s3c2410_udc_stop(struct usb_gadget *g,
1545 struct usb_gadget_driver *driver);
1546
1547 static const struct usb_gadget_ops s3c2410_ops = {
1548 .get_frame = s3c2410_udc_get_frame,
1549 .wakeup = s3c2410_udc_wakeup,
1550 .set_selfpowered = s3c2410_udc_set_selfpowered,
1551 .pullup = s3c2410_udc_pullup,
1552 .vbus_session = s3c2410_udc_vbus_session,
1553 .vbus_draw = s3c2410_vbus_draw,
1554 .udc_start = s3c2410_udc_start,
1555 .udc_stop = s3c2410_udc_stop,
1556 };
1557
1558 static void s3c2410_udc_command(enum s3c2410_udc_cmd_e cmd)
1559 {
1560 if (!udc_info)
1561 return;
1562
1563 if (udc_info->udc_command) {
1564 udc_info->udc_command(cmd);
1565 } else if (gpio_is_valid(udc_info->pullup_pin)) {
1566 int value;
1567
1568 switch (cmd) {
1569 case S3C2410_UDC_P_ENABLE:
1570 value = 1;
1571 break;
1572 case S3C2410_UDC_P_DISABLE:
1573 value = 0;
1574 break;
1575 default:
1576 return;
1577 }
1578 value ^= udc_info->pullup_pin_inverted;
1579
1580 gpio_set_value(udc_info->pullup_pin, value);
1581 }
1582 }
1583
1584 /*------------------------- gadget driver handling---------------------------*/
1585 /*
1586 * s3c2410_udc_disable
1587 */
1588 static void s3c2410_udc_disable(struct s3c2410_udc *dev)
1589 {
1590 dprintk(DEBUG_NORMAL, "%s()\n", __func__);
1591
1592 /* Disable all interrupts */
1593 udc_write(0x00, S3C2410_UDC_USB_INT_EN_REG);
1594 udc_write(0x00, S3C2410_UDC_EP_INT_EN_REG);
1595
1596 /* Clear the interrupt registers */
1597 udc_write(S3C2410_UDC_USBINT_RESET
1598 | S3C2410_UDC_USBINT_RESUME
1599 | S3C2410_UDC_USBINT_SUSPEND,
1600 S3C2410_UDC_USB_INT_REG);
1601
1602 udc_write(0x1F, S3C2410_UDC_EP_INT_REG);
1603
1604 /* Good bye, cruel world */
1605 s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1606
1607 /* Set speed to unknown */
1608 dev->gadget.speed = USB_SPEED_UNKNOWN;
1609 }
1610
1611 /*
1612 * s3c2410_udc_reinit
1613 */
1614 static void s3c2410_udc_reinit(struct s3c2410_udc *dev)
1615 {
1616 u32 i;
1617
1618 /* device/ep0 records init */
1619 INIT_LIST_HEAD(&dev->gadget.ep_list);
1620 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
1621 dev->ep0state = EP0_IDLE;
1622
1623 for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1624 struct s3c2410_ep *ep = &dev->ep[i];
1625
1626 if (i != 0)
1627 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
1628
1629 ep->dev = dev;
1630 ep->ep.desc = NULL;
1631 ep->halted = 0;
1632 INIT_LIST_HEAD(&ep->queue);
1633 usb_ep_set_maxpacket_limit(&ep->ep, ep->ep.maxpacket);
1634 }
1635 }
1636
1637 /*
1638 * s3c2410_udc_enable
1639 */
1640 static void s3c2410_udc_enable(struct s3c2410_udc *dev)
1641 {
1642 int i;
1643
1644 dprintk(DEBUG_NORMAL, "s3c2410_udc_enable called\n");
1645
1646 /* dev->gadget.speed = USB_SPEED_UNKNOWN; */
1647 dev->gadget.speed = USB_SPEED_FULL;
1648
1649 /* Set MAXP for all endpoints */
1650 for (i = 0; i < S3C2410_ENDPOINTS; i++) {
1651 udc_write(i, S3C2410_UDC_INDEX_REG);
1652 udc_write((dev->ep[i].ep.maxpacket & 0x7ff) >> 3,
1653 S3C2410_UDC_MAXP_REG);
1654 }
1655
1656 /* Set default power state */
1657 udc_write(DEFAULT_POWER_STATE, S3C2410_UDC_PWR_REG);
1658
1659 /* Enable reset and suspend interrupt interrupts */
1660 udc_write(S3C2410_UDC_USBINT_RESET | S3C2410_UDC_USBINT_SUSPEND,
1661 S3C2410_UDC_USB_INT_EN_REG);
1662
1663 /* Enable ep0 interrupt */
1664 udc_write(S3C2410_UDC_INT_EP0, S3C2410_UDC_EP_INT_EN_REG);
1665
1666 /* time to say "hello, world" */
1667 s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1668 }
1669
1670 static int s3c2410_udc_start(struct usb_gadget *g,
1671 struct usb_gadget_driver *driver)
1672 {
1673 struct s3c2410_udc *udc = to_s3c2410(g);
1674
1675 dprintk(DEBUG_NORMAL, "%s() '%s'\n", __func__, driver->driver.name);
1676
1677 /* Hook the driver */
1678 udc->driver = driver;
1679
1680 /* Enable udc */
1681 s3c2410_udc_enable(udc);
1682
1683 return 0;
1684 }
1685
1686 static int s3c2410_udc_stop(struct usb_gadget *g,
1687 struct usb_gadget_driver *driver)
1688 {
1689 struct s3c2410_udc *udc = to_s3c2410(g);
1690
1691 udc->driver = NULL;
1692
1693 /* Disable udc */
1694 s3c2410_udc_disable(udc);
1695
1696 return 0;
1697 }
1698
1699 /*---------------------------------------------------------------------------*/
1700 static struct s3c2410_udc memory = {
1701 .gadget = {
1702 .ops = &s3c2410_ops,
1703 .ep0 = &memory.ep[0].ep,
1704 .name = gadget_name,
1705 .dev = {
1706 .init_name = "gadget",
1707 },
1708 },
1709
1710 /* control endpoint */
1711 .ep[0] = {
1712 .num = 0,
1713 .ep = {
1714 .name = ep0name,
1715 .ops = &s3c2410_ep_ops,
1716 .maxpacket = EP0_FIFO_SIZE,
1717 },
1718 .dev = &memory,
1719 },
1720
1721 /* first group of endpoints */
1722 .ep[1] = {
1723 .num = 1,
1724 .ep = {
1725 .name = "ep1-bulk",
1726 .ops = &s3c2410_ep_ops,
1727 .maxpacket = EP_FIFO_SIZE,
1728 },
1729 .dev = &memory,
1730 .fifo_size = EP_FIFO_SIZE,
1731 .bEndpointAddress = 1,
1732 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1733 },
1734 .ep[2] = {
1735 .num = 2,
1736 .ep = {
1737 .name = "ep2-bulk",
1738 .ops = &s3c2410_ep_ops,
1739 .maxpacket = EP_FIFO_SIZE,
1740 },
1741 .dev = &memory,
1742 .fifo_size = EP_FIFO_SIZE,
1743 .bEndpointAddress = 2,
1744 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1745 },
1746 .ep[3] = {
1747 .num = 3,
1748 .ep = {
1749 .name = "ep3-bulk",
1750 .ops = &s3c2410_ep_ops,
1751 .maxpacket = EP_FIFO_SIZE,
1752 },
1753 .dev = &memory,
1754 .fifo_size = EP_FIFO_SIZE,
1755 .bEndpointAddress = 3,
1756 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1757 },
1758 .ep[4] = {
1759 .num = 4,
1760 .ep = {
1761 .name = "ep4-bulk",
1762 .ops = &s3c2410_ep_ops,
1763 .maxpacket = EP_FIFO_SIZE,
1764 },
1765 .dev = &memory,
1766 .fifo_size = EP_FIFO_SIZE,
1767 .bEndpointAddress = 4,
1768 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1769 }
1770
1771 };
1772
1773 /*
1774 * probe - binds to the platform device
1775 */
1776 static int s3c2410_udc_probe(struct platform_device *pdev)
1777 {
1778 struct s3c2410_udc *udc = &memory;
1779 struct device *dev = &pdev->dev;
1780 int retval;
1781 int irq;
1782
1783 dev_dbg(dev, "%s()\n", __func__);
1784
1785 usb_bus_clock = clk_get(NULL, "usb-bus-gadget");
1786 if (IS_ERR(usb_bus_clock)) {
1787 dev_err(dev, "failed to get usb bus clock source\n");
1788 return PTR_ERR(usb_bus_clock);
1789 }
1790
1791 clk_enable(usb_bus_clock);
1792
1793 udc_clock = clk_get(NULL, "usb-device");
1794 if (IS_ERR(udc_clock)) {
1795 dev_err(dev, "failed to get udc clock source\n");
1796 return PTR_ERR(udc_clock);
1797 }
1798
1799 clk_enable(udc_clock);
1800
1801 mdelay(10);
1802
1803 dev_dbg(dev, "got and enabled clocks\n");
1804
1805 if (strncmp(pdev->name, "s3c2440", 7) == 0) {
1806 dev_info(dev, "S3C2440: increasing FIFO to 128 bytes\n");
1807 memory.ep[1].fifo_size = S3C2440_EP_FIFO_SIZE;
1808 memory.ep[2].fifo_size = S3C2440_EP_FIFO_SIZE;
1809 memory.ep[3].fifo_size = S3C2440_EP_FIFO_SIZE;
1810 memory.ep[4].fifo_size = S3C2440_EP_FIFO_SIZE;
1811 }
1812
1813 spin_lock_init(&udc->lock);
1814 udc_info = dev_get_platdata(&pdev->dev);
1815
1816 rsrc_start = S3C2410_PA_USBDEV;
1817 rsrc_len = S3C24XX_SZ_USBDEV;
1818
1819 if (!request_mem_region(rsrc_start, rsrc_len, gadget_name))
1820 return -EBUSY;
1821
1822 base_addr = ioremap(rsrc_start, rsrc_len);
1823 if (!base_addr) {
1824 retval = -ENOMEM;
1825 goto err_mem;
1826 }
1827
1828 the_controller = udc;
1829 platform_set_drvdata(pdev, udc);
1830
1831 s3c2410_udc_disable(udc);
1832 s3c2410_udc_reinit(udc);
1833
1834 /* irq setup after old hardware state is cleaned up */
1835 retval = request_irq(IRQ_USBD, s3c2410_udc_irq,
1836 0, gadget_name, udc);
1837
1838 if (retval != 0) {
1839 dev_err(dev, "cannot get irq %i, err %d\n", IRQ_USBD, retval);
1840 retval = -EBUSY;
1841 goto err_map;
1842 }
1843
1844 dev_dbg(dev, "got irq %i\n", IRQ_USBD);
1845
1846 if (udc_info && udc_info->vbus_pin > 0) {
1847 retval = gpio_request(udc_info->vbus_pin, "udc vbus");
1848 if (retval < 0) {
1849 dev_err(dev, "cannot claim vbus pin\n");
1850 goto err_int;
1851 }
1852
1853 irq = gpio_to_irq(udc_info->vbus_pin);
1854 if (irq < 0) {
1855 dev_err(dev, "no irq for gpio vbus pin\n");
1856 retval = irq;
1857 goto err_gpio_claim;
1858 }
1859
1860 retval = request_irq(irq, s3c2410_udc_vbus_irq,
1861 IRQF_TRIGGER_RISING
1862 | IRQF_TRIGGER_FALLING | IRQF_SHARED,
1863 gadget_name, udc);
1864
1865 if (retval != 0) {
1866 dev_err(dev, "can't get vbus irq %d, err %d\n",
1867 irq, retval);
1868 retval = -EBUSY;
1869 goto err_gpio_claim;
1870 }
1871
1872 dev_dbg(dev, "got irq %i\n", irq);
1873 } else {
1874 udc->vbus = 1;
1875 }
1876
1877 if (udc_info && !udc_info->udc_command &&
1878 gpio_is_valid(udc_info->pullup_pin)) {
1879
1880 retval = gpio_request_one(udc_info->pullup_pin,
1881 udc_info->vbus_pin_inverted ?
1882 GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW,
1883 "udc pullup");
1884 if (retval)
1885 goto err_vbus_irq;
1886 }
1887
1888 retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
1889 if (retval)
1890 goto err_add_udc;
1891
1892 if (s3c2410_udc_debugfs_root) {
1893 udc->regs_info = debugfs_create_file("registers", S_IRUGO,
1894 s3c2410_udc_debugfs_root,
1895 udc, &s3c2410_udc_debugfs_fops);
1896 if (!udc->regs_info)
1897 dev_warn(dev, "debugfs file creation failed\n");
1898 }
1899
1900 dev_dbg(dev, "probe ok\n");
1901
1902 return 0;
1903
1904 err_add_udc:
1905 if (udc_info && !udc_info->udc_command &&
1906 gpio_is_valid(udc_info->pullup_pin))
1907 gpio_free(udc_info->pullup_pin);
1908 err_vbus_irq:
1909 if (udc_info && udc_info->vbus_pin > 0)
1910 free_irq(gpio_to_irq(udc_info->vbus_pin), udc);
1911 err_gpio_claim:
1912 if (udc_info && udc_info->vbus_pin > 0)
1913 gpio_free(udc_info->vbus_pin);
1914 err_int:
1915 free_irq(IRQ_USBD, udc);
1916 err_map:
1917 iounmap(base_addr);
1918 err_mem:
1919 release_mem_region(rsrc_start, rsrc_len);
1920
1921 return retval;
1922 }
1923
1924 /*
1925 * s3c2410_udc_remove
1926 */
1927 static int s3c2410_udc_remove(struct platform_device *pdev)
1928 {
1929 struct s3c2410_udc *udc = platform_get_drvdata(pdev);
1930 unsigned int irq;
1931
1932 dev_dbg(&pdev->dev, "%s()\n", __func__);
1933
1934 if (udc->driver)
1935 return -EBUSY;
1936
1937 usb_del_gadget_udc(&udc->gadget);
1938 debugfs_remove(udc->regs_info);
1939
1940 if (udc_info && !udc_info->udc_command &&
1941 gpio_is_valid(udc_info->pullup_pin))
1942 gpio_free(udc_info->pullup_pin);
1943
1944 if (udc_info && udc_info->vbus_pin > 0) {
1945 irq = gpio_to_irq(udc_info->vbus_pin);
1946 free_irq(irq, udc);
1947 }
1948
1949 free_irq(IRQ_USBD, udc);
1950
1951 iounmap(base_addr);
1952 release_mem_region(rsrc_start, rsrc_len);
1953
1954 if (!IS_ERR(udc_clock) && udc_clock != NULL) {
1955 clk_disable(udc_clock);
1956 clk_put(udc_clock);
1957 udc_clock = NULL;
1958 }
1959
1960 if (!IS_ERR(usb_bus_clock) && usb_bus_clock != NULL) {
1961 clk_disable(usb_bus_clock);
1962 clk_put(usb_bus_clock);
1963 usb_bus_clock = NULL;
1964 }
1965
1966 dev_dbg(&pdev->dev, "%s: remove ok\n", __func__);
1967 return 0;
1968 }
1969
1970 #ifdef CONFIG_PM
1971 static int
1972 s3c2410_udc_suspend(struct platform_device *pdev, pm_message_t message)
1973 {
1974 s3c2410_udc_command(S3C2410_UDC_P_DISABLE);
1975
1976 return 0;
1977 }
1978
1979 static int s3c2410_udc_resume(struct platform_device *pdev)
1980 {
1981 s3c2410_udc_command(S3C2410_UDC_P_ENABLE);
1982
1983 return 0;
1984 }
1985 #else
1986 #define s3c2410_udc_suspend NULL
1987 #define s3c2410_udc_resume NULL
1988 #endif
1989
1990 static const struct platform_device_id s3c_udc_ids[] = {
1991 { "s3c2410-usbgadget", },
1992 { "s3c2440-usbgadget", },
1993 { }
1994 };
1995 MODULE_DEVICE_TABLE(platform, s3c_udc_ids);
1996
1997 static struct platform_driver udc_driver_24x0 = {
1998 .driver = {
1999 .name = "s3c24x0-usbgadget",
2000 .owner = THIS_MODULE,
2001 },
2002 .probe = s3c2410_udc_probe,
2003 .remove = s3c2410_udc_remove,
2004 .suspend = s3c2410_udc_suspend,
2005 .resume = s3c2410_udc_resume,
2006 .id_table = s3c_udc_ids,
2007 };
2008
2009 static int __init udc_init(void)
2010 {
2011 int retval;
2012
2013 dprintk(DEBUG_NORMAL, "%s: version %s\n", gadget_name, DRIVER_VERSION);
2014
2015 s3c2410_udc_debugfs_root = debugfs_create_dir(gadget_name, NULL);
2016 if (IS_ERR(s3c2410_udc_debugfs_root)) {
2017 pr_err("%s: debugfs dir creation failed %ld\n",
2018 gadget_name, PTR_ERR(s3c2410_udc_debugfs_root));
2019 s3c2410_udc_debugfs_root = NULL;
2020 }
2021
2022 retval = platform_driver_register(&udc_driver_24x0);
2023 if (retval)
2024 goto err;
2025
2026 return 0;
2027
2028 err:
2029 debugfs_remove(s3c2410_udc_debugfs_root);
2030 return retval;
2031 }
2032
2033 static void __exit udc_exit(void)
2034 {
2035 platform_driver_unregister(&udc_driver_24x0);
2036 debugfs_remove(s3c2410_udc_debugfs_root);
2037 }
2038
2039 module_init(udc_init);
2040 module_exit(udc_exit);
2041
2042 MODULE_AUTHOR(DRIVER_AUTHOR);
2043 MODULE_DESCRIPTION(DRIVER_DESC);
2044 MODULE_VERSION(DRIVER_VERSION);
2045 MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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