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Merge branch 'for-linus-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/mason...
[deliverable/linux.git] / drivers / usb / gadget / udc / pxa25x_udc.c
1 /*
2 * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
3 *
4 * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
5 * Copyright (C) 2003 Robert Schwebel, Pengutronix
6 * Copyright (C) 2003 Benedikt Spranger, Pengutronix
7 * Copyright (C) 2003 David Brownell
8 * Copyright (C) 2003 Joshua Wise
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16 /* #define VERBOSE_DEBUG */
17
18 #include <linux/device.h>
19 #include <linux/gpio.h>
20 #include <linux/module.h>
21 #include <linux/kernel.h>
22 #include <linux/ioport.h>
23 #include <linux/types.h>
24 #include <linux/errno.h>
25 #include <linux/err.h>
26 #include <linux/delay.h>
27 #include <linux/slab.h>
28 #include <linux/timer.h>
29 #include <linux/list.h>
30 #include <linux/interrupt.h>
31 #include <linux/mm.h>
32 #include <linux/platform_data/pxa2xx_udc.h>
33 #include <linux/platform_device.h>
34 #include <linux/dma-mapping.h>
35 #include <linux/irq.h>
36 #include <linux/clk.h>
37 #include <linux/seq_file.h>
38 #include <linux/debugfs.h>
39 #include <linux/io.h>
40 #include <linux/prefetch.h>
41
42 #include <asm/byteorder.h>
43 #include <asm/dma.h>
44 #include <asm/mach-types.h>
45 #include <asm/unaligned.h>
46
47 #include <linux/usb/ch9.h>
48 #include <linux/usb/gadget.h>
49 #include <linux/usb/otg.h>
50
51 /*
52 * This driver is PXA25x only. Grab the right register definitions.
53 */
54 #ifdef CONFIG_ARCH_PXA
55 #include <mach/pxa25x-udc.h>
56 #include <mach/hardware.h>
57 #endif
58
59 #ifdef CONFIG_ARCH_LUBBOCK
60 #include <mach/lubbock.h>
61 #endif
62
63 /*
64 * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x
65 * series processors. The UDC for the IXP 4xx series is very similar.
66 * There are fifteen endpoints, in addition to ep0.
67 *
68 * Such controller drivers work with a gadget driver. The gadget driver
69 * returns descriptors, implements configuration and data protocols used
70 * by the host to interact with this device, and allocates endpoints to
71 * the different protocol interfaces. The controller driver virtualizes
72 * usb hardware so that the gadget drivers will be more portable.
73 *
74 * This UDC hardware wants to implement a bit too much USB protocol, so
75 * it constrains the sorts of USB configuration change events that work.
76 * The errata for these chips are misleading; some "fixed" bugs from
77 * pxa250 a0/a1 b0/b1/b2 sure act like they're still there.
78 *
79 * Note that the UDC hardware supports DMA (except on IXP) but that's
80 * not used here. IN-DMA (to host) is simple enough, when the data is
81 * suitably aligned (16 bytes) ... the network stack doesn't do that,
82 * other software can. OUT-DMA is buggy in most chip versions, as well
83 * as poorly designed (data toggle not automatic). So this driver won't
84 * bother using DMA. (Mostly-working IN-DMA support was available in
85 * kernels before 2.6.23, but was never enabled or well tested.)
86 */
87
88 #define DRIVER_VERSION "30-June-2007"
89 #define DRIVER_DESC "PXA 25x USB Device Controller driver"
90
91
92 static const char driver_name [] = "pxa25x_udc";
93
94 static const char ep0name [] = "ep0";
95
96
97 #ifdef CONFIG_ARCH_IXP4XX
98
99 /* cpu-specific register addresses are compiled in to this code */
100 #ifdef CONFIG_ARCH_PXA
101 #error "Can't configure both IXP and PXA"
102 #endif
103
104 /* IXP doesn't yet support <linux/clk.h> */
105 #define clk_get(dev,name) NULL
106 #define clk_enable(clk) do { } while (0)
107 #define clk_disable(clk) do { } while (0)
108 #define clk_put(clk) do { } while (0)
109
110 #endif
111
112 #include "pxa25x_udc.h"
113
114
115 #ifdef CONFIG_USB_PXA25X_SMALL
116 #define SIZE_STR " (small)"
117 #else
118 #define SIZE_STR ""
119 #endif
120
121 /* ---------------------------------------------------------------------------
122 * endpoint related parts of the api to the usb controller hardware,
123 * used by gadget driver; and the inner talker-to-hardware core.
124 * ---------------------------------------------------------------------------
125 */
126
127 static void pxa25x_ep_fifo_flush (struct usb_ep *ep);
128 static void nuke (struct pxa25x_ep *, int status);
129
130 /* one GPIO should control a D+ pullup, so host sees this device (or not) */
131 static void pullup_off(void)
132 {
133 struct pxa2xx_udc_mach_info *mach = the_controller->mach;
134 int off_level = mach->gpio_pullup_inverted;
135
136 if (gpio_is_valid(mach->gpio_pullup))
137 gpio_set_value(mach->gpio_pullup, off_level);
138 else if (mach->udc_command)
139 mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
140 }
141
142 static void pullup_on(void)
143 {
144 struct pxa2xx_udc_mach_info *mach = the_controller->mach;
145 int on_level = !mach->gpio_pullup_inverted;
146
147 if (gpio_is_valid(mach->gpio_pullup))
148 gpio_set_value(mach->gpio_pullup, on_level);
149 else if (mach->udc_command)
150 mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
151 }
152
153 static void pio_irq_enable(int bEndpointAddress)
154 {
155 bEndpointAddress &= 0xf;
156 if (bEndpointAddress < 8)
157 UICR0 &= ~(1 << bEndpointAddress);
158 else {
159 bEndpointAddress -= 8;
160 UICR1 &= ~(1 << bEndpointAddress);
161 }
162 }
163
164 static void pio_irq_disable(int bEndpointAddress)
165 {
166 bEndpointAddress &= 0xf;
167 if (bEndpointAddress < 8)
168 UICR0 |= 1 << bEndpointAddress;
169 else {
170 bEndpointAddress -= 8;
171 UICR1 |= 1 << bEndpointAddress;
172 }
173 }
174
175 /* The UDCCR reg contains mask and interrupt status bits,
176 * so using '|=' isn't safe as it may ack an interrupt.
177 */
178 #define UDCCR_MASK_BITS (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)
179
180 static inline void udc_set_mask_UDCCR(int mask)
181 {
182 UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS);
183 }
184
185 static inline void udc_clear_mask_UDCCR(int mask)
186 {
187 UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS);
188 }
189
190 static inline void udc_ack_int_UDCCR(int mask)
191 {
192 /* udccr contains the bits we dont want to change */
193 __u32 udccr = UDCCR & UDCCR_MASK_BITS;
194
195 UDCCR = udccr | (mask & ~UDCCR_MASK_BITS);
196 }
197
198 /*
199 * endpoint enable/disable
200 *
201 * we need to verify the descriptors used to enable endpoints. since pxa25x
202 * endpoint configurations are fixed, and are pretty much always enabled,
203 * there's not a lot to manage here.
204 *
205 * because pxa25x can't selectively initialize bulk (or interrupt) endpoints,
206 * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
207 * for a single interface (with only the default altsetting) and for gadget
208 * drivers that don't halt endpoints (not reset by set_interface). that also
209 * means that if you use ISO, you must violate the USB spec rule that all
210 * iso endpoints must be in non-default altsettings.
211 */
212 static int pxa25x_ep_enable (struct usb_ep *_ep,
213 const struct usb_endpoint_descriptor *desc)
214 {
215 struct pxa25x_ep *ep;
216 struct pxa25x_udc *dev;
217
218 ep = container_of (_ep, struct pxa25x_ep, ep);
219 if (!_ep || !desc || _ep->name == ep0name
220 || desc->bDescriptorType != USB_DT_ENDPOINT
221 || ep->bEndpointAddress != desc->bEndpointAddress
222 || ep->fifo_size < usb_endpoint_maxp (desc)) {
223 DMSG("%s, bad ep or descriptor\n", __func__);
224 return -EINVAL;
225 }
226
227 /* xfer types must match, except that interrupt ~= bulk */
228 if (ep->bmAttributes != desc->bmAttributes
229 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
230 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
231 DMSG("%s, %s type mismatch\n", __func__, _ep->name);
232 return -EINVAL;
233 }
234
235 /* hardware _could_ do smaller, but driver doesn't */
236 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
237 && usb_endpoint_maxp (desc)
238 != BULK_FIFO_SIZE)
239 || !desc->wMaxPacketSize) {
240 DMSG("%s, bad %s maxpacket\n", __func__, _ep->name);
241 return -ERANGE;
242 }
243
244 dev = ep->dev;
245 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
246 DMSG("%s, bogus device state\n", __func__);
247 return -ESHUTDOWN;
248 }
249
250 ep->ep.desc = desc;
251 ep->stopped = 0;
252 ep->pio_irqs = 0;
253 ep->ep.maxpacket = usb_endpoint_maxp (desc);
254
255 /* flush fifo (mostly for OUT buffers) */
256 pxa25x_ep_fifo_flush (_ep);
257
258 /* ... reset halt state too, if we could ... */
259
260 DBG(DBG_VERBOSE, "enabled %s\n", _ep->name);
261 return 0;
262 }
263
264 static int pxa25x_ep_disable (struct usb_ep *_ep)
265 {
266 struct pxa25x_ep *ep;
267 unsigned long flags;
268
269 ep = container_of (_ep, struct pxa25x_ep, ep);
270 if (!_ep || !ep->ep.desc) {
271 DMSG("%s, %s not enabled\n", __func__,
272 _ep ? ep->ep.name : NULL);
273 return -EINVAL;
274 }
275 local_irq_save(flags);
276
277 nuke (ep, -ESHUTDOWN);
278
279 /* flush fifo (mostly for IN buffers) */
280 pxa25x_ep_fifo_flush (_ep);
281
282 ep->ep.desc = NULL;
283 ep->stopped = 1;
284
285 local_irq_restore(flags);
286 DBG(DBG_VERBOSE, "%s disabled\n", _ep->name);
287 return 0;
288 }
289
290 /*-------------------------------------------------------------------------*/
291
292 /* for the pxa25x, these can just wrap kmalloc/kfree. gadget drivers
293 * must still pass correctly initialized endpoints, since other controller
294 * drivers may care about how it's currently set up (dma issues etc).
295 */
296
297 /*
298 * pxa25x_ep_alloc_request - allocate a request data structure
299 */
300 static struct usb_request *
301 pxa25x_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
302 {
303 struct pxa25x_request *req;
304
305 req = kzalloc(sizeof(*req), gfp_flags);
306 if (!req)
307 return NULL;
308
309 INIT_LIST_HEAD (&req->queue);
310 return &req->req;
311 }
312
313
314 /*
315 * pxa25x_ep_free_request - deallocate a request data structure
316 */
317 static void
318 pxa25x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
319 {
320 struct pxa25x_request *req;
321
322 req = container_of (_req, struct pxa25x_request, req);
323 WARN_ON(!list_empty (&req->queue));
324 kfree(req);
325 }
326
327 /*-------------------------------------------------------------------------*/
328
329 /*
330 * done - retire a request; caller blocked irqs
331 */
332 static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status)
333 {
334 unsigned stopped = ep->stopped;
335
336 list_del_init(&req->queue);
337
338 if (likely (req->req.status == -EINPROGRESS))
339 req->req.status = status;
340 else
341 status = req->req.status;
342
343 if (status && status != -ESHUTDOWN)
344 DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n",
345 ep->ep.name, &req->req, status,
346 req->req.actual, req->req.length);
347
348 /* don't modify queue heads during completion callback */
349 ep->stopped = 1;
350 usb_gadget_giveback_request(&ep->ep, &req->req);
351 ep->stopped = stopped;
352 }
353
354
355 static inline void ep0_idle (struct pxa25x_udc *dev)
356 {
357 dev->ep0state = EP0_IDLE;
358 }
359
360 static int
361 write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max)
362 {
363 u8 *buf;
364 unsigned length, count;
365
366 buf = req->req.buf + req->req.actual;
367 prefetch(buf);
368
369 /* how big will this packet be? */
370 length = min(req->req.length - req->req.actual, max);
371 req->req.actual += length;
372
373 count = length;
374 while (likely(count--))
375 *uddr = *buf++;
376
377 return length;
378 }
379
380 /*
381 * write to an IN endpoint fifo, as many packets as possible.
382 * irqs will use this to write the rest later.
383 * caller guarantees at least one packet buffer is ready (or a zlp).
384 */
385 static int
386 write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
387 {
388 unsigned max;
389
390 max = usb_endpoint_maxp(ep->ep.desc);
391 do {
392 unsigned count;
393 int is_last, is_short;
394
395 count = write_packet(ep->reg_uddr, req, max);
396
397 /* last packet is usually short (or a zlp) */
398 if (unlikely (count != max))
399 is_last = is_short = 1;
400 else {
401 if (likely(req->req.length != req->req.actual)
402 || req->req.zero)
403 is_last = 0;
404 else
405 is_last = 1;
406 /* interrupt/iso maxpacket may not fill the fifo */
407 is_short = unlikely (max < ep->fifo_size);
408 }
409
410 DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n",
411 ep->ep.name, count,
412 is_last ? "/L" : "", is_short ? "/S" : "",
413 req->req.length - req->req.actual, req);
414
415 /* let loose that packet. maybe try writing another one,
416 * double buffering might work. TSP, TPC, and TFS
417 * bit values are the same for all normal IN endpoints.
418 */
419 *ep->reg_udccs = UDCCS_BI_TPC;
420 if (is_short)
421 *ep->reg_udccs = UDCCS_BI_TSP;
422
423 /* requests complete when all IN data is in the FIFO */
424 if (is_last) {
425 done (ep, req, 0);
426 if (list_empty(&ep->queue))
427 pio_irq_disable (ep->bEndpointAddress);
428 return 1;
429 }
430
431 // TODO experiment: how robust can fifo mode tweaking be?
432 // double buffering is off in the default fifo mode, which
433 // prevents TFS from being set here.
434
435 } while (*ep->reg_udccs & UDCCS_BI_TFS);
436 return 0;
437 }
438
439 /* caller asserts req->pending (ep0 irq status nyet cleared); starts
440 * ep0 data stage. these chips want very simple state transitions.
441 */
442 static inline
443 void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag)
444 {
445 UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR;
446 USIR0 = USIR0_IR0;
447 dev->req_pending = 0;
448 DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n",
449 __func__, tag, UDCCS0, flags);
450 }
451
452 static int
453 write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
454 {
455 unsigned count;
456 int is_short;
457
458 count = write_packet(&UDDR0, req, EP0_FIFO_SIZE);
459 ep->dev->stats.write.bytes += count;
460
461 /* last packet "must be" short (or a zlp) */
462 is_short = (count != EP0_FIFO_SIZE);
463
464 DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count,
465 req->req.length - req->req.actual, req);
466
467 if (unlikely (is_short)) {
468 if (ep->dev->req_pending)
469 ep0start(ep->dev, UDCCS0_IPR, "short IN");
470 else
471 UDCCS0 = UDCCS0_IPR;
472
473 count = req->req.length;
474 done (ep, req, 0);
475 ep0_idle(ep->dev);
476 #ifndef CONFIG_ARCH_IXP4XX
477 #if 1
478 /* This seems to get rid of lost status irqs in some cases:
479 * host responds quickly, or next request involves config
480 * change automagic, or should have been hidden, or ...
481 *
482 * FIXME get rid of all udelays possible...
483 */
484 if (count >= EP0_FIFO_SIZE) {
485 count = 100;
486 do {
487 if ((UDCCS0 & UDCCS0_OPR) != 0) {
488 /* clear OPR, generate ack */
489 UDCCS0 = UDCCS0_OPR;
490 break;
491 }
492 count--;
493 udelay(1);
494 } while (count);
495 }
496 #endif
497 #endif
498 } else if (ep->dev->req_pending)
499 ep0start(ep->dev, 0, "IN");
500 return is_short;
501 }
502
503
504 /*
505 * read_fifo - unload packet(s) from the fifo we use for usb OUT
506 * transfers and put them into the request. caller should have made
507 * sure there's at least one packet ready.
508 *
509 * returns true if the request completed because of short packet or the
510 * request buffer having filled (and maybe overran till end-of-packet).
511 */
512 static int
513 read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
514 {
515 for (;;) {
516 u32 udccs;
517 u8 *buf;
518 unsigned bufferspace, count, is_short;
519
520 /* make sure there's a packet in the FIFO.
521 * UDCCS_{BO,IO}_RPC are all the same bit value.
522 * UDCCS_{BO,IO}_RNE are all the same bit value.
523 */
524 udccs = *ep->reg_udccs;
525 if (unlikely ((udccs & UDCCS_BO_RPC) == 0))
526 break;
527 buf = req->req.buf + req->req.actual;
528 prefetchw(buf);
529 bufferspace = req->req.length - req->req.actual;
530
531 /* read all bytes from this packet */
532 if (likely (udccs & UDCCS_BO_RNE)) {
533 count = 1 + (0x0ff & *ep->reg_ubcr);
534 req->req.actual += min (count, bufferspace);
535 } else /* zlp */
536 count = 0;
537 is_short = (count < ep->ep.maxpacket);
538 DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n",
539 ep->ep.name, udccs, count,
540 is_short ? "/S" : "",
541 req, req->req.actual, req->req.length);
542 while (likely (count-- != 0)) {
543 u8 byte = (u8) *ep->reg_uddr;
544
545 if (unlikely (bufferspace == 0)) {
546 /* this happens when the driver's buffer
547 * is smaller than what the host sent.
548 * discard the extra data.
549 */
550 if (req->req.status != -EOVERFLOW)
551 DMSG("%s overflow %d\n",
552 ep->ep.name, count);
553 req->req.status = -EOVERFLOW;
554 } else {
555 *buf++ = byte;
556 bufferspace--;
557 }
558 }
559 *ep->reg_udccs = UDCCS_BO_RPC;
560 /* RPC/RSP/RNE could now reflect the other packet buffer */
561
562 /* iso is one request per packet */
563 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
564 if (udccs & UDCCS_IO_ROF)
565 req->req.status = -EHOSTUNREACH;
566 /* more like "is_done" */
567 is_short = 1;
568 }
569
570 /* completion */
571 if (is_short || req->req.actual == req->req.length) {
572 done (ep, req, 0);
573 if (list_empty(&ep->queue))
574 pio_irq_disable (ep->bEndpointAddress);
575 return 1;
576 }
577
578 /* finished that packet. the next one may be waiting... */
579 }
580 return 0;
581 }
582
583 /*
584 * special ep0 version of the above. no UBCR0 or double buffering; status
585 * handshaking is magic. most device protocols don't need control-OUT.
586 * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other
587 * protocols do use them.
588 */
589 static int
590 read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req)
591 {
592 u8 *buf, byte;
593 unsigned bufferspace;
594
595 buf = req->req.buf + req->req.actual;
596 bufferspace = req->req.length - req->req.actual;
597
598 while (UDCCS0 & UDCCS0_RNE) {
599 byte = (u8) UDDR0;
600
601 if (unlikely (bufferspace == 0)) {
602 /* this happens when the driver's buffer
603 * is smaller than what the host sent.
604 * discard the extra data.
605 */
606 if (req->req.status != -EOVERFLOW)
607 DMSG("%s overflow\n", ep->ep.name);
608 req->req.status = -EOVERFLOW;
609 } else {
610 *buf++ = byte;
611 req->req.actual++;
612 bufferspace--;
613 }
614 }
615
616 UDCCS0 = UDCCS0_OPR | UDCCS0_IPR;
617
618 /* completion */
619 if (req->req.actual >= req->req.length)
620 return 1;
621
622 /* finished that packet. the next one may be waiting... */
623 return 0;
624 }
625
626 /*-------------------------------------------------------------------------*/
627
628 static int
629 pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
630 {
631 struct pxa25x_request *req;
632 struct pxa25x_ep *ep;
633 struct pxa25x_udc *dev;
634 unsigned long flags;
635
636 req = container_of(_req, struct pxa25x_request, req);
637 if (unlikely (!_req || !_req->complete || !_req->buf
638 || !list_empty(&req->queue))) {
639 DMSG("%s, bad params\n", __func__);
640 return -EINVAL;
641 }
642
643 ep = container_of(_ep, struct pxa25x_ep, ep);
644 if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) {
645 DMSG("%s, bad ep\n", __func__);
646 return -EINVAL;
647 }
648
649 dev = ep->dev;
650 if (unlikely (!dev->driver
651 || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
652 DMSG("%s, bogus device state\n", __func__);
653 return -ESHUTDOWN;
654 }
655
656 /* iso is always one packet per request, that's the only way
657 * we can report per-packet status. that also helps with dma.
658 */
659 if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
660 && req->req.length > usb_endpoint_maxp(ep->ep.desc)))
661 return -EMSGSIZE;
662
663 DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n",
664 _ep->name, _req, _req->length, _req->buf);
665
666 local_irq_save(flags);
667
668 _req->status = -EINPROGRESS;
669 _req->actual = 0;
670
671 /* kickstart this i/o queue? */
672 if (list_empty(&ep->queue) && !ep->stopped) {
673 if (ep->ep.desc == NULL/* ep0 */) {
674 unsigned length = _req->length;
675
676 switch (dev->ep0state) {
677 case EP0_IN_DATA_PHASE:
678 dev->stats.write.ops++;
679 if (write_ep0_fifo(ep, req))
680 req = NULL;
681 break;
682
683 case EP0_OUT_DATA_PHASE:
684 dev->stats.read.ops++;
685 /* messy ... */
686 if (dev->req_config) {
687 DBG(DBG_VERBOSE, "ep0 config ack%s\n",
688 dev->has_cfr ? "" : " raced");
689 if (dev->has_cfr)
690 UDCCFR = UDCCFR_AREN|UDCCFR_ACM
691 |UDCCFR_MB1;
692 done(ep, req, 0);
693 dev->ep0state = EP0_END_XFER;
694 local_irq_restore (flags);
695 return 0;
696 }
697 if (dev->req_pending)
698 ep0start(dev, UDCCS0_IPR, "OUT");
699 if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0
700 && read_ep0_fifo(ep, req))) {
701 ep0_idle(dev);
702 done(ep, req, 0);
703 req = NULL;
704 }
705 break;
706
707 default:
708 DMSG("ep0 i/o, odd state %d\n", dev->ep0state);
709 local_irq_restore (flags);
710 return -EL2HLT;
711 }
712 /* can the FIFO can satisfy the request immediately? */
713 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
714 if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0
715 && write_fifo(ep, req))
716 req = NULL;
717 } else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0
718 && read_fifo(ep, req)) {
719 req = NULL;
720 }
721
722 if (likely(req && ep->ep.desc))
723 pio_irq_enable(ep->bEndpointAddress);
724 }
725
726 /* pio or dma irq handler advances the queue. */
727 if (likely(req != NULL))
728 list_add_tail(&req->queue, &ep->queue);
729 local_irq_restore(flags);
730
731 return 0;
732 }
733
734
735 /*
736 * nuke - dequeue ALL requests
737 */
738 static void nuke(struct pxa25x_ep *ep, int status)
739 {
740 struct pxa25x_request *req;
741
742 /* called with irqs blocked */
743 while (!list_empty(&ep->queue)) {
744 req = list_entry(ep->queue.next,
745 struct pxa25x_request,
746 queue);
747 done(ep, req, status);
748 }
749 if (ep->ep.desc)
750 pio_irq_disable (ep->bEndpointAddress);
751 }
752
753
754 /* dequeue JUST ONE request */
755 static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
756 {
757 struct pxa25x_ep *ep;
758 struct pxa25x_request *req;
759 unsigned long flags;
760
761 ep = container_of(_ep, struct pxa25x_ep, ep);
762 if (!_ep || ep->ep.name == ep0name)
763 return -EINVAL;
764
765 local_irq_save(flags);
766
767 /* make sure it's actually queued on this endpoint */
768 list_for_each_entry (req, &ep->queue, queue) {
769 if (&req->req == _req)
770 break;
771 }
772 if (&req->req != _req) {
773 local_irq_restore(flags);
774 return -EINVAL;
775 }
776
777 done(ep, req, -ECONNRESET);
778
779 local_irq_restore(flags);
780 return 0;
781 }
782
783 /*-------------------------------------------------------------------------*/
784
785 static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value)
786 {
787 struct pxa25x_ep *ep;
788 unsigned long flags;
789
790 ep = container_of(_ep, struct pxa25x_ep, ep);
791 if (unlikely (!_ep
792 || (!ep->ep.desc && ep->ep.name != ep0name))
793 || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
794 DMSG("%s, bad ep\n", __func__);
795 return -EINVAL;
796 }
797 if (value == 0) {
798 /* this path (reset toggle+halt) is needed to implement
799 * SET_INTERFACE on normal hardware. but it can't be
800 * done from software on the PXA UDC, and the hardware
801 * forgets to do it as part of SET_INTERFACE automagic.
802 */
803 DMSG("only host can clear %s halt\n", _ep->name);
804 return -EROFS;
805 }
806
807 local_irq_save(flags);
808
809 if ((ep->bEndpointAddress & USB_DIR_IN) != 0
810 && ((*ep->reg_udccs & UDCCS_BI_TFS) == 0
811 || !list_empty(&ep->queue))) {
812 local_irq_restore(flags);
813 return -EAGAIN;
814 }
815
816 /* FST bit is the same for control, bulk in, bulk out, interrupt in */
817 *ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF;
818
819 /* ep0 needs special care */
820 if (!ep->ep.desc) {
821 start_watchdog(ep->dev);
822 ep->dev->req_pending = 0;
823 ep->dev->ep0state = EP0_STALL;
824
825 /* and bulk/intr endpoints like dropping stalls too */
826 } else {
827 unsigned i;
828 for (i = 0; i < 1000; i += 20) {
829 if (*ep->reg_udccs & UDCCS_BI_SST)
830 break;
831 udelay(20);
832 }
833 }
834 local_irq_restore(flags);
835
836 DBG(DBG_VERBOSE, "%s halt\n", _ep->name);
837 return 0;
838 }
839
840 static int pxa25x_ep_fifo_status(struct usb_ep *_ep)
841 {
842 struct pxa25x_ep *ep;
843
844 ep = container_of(_ep, struct pxa25x_ep, ep);
845 if (!_ep) {
846 DMSG("%s, bad ep\n", __func__);
847 return -ENODEV;
848 }
849 /* pxa can't report unclaimed bytes from IN fifos */
850 if ((ep->bEndpointAddress & USB_DIR_IN) != 0)
851 return -EOPNOTSUPP;
852 if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN
853 || (*ep->reg_udccs & UDCCS_BO_RFS) == 0)
854 return 0;
855 else
856 return (*ep->reg_ubcr & 0xfff) + 1;
857 }
858
859 static void pxa25x_ep_fifo_flush(struct usb_ep *_ep)
860 {
861 struct pxa25x_ep *ep;
862
863 ep = container_of(_ep, struct pxa25x_ep, ep);
864 if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) {
865 DMSG("%s, bad ep\n", __func__);
866 return;
867 }
868
869 /* toggle and halt bits stay unchanged */
870
871 /* for OUT, just read and discard the FIFO contents. */
872 if ((ep->bEndpointAddress & USB_DIR_IN) == 0) {
873 while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0)
874 (void) *ep->reg_uddr;
875 return;
876 }
877
878 /* most IN status is the same, but ISO can't stall */
879 *ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR
880 | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
881 ? 0 : UDCCS_BI_SST);
882 }
883
884
885 static struct usb_ep_ops pxa25x_ep_ops = {
886 .enable = pxa25x_ep_enable,
887 .disable = pxa25x_ep_disable,
888
889 .alloc_request = pxa25x_ep_alloc_request,
890 .free_request = pxa25x_ep_free_request,
891
892 .queue = pxa25x_ep_queue,
893 .dequeue = pxa25x_ep_dequeue,
894
895 .set_halt = pxa25x_ep_set_halt,
896 .fifo_status = pxa25x_ep_fifo_status,
897 .fifo_flush = pxa25x_ep_fifo_flush,
898 };
899
900
901 /* ---------------------------------------------------------------------------
902 * device-scoped parts of the api to the usb controller hardware
903 * ---------------------------------------------------------------------------
904 */
905
906 static int pxa25x_udc_get_frame(struct usb_gadget *_gadget)
907 {
908 return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff);
909 }
910
911 static int pxa25x_udc_wakeup(struct usb_gadget *_gadget)
912 {
913 /* host may not have enabled remote wakeup */
914 if ((UDCCS0 & UDCCS0_DRWF) == 0)
915 return -EHOSTUNREACH;
916 udc_set_mask_UDCCR(UDCCR_RSM);
917 return 0;
918 }
919
920 static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *);
921 static void udc_enable (struct pxa25x_udc *);
922 static void udc_disable(struct pxa25x_udc *);
923
924 /* We disable the UDC -- and its 48 MHz clock -- whenever it's not
925 * in active use.
926 */
927 static int pullup(struct pxa25x_udc *udc)
928 {
929 int is_active = udc->vbus && udc->pullup && !udc->suspended;
930 DMSG("%s\n", is_active ? "active" : "inactive");
931 if (is_active) {
932 if (!udc->active) {
933 udc->active = 1;
934 /* Enable clock for USB device */
935 clk_enable(udc->clk);
936 udc_enable(udc);
937 }
938 } else {
939 if (udc->active) {
940 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
941 DMSG("disconnect %s\n", udc->driver
942 ? udc->driver->driver.name
943 : "(no driver)");
944 stop_activity(udc, udc->driver);
945 }
946 udc_disable(udc);
947 /* Disable clock for USB device */
948 clk_disable(udc->clk);
949 udc->active = 0;
950 }
951
952 }
953 return 0;
954 }
955
956 /* VBUS reporting logically comes from a transceiver */
957 static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
958 {
959 struct pxa25x_udc *udc;
960
961 udc = container_of(_gadget, struct pxa25x_udc, gadget);
962 udc->vbus = is_active;
963 DMSG("vbus %s\n", is_active ? "supplied" : "inactive");
964 pullup(udc);
965 return 0;
966 }
967
968 /* drivers may have software control over D+ pullup */
969 static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active)
970 {
971 struct pxa25x_udc *udc;
972
973 udc = container_of(_gadget, struct pxa25x_udc, gadget);
974
975 /* not all boards support pullup control */
976 if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
977 return -EOPNOTSUPP;
978
979 udc->pullup = (is_active != 0);
980 pullup(udc);
981 return 0;
982 }
983
984 /* boards may consume current from VBUS, up to 100-500mA based on config.
985 * the 500uA suspend ceiling means that exclusively vbus-powered PXA designs
986 * violate USB specs.
987 */
988 static int pxa25x_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
989 {
990 struct pxa25x_udc *udc;
991
992 udc = container_of(_gadget, struct pxa25x_udc, gadget);
993
994 if (!IS_ERR_OR_NULL(udc->transceiver))
995 return usb_phy_set_power(udc->transceiver, mA);
996 return -EOPNOTSUPP;
997 }
998
999 static int pxa25x_udc_start(struct usb_gadget *g,
1000 struct usb_gadget_driver *driver);
1001 static int pxa25x_udc_stop(struct usb_gadget *g);
1002
1003 static const struct usb_gadget_ops pxa25x_udc_ops = {
1004 .get_frame = pxa25x_udc_get_frame,
1005 .wakeup = pxa25x_udc_wakeup,
1006 .vbus_session = pxa25x_udc_vbus_session,
1007 .pullup = pxa25x_udc_pullup,
1008 .vbus_draw = pxa25x_udc_vbus_draw,
1009 .udc_start = pxa25x_udc_start,
1010 .udc_stop = pxa25x_udc_stop,
1011 };
1012
1013 /*-------------------------------------------------------------------------*/
1014
1015 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1016
1017 static int
1018 udc_seq_show(struct seq_file *m, void *_d)
1019 {
1020 struct pxa25x_udc *dev = m->private;
1021 unsigned long flags;
1022 int i;
1023 u32 tmp;
1024
1025 local_irq_save(flags);
1026
1027 /* basic device status */
1028 seq_printf(m, DRIVER_DESC "\n"
1029 "%s version: %s\nGadget driver: %s\nHost %s\n\n",
1030 driver_name, DRIVER_VERSION SIZE_STR "(pio)",
1031 dev->driver ? dev->driver->driver.name : "(none)",
1032 dev->gadget.speed == USB_SPEED_FULL ? "full speed" : "disconnected");
1033
1034 /* registers for device and ep0 */
1035 seq_printf(m,
1036 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
1037 UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
1038
1039 tmp = UDCCR;
1040 seq_printf(m,
1041 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp,
1042 (tmp & UDCCR_REM) ? " rem" : "",
1043 (tmp & UDCCR_RSTIR) ? " rstir" : "",
1044 (tmp & UDCCR_SRM) ? " srm" : "",
1045 (tmp & UDCCR_SUSIR) ? " susir" : "",
1046 (tmp & UDCCR_RESIR) ? " resir" : "",
1047 (tmp & UDCCR_RSM) ? " rsm" : "",
1048 (tmp & UDCCR_UDA) ? " uda" : "",
1049 (tmp & UDCCR_UDE) ? " ude" : "");
1050
1051 tmp = UDCCS0;
1052 seq_printf(m,
1053 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp,
1054 (tmp & UDCCS0_SA) ? " sa" : "",
1055 (tmp & UDCCS0_RNE) ? " rne" : "",
1056 (tmp & UDCCS0_FST) ? " fst" : "",
1057 (tmp & UDCCS0_SST) ? " sst" : "",
1058 (tmp & UDCCS0_DRWF) ? " dwrf" : "",
1059 (tmp & UDCCS0_FTF) ? " ftf" : "",
1060 (tmp & UDCCS0_IPR) ? " ipr" : "",
1061 (tmp & UDCCS0_OPR) ? " opr" : "");
1062
1063 if (dev->has_cfr) {
1064 tmp = UDCCFR;
1065 seq_printf(m,
1066 "udccfr %02X =%s%s\n", tmp,
1067 (tmp & UDCCFR_AREN) ? " aren" : "",
1068 (tmp & UDCCFR_ACM) ? " acm" : "");
1069 }
1070
1071 if (dev->gadget.speed != USB_SPEED_FULL || !dev->driver)
1072 goto done;
1073
1074 seq_printf(m, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",
1075 dev->stats.write.bytes, dev->stats.write.ops,
1076 dev->stats.read.bytes, dev->stats.read.ops,
1077 dev->stats.irqs);
1078
1079 /* dump endpoint queues */
1080 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1081 struct pxa25x_ep *ep = &dev->ep [i];
1082 struct pxa25x_request *req;
1083
1084 if (i != 0) {
1085 const struct usb_endpoint_descriptor *desc;
1086
1087 desc = ep->ep.desc;
1088 if (!desc)
1089 continue;
1090 tmp = *dev->ep [i].reg_udccs;
1091 seq_printf(m,
1092 "%s max %d %s udccs %02x irqs %lu\n",
1093 ep->ep.name, usb_endpoint_maxp(desc),
1094 "pio", tmp, ep->pio_irqs);
1095 /* TODO translate all five groups of udccs bits! */
1096
1097 } else /* ep0 should only have one transfer queued */
1098 seq_printf(m, "ep0 max 16 pio irqs %lu\n",
1099 ep->pio_irqs);
1100
1101 if (list_empty(&ep->queue)) {
1102 seq_printf(m, "\t(nothing queued)\n");
1103 continue;
1104 }
1105 list_for_each_entry(req, &ep->queue, queue) {
1106 seq_printf(m,
1107 "\treq %p len %d/%d buf %p\n",
1108 &req->req, req->req.actual,
1109 req->req.length, req->req.buf);
1110 }
1111 }
1112
1113 done:
1114 local_irq_restore(flags);
1115 return 0;
1116 }
1117
1118 static int
1119 udc_debugfs_open(struct inode *inode, struct file *file)
1120 {
1121 return single_open(file, udc_seq_show, inode->i_private);
1122 }
1123
1124 static const struct file_operations debug_fops = {
1125 .open = udc_debugfs_open,
1126 .read = seq_read,
1127 .llseek = seq_lseek,
1128 .release = single_release,
1129 .owner = THIS_MODULE,
1130 };
1131
1132 #define create_debug_files(dev) \
1133 do { \
1134 dev->debugfs_udc = debugfs_create_file(dev->gadget.name, \
1135 S_IRUGO, NULL, dev, &debug_fops); \
1136 } while (0)
1137 #define remove_debug_files(dev) debugfs_remove(dev->debugfs_udc)
1138
1139 #else /* !CONFIG_USB_GADGET_DEBUG_FILES */
1140
1141 #define create_debug_files(dev) do {} while (0)
1142 #define remove_debug_files(dev) do {} while (0)
1143
1144 #endif /* CONFIG_USB_GADGET_DEBUG_FILES */
1145
1146 /*-------------------------------------------------------------------------*/
1147
1148 /*
1149 * udc_disable - disable USB device controller
1150 */
1151 static void udc_disable(struct pxa25x_udc *dev)
1152 {
1153 /* block all irqs */
1154 udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM);
1155 UICR0 = UICR1 = 0xff;
1156 UFNRH = UFNRH_SIM;
1157
1158 /* if hardware supports it, disconnect from usb */
1159 pullup_off();
1160
1161 udc_clear_mask_UDCCR(UDCCR_UDE);
1162
1163 ep0_idle (dev);
1164 dev->gadget.speed = USB_SPEED_UNKNOWN;
1165 }
1166
1167
1168 /*
1169 * udc_reinit - initialize software state
1170 */
1171 static void udc_reinit(struct pxa25x_udc *dev)
1172 {
1173 u32 i;
1174
1175 /* device/ep0 records init */
1176 INIT_LIST_HEAD (&dev->gadget.ep_list);
1177 INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1178 dev->ep0state = EP0_IDLE;
1179 dev->gadget.quirk_altset_not_supp = 1;
1180
1181 /* basic endpoint records init */
1182 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1183 struct pxa25x_ep *ep = &dev->ep[i];
1184
1185 if (i != 0)
1186 list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1187
1188 ep->ep.desc = NULL;
1189 ep->stopped = 0;
1190 INIT_LIST_HEAD (&ep->queue);
1191 ep->pio_irqs = 0;
1192 usb_ep_set_maxpacket_limit(&ep->ep, ep->ep.maxpacket);
1193 }
1194
1195 /* the rest was statically initialized, and is read-only */
1196 }
1197
1198 /* until it's enabled, this UDC should be completely invisible
1199 * to any USB host.
1200 */
1201 static void udc_enable (struct pxa25x_udc *dev)
1202 {
1203 udc_clear_mask_UDCCR(UDCCR_UDE);
1204
1205 /* try to clear these bits before we enable the udc */
1206 udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);
1207
1208 ep0_idle(dev);
1209 dev->gadget.speed = USB_SPEED_UNKNOWN;
1210 dev->stats.irqs = 0;
1211
1212 /*
1213 * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:
1214 * - enable UDC
1215 * - if RESET is already in progress, ack interrupt
1216 * - unmask reset interrupt
1217 */
1218 udc_set_mask_UDCCR(UDCCR_UDE);
1219 if (!(UDCCR & UDCCR_UDA))
1220 udc_ack_int_UDCCR(UDCCR_RSTIR);
1221
1222 if (dev->has_cfr /* UDC_RES2 is defined */) {
1223 /* pxa255 (a0+) can avoid a set_config race that could
1224 * prevent gadget drivers from configuring correctly
1225 */
1226 UDCCFR = UDCCFR_ACM | UDCCFR_MB1;
1227 } else {
1228 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)
1229 * which could result in missing packets and interrupts.
1230 * supposedly one bit per endpoint, controlling whether it
1231 * double buffers or not; ACM/AREN bits fit into the holes.
1232 * zero bits (like USIR0_IRx) disable double buffering.
1233 */
1234 UDC_RES1 = 0x00;
1235 UDC_RES2 = 0x00;
1236 }
1237
1238 /* enable suspend/resume and reset irqs */
1239 udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM);
1240
1241 /* enable ep0 irqs */
1242 UICR0 &= ~UICR0_IM0;
1243
1244 /* if hardware supports it, pullup D+ and wait for reset */
1245 pullup_on();
1246 }
1247
1248
1249 /* when a driver is successfully registered, it will receive
1250 * control requests including set_configuration(), which enables
1251 * non-control requests. then usb traffic follows until a
1252 * disconnect is reported. then a host may connect again, or
1253 * the driver might get unbound.
1254 */
1255 static int pxa25x_udc_start(struct usb_gadget *g,
1256 struct usb_gadget_driver *driver)
1257 {
1258 struct pxa25x_udc *dev = to_pxa25x(g);
1259 int retval;
1260
1261 /* first hook up the driver ... */
1262 dev->driver = driver;
1263 dev->pullup = 1;
1264
1265 /* ... then enable host detection and ep0; and we're ready
1266 * for set_configuration as well as eventual disconnect.
1267 */
1268 /* connect to bus through transceiver */
1269 if (!IS_ERR_OR_NULL(dev->transceiver)) {
1270 retval = otg_set_peripheral(dev->transceiver->otg,
1271 &dev->gadget);
1272 if (retval)
1273 goto bind_fail;
1274 }
1275
1276 dump_state(dev);
1277 return 0;
1278 bind_fail:
1279 return retval;
1280 }
1281
1282 static void
1283 reset_gadget(struct pxa25x_udc *dev, struct usb_gadget_driver *driver)
1284 {
1285 int i;
1286
1287 /* don't disconnect drivers more than once */
1288 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
1289 driver = NULL;
1290 dev->gadget.speed = USB_SPEED_UNKNOWN;
1291
1292 /* prevent new request submissions, kill any outstanding requests */
1293 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1294 struct pxa25x_ep *ep = &dev->ep[i];
1295
1296 ep->stopped = 1;
1297 nuke(ep, -ESHUTDOWN);
1298 }
1299 del_timer_sync(&dev->timer);
1300
1301 /* report reset; the driver is already quiesced */
1302 if (driver)
1303 usb_gadget_udc_reset(&dev->gadget, driver);
1304
1305 /* re-init driver-visible data structures */
1306 udc_reinit(dev);
1307 }
1308
1309 static void
1310 stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver)
1311 {
1312 int i;
1313
1314 /* don't disconnect drivers more than once */
1315 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
1316 driver = NULL;
1317 dev->gadget.speed = USB_SPEED_UNKNOWN;
1318
1319 /* prevent new request submissions, kill any outstanding requests */
1320 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1321 struct pxa25x_ep *ep = &dev->ep[i];
1322
1323 ep->stopped = 1;
1324 nuke(ep, -ESHUTDOWN);
1325 }
1326 del_timer_sync(&dev->timer);
1327
1328 /* report disconnect; the driver is already quiesced */
1329 if (driver)
1330 driver->disconnect(&dev->gadget);
1331
1332 /* re-init driver-visible data structures */
1333 udc_reinit(dev);
1334 }
1335
1336 static int pxa25x_udc_stop(struct usb_gadget*g)
1337 {
1338 struct pxa25x_udc *dev = to_pxa25x(g);
1339
1340 local_irq_disable();
1341 dev->pullup = 0;
1342 stop_activity(dev, NULL);
1343 local_irq_enable();
1344
1345 if (!IS_ERR_OR_NULL(dev->transceiver))
1346 (void) otg_set_peripheral(dev->transceiver->otg, NULL);
1347
1348 dev->driver = NULL;
1349
1350 dump_state(dev);
1351
1352 return 0;
1353 }
1354
1355 /*-------------------------------------------------------------------------*/
1356
1357 #ifdef CONFIG_ARCH_LUBBOCK
1358
1359 /* Lubbock has separate connect and disconnect irqs. More typical designs
1360 * use one GPIO as the VBUS IRQ, and another to control the D+ pullup.
1361 */
1362
1363 static irqreturn_t
1364 lubbock_vbus_irq(int irq, void *_dev)
1365 {
1366 struct pxa25x_udc *dev = _dev;
1367 int vbus;
1368
1369 dev->stats.irqs++;
1370 switch (irq) {
1371 case LUBBOCK_USB_IRQ:
1372 vbus = 1;
1373 disable_irq(LUBBOCK_USB_IRQ);
1374 enable_irq(LUBBOCK_USB_DISC_IRQ);
1375 break;
1376 case LUBBOCK_USB_DISC_IRQ:
1377 vbus = 0;
1378 disable_irq(LUBBOCK_USB_DISC_IRQ);
1379 enable_irq(LUBBOCK_USB_IRQ);
1380 break;
1381 default:
1382 return IRQ_NONE;
1383 }
1384
1385 pxa25x_udc_vbus_session(&dev->gadget, vbus);
1386 return IRQ_HANDLED;
1387 }
1388
1389 #endif
1390
1391
1392 /*-------------------------------------------------------------------------*/
1393
1394 static inline void clear_ep_state (struct pxa25x_udc *dev)
1395 {
1396 unsigned i;
1397
1398 /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
1399 * fifos, and pending transactions mustn't be continued in any case.
1400 */
1401 for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++)
1402 nuke(&dev->ep[i], -ECONNABORTED);
1403 }
1404
1405 static void udc_watchdog(unsigned long _dev)
1406 {
1407 struct pxa25x_udc *dev = (void *)_dev;
1408
1409 local_irq_disable();
1410 if (dev->ep0state == EP0_STALL
1411 && (UDCCS0 & UDCCS0_FST) == 0
1412 && (UDCCS0 & UDCCS0_SST) == 0) {
1413 UDCCS0 = UDCCS0_FST|UDCCS0_FTF;
1414 DBG(DBG_VERBOSE, "ep0 re-stall\n");
1415 start_watchdog(dev);
1416 }
1417 local_irq_enable();
1418 }
1419
1420 static void handle_ep0 (struct pxa25x_udc *dev)
1421 {
1422 u32 udccs0 = UDCCS0;
1423 struct pxa25x_ep *ep = &dev->ep [0];
1424 struct pxa25x_request *req;
1425 union {
1426 struct usb_ctrlrequest r;
1427 u8 raw [8];
1428 u32 word [2];
1429 } u;
1430
1431 if (list_empty(&ep->queue))
1432 req = NULL;
1433 else
1434 req = list_entry(ep->queue.next, struct pxa25x_request, queue);
1435
1436 /* clear stall status */
1437 if (udccs0 & UDCCS0_SST) {
1438 nuke(ep, -EPIPE);
1439 UDCCS0 = UDCCS0_SST;
1440 del_timer(&dev->timer);
1441 ep0_idle(dev);
1442 }
1443
1444 /* previous request unfinished? non-error iff back-to-back ... */
1445 if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) {
1446 nuke(ep, 0);
1447 del_timer(&dev->timer);
1448 ep0_idle(dev);
1449 }
1450
1451 switch (dev->ep0state) {
1452 case EP0_IDLE:
1453 /* late-breaking status? */
1454 udccs0 = UDCCS0;
1455
1456 /* start control request? */
1457 if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))
1458 == (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) {
1459 int i;
1460
1461 nuke (ep, -EPROTO);
1462
1463 /* read SETUP packet */
1464 for (i = 0; i < 8; i++) {
1465 if (unlikely(!(UDCCS0 & UDCCS0_RNE))) {
1466 bad_setup:
1467 DMSG("SETUP %d!\n", i);
1468 goto stall;
1469 }
1470 u.raw [i] = (u8) UDDR0;
1471 }
1472 if (unlikely((UDCCS0 & UDCCS0_RNE) != 0))
1473 goto bad_setup;
1474
1475 got_setup:
1476 DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1477 u.r.bRequestType, u.r.bRequest,
1478 le16_to_cpu(u.r.wValue),
1479 le16_to_cpu(u.r.wIndex),
1480 le16_to_cpu(u.r.wLength));
1481
1482 /* cope with automagic for some standard requests. */
1483 dev->req_std = (u.r.bRequestType & USB_TYPE_MASK)
1484 == USB_TYPE_STANDARD;
1485 dev->req_config = 0;
1486 dev->req_pending = 1;
1487 switch (u.r.bRequest) {
1488 /* hardware restricts gadget drivers here! */
1489 case USB_REQ_SET_CONFIGURATION:
1490 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1491 /* reflect hardware's automagic
1492 * up to the gadget driver.
1493 */
1494 config_change:
1495 dev->req_config = 1;
1496 clear_ep_state(dev);
1497 /* if !has_cfr, there's no synch
1498 * else use AREN (later) not SA|OPR
1499 * USIR0_IR0 acts edge sensitive
1500 */
1501 }
1502 break;
1503 /* ... and here, even more ... */
1504 case USB_REQ_SET_INTERFACE:
1505 if (u.r.bRequestType == USB_RECIP_INTERFACE) {
1506 /* udc hardware is broken by design:
1507 * - altsetting may only be zero;
1508 * - hw resets all interfaces' eps;
1509 * - ep reset doesn't include halt(?).
1510 */
1511 DMSG("broken set_interface (%d/%d)\n",
1512 le16_to_cpu(u.r.wIndex),
1513 le16_to_cpu(u.r.wValue));
1514 goto config_change;
1515 }
1516 break;
1517 /* hardware was supposed to hide this */
1518 case USB_REQ_SET_ADDRESS:
1519 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1520 ep0start(dev, 0, "address");
1521 return;
1522 }
1523 break;
1524 }
1525
1526 if (u.r.bRequestType & USB_DIR_IN)
1527 dev->ep0state = EP0_IN_DATA_PHASE;
1528 else
1529 dev->ep0state = EP0_OUT_DATA_PHASE;
1530
1531 i = dev->driver->setup(&dev->gadget, &u.r);
1532 if (i < 0) {
1533 /* hardware automagic preventing STALL... */
1534 if (dev->req_config) {
1535 /* hardware sometimes neglects to tell
1536 * tell us about config change events,
1537 * so later ones may fail...
1538 */
1539 WARNING("config change %02x fail %d?\n",
1540 u.r.bRequest, i);
1541 return;
1542 /* TODO experiment: if has_cfr,
1543 * hardware didn't ACK; maybe we
1544 * could actually STALL!
1545 */
1546 }
1547 DBG(DBG_VERBOSE, "protocol STALL, "
1548 "%02x err %d\n", UDCCS0, i);
1549 stall:
1550 /* the watchdog timer helps deal with cases
1551 * where udc seems to clear FST wrongly, and
1552 * then NAKs instead of STALLing.
1553 */
1554 ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall");
1555 start_watchdog(dev);
1556 dev->ep0state = EP0_STALL;
1557
1558 /* deferred i/o == no response yet */
1559 } else if (dev->req_pending) {
1560 if (likely(dev->ep0state == EP0_IN_DATA_PHASE
1561 || dev->req_std || u.r.wLength))
1562 ep0start(dev, 0, "defer");
1563 else
1564 ep0start(dev, UDCCS0_IPR, "defer/IPR");
1565 }
1566
1567 /* expect at least one data or status stage irq */
1568 return;
1569
1570 } else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA))
1571 == (UDCCS0_OPR|UDCCS0_SA))) {
1572 unsigned i;
1573
1574 /* pxa210/250 erratum 131 for B0/B1 says RNE lies.
1575 * still observed on a pxa255 a0.
1576 */
1577 DBG(DBG_VERBOSE, "e131\n");
1578 nuke(ep, -EPROTO);
1579
1580 /* read SETUP data, but don't trust it too much */
1581 for (i = 0; i < 8; i++)
1582 u.raw [i] = (u8) UDDR0;
1583 if ((u.r.bRequestType & USB_RECIP_MASK)
1584 > USB_RECIP_OTHER)
1585 goto stall;
1586 if (u.word [0] == 0 && u.word [1] == 0)
1587 goto stall;
1588 goto got_setup;
1589 } else {
1590 /* some random early IRQ:
1591 * - we acked FST
1592 * - IPR cleared
1593 * - OPR got set, without SA (likely status stage)
1594 */
1595 UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR);
1596 }
1597 break;
1598 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */
1599 if (udccs0 & UDCCS0_OPR) {
1600 UDCCS0 = UDCCS0_OPR|UDCCS0_FTF;
1601 DBG(DBG_VERBOSE, "ep0in premature status\n");
1602 if (req)
1603 done(ep, req, 0);
1604 ep0_idle(dev);
1605 } else /* irq was IPR clearing */ {
1606 if (req) {
1607 /* this IN packet might finish the request */
1608 (void) write_ep0_fifo(ep, req);
1609 } /* else IN token before response was written */
1610 }
1611 break;
1612 case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */
1613 if (udccs0 & UDCCS0_OPR) {
1614 if (req) {
1615 /* this OUT packet might finish the request */
1616 if (read_ep0_fifo(ep, req))
1617 done(ep, req, 0);
1618 /* else more OUT packets expected */
1619 } /* else OUT token before read was issued */
1620 } else /* irq was IPR clearing */ {
1621 DBG(DBG_VERBOSE, "ep0out premature status\n");
1622 if (req)
1623 done(ep, req, 0);
1624 ep0_idle(dev);
1625 }
1626 break;
1627 case EP0_END_XFER:
1628 if (req)
1629 done(ep, req, 0);
1630 /* ack control-IN status (maybe in-zlp was skipped)
1631 * also appears after some config change events.
1632 */
1633 if (udccs0 & UDCCS0_OPR)
1634 UDCCS0 = UDCCS0_OPR;
1635 ep0_idle(dev);
1636 break;
1637 case EP0_STALL:
1638 UDCCS0 = UDCCS0_FST;
1639 break;
1640 }
1641 USIR0 = USIR0_IR0;
1642 }
1643
1644 static void handle_ep(struct pxa25x_ep *ep)
1645 {
1646 struct pxa25x_request *req;
1647 int is_in = ep->bEndpointAddress & USB_DIR_IN;
1648 int completed;
1649 u32 udccs, tmp;
1650
1651 do {
1652 completed = 0;
1653 if (likely (!list_empty(&ep->queue)))
1654 req = list_entry(ep->queue.next,
1655 struct pxa25x_request, queue);
1656 else
1657 req = NULL;
1658
1659 // TODO check FST handling
1660
1661 udccs = *ep->reg_udccs;
1662 if (unlikely(is_in)) { /* irq from TPC, SST, or (ISO) TUR */
1663 tmp = UDCCS_BI_TUR;
1664 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1665 tmp |= UDCCS_BI_SST;
1666 tmp &= udccs;
1667 if (likely (tmp))
1668 *ep->reg_udccs = tmp;
1669 if (req && likely ((udccs & UDCCS_BI_TFS) != 0))
1670 completed = write_fifo(ep, req);
1671
1672 } else { /* irq from RPC (or for ISO, ROF) */
1673 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1674 tmp = UDCCS_BO_SST | UDCCS_BO_DME;
1675 else
1676 tmp = UDCCS_IO_ROF | UDCCS_IO_DME;
1677 tmp &= udccs;
1678 if (likely(tmp))
1679 *ep->reg_udccs = tmp;
1680
1681 /* fifos can hold packets, ready for reading... */
1682 if (likely(req)) {
1683 completed = read_fifo(ep, req);
1684 } else
1685 pio_irq_disable (ep->bEndpointAddress);
1686 }
1687 ep->pio_irqs++;
1688 } while (completed);
1689 }
1690
1691 /*
1692 * pxa25x_udc_irq - interrupt handler
1693 *
1694 * avoid delays in ep0 processing. the control handshaking isn't always
1695 * under software control (pxa250c0 and the pxa255 are better), and delays
1696 * could cause usb protocol errors.
1697 */
1698 static irqreturn_t
1699 pxa25x_udc_irq(int irq, void *_dev)
1700 {
1701 struct pxa25x_udc *dev = _dev;
1702 int handled;
1703
1704 dev->stats.irqs++;
1705 do {
1706 u32 udccr = UDCCR;
1707
1708 handled = 0;
1709
1710 /* SUSpend Interrupt Request */
1711 if (unlikely(udccr & UDCCR_SUSIR)) {
1712 udc_ack_int_UDCCR(UDCCR_SUSIR);
1713 handled = 1;
1714 DBG(DBG_VERBOSE, "USB suspend\n");
1715
1716 if (dev->gadget.speed != USB_SPEED_UNKNOWN
1717 && dev->driver
1718 && dev->driver->suspend)
1719 dev->driver->suspend(&dev->gadget);
1720 ep0_idle (dev);
1721 }
1722
1723 /* RESume Interrupt Request */
1724 if (unlikely(udccr & UDCCR_RESIR)) {
1725 udc_ack_int_UDCCR(UDCCR_RESIR);
1726 handled = 1;
1727 DBG(DBG_VERBOSE, "USB resume\n");
1728
1729 if (dev->gadget.speed != USB_SPEED_UNKNOWN
1730 && dev->driver
1731 && dev->driver->resume)
1732 dev->driver->resume(&dev->gadget);
1733 }
1734
1735 /* ReSeT Interrupt Request - USB reset */
1736 if (unlikely(udccr & UDCCR_RSTIR)) {
1737 udc_ack_int_UDCCR(UDCCR_RSTIR);
1738 handled = 1;
1739
1740 if ((UDCCR & UDCCR_UDA) == 0) {
1741 DBG(DBG_VERBOSE, "USB reset start\n");
1742
1743 /* reset driver and endpoints,
1744 * in case that's not yet done
1745 */
1746 reset_gadget(dev, dev->driver);
1747
1748 } else {
1749 DBG(DBG_VERBOSE, "USB reset end\n");
1750 dev->gadget.speed = USB_SPEED_FULL;
1751 memset(&dev->stats, 0, sizeof dev->stats);
1752 /* driver and endpoints are still reset */
1753 }
1754
1755 } else {
1756 u32 usir0 = USIR0 & ~UICR0;
1757 u32 usir1 = USIR1 & ~UICR1;
1758 int i;
1759
1760 if (unlikely (!usir0 && !usir1))
1761 continue;
1762
1763 DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0);
1764
1765 /* control traffic */
1766 if (usir0 & USIR0_IR0) {
1767 dev->ep[0].pio_irqs++;
1768 handle_ep0(dev);
1769 handled = 1;
1770 }
1771
1772 /* endpoint data transfers */
1773 for (i = 0; i < 8; i++) {
1774 u32 tmp = 1 << i;
1775
1776 if (i && (usir0 & tmp)) {
1777 handle_ep(&dev->ep[i]);
1778 USIR0 |= tmp;
1779 handled = 1;
1780 }
1781 #ifndef CONFIG_USB_PXA25X_SMALL
1782 if (usir1 & tmp) {
1783 handle_ep(&dev->ep[i+8]);
1784 USIR1 |= tmp;
1785 handled = 1;
1786 }
1787 #endif
1788 }
1789 }
1790
1791 /* we could also ask for 1 msec SOF (SIR) interrupts */
1792
1793 } while (handled);
1794 return IRQ_HANDLED;
1795 }
1796
1797 /*-------------------------------------------------------------------------*/
1798
1799 static void nop_release (struct device *dev)
1800 {
1801 DMSG("%s %s\n", __func__, dev_name(dev));
1802 }
1803
1804 /* this uses load-time allocation and initialization (instead of
1805 * doing it at run-time) to save code, eliminate fault paths, and
1806 * be more obviously correct.
1807 */
1808 static struct pxa25x_udc memory = {
1809 .gadget = {
1810 .ops = &pxa25x_udc_ops,
1811 .ep0 = &memory.ep[0].ep,
1812 .name = driver_name,
1813 .dev = {
1814 .init_name = "gadget",
1815 .release = nop_release,
1816 },
1817 },
1818
1819 /* control endpoint */
1820 .ep[0] = {
1821 .ep = {
1822 .name = ep0name,
1823 .ops = &pxa25x_ep_ops,
1824 .maxpacket = EP0_FIFO_SIZE,
1825 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL,
1826 USB_EP_CAPS_DIR_ALL),
1827 },
1828 .dev = &memory,
1829 .reg_udccs = &UDCCS0,
1830 .reg_uddr = &UDDR0,
1831 },
1832
1833 /* first group of endpoints */
1834 .ep[1] = {
1835 .ep = {
1836 .name = "ep1in-bulk",
1837 .ops = &pxa25x_ep_ops,
1838 .maxpacket = BULK_FIFO_SIZE,
1839 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1840 USB_EP_CAPS_DIR_IN),
1841 },
1842 .dev = &memory,
1843 .fifo_size = BULK_FIFO_SIZE,
1844 .bEndpointAddress = USB_DIR_IN | 1,
1845 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1846 .reg_udccs = &UDCCS1,
1847 .reg_uddr = &UDDR1,
1848 },
1849 .ep[2] = {
1850 .ep = {
1851 .name = "ep2out-bulk",
1852 .ops = &pxa25x_ep_ops,
1853 .maxpacket = BULK_FIFO_SIZE,
1854 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1855 USB_EP_CAPS_DIR_OUT),
1856 },
1857 .dev = &memory,
1858 .fifo_size = BULK_FIFO_SIZE,
1859 .bEndpointAddress = 2,
1860 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1861 .reg_udccs = &UDCCS2,
1862 .reg_ubcr = &UBCR2,
1863 .reg_uddr = &UDDR2,
1864 },
1865 #ifndef CONFIG_USB_PXA25X_SMALL
1866 .ep[3] = {
1867 .ep = {
1868 .name = "ep3in-iso",
1869 .ops = &pxa25x_ep_ops,
1870 .maxpacket = ISO_FIFO_SIZE,
1871 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO,
1872 USB_EP_CAPS_DIR_IN),
1873 },
1874 .dev = &memory,
1875 .fifo_size = ISO_FIFO_SIZE,
1876 .bEndpointAddress = USB_DIR_IN | 3,
1877 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1878 .reg_udccs = &UDCCS3,
1879 .reg_uddr = &UDDR3,
1880 },
1881 .ep[4] = {
1882 .ep = {
1883 .name = "ep4out-iso",
1884 .ops = &pxa25x_ep_ops,
1885 .maxpacket = ISO_FIFO_SIZE,
1886 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO,
1887 USB_EP_CAPS_DIR_OUT),
1888 },
1889 .dev = &memory,
1890 .fifo_size = ISO_FIFO_SIZE,
1891 .bEndpointAddress = 4,
1892 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1893 .reg_udccs = &UDCCS4,
1894 .reg_ubcr = &UBCR4,
1895 .reg_uddr = &UDDR4,
1896 },
1897 .ep[5] = {
1898 .ep = {
1899 .name = "ep5in-int",
1900 .ops = &pxa25x_ep_ops,
1901 .maxpacket = INT_FIFO_SIZE,
1902 .caps = USB_EP_CAPS(0, 0),
1903 },
1904 .dev = &memory,
1905 .fifo_size = INT_FIFO_SIZE,
1906 .bEndpointAddress = USB_DIR_IN | 5,
1907 .bmAttributes = USB_ENDPOINT_XFER_INT,
1908 .reg_udccs = &UDCCS5,
1909 .reg_uddr = &UDDR5,
1910 },
1911
1912 /* second group of endpoints */
1913 .ep[6] = {
1914 .ep = {
1915 .name = "ep6in-bulk",
1916 .ops = &pxa25x_ep_ops,
1917 .maxpacket = BULK_FIFO_SIZE,
1918 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1919 USB_EP_CAPS_DIR_IN),
1920 },
1921 .dev = &memory,
1922 .fifo_size = BULK_FIFO_SIZE,
1923 .bEndpointAddress = USB_DIR_IN | 6,
1924 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1925 .reg_udccs = &UDCCS6,
1926 .reg_uddr = &UDDR6,
1927 },
1928 .ep[7] = {
1929 .ep = {
1930 .name = "ep7out-bulk",
1931 .ops = &pxa25x_ep_ops,
1932 .maxpacket = BULK_FIFO_SIZE,
1933 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1934 USB_EP_CAPS_DIR_OUT),
1935 },
1936 .dev = &memory,
1937 .fifo_size = BULK_FIFO_SIZE,
1938 .bEndpointAddress = 7,
1939 .bmAttributes = USB_ENDPOINT_XFER_BULK,
1940 .reg_udccs = &UDCCS7,
1941 .reg_ubcr = &UBCR7,
1942 .reg_uddr = &UDDR7,
1943 },
1944 .ep[8] = {
1945 .ep = {
1946 .name = "ep8in-iso",
1947 .ops = &pxa25x_ep_ops,
1948 .maxpacket = ISO_FIFO_SIZE,
1949 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO,
1950 USB_EP_CAPS_DIR_IN),
1951 },
1952 .dev = &memory,
1953 .fifo_size = ISO_FIFO_SIZE,
1954 .bEndpointAddress = USB_DIR_IN | 8,
1955 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1956 .reg_udccs = &UDCCS8,
1957 .reg_uddr = &UDDR8,
1958 },
1959 .ep[9] = {
1960 .ep = {
1961 .name = "ep9out-iso",
1962 .ops = &pxa25x_ep_ops,
1963 .maxpacket = ISO_FIFO_SIZE,
1964 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO,
1965 USB_EP_CAPS_DIR_OUT),
1966 },
1967 .dev = &memory,
1968 .fifo_size = ISO_FIFO_SIZE,
1969 .bEndpointAddress = 9,
1970 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
1971 .reg_udccs = &UDCCS9,
1972 .reg_ubcr = &UBCR9,
1973 .reg_uddr = &UDDR9,
1974 },
1975 .ep[10] = {
1976 .ep = {
1977 .name = "ep10in-int",
1978 .ops = &pxa25x_ep_ops,
1979 .maxpacket = INT_FIFO_SIZE,
1980 .caps = USB_EP_CAPS(0, 0),
1981 },
1982 .dev = &memory,
1983 .fifo_size = INT_FIFO_SIZE,
1984 .bEndpointAddress = USB_DIR_IN | 10,
1985 .bmAttributes = USB_ENDPOINT_XFER_INT,
1986 .reg_udccs = &UDCCS10,
1987 .reg_uddr = &UDDR10,
1988 },
1989
1990 /* third group of endpoints */
1991 .ep[11] = {
1992 .ep = {
1993 .name = "ep11in-bulk",
1994 .ops = &pxa25x_ep_ops,
1995 .maxpacket = BULK_FIFO_SIZE,
1996 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
1997 USB_EP_CAPS_DIR_IN),
1998 },
1999 .dev = &memory,
2000 .fifo_size = BULK_FIFO_SIZE,
2001 .bEndpointAddress = USB_DIR_IN | 11,
2002 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2003 .reg_udccs = &UDCCS11,
2004 .reg_uddr = &UDDR11,
2005 },
2006 .ep[12] = {
2007 .ep = {
2008 .name = "ep12out-bulk",
2009 .ops = &pxa25x_ep_ops,
2010 .maxpacket = BULK_FIFO_SIZE,
2011 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK,
2012 USB_EP_CAPS_DIR_OUT),
2013 },
2014 .dev = &memory,
2015 .fifo_size = BULK_FIFO_SIZE,
2016 .bEndpointAddress = 12,
2017 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2018 .reg_udccs = &UDCCS12,
2019 .reg_ubcr = &UBCR12,
2020 .reg_uddr = &UDDR12,
2021 },
2022 .ep[13] = {
2023 .ep = {
2024 .name = "ep13in-iso",
2025 .ops = &pxa25x_ep_ops,
2026 .maxpacket = ISO_FIFO_SIZE,
2027 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO,
2028 USB_EP_CAPS_DIR_IN),
2029 },
2030 .dev = &memory,
2031 .fifo_size = ISO_FIFO_SIZE,
2032 .bEndpointAddress = USB_DIR_IN | 13,
2033 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
2034 .reg_udccs = &UDCCS13,
2035 .reg_uddr = &UDDR13,
2036 },
2037 .ep[14] = {
2038 .ep = {
2039 .name = "ep14out-iso",
2040 .ops = &pxa25x_ep_ops,
2041 .maxpacket = ISO_FIFO_SIZE,
2042 .caps = USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO,
2043 USB_EP_CAPS_DIR_OUT),
2044 },
2045 .dev = &memory,
2046 .fifo_size = ISO_FIFO_SIZE,
2047 .bEndpointAddress = 14,
2048 .bmAttributes = USB_ENDPOINT_XFER_ISOC,
2049 .reg_udccs = &UDCCS14,
2050 .reg_ubcr = &UBCR14,
2051 .reg_uddr = &UDDR14,
2052 },
2053 .ep[15] = {
2054 .ep = {
2055 .name = "ep15in-int",
2056 .ops = &pxa25x_ep_ops,
2057 .maxpacket = INT_FIFO_SIZE,
2058 .caps = USB_EP_CAPS(0, 0),
2059 },
2060 .dev = &memory,
2061 .fifo_size = INT_FIFO_SIZE,
2062 .bEndpointAddress = USB_DIR_IN | 15,
2063 .bmAttributes = USB_ENDPOINT_XFER_INT,
2064 .reg_udccs = &UDCCS15,
2065 .reg_uddr = &UDDR15,
2066 },
2067 #endif /* !CONFIG_USB_PXA25X_SMALL */
2068 };
2069
2070 #define CP15R0_VENDOR_MASK 0xffffe000
2071
2072 #if defined(CONFIG_ARCH_PXA)
2073 #define CP15R0_XSCALE_VALUE 0x69052000 /* intel/arm/xscale */
2074
2075 #elif defined(CONFIG_ARCH_IXP4XX)
2076 #define CP15R0_XSCALE_VALUE 0x69054000 /* intel/arm/ixp4xx */
2077
2078 #endif
2079
2080 #define CP15R0_PROD_MASK 0x000003f0
2081 #define PXA25x 0x00000100 /* and PXA26x */
2082 #define PXA210 0x00000120
2083
2084 #define CP15R0_REV_MASK 0x0000000f
2085
2086 #define CP15R0_PRODREV_MASK (CP15R0_PROD_MASK | CP15R0_REV_MASK)
2087
2088 #define PXA255_A0 0x00000106 /* or PXA260_B1 */
2089 #define PXA250_C0 0x00000105 /* or PXA26x_B0 */
2090 #define PXA250_B2 0x00000104
2091 #define PXA250_B1 0x00000103 /* or PXA260_A0 */
2092 #define PXA250_B0 0x00000102
2093 #define PXA250_A1 0x00000101
2094 #define PXA250_A0 0x00000100
2095
2096 #define PXA210_C0 0x00000125
2097 #define PXA210_B2 0x00000124
2098 #define PXA210_B1 0x00000123
2099 #define PXA210_B0 0x00000122
2100 #define IXP425_A0 0x000001c1
2101 #define IXP425_B0 0x000001f1
2102 #define IXP465_AD 0x00000200
2103
2104 /*
2105 * probe - binds to the platform device
2106 */
2107 static int pxa25x_udc_probe(struct platform_device *pdev)
2108 {
2109 struct pxa25x_udc *dev = &memory;
2110 int retval, irq;
2111 u32 chiprev;
2112
2113 pr_info("%s: version %s\n", driver_name, DRIVER_VERSION);
2114
2115 /* insist on Intel/ARM/XScale */
2116 asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));
2117 if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {
2118 pr_err("%s: not XScale!\n", driver_name);
2119 return -ENODEV;
2120 }
2121
2122 /* trigger chiprev-specific logic */
2123 switch (chiprev & CP15R0_PRODREV_MASK) {
2124 #if defined(CONFIG_ARCH_PXA)
2125 case PXA255_A0:
2126 dev->has_cfr = 1;
2127 break;
2128 case PXA250_A0:
2129 case PXA250_A1:
2130 /* A0/A1 "not released"; ep 13, 15 unusable */
2131 /* fall through */
2132 case PXA250_B2: case PXA210_B2:
2133 case PXA250_B1: case PXA210_B1:
2134 case PXA250_B0: case PXA210_B0:
2135 /* OUT-DMA is broken ... */
2136 /* fall through */
2137 case PXA250_C0: case PXA210_C0:
2138 break;
2139 #elif defined(CONFIG_ARCH_IXP4XX)
2140 case IXP425_A0:
2141 case IXP425_B0:
2142 case IXP465_AD:
2143 dev->has_cfr = 1;
2144 break;
2145 #endif
2146 default:
2147 pr_err("%s: unrecognized processor: %08x\n",
2148 driver_name, chiprev);
2149 /* iop3xx, ixp4xx, ... */
2150 return -ENODEV;
2151 }
2152
2153 irq = platform_get_irq(pdev, 0);
2154 if (irq < 0)
2155 return -ENODEV;
2156
2157 dev->clk = devm_clk_get(&pdev->dev, NULL);
2158 if (IS_ERR(dev->clk))
2159 return PTR_ERR(dev->clk);
2160
2161 pr_debug("%s: IRQ %d%s%s\n", driver_name, irq,
2162 dev->has_cfr ? "" : " (!cfr)",
2163 SIZE_STR "(pio)"
2164 );
2165
2166 /* other non-static parts of init */
2167 dev->dev = &pdev->dev;
2168 dev->mach = dev_get_platdata(&pdev->dev);
2169
2170 dev->transceiver = devm_usb_get_phy(&pdev->dev, USB_PHY_TYPE_USB2);
2171
2172 if (gpio_is_valid(dev->mach->gpio_pullup)) {
2173 retval = devm_gpio_request(&pdev->dev, dev->mach->gpio_pullup,
2174 "pca25x_udc GPIO PULLUP");
2175 if (retval) {
2176 dev_dbg(&pdev->dev,
2177 "can't get pullup gpio %d, err: %d\n",
2178 dev->mach->gpio_pullup, retval);
2179 goto err;
2180 }
2181 gpio_direction_output(dev->mach->gpio_pullup, 0);
2182 }
2183
2184 init_timer(&dev->timer);
2185 dev->timer.function = udc_watchdog;
2186 dev->timer.data = (unsigned long) dev;
2187
2188 the_controller = dev;
2189 platform_set_drvdata(pdev, dev);
2190
2191 udc_disable(dev);
2192 udc_reinit(dev);
2193
2194 dev->vbus = 0;
2195
2196 /* irq setup after old hardware state is cleaned up */
2197 retval = devm_request_irq(&pdev->dev, irq, pxa25x_udc_irq, 0,
2198 driver_name, dev);
2199 if (retval != 0) {
2200 pr_err("%s: can't get irq %d, err %d\n",
2201 driver_name, irq, retval);
2202 goto err;
2203 }
2204 dev->got_irq = 1;
2205
2206 #ifdef CONFIG_ARCH_LUBBOCK
2207 if (machine_is_lubbock()) {
2208 retval = devm_request_irq(&pdev->dev, LUBBOCK_USB_DISC_IRQ,
2209 lubbock_vbus_irq, 0, driver_name,
2210 dev);
2211 if (retval != 0) {
2212 pr_err("%s: can't get irq %i, err %d\n",
2213 driver_name, LUBBOCK_USB_DISC_IRQ, retval);
2214 goto err;
2215 }
2216 retval = devm_request_irq(&pdev->dev, LUBBOCK_USB_IRQ,
2217 lubbock_vbus_irq, 0, driver_name,
2218 dev);
2219 if (retval != 0) {
2220 pr_err("%s: can't get irq %i, err %d\n",
2221 driver_name, LUBBOCK_USB_IRQ, retval);
2222 goto err;
2223 }
2224 } else
2225 #endif
2226 create_debug_files(dev);
2227
2228 retval = usb_add_gadget_udc(&pdev->dev, &dev->gadget);
2229 if (!retval)
2230 return retval;
2231
2232 remove_debug_files(dev);
2233 err:
2234 if (!IS_ERR_OR_NULL(dev->transceiver))
2235 dev->transceiver = NULL;
2236 return retval;
2237 }
2238
2239 static void pxa25x_udc_shutdown(struct platform_device *_dev)
2240 {
2241 pullup_off();
2242 }
2243
2244 static int pxa25x_udc_remove(struct platform_device *pdev)
2245 {
2246 struct pxa25x_udc *dev = platform_get_drvdata(pdev);
2247
2248 if (dev->driver)
2249 return -EBUSY;
2250
2251 usb_del_gadget_udc(&dev->gadget);
2252 dev->pullup = 0;
2253 pullup(dev);
2254
2255 remove_debug_files(dev);
2256
2257 if (!IS_ERR_OR_NULL(dev->transceiver))
2258 dev->transceiver = NULL;
2259
2260 the_controller = NULL;
2261 return 0;
2262 }
2263
2264 /*-------------------------------------------------------------------------*/
2265
2266 #ifdef CONFIG_PM
2267
2268 /* USB suspend (controlled by the host) and system suspend (controlled
2269 * by the PXA) don't necessarily work well together. If USB is active,
2270 * the 48 MHz clock is required; so the system can't enter 33 MHz idle
2271 * mode, or any deeper PM saving state.
2272 *
2273 * For now, we punt and forcibly disconnect from the USB host when PXA
2274 * enters any suspend state. While we're disconnected, we always disable
2275 * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.
2276 * Boards without software pullup control shouldn't use those states.
2277 * VBUS IRQs should probably be ignored so that the PXA device just acts
2278 * "dead" to USB hosts until system resume.
2279 */
2280 static int pxa25x_udc_suspend(struct platform_device *dev, pm_message_t state)
2281 {
2282 struct pxa25x_udc *udc = platform_get_drvdata(dev);
2283 unsigned long flags;
2284
2285 if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command)
2286 WARNING("USB host won't detect disconnect!\n");
2287 udc->suspended = 1;
2288
2289 local_irq_save(flags);
2290 pullup(udc);
2291 local_irq_restore(flags);
2292
2293 return 0;
2294 }
2295
2296 static int pxa25x_udc_resume(struct platform_device *dev)
2297 {
2298 struct pxa25x_udc *udc = platform_get_drvdata(dev);
2299 unsigned long flags;
2300
2301 udc->suspended = 0;
2302 local_irq_save(flags);
2303 pullup(udc);
2304 local_irq_restore(flags);
2305
2306 return 0;
2307 }
2308
2309 #else
2310 #define pxa25x_udc_suspend NULL
2311 #define pxa25x_udc_resume NULL
2312 #endif
2313
2314 /*-------------------------------------------------------------------------*/
2315
2316 static struct platform_driver udc_driver = {
2317 .shutdown = pxa25x_udc_shutdown,
2318 .probe = pxa25x_udc_probe,
2319 .remove = pxa25x_udc_remove,
2320 .suspend = pxa25x_udc_suspend,
2321 .resume = pxa25x_udc_resume,
2322 .driver = {
2323 .name = "pxa25x-udc",
2324 },
2325 };
2326
2327 module_platform_driver(udc_driver);
2328
2329 MODULE_DESCRIPTION(DRIVER_DESC);
2330 MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
2331 MODULE_LICENSE("GPL");
2332 MODULE_ALIAS("platform:pxa25x-udc");
Linux kernel - Deliverables
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