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Merge git://git.kernel.org/pub/scm/linux/kernel/git/sam/kbuild
[deliverable/linux.git] / drivers / usb / host / ohci-hcd.c
1 /*
2 * OHCI HCD (Host Controller Driver) for USB.
3 *
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
6 *
7 * [ Initialisation is based on Linus' ]
8 * [ uhci code and gregs ohci fragments ]
9 * [ (C) Copyright 1999 Linus Torvalds ]
10 * [ (C) Copyright 1999 Gregory P. Smith]
11 *
12 *
13 * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
14 * interfaces (though some non-x86 Intel chips use it). It supports
15 * smarter hardware than UHCI. A download link for the spec available
16 * through the http://www.usb.org website.
17 *
18 * This file is licenced under the GPL.
19 */
20
21 #include <linux/module.h>
22 #include <linux/moduleparam.h>
23 #include <linux/pci.h>
24 #include <linux/kernel.h>
25 #include <linux/delay.h>
26 #include <linux/ioport.h>
27 #include <linux/sched.h>
28 #include <linux/slab.h>
29 #include <linux/errno.h>
30 #include <linux/init.h>
31 #include <linux/timer.h>
32 #include <linux/list.h>
33 #include <linux/usb.h>
34 #include <linux/usb/otg.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/dmapool.h>
37 #include <linux/reboot.h>
38 #include <linux/workqueue.h>
39
40 #include <asm/io.h>
41 #include <asm/irq.h>
42 #include <asm/system.h>
43 #include <asm/unaligned.h>
44 #include <asm/byteorder.h>
45
46 #include "../core/hcd.h"
47
48 #define DRIVER_VERSION "2006 August 04"
49 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
50 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
51
52 /*-------------------------------------------------------------------------*/
53
54 #undef OHCI_VERBOSE_DEBUG /* not always helpful */
55
56 /* For initializing controller (mask in an HCFS mode too) */
57 #define OHCI_CONTROL_INIT OHCI_CTRL_CBSR
58 #define OHCI_INTR_INIT \
59 (OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE \
60 | OHCI_INTR_RD | OHCI_INTR_WDH)
61
62 #ifdef __hppa__
63 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
64 #define IR_DISABLE
65 #endif
66
67 #ifdef CONFIG_ARCH_OMAP
68 /* OMAP doesn't support IR (no SMM; not needed) */
69 #define IR_DISABLE
70 #endif
71
72 /*-------------------------------------------------------------------------*/
73
74 static const char hcd_name [] = "ohci_hcd";
75
76 #define STATECHANGE_DELAY msecs_to_jiffies(300)
77
78 #include "ohci.h"
79
80 static void ohci_dump (struct ohci_hcd *ohci, int verbose);
81 static int ohci_init (struct ohci_hcd *ohci);
82 static void ohci_stop (struct usb_hcd *hcd);
83 static int ohci_restart (struct ohci_hcd *ohci);
84 static void ohci_quirk_nec_worker (struct work_struct *work);
85
86 #include "ohci-hub.c"
87 #include "ohci-dbg.c"
88 #include "ohci-mem.c"
89 #include "ohci-q.c"
90
91
92 /*
93 * On architectures with edge-triggered interrupts we must never return
94 * IRQ_NONE.
95 */
96 #if defined(CONFIG_SA1111) /* ... or other edge-triggered systems */
97 #define IRQ_NOTMINE IRQ_HANDLED
98 #else
99 #define IRQ_NOTMINE IRQ_NONE
100 #endif
101
102
103 /* Some boards misreport power switching/overcurrent */
104 static int distrust_firmware = 1;
105 module_param (distrust_firmware, bool, 0);
106 MODULE_PARM_DESC (distrust_firmware,
107 "true to distrust firmware power/overcurrent setup");
108
109 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
110 static int no_handshake = 0;
111 module_param (no_handshake, bool, 0);
112 MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
113
114 /*-------------------------------------------------------------------------*/
115
116 /*
117 * queue up an urb for anything except the root hub
118 */
119 static int ohci_urb_enqueue (
120 struct usb_hcd *hcd,
121 struct usb_host_endpoint *ep,
122 struct urb *urb,
123 gfp_t mem_flags
124 ) {
125 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
126 struct ed *ed;
127 urb_priv_t *urb_priv;
128 unsigned int pipe = urb->pipe;
129 int i, size = 0;
130 unsigned long flags;
131 int retval = 0;
132
133 #ifdef OHCI_VERBOSE_DEBUG
134 urb_print (urb, "SUB", usb_pipein (pipe));
135 #endif
136
137 /* every endpoint has a ed, locate and maybe (re)initialize it */
138 if (! (ed = ed_get (ohci, ep, urb->dev, pipe, urb->interval)))
139 return -ENOMEM;
140
141 /* for the private part of the URB we need the number of TDs (size) */
142 switch (ed->type) {
143 case PIPE_CONTROL:
144 /* td_submit_urb() doesn't yet handle these */
145 if (urb->transfer_buffer_length > 4096)
146 return -EMSGSIZE;
147
148 /* 1 TD for setup, 1 for ACK, plus ... */
149 size = 2;
150 /* FALLTHROUGH */
151 // case PIPE_INTERRUPT:
152 // case PIPE_BULK:
153 default:
154 /* one TD for every 4096 Bytes (can be upto 8K) */
155 size += urb->transfer_buffer_length / 4096;
156 /* ... and for any remaining bytes ... */
157 if ((urb->transfer_buffer_length % 4096) != 0)
158 size++;
159 /* ... and maybe a zero length packet to wrap it up */
160 if (size == 0)
161 size++;
162 else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
163 && (urb->transfer_buffer_length
164 % usb_maxpacket (urb->dev, pipe,
165 usb_pipeout (pipe))) == 0)
166 size++;
167 break;
168 case PIPE_ISOCHRONOUS: /* number of packets from URB */
169 size = urb->number_of_packets;
170 break;
171 }
172
173 /* allocate the private part of the URB */
174 urb_priv = kzalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
175 mem_flags);
176 if (!urb_priv)
177 return -ENOMEM;
178 INIT_LIST_HEAD (&urb_priv->pending);
179 urb_priv->length = size;
180 urb_priv->ed = ed;
181
182 /* allocate the TDs (deferring hash chain updates) */
183 for (i = 0; i < size; i++) {
184 urb_priv->td [i] = td_alloc (ohci, mem_flags);
185 if (!urb_priv->td [i]) {
186 urb_priv->length = i;
187 urb_free_priv (ohci, urb_priv);
188 return -ENOMEM;
189 }
190 }
191
192 spin_lock_irqsave (&ohci->lock, flags);
193
194 /* don't submit to a dead HC */
195 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
196 retval = -ENODEV;
197 goto fail;
198 }
199 if (!HC_IS_RUNNING(hcd->state)) {
200 retval = -ENODEV;
201 goto fail;
202 }
203
204 /* in case of unlink-during-submit */
205 spin_lock (&urb->lock);
206 if (urb->status != -EINPROGRESS) {
207 spin_unlock (&urb->lock);
208 urb->hcpriv = urb_priv;
209 finish_urb (ohci, urb);
210 retval = 0;
211 goto fail;
212 }
213
214 /* schedule the ed if needed */
215 if (ed->state == ED_IDLE) {
216 retval = ed_schedule (ohci, ed);
217 if (retval < 0)
218 goto fail0;
219 if (ed->type == PIPE_ISOCHRONOUS) {
220 u16 frame = ohci_frame_no(ohci);
221
222 /* delay a few frames before the first TD */
223 frame += max_t (u16, 8, ed->interval);
224 frame &= ~(ed->interval - 1);
225 frame |= ed->branch;
226 urb->start_frame = frame;
227
228 /* yes, only URB_ISO_ASAP is supported, and
229 * urb->start_frame is never used as input.
230 */
231 }
232 } else if (ed->type == PIPE_ISOCHRONOUS)
233 urb->start_frame = ed->last_iso + ed->interval;
234
235 /* fill the TDs and link them to the ed; and
236 * enable that part of the schedule, if needed
237 * and update count of queued periodic urbs
238 */
239 urb->hcpriv = urb_priv;
240 td_submit_urb (ohci, urb);
241
242 fail0:
243 spin_unlock (&urb->lock);
244 fail:
245 if (retval)
246 urb_free_priv (ohci, urb_priv);
247 spin_unlock_irqrestore (&ohci->lock, flags);
248 return retval;
249 }
250
251 /*
252 * decouple the URB from the HC queues (TDs, urb_priv); it's
253 * already marked using urb->status. reporting is always done
254 * asynchronously, and we might be dealing with an urb that's
255 * partially transferred, or an ED with other urbs being unlinked.
256 */
257 static int ohci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
258 {
259 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
260 unsigned long flags;
261
262 #ifdef OHCI_VERBOSE_DEBUG
263 urb_print (urb, "UNLINK", 1);
264 #endif
265
266 spin_lock_irqsave (&ohci->lock, flags);
267 if (HC_IS_RUNNING(hcd->state)) {
268 urb_priv_t *urb_priv;
269
270 /* Unless an IRQ completed the unlink while it was being
271 * handed to us, flag it for unlink and giveback, and force
272 * some upcoming INTR_SF to call finish_unlinks()
273 */
274 urb_priv = urb->hcpriv;
275 if (urb_priv) {
276 if (urb_priv->ed->state == ED_OPER)
277 start_ed_unlink (ohci, urb_priv->ed);
278 }
279 } else {
280 /*
281 * with HC dead, we won't respect hc queue pointers
282 * any more ... just clean up every urb's memory.
283 */
284 if (urb->hcpriv)
285 finish_urb (ohci, urb);
286 }
287 spin_unlock_irqrestore (&ohci->lock, flags);
288 return 0;
289 }
290
291 /*-------------------------------------------------------------------------*/
292
293 /* frees config/altsetting state for endpoints,
294 * including ED memory, dummy TD, and bulk/intr data toggle
295 */
296
297 static void
298 ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
299 {
300 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
301 unsigned long flags;
302 struct ed *ed = ep->hcpriv;
303 unsigned limit = 1000;
304
305 /* ASSERT: any requests/urbs are being unlinked */
306 /* ASSERT: nobody can be submitting urbs for this any more */
307
308 if (!ed)
309 return;
310
311 rescan:
312 spin_lock_irqsave (&ohci->lock, flags);
313
314 if (!HC_IS_RUNNING (hcd->state)) {
315 sanitize:
316 ed->state = ED_IDLE;
317 finish_unlinks (ohci, 0);
318 }
319
320 switch (ed->state) {
321 case ED_UNLINK: /* wait for hw to finish? */
322 /* major IRQ delivery trouble loses INTR_SF too... */
323 if (limit-- == 0) {
324 ohci_warn (ohci, "IRQ INTR_SF lossage\n");
325 goto sanitize;
326 }
327 spin_unlock_irqrestore (&ohci->lock, flags);
328 schedule_timeout_uninterruptible(1);
329 goto rescan;
330 case ED_IDLE: /* fully unlinked */
331 if (list_empty (&ed->td_list)) {
332 td_free (ohci, ed->dummy);
333 ed_free (ohci, ed);
334 break;
335 }
336 /* else FALL THROUGH */
337 default:
338 /* caller was supposed to have unlinked any requests;
339 * that's not our job. can't recover; must leak ed.
340 */
341 ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
342 ed, ep->desc.bEndpointAddress, ed->state,
343 list_empty (&ed->td_list) ? "" : " (has tds)");
344 td_free (ohci, ed->dummy);
345 break;
346 }
347 ep->hcpriv = NULL;
348 spin_unlock_irqrestore (&ohci->lock, flags);
349 return;
350 }
351
352 static int ohci_get_frame (struct usb_hcd *hcd)
353 {
354 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
355
356 return ohci_frame_no(ohci);
357 }
358
359 static void ohci_usb_reset (struct ohci_hcd *ohci)
360 {
361 ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
362 ohci->hc_control &= OHCI_CTRL_RWC;
363 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
364 }
365
366 /* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and
367 * other cases where the next software may expect clean state from the
368 * "firmware". this is bus-neutral, unlike shutdown() methods.
369 */
370 static void
371 ohci_shutdown (struct usb_hcd *hcd)
372 {
373 struct ohci_hcd *ohci;
374
375 ohci = hcd_to_ohci (hcd);
376 ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
377 ohci_usb_reset (ohci);
378 /* flush the writes */
379 (void) ohci_readl (ohci, &ohci->regs->control);
380 }
381
382 /*-------------------------------------------------------------------------*
383 * HC functions
384 *-------------------------------------------------------------------------*/
385
386 /* init memory, and kick BIOS/SMM off */
387
388 static int ohci_init (struct ohci_hcd *ohci)
389 {
390 int ret;
391 struct usb_hcd *hcd = ohci_to_hcd(ohci);
392
393 disable (ohci);
394 ohci->regs = hcd->regs;
395
396 /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
397 * was never needed for most non-PCI systems ... remove the code?
398 */
399
400 #ifndef IR_DISABLE
401 /* SMM owns the HC? not for long! */
402 if (!no_handshake && ohci_readl (ohci,
403 &ohci->regs->control) & OHCI_CTRL_IR) {
404 u32 temp;
405
406 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
407
408 /* this timeout is arbitrary. we make it long, so systems
409 * depending on usb keyboards may be usable even if the
410 * BIOS/SMM code seems pretty broken.
411 */
412 temp = 500; /* arbitrary: five seconds */
413
414 ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
415 ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
416 while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
417 msleep (10);
418 if (--temp == 0) {
419 ohci_err (ohci, "USB HC takeover failed!"
420 " (BIOS/SMM bug)\n");
421 return -EBUSY;
422 }
423 }
424 ohci_usb_reset (ohci);
425 }
426 #endif
427
428 /* Disable HC interrupts */
429 ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
430
431 /* flush the writes, and save key bits like RWC */
432 if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
433 ohci->hc_control |= OHCI_CTRL_RWC;
434
435 /* Read the number of ports unless overridden */
436 if (ohci->num_ports == 0)
437 ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
438
439 if (ohci->hcca)
440 return 0;
441
442 ohci->hcca = dma_alloc_coherent (hcd->self.controller,
443 sizeof *ohci->hcca, &ohci->hcca_dma, 0);
444 if (!ohci->hcca)
445 return -ENOMEM;
446
447 if ((ret = ohci_mem_init (ohci)) < 0)
448 ohci_stop (hcd);
449 else {
450 create_debug_files (ohci);
451 }
452
453 return ret;
454 }
455
456 /*-------------------------------------------------------------------------*/
457
458 /* Start an OHCI controller, set the BUS operational
459 * resets USB and controller
460 * enable interrupts
461 */
462 static int ohci_run (struct ohci_hcd *ohci)
463 {
464 u32 mask, temp;
465 int first = ohci->fminterval == 0;
466 struct usb_hcd *hcd = ohci_to_hcd(ohci);
467
468 disable (ohci);
469
470 /* boot firmware should have set this up (5.1.1.3.1) */
471 if (first) {
472
473 temp = ohci_readl (ohci, &ohci->regs->fminterval);
474 ohci->fminterval = temp & 0x3fff;
475 if (ohci->fminterval != FI)
476 ohci_dbg (ohci, "fminterval delta %d\n",
477 ohci->fminterval - FI);
478 ohci->fminterval |= FSMP (ohci->fminterval) << 16;
479 /* also: power/overcurrent flags in roothub.a */
480 }
481
482 /* Reset USB nearly "by the book". RemoteWakeupConnected was
483 * saved if boot firmware (BIOS/SMM/...) told us it's connected,
484 * or if bus glue did the same (e.g. for PCI add-in cards with
485 * PCI PM support).
486 */
487 if ((ohci->hc_control & OHCI_CTRL_RWC) != 0
488 && !device_may_wakeup(hcd->self.controller))
489 device_init_wakeup(hcd->self.controller, 1);
490
491 switch (ohci->hc_control & OHCI_CTRL_HCFS) {
492 case OHCI_USB_OPER:
493 temp = 0;
494 break;
495 case OHCI_USB_SUSPEND:
496 case OHCI_USB_RESUME:
497 ohci->hc_control &= OHCI_CTRL_RWC;
498 ohci->hc_control |= OHCI_USB_RESUME;
499 temp = 10 /* msec wait */;
500 break;
501 // case OHCI_USB_RESET:
502 default:
503 ohci->hc_control &= OHCI_CTRL_RWC;
504 ohci->hc_control |= OHCI_USB_RESET;
505 temp = 50 /* msec wait */;
506 break;
507 }
508 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
509 // flush the writes
510 (void) ohci_readl (ohci, &ohci->regs->control);
511 msleep(temp);
512
513 memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
514
515 /* 2msec timelimit here means no irqs/preempt */
516 spin_lock_irq (&ohci->lock);
517
518 retry:
519 /* HC Reset requires max 10 us delay */
520 ohci_writel (ohci, OHCI_HCR, &ohci->regs->cmdstatus);
521 temp = 30; /* ... allow extra time */
522 while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
523 if (--temp == 0) {
524 spin_unlock_irq (&ohci->lock);
525 ohci_err (ohci, "USB HC reset timed out!\n");
526 return -1;
527 }
528 udelay (1);
529 }
530
531 /* now we're in the SUSPEND state ... must go OPERATIONAL
532 * within 2msec else HC enters RESUME
533 *
534 * ... but some hardware won't init fmInterval "by the book"
535 * (SiS, OPTi ...), so reset again instead. SiS doesn't need
536 * this if we write fmInterval after we're OPERATIONAL.
537 * Unclear about ALi, ServerWorks, and others ... this could
538 * easily be a longstanding bug in chip init on Linux.
539 */
540 if (ohci->flags & OHCI_QUIRK_INITRESET) {
541 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
542 // flush those writes
543 (void) ohci_readl (ohci, &ohci->regs->control);
544 }
545
546 /* Tell the controller where the control and bulk lists are
547 * The lists are empty now. */
548 ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
549 ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
550
551 /* a reset clears this */
552 ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
553
554 periodic_reinit (ohci);
555
556 /* some OHCI implementations are finicky about how they init.
557 * bogus values here mean not even enumeration could work.
558 */
559 if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
560 || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
561 if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
562 ohci->flags |= OHCI_QUIRK_INITRESET;
563 ohci_dbg (ohci, "enabling initreset quirk\n");
564 goto retry;
565 }
566 spin_unlock_irq (&ohci->lock);
567 ohci_err (ohci, "init err (%08x %04x)\n",
568 ohci_readl (ohci, &ohci->regs->fminterval),
569 ohci_readl (ohci, &ohci->regs->periodicstart));
570 return -EOVERFLOW;
571 }
572
573 /* use rhsc irqs after khubd is fully initialized */
574 hcd->poll_rh = 1;
575 hcd->uses_new_polling = 1;
576
577 /* start controller operations */
578 ohci->hc_control &= OHCI_CTRL_RWC;
579 ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
580 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
581 hcd->state = HC_STATE_RUNNING;
582
583 /* wake on ConnectStatusChange, matching external hubs */
584 ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
585
586 /* Choose the interrupts we care about now, others later on demand */
587 mask = OHCI_INTR_INIT;
588 ohci_writel (ohci, ~0, &ohci->regs->intrstatus);
589 ohci_writel (ohci, mask, &ohci->regs->intrenable);
590
591 /* handle root hub init quirks ... */
592 temp = roothub_a (ohci);
593 temp &= ~(RH_A_PSM | RH_A_OCPM);
594 if (ohci->flags & OHCI_QUIRK_SUPERIO) {
595 /* NSC 87560 and maybe others */
596 temp |= RH_A_NOCP;
597 temp &= ~(RH_A_POTPGT | RH_A_NPS);
598 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
599 } else if ((ohci->flags & OHCI_QUIRK_AMD756) || distrust_firmware) {
600 /* hub power always on; required for AMD-756 and some
601 * Mac platforms. ganged overcurrent reporting, if any.
602 */
603 temp |= RH_A_NPS;
604 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
605 }
606 ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
607 ohci_writel (ohci, (temp & RH_A_NPS) ? 0 : RH_B_PPCM,
608 &ohci->regs->roothub.b);
609 // flush those writes
610 (void) ohci_readl (ohci, &ohci->regs->control);
611
612 ohci->next_statechange = jiffies + STATECHANGE_DELAY;
613 spin_unlock_irq (&ohci->lock);
614
615 // POTPGT delay is bits 24-31, in 2 ms units.
616 mdelay ((temp >> 23) & 0x1fe);
617 hcd->state = HC_STATE_RUNNING;
618
619 ohci_dump (ohci, 1);
620
621 return 0;
622 }
623
624 /*-------------------------------------------------------------------------*/
625
626 /* an interrupt happens */
627
628 static irqreturn_t ohci_irq (struct usb_hcd *hcd)
629 {
630 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
631 struct ohci_regs __iomem *regs = ohci->regs;
632 int ints;
633
634 /* we can eliminate a (slow) ohci_readl()
635 if _only_ WDH caused this irq */
636 if ((ohci->hcca->done_head != 0)
637 && ! (hc32_to_cpup (ohci, &ohci->hcca->done_head)
638 & 0x01)) {
639 ints = OHCI_INTR_WDH;
640
641 /* cardbus/... hardware gone before remove() */
642 } else if ((ints = ohci_readl (ohci, &regs->intrstatus)) == ~(u32)0) {
643 disable (ohci);
644 ohci_dbg (ohci, "device removed!\n");
645 return IRQ_HANDLED;
646
647 /* interrupt for some other device? */
648 } else if ((ints &= ohci_readl (ohci, &regs->intrenable)) == 0) {
649 return IRQ_NOTMINE;
650 }
651
652 if (ints & OHCI_INTR_UE) {
653 // e.g. due to PCI Master/Target Abort
654 if (ohci->flags & OHCI_QUIRK_NEC) {
655 /* Workaround for a silicon bug in some NEC chips used
656 * in Apple's PowerBooks. Adapted from Darwin code.
657 */
658 ohci_err (ohci, "OHCI Unrecoverable Error, scheduling NEC chip restart\n");
659
660 ohci_writel (ohci, OHCI_INTR_UE, &regs->intrdisable);
661
662 schedule_work (&ohci->nec_work);
663 } else {
664 disable (ohci);
665 ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
666 }
667
668 ohci_dump (ohci, 1);
669 ohci_usb_reset (ohci);
670 }
671
672 if (ints & OHCI_INTR_RHSC) {
673 ohci_vdbg(ohci, "rhsc\n");
674 ohci->next_statechange = jiffies + STATECHANGE_DELAY;
675 ohci_writel(ohci, OHCI_INTR_RD | OHCI_INTR_RHSC,
676 &regs->intrstatus);
677
678 /* NOTE: Vendors didn't always make the same implementation
679 * choices for RHSC. Many followed the spec; RHSC triggers
680 * on an edge, like setting and maybe clearing a port status
681 * change bit. With others it's level-triggered, active
682 * until khubd clears all the port status change bits. We'll
683 * always disable it here and rely on polling until khubd
684 * re-enables it.
685 */
686 ohci_writel(ohci, OHCI_INTR_RHSC, &regs->intrdisable);
687 usb_hcd_poll_rh_status(hcd);
688 }
689
690 /* For connect and disconnect events, we expect the controller
691 * to turn on RHSC along with RD. But for remote wakeup events
692 * this might not happen.
693 */
694 else if (ints & OHCI_INTR_RD) {
695 ohci_vdbg(ohci, "resume detect\n");
696 ohci_writel(ohci, OHCI_INTR_RD, &regs->intrstatus);
697 hcd->poll_rh = 1;
698 if (ohci->autostop) {
699 spin_lock (&ohci->lock);
700 ohci_rh_resume (ohci);
701 spin_unlock (&ohci->lock);
702 } else
703 usb_hcd_resume_root_hub(hcd);
704 }
705
706 if (ints & OHCI_INTR_WDH) {
707 if (HC_IS_RUNNING(hcd->state))
708 ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrdisable);
709 spin_lock (&ohci->lock);
710 dl_done_list (ohci);
711 spin_unlock (&ohci->lock);
712 if (HC_IS_RUNNING(hcd->state))
713 ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrenable);
714 }
715
716 /* could track INTR_SO to reduce available PCI/... bandwidth */
717
718 /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
719 * when there's still unlinking to be done (next frame).
720 */
721 spin_lock (&ohci->lock);
722 if (ohci->ed_rm_list)
723 finish_unlinks (ohci, ohci_frame_no(ohci));
724 if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
725 && HC_IS_RUNNING(hcd->state))
726 ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
727 spin_unlock (&ohci->lock);
728
729 if (HC_IS_RUNNING(hcd->state)) {
730 ohci_writel (ohci, ints, &regs->intrstatus);
731 ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
732 // flush those writes
733 (void) ohci_readl (ohci, &ohci->regs->control);
734 }
735
736 return IRQ_HANDLED;
737 }
738
739 /*-------------------------------------------------------------------------*/
740
741 static void ohci_stop (struct usb_hcd *hcd)
742 {
743 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
744
745 ohci_dump (ohci, 1);
746
747 flush_scheduled_work();
748
749 ohci_usb_reset (ohci);
750 ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
751 free_irq(hcd->irq, hcd);
752 hcd->irq = -1;
753
754 remove_debug_files (ohci);
755 ohci_mem_cleanup (ohci);
756 if (ohci->hcca) {
757 dma_free_coherent (hcd->self.controller,
758 sizeof *ohci->hcca,
759 ohci->hcca, ohci->hcca_dma);
760 ohci->hcca = NULL;
761 ohci->hcca_dma = 0;
762 }
763 }
764
765 /*-------------------------------------------------------------------------*/
766
767 /* must not be called from interrupt context */
768 static int ohci_restart (struct ohci_hcd *ohci)
769 {
770 int temp;
771 int i;
772 struct urb_priv *priv;
773
774 spin_lock_irq(&ohci->lock);
775 disable (ohci);
776
777 /* Recycle any "live" eds/tds (and urbs). */
778 if (!list_empty (&ohci->pending))
779 ohci_dbg(ohci, "abort schedule...\n");
780 list_for_each_entry (priv, &ohci->pending, pending) {
781 struct urb *urb = priv->td[0]->urb;
782 struct ed *ed = priv->ed;
783
784 switch (ed->state) {
785 case ED_OPER:
786 ed->state = ED_UNLINK;
787 ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
788 ed_deschedule (ohci, ed);
789
790 ed->ed_next = ohci->ed_rm_list;
791 ed->ed_prev = NULL;
792 ohci->ed_rm_list = ed;
793 /* FALLTHROUGH */
794 case ED_UNLINK:
795 break;
796 default:
797 ohci_dbg(ohci, "bogus ed %p state %d\n",
798 ed, ed->state);
799 }
800
801 spin_lock (&urb->lock);
802 urb->status = -ESHUTDOWN;
803 spin_unlock (&urb->lock);
804 }
805 finish_unlinks (ohci, 0);
806 spin_unlock_irq(&ohci->lock);
807
808 /* paranoia, in case that didn't work: */
809
810 /* empty the interrupt branches */
811 for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
812 for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
813
814 /* no EDs to remove */
815 ohci->ed_rm_list = NULL;
816
817 /* empty control and bulk lists */
818 ohci->ed_controltail = NULL;
819 ohci->ed_bulktail = NULL;
820
821 if ((temp = ohci_run (ohci)) < 0) {
822 ohci_err (ohci, "can't restart, %d\n", temp);
823 return temp;
824 }
825 ohci_dbg(ohci, "restart complete\n");
826 return 0;
827 }
828
829 /*-------------------------------------------------------------------------*/
830
831 /* NEC workaround */
832 static void ohci_quirk_nec_worker(struct work_struct *work)
833 {
834 struct ohci_hcd *ohci = container_of(work, struct ohci_hcd, nec_work);
835 int status;
836
837 status = ohci_init(ohci);
838 if (status != 0) {
839 ohci_err(ohci, "Restarting NEC controller failed "
840 "in ohci_init, %d\n", status);
841 return;
842 }
843
844 status = ohci_restart(ohci);
845 if (status != 0)
846 ohci_err(ohci, "Restarting NEC controller failed "
847 "in ohci_restart, %d\n", status);
848 }
849
850 /*-------------------------------------------------------------------------*/
851
852 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
853
854 MODULE_AUTHOR (DRIVER_AUTHOR);
855 MODULE_DESCRIPTION (DRIVER_INFO);
856 MODULE_LICENSE ("GPL");
857
858 #ifdef CONFIG_PCI
859 #include "ohci-pci.c"
860 #define PCI_DRIVER ohci_pci_driver
861 #endif
862
863 #ifdef CONFIG_SA1111
864 #include "ohci-sa1111.c"
865 #define SA1111_DRIVER ohci_hcd_sa1111_driver
866 #endif
867
868 #ifdef CONFIG_ARCH_S3C2410
869 #include "ohci-s3c2410.c"
870 #define PLATFORM_DRIVER ohci_hcd_s3c2410_driver
871 #endif
872
873 #ifdef CONFIG_ARCH_OMAP
874 #include "ohci-omap.c"
875 #define PLATFORM_DRIVER ohci_hcd_omap_driver
876 #endif
877
878 #ifdef CONFIG_ARCH_LH7A404
879 #include "ohci-lh7a404.c"
880 #define PLATFORM_DRIVER ohci_hcd_lh7a404_driver
881 #endif
882
883 #ifdef CONFIG_PXA27x
884 #include "ohci-pxa27x.c"
885 #define PLATFORM_DRIVER ohci_hcd_pxa27x_driver
886 #endif
887
888 #ifdef CONFIG_ARCH_EP93XX
889 #include "ohci-ep93xx.c"
890 #define PLATFORM_DRIVER ohci_hcd_ep93xx_driver
891 #endif
892
893 #ifdef CONFIG_SOC_AU1X00
894 #include "ohci-au1xxx.c"
895 #define PLATFORM_DRIVER ohci_hcd_au1xxx_driver
896 #endif
897
898 #ifdef CONFIG_PNX8550
899 #include "ohci-pnx8550.c"
900 #define PLATFORM_DRIVER ohci_hcd_pnx8550_driver
901 #endif
902
903 #ifdef CONFIG_USB_OHCI_HCD_PPC_SOC
904 #include "ohci-ppc-soc.c"
905 #define PLATFORM_DRIVER ohci_hcd_ppc_soc_driver
906 #endif
907
908 #ifdef CONFIG_ARCH_AT91
909 #include "ohci-at91.c"
910 #define PLATFORM_DRIVER ohci_hcd_at91_driver
911 #endif
912
913 #ifdef CONFIG_ARCH_PNX4008
914 #include "ohci-pnx4008.c"
915 #define PLATFORM_DRIVER usb_hcd_pnx4008_driver
916 #endif
917
918
919 #ifdef CONFIG_USB_OHCI_HCD_PPC_OF
920 #include "ohci-ppc-of.c"
921 #define OF_PLATFORM_DRIVER ohci_hcd_ppc_of_driver
922 #endif
923
924 #ifdef CONFIG_PPC_PS3
925 #include "ohci-ps3.c"
926 #define PS3_SYSTEM_BUS_DRIVER ps3_ohci_driver
927 #endif
928
929 #if !defined(PCI_DRIVER) && \
930 !defined(PLATFORM_DRIVER) && \
931 !defined(OF_PLATFORM_DRIVER) && \
932 !defined(SA1111_DRIVER) && \
933 !defined(PS3_SYSTEM_BUS_DRIVER)
934 #error "missing bus glue for ohci-hcd"
935 #endif
936
937 static int __init ohci_hcd_mod_init(void)
938 {
939 int retval = 0;
940
941 if (usb_disabled())
942 return -ENODEV;
943
944 printk (KERN_DEBUG "%s: " DRIVER_INFO "\n", hcd_name);
945 pr_debug ("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
946 sizeof (struct ed), sizeof (struct td));
947
948 #ifdef PS3_SYSTEM_BUS_DRIVER
949 retval = ps3_ohci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
950 if (retval < 0)
951 goto error_ps3;
952 #endif
953
954 #ifdef PLATFORM_DRIVER
955 retval = platform_driver_register(&PLATFORM_DRIVER);
956 if (retval < 0)
957 goto error_platform;
958 #endif
959
960 #ifdef OF_PLATFORM_DRIVER
961 retval = of_register_platform_driver(&OF_PLATFORM_DRIVER);
962 if (retval < 0)
963 goto error_of_platform;
964 #endif
965
966 #ifdef SA1111_DRIVER
967 retval = sa1111_driver_register(&SA1111_DRIVER);
968 if (retval < 0)
969 goto error_sa1111;
970 #endif
971
972 #ifdef PCI_DRIVER
973 retval = pci_register_driver(&PCI_DRIVER);
974 if (retval < 0)
975 goto error_pci;
976 #endif
977
978 return retval;
979
980 /* Error path */
981 #ifdef PCI_DRIVER
982 error_pci:
983 #endif
984 #ifdef SA1111_DRIVER
985 sa1111_driver_unregister(&SA1111_DRIVER);
986 error_sa1111:
987 #endif
988 #ifdef OF_PLATFORM_DRIVER
989 of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
990 error_of_platform:
991 #endif
992 #ifdef PLATFORM_DRIVER
993 platform_driver_unregister(&PLATFORM_DRIVER);
994 error_platform:
995 #endif
996 #ifdef PS3_SYSTEM_BUS_DRIVER
997 ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
998 error_ps3:
999 #endif
1000 return retval;
1001 }
1002 module_init(ohci_hcd_mod_init);
1003
1004 static void __exit ohci_hcd_mod_exit(void)
1005 {
1006 #ifdef PCI_DRIVER
1007 pci_unregister_driver(&PCI_DRIVER);
1008 #endif
1009 #ifdef SA1111_DRIVER
1010 sa1111_driver_unregister(&SA1111_DRIVER);
1011 #endif
1012 #ifdef OF_PLATFORM_DRIVER
1013 of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1014 #endif
1015 #ifdef PLATFORM_DRIVER
1016 platform_driver_unregister(&PLATFORM_DRIVER);
1017 #endif
1018 #ifdef PS3_SYSTEM_BUS_DRIVER
1019 ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1020 #endif
1021 }
1022 module_exit(ohci_hcd_mod_exit);
1023
Linux kernel - Deliverables
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