xhci: rework cycle bit checking for new dequeue pointers
[deliverable/linux.git] / drivers / usb / host / ohci-omap.c
1 /*
2 * OHCI HCD (Host Controller Driver) for USB.
3 *
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2005 David Brownell
6 * (C) Copyright 2002 Hewlett-Packard Company
7 *
8 * OMAP Bus Glue
9 *
10 * Modified for OMAP by Tony Lindgren <tony@atomide.com>
11 * Based on the 2.4 OMAP OHCI driver originally done by MontaVista Software Inc.
12 * and on ohci-sa1111.c by Christopher Hoover <ch@hpl.hp.com>
13 *
14 * This file is licenced under the GPL.
15 */
16
17 #include <linux/clk.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/err.h>
20 #include <linux/gpio.h>
21 #include <linux/io.h>
22 #include <linux/jiffies.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/usb/otg.h>
26 #include <linux/platform_device.h>
27 #include <linux/signal.h>
28 #include <linux/usb.h>
29 #include <linux/usb/hcd.h>
30
31 #include "ohci.h"
32
33 #include <asm/io.h>
34 #include <asm/mach-types.h>
35
36 #include <mach/mux.h>
37
38 #include <mach/hardware.h>
39 #include <mach/irqs.h>
40 #include <mach/usb.h>
41
42
43 /* OMAP-1510 OHCI has its own MMU for DMA */
44 #define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */
45 #define OMAP1510_LB_CLOCK_DIV 0xfffec10c
46 #define OMAP1510_LB_MMU_CTL 0xfffec208
47 #define OMAP1510_LB_MMU_LCK 0xfffec224
48 #define OMAP1510_LB_MMU_LD_TLB 0xfffec228
49 #define OMAP1510_LB_MMU_CAM_H 0xfffec22c
50 #define OMAP1510_LB_MMU_CAM_L 0xfffec230
51 #define OMAP1510_LB_MMU_RAM_H 0xfffec234
52 #define OMAP1510_LB_MMU_RAM_L 0xfffec238
53
54 #define DRIVER_DESC "OHCI OMAP driver"
55
56 #ifdef CONFIG_TPS65010
57 #include <linux/i2c/tps65010.h>
58 #else
59
60 #define LOW 0
61 #define HIGH 1
62
63 #define GPIO1 1
64
65 static inline int tps65010_set_gpio_out_value(unsigned gpio, unsigned value)
66 {
67 return 0;
68 }
69
70 #endif
71
72 extern int usb_disabled(void);
73 extern int ocpi_enable(void);
74
75 static struct clk *usb_host_ck;
76 static struct clk *usb_dc_ck;
77
78 static const char hcd_name[] = "ohci-omap";
79 static struct hc_driver __read_mostly ohci_omap_hc_driver;
80
81 static void omap_ohci_clock_power(int on)
82 {
83 if (on) {
84 clk_enable(usb_dc_ck);
85 clk_enable(usb_host_ck);
86 /* guesstimate for T5 == 1x 32K clock + APLL lock time */
87 udelay(100);
88 } else {
89 clk_disable(usb_host_ck);
90 clk_disable(usb_dc_ck);
91 }
92 }
93
94 /*
95 * Board specific gang-switched transceiver power on/off.
96 * NOTE: OSK supplies power from DC, not battery.
97 */
98 static int omap_ohci_transceiver_power(int on)
99 {
100 if (on) {
101 if (machine_is_omap_innovator() && cpu_is_omap1510())
102 __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL)
103 | ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
104 INNOVATOR_FPGA_CAM_USB_CONTROL);
105 else if (machine_is_omap_osk())
106 tps65010_set_gpio_out_value(GPIO1, LOW);
107 } else {
108 if (machine_is_omap_innovator() && cpu_is_omap1510())
109 __raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL)
110 & ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)),
111 INNOVATOR_FPGA_CAM_USB_CONTROL);
112 else if (machine_is_omap_osk())
113 tps65010_set_gpio_out_value(GPIO1, HIGH);
114 }
115
116 return 0;
117 }
118
119 #ifdef CONFIG_ARCH_OMAP15XX
120 /*
121 * OMAP-1510 specific Local Bus clock on/off
122 */
123 static int omap_1510_local_bus_power(int on)
124 {
125 if (on) {
126 omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL);
127 udelay(200);
128 } else {
129 omap_writel(0, OMAP1510_LB_MMU_CTL);
130 }
131
132 return 0;
133 }
134
135 /*
136 * OMAP-1510 specific Local Bus initialization
137 * NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE.
138 * See also arch/mach-omap/memory.h for __virt_to_dma() and
139 * __dma_to_virt() which need to match with the physical
140 * Local Bus address below.
141 */
142 static int omap_1510_local_bus_init(void)
143 {
144 unsigned int tlb;
145 unsigned long lbaddr, physaddr;
146
147 omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4,
148 OMAP1510_LB_CLOCK_DIV);
149
150 /* Configure the Local Bus MMU table */
151 for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) {
152 lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET;
153 physaddr = tlb * 0x00100000 + PHYS_OFFSET;
154 omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H);
155 omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc,
156 OMAP1510_LB_MMU_CAM_L);
157 omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H);
158 omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L);
159 omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK);
160 omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB);
161 }
162
163 /* Enable the walking table */
164 omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL);
165 udelay(200);
166
167 return 0;
168 }
169 #else
170 #define omap_1510_local_bus_power(x) {}
171 #define omap_1510_local_bus_init() {}
172 #endif
173
174 #ifdef CONFIG_USB_OTG
175
176 static void start_hnp(struct ohci_hcd *ohci)
177 {
178 struct usb_hcd *hcd = ohci_to_hcd(ohci);
179 const unsigned port = hcd->self.otg_port - 1;
180 unsigned long flags;
181 u32 l;
182
183 otg_start_hnp(hcd->phy->otg);
184
185 local_irq_save(flags);
186 hcd->phy->state = OTG_STATE_A_SUSPEND;
187 writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]);
188 l = omap_readl(OTG_CTRL);
189 l &= ~OTG_A_BUSREQ;
190 omap_writel(l, OTG_CTRL);
191 local_irq_restore(flags);
192 }
193
194 #endif
195
196 /*-------------------------------------------------------------------------*/
197
198 static int ohci_omap_reset(struct usb_hcd *hcd)
199 {
200 struct ohci_hcd *ohci = hcd_to_ohci(hcd);
201 struct omap_usb_config *config = dev_get_platdata(hcd->self.controller);
202 int need_transceiver = (config->otg != 0);
203 int ret;
204
205 dev_dbg(hcd->self.controller, "starting USB Controller\n");
206
207 if (config->otg) {
208 hcd->self.otg_port = config->otg;
209 /* default/minimum OTG power budget: 8 mA */
210 hcd->power_budget = 8;
211 }
212
213 /* boards can use OTG transceivers in non-OTG modes */
214 need_transceiver = need_transceiver
215 || machine_is_omap_h2() || machine_is_omap_h3();
216
217 /* XXX OMAP16xx only */
218 if (config->ocpi_enable)
219 config->ocpi_enable();
220
221 #ifdef CONFIG_USB_OTG
222 if (need_transceiver) {
223 hcd->phy = usb_get_phy(USB_PHY_TYPE_USB2);
224 if (!IS_ERR_OR_NULL(hcd->phy)) {
225 int status = otg_set_host(hcd->phy->otg,
226 &ohci_to_hcd(ohci)->self);
227 dev_dbg(hcd->self.controller, "init %s phy, status %d\n",
228 hcd->phy->label, status);
229 if (status) {
230 usb_put_phy(hcd->phy);
231 return status;
232 }
233 } else {
234 dev_err(hcd->self.controller, "can't find phy\n");
235 return -ENODEV;
236 }
237 ohci->start_hnp = start_hnp;
238 }
239 #endif
240
241 omap_ohci_clock_power(1);
242
243 if (cpu_is_omap15xx()) {
244 omap_1510_local_bus_power(1);
245 omap_1510_local_bus_init();
246 }
247
248 ret = ohci_setup(hcd);
249 if (ret < 0)
250 return ret;
251
252 if (config->otg || config->rwc) {
253 ohci->hc_control = OHCI_CTRL_RWC;
254 writel(OHCI_CTRL_RWC, &ohci->regs->control);
255 }
256
257 /* board-specific power switching and overcurrent support */
258 if (machine_is_omap_osk() || machine_is_omap_innovator()) {
259 u32 rh = roothub_a (ohci);
260
261 /* power switching (ganged by default) */
262 rh &= ~RH_A_NPS;
263
264 /* TPS2045 switch for internal transceiver (port 1) */
265 if (machine_is_omap_osk()) {
266 ohci_to_hcd(ohci)->power_budget = 250;
267
268 rh &= ~RH_A_NOCP;
269
270 /* gpio9 for overcurrent detction */
271 omap_cfg_reg(W8_1610_GPIO9);
272 gpio_request(9, "OHCI overcurrent");
273 gpio_direction_input(9);
274
275 /* for paranoia's sake: disable USB.PUEN */
276 omap_cfg_reg(W4_USB_HIGHZ);
277 }
278 ohci_writel(ohci, rh, &ohci->regs->roothub.a);
279 ohci->flags &= ~OHCI_QUIRK_HUB_POWER;
280 } else if (machine_is_nokia770()) {
281 /* We require a self-powered hub, which should have
282 * plenty of power. */
283 ohci_to_hcd(ohci)->power_budget = 0;
284 }
285
286 /* FIXME khubd hub requests should manage power switching */
287 omap_ohci_transceiver_power(1);
288
289 /* board init will have already handled HMC and mux setup.
290 * any external transceiver should already be initialized
291 * too, so all configured ports use the right signaling now.
292 */
293
294 return 0;
295 }
296
297 /*-------------------------------------------------------------------------*/
298
299 /**
300 * usb_hcd_omap_probe - initialize OMAP-based HCDs
301 * Context: !in_interrupt()
302 *
303 * Allocates basic resources for this USB host controller, and
304 * then invokes the start() method for the HCD associated with it
305 * through the hotplug entry's driver_data.
306 */
307 static int usb_hcd_omap_probe (const struct hc_driver *driver,
308 struct platform_device *pdev)
309 {
310 int retval, irq;
311 struct usb_hcd *hcd = 0;
312
313 if (pdev->num_resources != 2) {
314 dev_err(&pdev->dev, "invalid num_resources: %i\n",
315 pdev->num_resources);
316 return -ENODEV;
317 }
318
319 if (pdev->resource[0].flags != IORESOURCE_MEM
320 || pdev->resource[1].flags != IORESOURCE_IRQ) {
321 dev_err(&pdev->dev, "invalid resource type\n");
322 return -ENODEV;
323 }
324
325 usb_host_ck = clk_get(&pdev->dev, "usb_hhc_ck");
326 if (IS_ERR(usb_host_ck))
327 return PTR_ERR(usb_host_ck);
328
329 if (!cpu_is_omap15xx())
330 usb_dc_ck = clk_get(&pdev->dev, "usb_dc_ck");
331 else
332 usb_dc_ck = clk_get(&pdev->dev, "lb_ck");
333
334 if (IS_ERR(usb_dc_ck)) {
335 clk_put(usb_host_ck);
336 return PTR_ERR(usb_dc_ck);
337 }
338
339
340 hcd = usb_create_hcd (driver, &pdev->dev, dev_name(&pdev->dev));
341 if (!hcd) {
342 retval = -ENOMEM;
343 goto err0;
344 }
345 hcd->rsrc_start = pdev->resource[0].start;
346 hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1;
347
348 if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
349 dev_dbg(&pdev->dev, "request_mem_region failed\n");
350 retval = -EBUSY;
351 goto err1;
352 }
353
354 hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
355 if (!hcd->regs) {
356 dev_err(&pdev->dev, "can't ioremap OHCI HCD\n");
357 retval = -ENOMEM;
358 goto err2;
359 }
360
361 irq = platform_get_irq(pdev, 0);
362 if (irq < 0) {
363 retval = -ENXIO;
364 goto err3;
365 }
366 retval = usb_add_hcd(hcd, irq, 0);
367 if (retval)
368 goto err3;
369
370 device_wakeup_enable(hcd->self.controller);
371 return 0;
372 err3:
373 iounmap(hcd->regs);
374 err2:
375 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
376 err1:
377 usb_put_hcd(hcd);
378 err0:
379 clk_put(usb_dc_ck);
380 clk_put(usb_host_ck);
381 return retval;
382 }
383
384
385 /* may be called with controller, bus, and devices active */
386
387 /**
388 * usb_hcd_omap_remove - shutdown processing for OMAP-based HCDs
389 * @dev: USB Host Controller being removed
390 * Context: !in_interrupt()
391 *
392 * Reverses the effect of usb_hcd_omap_probe(), first invoking
393 * the HCD's stop() method. It is always called from a thread
394 * context, normally "rmmod", "apmd", or something similar.
395 */
396 static inline void
397 usb_hcd_omap_remove (struct usb_hcd *hcd, struct platform_device *pdev)
398 {
399 dev_dbg(hcd->self.controller, "stopping USB Controller\n");
400 usb_remove_hcd(hcd);
401 omap_ohci_clock_power(0);
402 if (!IS_ERR_OR_NULL(hcd->phy)) {
403 (void) otg_set_host(hcd->phy->otg, 0);
404 usb_put_phy(hcd->phy);
405 }
406 if (machine_is_omap_osk())
407 gpio_free(9);
408 iounmap(hcd->regs);
409 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
410 usb_put_hcd(hcd);
411 clk_put(usb_dc_ck);
412 clk_put(usb_host_ck);
413 }
414
415 /*-------------------------------------------------------------------------*/
416
417 static int ohci_hcd_omap_drv_probe(struct platform_device *dev)
418 {
419 return usb_hcd_omap_probe(&ohci_omap_hc_driver, dev);
420 }
421
422 static int ohci_hcd_omap_drv_remove(struct platform_device *dev)
423 {
424 struct usb_hcd *hcd = platform_get_drvdata(dev);
425
426 usb_hcd_omap_remove(hcd, dev);
427
428 return 0;
429 }
430
431 /*-------------------------------------------------------------------------*/
432
433 #ifdef CONFIG_PM
434
435 static int ohci_omap_suspend(struct platform_device *pdev, pm_message_t message)
436 {
437 struct usb_hcd *hcd = platform_get_drvdata(pdev);
438 struct ohci_hcd *ohci = hcd_to_ohci(hcd);
439 bool do_wakeup = device_may_wakeup(&pdev->dev);
440 int ret;
441
442 if (time_before(jiffies, ohci->next_statechange))
443 msleep(5);
444 ohci->next_statechange = jiffies;
445
446 ret = ohci_suspend(hcd, do_wakeup);
447 if (ret)
448 return ret;
449
450 omap_ohci_clock_power(0);
451 return ret;
452 }
453
454 static int ohci_omap_resume(struct platform_device *dev)
455 {
456 struct usb_hcd *hcd = platform_get_drvdata(dev);
457 struct ohci_hcd *ohci = hcd_to_ohci(hcd);
458
459 if (time_before(jiffies, ohci->next_statechange))
460 msleep(5);
461 ohci->next_statechange = jiffies;
462
463 omap_ohci_clock_power(1);
464 ohci_resume(hcd, false);
465 return 0;
466 }
467
468 #endif
469
470 /*-------------------------------------------------------------------------*/
471
472 /*
473 * Driver definition to register with the OMAP bus
474 */
475 static struct platform_driver ohci_hcd_omap_driver = {
476 .probe = ohci_hcd_omap_drv_probe,
477 .remove = ohci_hcd_omap_drv_remove,
478 .shutdown = usb_hcd_platform_shutdown,
479 #ifdef CONFIG_PM
480 .suspend = ohci_omap_suspend,
481 .resume = ohci_omap_resume,
482 #endif
483 .driver = {
484 .owner = THIS_MODULE,
485 .name = "ohci",
486 },
487 };
488
489 static const struct ohci_driver_overrides omap_overrides __initconst = {
490 .product_desc = "OMAP OHCI",
491 .reset = ohci_omap_reset
492 };
493
494 static int __init ohci_omap_init(void)
495 {
496 if (usb_disabled())
497 return -ENODEV;
498
499 pr_info("%s: " DRIVER_DESC "\n", hcd_name);
500
501 ohci_init_driver(&ohci_omap_hc_driver, &omap_overrides);
502 return platform_driver_register(&ohci_hcd_omap_driver);
503 }
504 module_init(ohci_omap_init);
505
506 static void __exit ohci_omap_cleanup(void)
507 {
508 platform_driver_unregister(&ohci_hcd_omap_driver);
509 }
510 module_exit(ohci_omap_cleanup);
511
512 MODULE_DESCRIPTION(DRIVER_DESC);
513 MODULE_ALIAS("platform:ohci");
514 MODULE_LICENSE("GPL");
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