bb668a894ab96205cf018810242db515fee3e596
[deliverable/linux.git] / drivers / usb / host / xhci-pci.c
1 /*
2 * xHCI host controller driver PCI Bus Glue.
3 *
4 * Copyright (C) 2008 Intel Corp.
5 *
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23 #include <linux/pci.h>
24
25 #include "xhci.h"
26
27 /* Device for a quirk */
28 #define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
29 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
30
31 static const char hcd_name[] = "xhci_hcd";
32
33 /* called after powerup, by probe or system-pm "wakeup" */
34 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
35 {
36 /*
37 * TODO: Implement finding debug ports later.
38 * TODO: see if there are any quirks that need to be added to handle
39 * new extended capabilities.
40 */
41
42 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
43 if (!pci_set_mwi(pdev))
44 xhci_dbg(xhci, "MWI active\n");
45
46 xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
47 return 0;
48 }
49
50 /* called during probe() after chip reset completes */
51 static int xhci_pci_setup(struct usb_hcd *hcd)
52 {
53 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
54 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
55 int retval;
56 u32 temp;
57
58 hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;
59
60 xhci->cap_regs = hcd->regs;
61 xhci->op_regs = hcd->regs +
62 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
63 xhci->run_regs = hcd->regs +
64 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
65 /* Cache read-only capability registers */
66 xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
67 xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
68 xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
69 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
70 xhci->hci_version = HC_VERSION(xhci->hcc_params);
71 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
72 xhci_print_registers(xhci);
73
74 /* Look for vendor-specific quirks */
75 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
76 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
77 pdev->revision == 0x0) {
78 xhci->quirks |= XHCI_RESET_EP_QUIRK;
79 xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
80 " endpoint cmd after reset endpoint\n");
81 }
82 if (pdev->vendor == PCI_VENDOR_ID_NEC)
83 xhci->quirks |= XHCI_NEC_HOST;
84
85 /* Make sure the HC is halted. */
86 retval = xhci_halt(xhci);
87 if (retval)
88 return retval;
89
90 xhci_dbg(xhci, "Resetting HCD\n");
91 /* Reset the internal HC memory state and registers. */
92 retval = xhci_reset(xhci);
93 if (retval)
94 return retval;
95 xhci_dbg(xhci, "Reset complete\n");
96
97 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
98 if (HCC_64BIT_ADDR(temp)) {
99 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
100 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
101 } else {
102 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
103 }
104
105 xhci_dbg(xhci, "Calling HCD init\n");
106 /* Initialize HCD and host controller data structures. */
107 retval = xhci_init(hcd);
108 if (retval)
109 return retval;
110 xhci_dbg(xhci, "Called HCD init\n");
111
112 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
113 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
114
115 /* Find any debug ports */
116 return xhci_pci_reinit(xhci, pdev);
117 }
118
119 #ifdef CONFIG_PM
120 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
121 {
122 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
123 int retval = 0;
124
125 if (hcd->state != HC_STATE_SUSPENDED)
126 return -EINVAL;
127
128 retval = xhci_suspend(xhci);
129
130 return retval;
131 }
132
133 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
134 {
135 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
136 int retval = 0;
137
138 retval = xhci_resume(xhci, hibernated);
139 return retval;
140 }
141 #endif /* CONFIG_PM */
142
143 static const struct hc_driver xhci_pci_hc_driver = {
144 .description = hcd_name,
145 .product_desc = "xHCI Host Controller",
146 .hcd_priv_size = sizeof(struct xhci_hcd),
147
148 /*
149 * generic hardware linkage
150 */
151 .irq = xhci_irq,
152 .flags = HCD_MEMORY | HCD_USB3,
153
154 /*
155 * basic lifecycle operations
156 */
157 .reset = xhci_pci_setup,
158 .start = xhci_run,
159 #ifdef CONFIG_PM
160 .pci_suspend = xhci_pci_suspend,
161 .pci_resume = xhci_pci_resume,
162 #endif
163 .stop = xhci_stop,
164 .shutdown = xhci_shutdown,
165
166 /*
167 * managing i/o requests and associated device resources
168 */
169 .urb_enqueue = xhci_urb_enqueue,
170 .urb_dequeue = xhci_urb_dequeue,
171 .alloc_dev = xhci_alloc_dev,
172 .free_dev = xhci_free_dev,
173 .alloc_streams = xhci_alloc_streams,
174 .free_streams = xhci_free_streams,
175 .add_endpoint = xhci_add_endpoint,
176 .drop_endpoint = xhci_drop_endpoint,
177 .endpoint_reset = xhci_endpoint_reset,
178 .check_bandwidth = xhci_check_bandwidth,
179 .reset_bandwidth = xhci_reset_bandwidth,
180 .address_device = xhci_address_device,
181 .update_hub_device = xhci_update_hub_device,
182 .reset_device = xhci_discover_or_reset_device,
183
184 /*
185 * scheduling support
186 */
187 .get_frame_number = xhci_get_frame,
188
189 /* Root hub support */
190 .hub_control = xhci_hub_control,
191 .hub_status_data = xhci_hub_status_data,
192 .bus_suspend = xhci_bus_suspend,
193 .bus_resume = xhci_bus_resume,
194 };
195
196 /*-------------------------------------------------------------------------*/
197
198 /* PCI driver selection metadata; PCI hotplugging uses this */
199 static const struct pci_device_id pci_ids[] = { {
200 /* handle any USB 3.0 xHCI controller */
201 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
202 .driver_data = (unsigned long) &xhci_pci_hc_driver,
203 },
204 { /* end: all zeroes */ }
205 };
206 MODULE_DEVICE_TABLE(pci, pci_ids);
207
208 /* pci driver glue; this is a "new style" PCI driver module */
209 static struct pci_driver xhci_pci_driver = {
210 .name = (char *) hcd_name,
211 .id_table = pci_ids,
212
213 .probe = usb_hcd_pci_probe,
214 .remove = usb_hcd_pci_remove,
215 /* suspend and resume implemented later */
216
217 .shutdown = usb_hcd_pci_shutdown,
218 #ifdef CONFIG_PM_SLEEP
219 .driver = {
220 .pm = &usb_hcd_pci_pm_ops
221 },
222 #endif
223 };
224
225 int xhci_register_pci(void)
226 {
227 return pci_register_driver(&xhci_pci_driver);
228 }
229
230 void xhci_unregister_pci(void)
231 {
232 pci_unregister_driver(&xhci_pci_driver);
233 }
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