drivers/usb/host/xhci-pci.c

   1 /*
   2  * xHCI host controller driver PCI Bus Glue.
   3  *
   4  * Copyright (C) 2008 Intel Corp.
   5  *
   6  * Author: Sarah Sharp
   7  * Some code borrowed from the Linux EHCI driver.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/pci.h>
  24 #include <linux/slab.h>
  25 #include <linux/module.h>
  26
  27 #include "xhci.h"
  28 #include "xhci-trace.h"
  29
  30 /* Device for a quirk */
  31 #define PCI_VENDOR_ID_FRESCO_LOGIC      0x1b73
  32 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK  0x1000
  33 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400       0x1400
  34
  35 #define PCI_VENDOR_ID_ETRON             0x1b6f
  36 #define PCI_DEVICE_ID_ASROCK_P67        0x7023
  37
  38 static const char hcd_name[] = "xhci_hcd";
  39
  40 /* called after powerup, by probe or system-pm "wakeup" */
  41 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
  42 {
  43         /*
  44          * TODO: Implement finding debug ports later.
  45          * TODO: see if there are any quirks that need to be added to handle
  46          * new extended capabilities.
  47          */
  48
  49         /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
  50         if (!pci_set_mwi(pdev))
  51                 xhci_dbg(xhci, "MWI active\n");
  52
  53         xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
  54         return 0;
  55 }
  56
  57 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
  58 {
  59         struct pci_dev          *pdev = to_pci_dev(dev);
  60
  61         /* Look for vendor-specific quirks */
  62         if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
  63                         (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK ||
  64                          pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) {
  65                 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
  66                                 pdev->revision == 0x0) {
  67                         xhci->quirks |= XHCI_RESET_EP_QUIRK;
  68                         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
  69                                 "QUIRK: Fresco Logic xHC needs configure"
  70                                 " endpoint cmd after reset endpoint");
  71                 }
  72                 /* Fresco Logic confirms: all revisions of this chip do not
  73                  * support MSI, even though some of them claim to in their PCI
  74                  * capabilities.
  75                  */
  76                 xhci->quirks |= XHCI_BROKEN_MSI;
  77                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
  78                                 "QUIRK: Fresco Logic revision %u "
  79                                 "has broken MSI implementation",
  80                                 pdev->revision);
  81                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
  82         }
  83
  84         if (pdev->vendor == PCI_VENDOR_ID_NEC)
  85                 xhci->quirks |= XHCI_NEC_HOST;
  86
  87         if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
  88                 xhci->quirks |= XHCI_AMD_0x96_HOST;
  89
  90         /* AMD PLL quirk */
  91         if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
  92                 xhci->quirks |= XHCI_AMD_PLL_FIX;
  93         if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
  94                 xhci->quirks |= XHCI_LPM_SUPPORT;
  95                 xhci->quirks |= XHCI_INTEL_HOST;
  96         }
  97         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
  98                         pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
  99                 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
 100                 xhci->limit_active_eps = 64;
 101                 xhci->quirks |= XHCI_SW_BW_CHECKING;
 102                 /*
 103                  * PPT desktop boards DH77EB and DH77DF will power back on after
 104                  * a few seconds of being shutdown.  The fix for this is to
 105                  * switch the ports from xHCI to EHCI on shutdown.  We can't use
 106                  * DMI information to find those particular boards (since each
 107                  * vendor will change the board name), so we have to key off all
 108                  * PPT chipsets.
 109                  */
 110                 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
 111                 xhci->quirks |= XHCI_AVOID_BEI;
 112         }
 113         if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
 114                         pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
 115                 xhci->quirks |= XHCI_RESET_ON_RESUME;
 116                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
 117                                 "QUIRK: Resetting on resume");
 118                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
 119         }
 120         if (pdev->vendor == PCI_VENDOR_ID_VIA)
 121                 xhci->quirks |= XHCI_RESET_ON_RESUME;
 122 }
 123
 124 /* called during probe() after chip reset completes */
 125 static int xhci_pci_setup(struct usb_hcd *hcd)
 126 {
 127         struct xhci_hcd         *xhci;
 128         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
 129         int                     retval;
 130
 131         retval = xhci_gen_setup(hcd, xhci_pci_quirks);
 132         if (retval)
 133                 return retval;
 134
 135         xhci = hcd_to_xhci(hcd);
 136         if (!usb_hcd_is_primary_hcd(hcd))
 137                 return 0;
 138
 139         pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
 140         xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
 141
 142         /* Find any debug ports */
 143         retval = xhci_pci_reinit(xhci, pdev);
 144         if (!retval)
 145                 return retval;
 146
 147         kfree(xhci);
 148         return retval;
 149 }
 150
 151 /*
 152  * We need to register our own PCI probe function (instead of the USB core's
 153  * function) in order to create a second roothub under xHCI.
 154  */
 155 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
 156 {
 157         int retval;
 158         struct xhci_hcd *xhci;
 159         struct hc_driver *driver;
 160         struct usb_hcd *hcd;
 161
 162         driver = (struct hc_driver *)id->driver_data;
 163         /* Register the USB 2.0 roothub.
 164          * FIXME: USB core must know to register the USB 2.0 roothub first.
 165          * This is sort of silly, because we could just set the HCD driver flags
 166          * to say USB 2.0, but I'm not sure what the implications would be in
 167          * the other parts of the HCD code.
 168          */
 169         retval = usb_hcd_pci_probe(dev, id);
 170
 171         if (retval)
 172                 return retval;
 173
 174         /* USB 2.0 roothub is stored in the PCI device now. */
 175         hcd = dev_get_drvdata(&dev->dev);
 176         xhci = hcd_to_xhci(hcd);
 177         xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
 178                                 pci_name(dev), hcd);
 179         if (!xhci->shared_hcd) {
 180                 retval = -ENOMEM;
 181                 goto dealloc_usb2_hcd;
 182         }
 183
 184         /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
 185          * is called by usb_add_hcd().
 186          */
 187         *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
 188
 189         retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
 190                         IRQF_SHARED);
 191         if (retval)
 192                 goto put_usb3_hcd;
 193         /* Roothub already marked as USB 3.0 speed */
 194
 195         /* We know the LPM timeout algorithms for this host, let the USB core
 196          * enable and disable LPM for devices under the USB 3.0 roothub.
 197          */
 198         if (xhci->quirks & XHCI_LPM_SUPPORT)
 199                 hcd_to_bus(xhci->shared_hcd)->root_hub->lpm_capable = 1;
 200
 201         return 0;
 202
 203 put_usb3_hcd:
 204         usb_put_hcd(xhci->shared_hcd);
 205 dealloc_usb2_hcd:
 206         usb_hcd_pci_remove(dev);
 207         return retval;
 208 }
 209
 210 static void xhci_pci_remove(struct pci_dev *dev)
 211 {
 212         struct xhci_hcd *xhci;
 213
 214         xhci = hcd_to_xhci(pci_get_drvdata(dev));
 215         if (xhci->shared_hcd) {
 216                 usb_remove_hcd(xhci->shared_hcd);
 217                 usb_put_hcd(xhci->shared_hcd);
 218         }
 219         usb_hcd_pci_remove(dev);
 220         kfree(xhci);
 221 }
 222
 223 #ifdef CONFIG_PM
 224 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
 225 {
 226         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 227         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
 228
 229         /*
 230          * Systems with the TI redriver that loses port status change events
 231          * need to have the registers polled during D3, so avoid D3cold.
 232          */
 233         if (xhci_compliance_mode_recovery_timer_quirk_check())
 234                 pdev->no_d3cold = true;
 235
 236         return xhci_suspend(xhci);
 237 }
 238
 239 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
 240 {
 241         struct xhci_hcd         *xhci = hcd_to_xhci(hcd);
 242         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
 243         int                     retval = 0;
 244
 245         /* The BIOS on systems with the Intel Panther Point chipset may or may
 246          * not support xHCI natively.  That means that during system resume, it
 247          * may switch the ports back to EHCI so that users can use their
 248          * keyboard to select a kernel from GRUB after resume from hibernate.
 249          *
 250          * The BIOS is supposed to remember whether the OS had xHCI ports
 251          * enabled before resume, and switch the ports back to xHCI when the
 252          * BIOS/OS semaphore is written, but we all know we can't trust BIOS
 253          * writers.
 254          *
 255          * Unconditionally switch the ports back to xHCI after a system resume.
 256          * It should not matter whether the EHCI or xHCI controller is
 257          * resumed first. It's enough to do the switchover in xHCI because
 258          * USB core won't notice anything as the hub driver doesn't start
 259          * running again until after all the devices (including both EHCI and
 260          * xHCI host controllers) have been resumed.
 261          */
 262
 263         if (pdev->vendor == PCI_VENDOR_ID_INTEL)
 264                 usb_enable_intel_xhci_ports(pdev);
 265
 266         retval = xhci_resume(xhci, hibernated);
 267         return retval;
 268 }
 269 #endif /* CONFIG_PM */
 270
 271 static const struct hc_driver xhci_pci_hc_driver = {
 272         .description =          hcd_name,
 273         .product_desc =         "xHCI Host Controller",
 274         .hcd_priv_size =        sizeof(struct xhci_hcd *),
 275
 276         /*
 277          * generic hardware linkage
 278          */
 279         .irq =                  xhci_irq,
 280         .flags =                HCD_MEMORY | HCD_USB3 | HCD_SHARED,
 281
 282         /*
 283          * basic lifecycle operations
 284          */
 285         .reset =                xhci_pci_setup,
 286         .start =                xhci_run,
 287 #ifdef CONFIG_PM
 288         .pci_suspend =          xhci_pci_suspend,
 289         .pci_resume =           xhci_pci_resume,
 290 #endif
 291         .stop =                 xhci_stop,
 292         .shutdown =             xhci_shutdown,
 293
 294         /*
 295          * managing i/o requests and associated device resources
 296          */
 297         .urb_enqueue =          xhci_urb_enqueue,
 298         .urb_dequeue =          xhci_urb_dequeue,
 299         .alloc_dev =            xhci_alloc_dev,
 300         .free_dev =             xhci_free_dev,
 301         .alloc_streams =        xhci_alloc_streams,
 302         .free_streams =         xhci_free_streams,
 303         .add_endpoint =         xhci_add_endpoint,
 304         .drop_endpoint =        xhci_drop_endpoint,
 305         .endpoint_reset =       xhci_endpoint_reset,
 306         .check_bandwidth =      xhci_check_bandwidth,
 307         .reset_bandwidth =      xhci_reset_bandwidth,
 308         .address_device =       xhci_address_device,
 309         .update_hub_device =    xhci_update_hub_device,
 310         .reset_device =         xhci_discover_or_reset_device,
 311
 312         /*
 313          * scheduling support
 314          */
 315         .get_frame_number =     xhci_get_frame,
 316
 317         /* Root hub support */
 318         .hub_control =          xhci_hub_control,
 319         .hub_status_data =      xhci_hub_status_data,
 320         .bus_suspend =          xhci_bus_suspend,
 321         .bus_resume =           xhci_bus_resume,
 322         /*
 323          * call back when device connected and addressed
 324          */
 325         .update_device =        xhci_update_device,
 326         .set_usb2_hw_lpm =      xhci_set_usb2_hardware_lpm,
 327         .enable_usb3_lpm_timeout =      xhci_enable_usb3_lpm_timeout,
 328         .disable_usb3_lpm_timeout =     xhci_disable_usb3_lpm_timeout,
 329         .find_raw_port_number = xhci_find_raw_port_number,
 330 };
 331
 332 /*-------------------------------------------------------------------------*/
 333
 334 /* PCI driver selection metadata; PCI hotplugging uses this */
 335 static const struct pci_device_id pci_ids[] = { {
 336         /* handle any USB 3.0 xHCI controller */
 337         PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
 338         .driver_data =  (unsigned long) &xhci_pci_hc_driver,
 339         },
 340         { /* end: all zeroes */ }
 341 };
 342 MODULE_DEVICE_TABLE(pci, pci_ids);
 343
 344 /* pci driver glue; this is a "new style" PCI driver module */
 345 static struct pci_driver xhci_pci_driver = {
 346         .name =         (char *) hcd_name,
 347         .id_table =     pci_ids,
 348
 349         .probe =        xhci_pci_probe,
 350         .remove =       xhci_pci_remove,
 351         /* suspend and resume implemented later */
 352
 353         .shutdown =     usb_hcd_pci_shutdown,
 354 #ifdef CONFIG_PM_SLEEP
 355         .driver = {
 356                 .pm = &usb_hcd_pci_pm_ops
 357         },
 358 #endif
 359 };
 360
 361 int __init xhci_register_pci(void)
 362 {
 363         return pci_register_driver(&xhci_pci_driver);
 364 }
 365
 366 void xhci_unregister_pci(void)
 367 {
 368         pci_unregister_driver(&xhci_pci_driver);
 369 }