Merge remote-tracking branch 'asoc/topic/ac97' into asoc-fsl
[deliverable/linux.git] / drivers / usb / host / xhci-pci.c
1 /*
2 * xHCI host controller driver PCI Bus Glue.
3 *
4 * Copyright (C) 2008 Intel Corp.
5 *
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23 #include <linux/pci.h>
24 #include <linux/slab.h>
25 #include <linux/module.h>
26
27 #include "xhci.h"
28
29 /* Device for a quirk */
30 #define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
31 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
32 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400 0x1400
33
34 #define PCI_VENDOR_ID_ETRON 0x1b6f
35 #define PCI_DEVICE_ID_ASROCK_P67 0x7023
36
37 static const char hcd_name[] = "xhci_hcd";
38
39 /* called after powerup, by probe or system-pm "wakeup" */
40 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
41 {
42 /*
43 * TODO: Implement finding debug ports later.
44 * TODO: see if there are any quirks that need to be added to handle
45 * new extended capabilities.
46 */
47
48 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
49 if (!pci_set_mwi(pdev))
50 xhci_dbg(xhci, "MWI active\n");
51
52 xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
53 return 0;
54 }
55
56 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
57 {
58 struct pci_dev *pdev = to_pci_dev(dev);
59
60 /* Look for vendor-specific quirks */
61 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
62 (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK ||
63 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) {
64 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
65 pdev->revision == 0x0) {
66 xhci->quirks |= XHCI_RESET_EP_QUIRK;
67 xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
68 " endpoint cmd after reset endpoint\n");
69 }
70 /* Fresco Logic confirms: all revisions of this chip do not
71 * support MSI, even though some of them claim to in their PCI
72 * capabilities.
73 */
74 xhci->quirks |= XHCI_BROKEN_MSI;
75 xhci_dbg(xhci, "QUIRK: Fresco Logic revision %u "
76 "has broken MSI implementation\n",
77 pdev->revision);
78 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
79 }
80
81 if (pdev->vendor == PCI_VENDOR_ID_NEC)
82 xhci->quirks |= XHCI_NEC_HOST;
83
84 if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
85 xhci->quirks |= XHCI_AMD_0x96_HOST;
86
87 /* AMD PLL quirk */
88 if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
89 xhci->quirks |= XHCI_AMD_PLL_FIX;
90 if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
91 xhci->quirks |= XHCI_LPM_SUPPORT;
92 xhci->quirks |= XHCI_INTEL_HOST;
93 }
94 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
95 pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
96 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
97 xhci->limit_active_eps = 64;
98 xhci->quirks |= XHCI_SW_BW_CHECKING;
99 /*
100 * PPT desktop boards DH77EB and DH77DF will power back on after
101 * a few seconds of being shutdown. The fix for this is to
102 * switch the ports from xHCI to EHCI on shutdown. We can't use
103 * DMI information to find those particular boards (since each
104 * vendor will change the board name), so we have to key off all
105 * PPT chipsets.
106 */
107 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
108 xhci->quirks |= XHCI_AVOID_BEI;
109 }
110 if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
111 pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
112 xhci->quirks |= XHCI_RESET_ON_RESUME;
113 xhci_dbg(xhci, "QUIRK: Resetting on resume\n");
114 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
115 }
116 if (pdev->vendor == PCI_VENDOR_ID_VIA)
117 xhci->quirks |= XHCI_RESET_ON_RESUME;
118 }
119
120 /* called during probe() after chip reset completes */
121 static int xhci_pci_setup(struct usb_hcd *hcd)
122 {
123 struct xhci_hcd *xhci;
124 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
125 int retval;
126
127 retval = xhci_gen_setup(hcd, xhci_pci_quirks);
128 if (retval)
129 return retval;
130
131 xhci = hcd_to_xhci(hcd);
132 if (!usb_hcd_is_primary_hcd(hcd))
133 return 0;
134
135 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
136 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
137
138 /* Find any debug ports */
139 retval = xhci_pci_reinit(xhci, pdev);
140 if (!retval)
141 return retval;
142
143 kfree(xhci);
144 return retval;
145 }
146
147 /*
148 * We need to register our own PCI probe function (instead of the USB core's
149 * function) in order to create a second roothub under xHCI.
150 */
151 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
152 {
153 int retval;
154 struct xhci_hcd *xhci;
155 struct hc_driver *driver;
156 struct usb_hcd *hcd;
157
158 driver = (struct hc_driver *)id->driver_data;
159 /* Register the USB 2.0 roothub.
160 * FIXME: USB core must know to register the USB 2.0 roothub first.
161 * This is sort of silly, because we could just set the HCD driver flags
162 * to say USB 2.0, but I'm not sure what the implications would be in
163 * the other parts of the HCD code.
164 */
165 retval = usb_hcd_pci_probe(dev, id);
166
167 if (retval)
168 return retval;
169
170 /* USB 2.0 roothub is stored in the PCI device now. */
171 hcd = dev_get_drvdata(&dev->dev);
172 xhci = hcd_to_xhci(hcd);
173 xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
174 pci_name(dev), hcd);
175 if (!xhci->shared_hcd) {
176 retval = -ENOMEM;
177 goto dealloc_usb2_hcd;
178 }
179
180 /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
181 * is called by usb_add_hcd().
182 */
183 *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
184
185 retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
186 IRQF_SHARED);
187 if (retval)
188 goto put_usb3_hcd;
189 /* Roothub already marked as USB 3.0 speed */
190
191 /* We know the LPM timeout algorithms for this host, let the USB core
192 * enable and disable LPM for devices under the USB 3.0 roothub.
193 */
194 if (xhci->quirks & XHCI_LPM_SUPPORT)
195 hcd_to_bus(xhci->shared_hcd)->root_hub->lpm_capable = 1;
196
197 return 0;
198
199 put_usb3_hcd:
200 usb_put_hcd(xhci->shared_hcd);
201 dealloc_usb2_hcd:
202 usb_hcd_pci_remove(dev);
203 return retval;
204 }
205
206 static void xhci_pci_remove(struct pci_dev *dev)
207 {
208 struct xhci_hcd *xhci;
209
210 xhci = hcd_to_xhci(pci_get_drvdata(dev));
211 if (xhci->shared_hcd) {
212 usb_remove_hcd(xhci->shared_hcd);
213 usb_put_hcd(xhci->shared_hcd);
214 }
215 usb_hcd_pci_remove(dev);
216 kfree(xhci);
217 }
218
219 #ifdef CONFIG_PM
220 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
221 {
222 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
223 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
224
225 /*
226 * Systems with the TI redriver that loses port status change events
227 * need to have the registers polled during D3, so avoid D3cold.
228 */
229 if (xhci_compliance_mode_recovery_timer_quirk_check())
230 pdev->no_d3cold = true;
231
232 return xhci_suspend(xhci);
233 }
234
235 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
236 {
237 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
238 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
239 int retval = 0;
240
241 /* The BIOS on systems with the Intel Panther Point chipset may or may
242 * not support xHCI natively. That means that during system resume, it
243 * may switch the ports back to EHCI so that users can use their
244 * keyboard to select a kernel from GRUB after resume from hibernate.
245 *
246 * The BIOS is supposed to remember whether the OS had xHCI ports
247 * enabled before resume, and switch the ports back to xHCI when the
248 * BIOS/OS semaphore is written, but we all know we can't trust BIOS
249 * writers.
250 *
251 * Unconditionally switch the ports back to xHCI after a system resume.
252 * We can't tell whether the EHCI or xHCI controller will be resumed
253 * first, so we have to do the port switchover in both drivers. Writing
254 * a '1' to the port switchover registers should have no effect if the
255 * port was already switched over.
256 */
257 if (usb_is_intel_switchable_xhci(pdev))
258 usb_enable_xhci_ports(pdev);
259
260 retval = xhci_resume(xhci, hibernated);
261 return retval;
262 }
263 #endif /* CONFIG_PM */
264
265 static const struct hc_driver xhci_pci_hc_driver = {
266 .description = hcd_name,
267 .product_desc = "xHCI Host Controller",
268 .hcd_priv_size = sizeof(struct xhci_hcd *),
269
270 /*
271 * generic hardware linkage
272 */
273 .irq = xhci_irq,
274 .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
275
276 /*
277 * basic lifecycle operations
278 */
279 .reset = xhci_pci_setup,
280 .start = xhci_run,
281 #ifdef CONFIG_PM
282 .pci_suspend = xhci_pci_suspend,
283 .pci_resume = xhci_pci_resume,
284 #endif
285 .stop = xhci_stop,
286 .shutdown = xhci_shutdown,
287
288 /*
289 * managing i/o requests and associated device resources
290 */
291 .urb_enqueue = xhci_urb_enqueue,
292 .urb_dequeue = xhci_urb_dequeue,
293 .alloc_dev = xhci_alloc_dev,
294 .free_dev = xhci_free_dev,
295 .alloc_streams = xhci_alloc_streams,
296 .free_streams = xhci_free_streams,
297 .add_endpoint = xhci_add_endpoint,
298 .drop_endpoint = xhci_drop_endpoint,
299 .endpoint_reset = xhci_endpoint_reset,
300 .check_bandwidth = xhci_check_bandwidth,
301 .reset_bandwidth = xhci_reset_bandwidth,
302 .address_device = xhci_address_device,
303 .update_hub_device = xhci_update_hub_device,
304 .reset_device = xhci_discover_or_reset_device,
305
306 /*
307 * scheduling support
308 */
309 .get_frame_number = xhci_get_frame,
310
311 /* Root hub support */
312 .hub_control = xhci_hub_control,
313 .hub_status_data = xhci_hub_status_data,
314 .bus_suspend = xhci_bus_suspend,
315 .bus_resume = xhci_bus_resume,
316 /*
317 * call back when device connected and addressed
318 */
319 .update_device = xhci_update_device,
320 .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm,
321 .enable_usb3_lpm_timeout = xhci_enable_usb3_lpm_timeout,
322 .disable_usb3_lpm_timeout = xhci_disable_usb3_lpm_timeout,
323 .find_raw_port_number = xhci_find_raw_port_number,
324 };
325
326 /*-------------------------------------------------------------------------*/
327
328 /* PCI driver selection metadata; PCI hotplugging uses this */
329 static const struct pci_device_id pci_ids[] = { {
330 /* handle any USB 3.0 xHCI controller */
331 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
332 .driver_data = (unsigned long) &xhci_pci_hc_driver,
333 },
334 { /* end: all zeroes */ }
335 };
336 MODULE_DEVICE_TABLE(pci, pci_ids);
337
338 /* pci driver glue; this is a "new style" PCI driver module */
339 static struct pci_driver xhci_pci_driver = {
340 .name = (char *) hcd_name,
341 .id_table = pci_ids,
342
343 .probe = xhci_pci_probe,
344 .remove = xhci_pci_remove,
345 /* suspend and resume implemented later */
346
347 .shutdown = usb_hcd_pci_shutdown,
348 #ifdef CONFIG_PM_SLEEP
349 .driver = {
350 .pm = &usb_hcd_pci_pm_ops
351 },
352 #endif
353 };
354
355 int __init xhci_register_pci(void)
356 {
357 return pci_register_driver(&xhci_pci_driver);
358 }
359
360 void xhci_unregister_pci(void)
361 {
362 pci_unregister_driver(&xhci_pci_driver);
363 }
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