drivers/usb/host/xhci-rcar.c

   1 /*
   2  * xHCI host controller driver for R-Car SoCs
   3  *
   4  * Copyright (C) 2014 Renesas Electronics Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * version 2 as published by the Free Software Foundation.
   9  */
  10
  11 #include <linux/firmware.h>
  12 #include <linux/module.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/of.h>
  15 #include <linux/usb/phy.h>
  16
  17 #include "xhci.h"
  18 #include "xhci-plat.h"
  19 #include "xhci-rcar.h"
  20
  21 /*
  22 * - The V2 firmware is possible to use on R-Car Gen2. However, the V2 causes
  23 *   performance degradation. So, this driver continues to use the V1 if R-Car
  24 *   Gen2.
  25 * - The V1 firmware is impossible to use on R-Car Gen3.
  26 */
  27 MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V1);
  28 MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V2);
  29
  30 /*** Register Offset ***/
  31 #define RCAR_USB3_INT_ENA       0x224   /* Interrupt Enable */
  32 #define RCAR_USB3_DL_CTRL       0x250   /* FW Download Control & Status */
  33 #define RCAR_USB3_FW_DATA0      0x258   /* FW Data0 */
  34
  35 #define RCAR_USB3_LCLK          0xa44   /* LCLK Select */
  36 #define RCAR_USB3_CONF1         0xa48   /* USB3.0 Configuration1 */
  37 #define RCAR_USB3_CONF2         0xa5c   /* USB3.0 Configuration2 */
  38 #define RCAR_USB3_CONF3         0xaa8   /* USB3.0 Configuration3 */
  39 #define RCAR_USB3_RX_POL        0xab0   /* USB3.0 RX Polarity */
  40 #define RCAR_USB3_TX_POL        0xab8   /* USB3.0 TX Polarity */
  41
  42 /*** Register Settings ***/
  43 /* Interrupt Enable */
  44 #define RCAR_USB3_INT_XHC_ENA   0x00000001
  45 #define RCAR_USB3_INT_PME_ENA   0x00000002
  46 #define RCAR_USB3_INT_HSE_ENA   0x00000004
  47 #define RCAR_USB3_INT_ENA_VAL   (RCAR_USB3_INT_XHC_ENA | \
  48                                 RCAR_USB3_INT_PME_ENA | RCAR_USB3_INT_HSE_ENA)
  49
  50 /* FW Download Control & Status */
  51 #define RCAR_USB3_DL_CTRL_ENABLE        0x00000001
  52 #define RCAR_USB3_DL_CTRL_FW_SUCCESS    0x00000010
  53 #define RCAR_USB3_DL_CTRL_FW_SET_DATA0  0x00000100
  54
  55 /* LCLK Select */
  56 #define RCAR_USB3_LCLK_ENA_VAL  0x01030001
  57
  58 /* USB3.0 Configuration */
  59 #define RCAR_USB3_CONF1_VAL     0x00030204
  60 #define RCAR_USB3_CONF2_VAL     0x00030300
  61 #define RCAR_USB3_CONF3_VAL     0x13802007
  62
  63 /* USB3.0 Polarity */
  64 #define RCAR_USB3_RX_POL_VAL    BIT(21)
  65 #define RCAR_USB3_TX_POL_VAL    BIT(4)
  66
  67 static void xhci_rcar_start_gen2(struct usb_hcd *hcd)
  68 {
  69         /* LCLK Select */
  70         writel(RCAR_USB3_LCLK_ENA_VAL, hcd->regs + RCAR_USB3_LCLK);
  71         /* USB3.0 Configuration */
  72         writel(RCAR_USB3_CONF1_VAL, hcd->regs + RCAR_USB3_CONF1);
  73         writel(RCAR_USB3_CONF2_VAL, hcd->regs + RCAR_USB3_CONF2);
  74         writel(RCAR_USB3_CONF3_VAL, hcd->regs + RCAR_USB3_CONF3);
  75         /* USB3.0 Polarity */
  76         writel(RCAR_USB3_RX_POL_VAL, hcd->regs + RCAR_USB3_RX_POL);
  77         writel(RCAR_USB3_TX_POL_VAL, hcd->regs + RCAR_USB3_TX_POL);
  78 }
  79
  80 static int xhci_rcar_is_gen2(struct device *dev)
  81 {
  82         struct device_node *node = dev->of_node;
  83
  84         return of_device_is_compatible(node, "renesas,xhci-r8a7790") ||
  85                 of_device_is_compatible(node, "renesas,xhci-r8a7791") ||
  86                 of_device_is_compatible(node, "renesas,xhci-r8a7793") ||
  87                 of_device_is_compatible(node, "renensas,rcar-gen2-xhci");
  88 }
  89
  90 static int xhci_rcar_is_gen3(struct device *dev)
  91 {
  92         struct device_node *node = dev->of_node;
  93
  94         return of_device_is_compatible(node, "renesas,xhci-r8a7795") ||
  95                 of_device_is_compatible(node, "renesas,rcar-gen3-xhci");
  96 }
  97
  98 void xhci_rcar_start(struct usb_hcd *hcd)
  99 {
 100         u32 temp;
 101
 102         if (hcd->regs != NULL) {
 103                 /* Interrupt Enable */
 104                 temp = readl(hcd->regs + RCAR_USB3_INT_ENA);
 105                 temp |= RCAR_USB3_INT_ENA_VAL;
 106                 writel(temp, hcd->regs + RCAR_USB3_INT_ENA);
 107                 if (xhci_rcar_is_gen2(hcd->self.controller))
 108                         xhci_rcar_start_gen2(hcd);
 109         }
 110 }
 111
 112 static int xhci_rcar_download_firmware(struct usb_hcd *hcd)
 113 {
 114         struct device *dev = hcd->self.controller;
 115         void __iomem *regs = hcd->regs;
 116         struct xhci_plat_priv *priv = hcd_to_xhci_priv(hcd);
 117         const struct firmware *fw;
 118         int retval, index, j, time;
 119         int timeout = 10000;
 120         u32 data, val, temp;
 121
 122         /* request R-Car USB3.0 firmware */
 123         retval = request_firmware(&fw, priv->firmware_name, dev);
 124         if (retval)
 125                 return retval;
 126
 127         /* download R-Car USB3.0 firmware */
 128         temp = readl(regs + RCAR_USB3_DL_CTRL);
 129         temp |= RCAR_USB3_DL_CTRL_ENABLE;
 130         writel(temp, regs + RCAR_USB3_DL_CTRL);
 131
 132         for (index = 0; index < fw->size; index += 4) {
 133                 /* to avoid reading beyond the end of the buffer */
 134                 for (data = 0, j = 3; j >= 0; j--) {
 135                         if ((j + index) < fw->size)
 136                                 data |= fw->data[index + j] << (8 * j);
 137                 }
 138                 writel(data, regs + RCAR_USB3_FW_DATA0);
 139                 temp = readl(regs + RCAR_USB3_DL_CTRL);
 140                 temp |= RCAR_USB3_DL_CTRL_FW_SET_DATA0;
 141                 writel(temp, regs + RCAR_USB3_DL_CTRL);
 142
 143                 for (time = 0; time < timeout; time++) {
 144                         val = readl(regs + RCAR_USB3_DL_CTRL);
 145                         if ((val & RCAR_USB3_DL_CTRL_FW_SET_DATA0) == 0)
 146                                 break;
 147                         udelay(1);
 148                 }
 149                 if (time == timeout) {
 150                         retval = -ETIMEDOUT;
 151                         break;
 152                 }
 153         }
 154
 155         temp = readl(regs + RCAR_USB3_DL_CTRL);
 156         temp &= ~RCAR_USB3_DL_CTRL_ENABLE;
 157         writel(temp, regs + RCAR_USB3_DL_CTRL);
 158
 159         for (time = 0; time < timeout; time++) {
 160                 val = readl(regs + RCAR_USB3_DL_CTRL);
 161                 if (val & RCAR_USB3_DL_CTRL_FW_SUCCESS) {
 162                         retval = 0;
 163                         break;
 164                 }
 165                 udelay(1);
 166         }
 167         if (time == timeout)
 168                 retval = -ETIMEDOUT;
 169
 170         release_firmware(fw);
 171
 172         return retval;
 173 }
 174
 175 /* This function needs to initialize a "phy" of usb before */
 176 int xhci_rcar_init_quirk(struct usb_hcd *hcd)
 177 {
 178         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 179
 180         /* If hcd->regs is NULL, we don't just call the following function */
 181         if (!hcd->regs)
 182                 return 0;
 183
 184         /*
 185          * On R-Car Gen2 and Gen3, the AC64 bit (bit 0) of HCCPARAMS1 is set
 186          * to 1. However, these SoCs don't support 64-bit address memory
 187          * pointers. So, this driver clears the AC64 bit of xhci->hcc_params
 188          * to call dma_set_coherent_mask(dev, DMA_BIT_MASK(32)) in
 189          * xhci_gen_setup().
 190          */
 191         if (xhci_rcar_is_gen2(hcd->self.controller) ||
 192                         xhci_rcar_is_gen3(hcd->self.controller))
 193                 xhci->quirks |= XHCI_NO_64BIT_SUPPORT;
 194
 195         return xhci_rcar_download_firmware(hcd);
 196 }