2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 * Ring initialization rules:
25 * 1. Each segment is initialized to zero, except for link TRBs.
26 * 2. Ring cycle state = 0. This represents Producer Cycle State (PCS) or
27 * Consumer Cycle State (CCS), depending on ring function.
28 * 3. Enqueue pointer = dequeue pointer = address of first TRB in the segment.
30 * Ring behavior rules:
31 * 1. A ring is empty if enqueue == dequeue. This means there will always be at
32 * least one free TRB in the ring. This is useful if you want to turn that
33 * into a link TRB and expand the ring.
34 * 2. When incrementing an enqueue or dequeue pointer, if the next TRB is a
35 * link TRB, then load the pointer with the address in the link TRB. If the
36 * link TRB had its toggle bit set, you may need to update the ring cycle
37 * state (see cycle bit rules). You may have to do this multiple times
38 * until you reach a non-link TRB.
39 * 3. A ring is full if enqueue++ (for the definition of increment above)
40 * equals the dequeue pointer.
43 * 1. When a consumer increments a dequeue pointer and encounters a toggle bit
44 * in a link TRB, it must toggle the ring cycle state.
45 * 2. When a producer increments an enqueue pointer and encounters a toggle bit
46 * in a link TRB, it must toggle the ring cycle state.
49 * 1. Check if ring is full before you enqueue.
50 * 2. Write the ring cycle state to the cycle bit in the TRB you're enqueuing.
51 * Update enqueue pointer between each write (which may update the ring
53 * 3. Notify consumer. If SW is producer, it rings the doorbell for command
54 * and endpoint rings. If HC is the producer for the event ring,
55 * and it generates an interrupt according to interrupt modulation rules.
58 * 1. Check if TRB belongs to you. If the cycle bit == your ring cycle state,
59 * the TRB is owned by the consumer.
60 * 2. Update dequeue pointer (which may update the ring cycle state) and
61 * continue processing TRBs until you reach a TRB which is not owned by you.
62 * 3. Notify the producer. SW is the consumer for the event ring, and it
63 * updates event ring dequeue pointer. HC is the consumer for the command and
64 * endpoint rings; it generates events on the event ring for these.
67 #include <linux/scatterlist.h>
68 #include <linux/slab.h>
70 #include "xhci-trace.h"
72 static int handle_cmd_in_cmd_wait_list(struct xhci_hcd
*xhci
,
73 struct xhci_virt_device
*virt_dev
,
74 struct xhci_event_cmd
*event
);
77 * Returns zero if the TRB isn't in this segment, otherwise it returns the DMA
80 dma_addr_t
xhci_trb_virt_to_dma(struct xhci_segment
*seg
,
83 unsigned long segment_offset
;
85 if (!seg
|| !trb
|| trb
< seg
->trbs
)
88 segment_offset
= trb
- seg
->trbs
;
89 if (segment_offset
> TRBS_PER_SEGMENT
)
91 return seg
->dma
+ (segment_offset
* sizeof(*trb
));
94 /* Does this link TRB point to the first segment in a ring,
95 * or was the previous TRB the last TRB on the last segment in the ERST?
97 static bool last_trb_on_last_seg(struct xhci_hcd
*xhci
, struct xhci_ring
*ring
,
98 struct xhci_segment
*seg
, union xhci_trb
*trb
)
100 if (ring
== xhci
->event_ring
)
101 return (trb
== &seg
->trbs
[TRBS_PER_SEGMENT
]) &&
102 (seg
->next
== xhci
->event_ring
->first_seg
);
104 return le32_to_cpu(trb
->link
.control
) & LINK_TOGGLE
;
107 /* Is this TRB a link TRB or was the last TRB the last TRB in this event ring
108 * segment? I.e. would the updated event TRB pointer step off the end of the
111 static int last_trb(struct xhci_hcd
*xhci
, struct xhci_ring
*ring
,
112 struct xhci_segment
*seg
, union xhci_trb
*trb
)
114 if (ring
== xhci
->event_ring
)
115 return trb
== &seg
->trbs
[TRBS_PER_SEGMENT
];
117 return TRB_TYPE_LINK_LE32(trb
->link
.control
);
120 static int enqueue_is_link_trb(struct xhci_ring
*ring
)
122 struct xhci_link_trb
*link
= &ring
->enqueue
->link
;
123 return TRB_TYPE_LINK_LE32(link
->control
);
126 /* Updates trb to point to the next TRB in the ring, and updates seg if the next
127 * TRB is in a new segment. This does not skip over link TRBs, and it does not
128 * effect the ring dequeue or enqueue pointers.
130 static void next_trb(struct xhci_hcd
*xhci
,
131 struct xhci_ring
*ring
,
132 struct xhci_segment
**seg
,
133 union xhci_trb
**trb
)
135 if (last_trb(xhci
, ring
, *seg
, *trb
)) {
137 *trb
= ((*seg
)->trbs
);
144 * See Cycle bit rules. SW is the consumer for the event ring only.
145 * Don't make a ring full of link TRBs. That would be dumb and this would loop.
147 static void inc_deq(struct xhci_hcd
*xhci
, struct xhci_ring
*ring
)
149 unsigned long long addr
;
154 * If this is not event ring, and the dequeue pointer
155 * is not on a link TRB, there is one more usable TRB
157 if (ring
->type
!= TYPE_EVENT
&&
158 !last_trb(xhci
, ring
, ring
->deq_seg
, ring
->dequeue
))
159 ring
->num_trbs_free
++;
163 * Update the dequeue pointer further if that was a link TRB or
164 * we're at the end of an event ring segment (which doesn't have
167 if (last_trb(xhci
, ring
, ring
->deq_seg
, ring
->dequeue
)) {
168 if (ring
->type
== TYPE_EVENT
&&
169 last_trb_on_last_seg(xhci
, ring
,
170 ring
->deq_seg
, ring
->dequeue
)) {
171 ring
->cycle_state
= (ring
->cycle_state
? 0 : 1);
173 ring
->deq_seg
= ring
->deq_seg
->next
;
174 ring
->dequeue
= ring
->deq_seg
->trbs
;
178 } while (last_trb(xhci
, ring
, ring
->deq_seg
, ring
->dequeue
));
180 addr
= (unsigned long long) xhci_trb_virt_to_dma(ring
->deq_seg
, ring
->dequeue
);
184 * See Cycle bit rules. SW is the consumer for the event ring only.
185 * Don't make a ring full of link TRBs. That would be dumb and this would loop.
187 * If we've just enqueued a TRB that is in the middle of a TD (meaning the
188 * chain bit is set), then set the chain bit in all the following link TRBs.
189 * If we've enqueued the last TRB in a TD, make sure the following link TRBs
190 * have their chain bit cleared (so that each Link TRB is a separate TD).
192 * Section 6.4.4.1 of the 0.95 spec says link TRBs cannot have the chain bit
193 * set, but other sections talk about dealing with the chain bit set. This was
194 * fixed in the 0.96 specification errata, but we have to assume that all 0.95
195 * xHCI hardware can't handle the chain bit being cleared on a link TRB.
197 * @more_trbs_coming: Will you enqueue more TRBs before calling
198 * prepare_transfer()?
200 static void inc_enq(struct xhci_hcd
*xhci
, struct xhci_ring
*ring
,
201 bool more_trbs_coming
)
204 union xhci_trb
*next
;
205 unsigned long long addr
;
207 chain
= le32_to_cpu(ring
->enqueue
->generic
.field
[3]) & TRB_CHAIN
;
208 /* If this is not event ring, there is one less usable TRB */
209 if (ring
->type
!= TYPE_EVENT
&&
210 !last_trb(xhci
, ring
, ring
->enq_seg
, ring
->enqueue
))
211 ring
->num_trbs_free
--;
212 next
= ++(ring
->enqueue
);
215 /* Update the dequeue pointer further if that was a link TRB or we're at
216 * the end of an event ring segment (which doesn't have link TRBS)
218 while (last_trb(xhci
, ring
, ring
->enq_seg
, next
)) {
219 if (ring
->type
!= TYPE_EVENT
) {
221 * If the caller doesn't plan on enqueueing more
222 * TDs before ringing the doorbell, then we
223 * don't want to give the link TRB to the
224 * hardware just yet. We'll give the link TRB
225 * back in prepare_ring() just before we enqueue
226 * the TD at the top of the ring.
228 if (!chain
&& !more_trbs_coming
)
231 /* If we're not dealing with 0.95 hardware or
232 * isoc rings on AMD 0.96 host,
233 * carry over the chain bit of the previous TRB
234 * (which may mean the chain bit is cleared).
236 if (!(ring
->type
== TYPE_ISOC
&&
237 (xhci
->quirks
& XHCI_AMD_0x96_HOST
))
238 && !xhci_link_trb_quirk(xhci
)) {
239 next
->link
.control
&=
240 cpu_to_le32(~TRB_CHAIN
);
241 next
->link
.control
|=
244 /* Give this link TRB to the hardware */
246 next
->link
.control
^= cpu_to_le32(TRB_CYCLE
);
248 /* Toggle the cycle bit after the last ring segment. */
249 if (last_trb_on_last_seg(xhci
, ring
, ring
->enq_seg
, next
)) {
250 ring
->cycle_state
= (ring
->cycle_state
? 0 : 1);
253 ring
->enq_seg
= ring
->enq_seg
->next
;
254 ring
->enqueue
= ring
->enq_seg
->trbs
;
255 next
= ring
->enqueue
;
257 addr
= (unsigned long long) xhci_trb_virt_to_dma(ring
->enq_seg
, ring
->enqueue
);
261 * Check to see if there's room to enqueue num_trbs on the ring and make sure
262 * enqueue pointer will not advance into dequeue segment. See rules above.
264 static inline int room_on_ring(struct xhci_hcd
*xhci
, struct xhci_ring
*ring
,
265 unsigned int num_trbs
)
267 int num_trbs_in_deq_seg
;
269 if (ring
->num_trbs_free
< num_trbs
)
272 if (ring
->type
!= TYPE_COMMAND
&& ring
->type
!= TYPE_EVENT
) {
273 num_trbs_in_deq_seg
= ring
->dequeue
- ring
->deq_seg
->trbs
;
274 if (ring
->num_trbs_free
< num_trbs
+ num_trbs_in_deq_seg
)
281 /* Ring the host controller doorbell after placing a command on the ring */
282 void xhci_ring_cmd_db(struct xhci_hcd
*xhci
)
284 if (!(xhci
->cmd_ring_state
& CMD_RING_STATE_RUNNING
))
287 xhci_dbg(xhci
, "// Ding dong!\n");
288 xhci_writel(xhci
, DB_VALUE_HOST
, &xhci
->dba
->doorbell
[0]);
289 /* Flush PCI posted writes */
290 xhci_readl(xhci
, &xhci
->dba
->doorbell
[0]);
293 static int xhci_abort_cmd_ring(struct xhci_hcd
*xhci
)
298 xhci_dbg(xhci
, "Abort command ring\n");
300 if (!(xhci
->cmd_ring_state
& CMD_RING_STATE_RUNNING
)) {
301 xhci_dbg(xhci
, "The command ring isn't running, "
302 "Have the command ring been stopped?\n");
306 temp_64
= xhci_read_64(xhci
, &xhci
->op_regs
->cmd_ring
);
307 if (!(temp_64
& CMD_RING_RUNNING
)) {
308 xhci_dbg(xhci
, "Command ring had been stopped\n");
311 xhci
->cmd_ring_state
= CMD_RING_STATE_ABORTED
;
312 xhci_write_64(xhci
, temp_64
| CMD_RING_ABORT
,
313 &xhci
->op_regs
->cmd_ring
);
315 /* Section 4.6.1.2 of xHCI 1.0 spec says software should
316 * time the completion od all xHCI commands, including
317 * the Command Abort operation. If software doesn't see
318 * CRR negated in a timely manner (e.g. longer than 5
319 * seconds), then it should assume that the there are
320 * larger problems with the xHC and assert HCRST.
322 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->cmd_ring
,
323 CMD_RING_RUNNING
, 0, 5 * 1000 * 1000);
325 xhci_err(xhci
, "Stopped the command ring failed, "
326 "maybe the host is dead\n");
327 xhci
->xhc_state
|= XHCI_STATE_DYING
;
336 static int xhci_queue_cd(struct xhci_hcd
*xhci
,
337 struct xhci_command
*command
,
338 union xhci_trb
*cmd_trb
)
341 cd
= kzalloc(sizeof(struct xhci_cd
), GFP_ATOMIC
);
344 INIT_LIST_HEAD(&cd
->cancel_cmd_list
);
346 cd
->command
= command
;
347 cd
->cmd_trb
= cmd_trb
;
348 list_add_tail(&cd
->cancel_cmd_list
, &xhci
->cancel_cmd_list
);
354 * Cancel the command which has issue.
356 * Some commands may hang due to waiting for acknowledgement from
357 * usb device. It is outside of the xHC's ability to control and
358 * will cause the command ring is blocked. When it occurs software
359 * should intervene to recover the command ring.
360 * See Section 4.6.1.1 and 4.6.1.2
362 int xhci_cancel_cmd(struct xhci_hcd
*xhci
, struct xhci_command
*command
,
363 union xhci_trb
*cmd_trb
)
368 spin_lock_irqsave(&xhci
->lock
, flags
);
370 if (xhci
->xhc_state
& XHCI_STATE_DYING
) {
371 xhci_warn(xhci
, "Abort the command ring,"
372 " but the xHCI is dead.\n");
377 /* queue the cmd desriptor to cancel_cmd_list */
378 retval
= xhci_queue_cd(xhci
, command
, cmd_trb
);
380 xhci_warn(xhci
, "Queuing command descriptor failed.\n");
384 /* abort command ring */
385 retval
= xhci_abort_cmd_ring(xhci
);
387 xhci_err(xhci
, "Abort command ring failed\n");
388 if (unlikely(retval
== -ESHUTDOWN
)) {
389 spin_unlock_irqrestore(&xhci
->lock
, flags
);
390 usb_hc_died(xhci_to_hcd(xhci
)->primary_hcd
);
391 xhci_dbg(xhci
, "xHCI host controller is dead.\n");
397 spin_unlock_irqrestore(&xhci
->lock
, flags
);
401 void xhci_ring_ep_doorbell(struct xhci_hcd
*xhci
,
402 unsigned int slot_id
,
403 unsigned int ep_index
,
404 unsigned int stream_id
)
406 __le32 __iomem
*db_addr
= &xhci
->dba
->doorbell
[slot_id
];
407 struct xhci_virt_ep
*ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
408 unsigned int ep_state
= ep
->ep_state
;
410 /* Don't ring the doorbell for this endpoint if there are pending
411 * cancellations because we don't want to interrupt processing.
412 * We don't want to restart any stream rings if there's a set dequeue
413 * pointer command pending because the device can choose to start any
414 * stream once the endpoint is on the HW schedule.
415 * FIXME - check all the stream rings for pending cancellations.
417 if ((ep_state
& EP_HALT_PENDING
) || (ep_state
& SET_DEQ_PENDING
) ||
418 (ep_state
& EP_HALTED
))
420 xhci_writel(xhci
, DB_VALUE(ep_index
, stream_id
), db_addr
);
421 /* The CPU has better things to do at this point than wait for a
422 * write-posting flush. It'll get there soon enough.
426 /* Ring the doorbell for any rings with pending URBs */
427 static void ring_doorbell_for_active_rings(struct xhci_hcd
*xhci
,
428 unsigned int slot_id
,
429 unsigned int ep_index
)
431 unsigned int stream_id
;
432 struct xhci_virt_ep
*ep
;
434 ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
436 /* A ring has pending URBs if its TD list is not empty */
437 if (!(ep
->ep_state
& EP_HAS_STREAMS
)) {
438 if (ep
->ring
&& !(list_empty(&ep
->ring
->td_list
)))
439 xhci_ring_ep_doorbell(xhci
, slot_id
, ep_index
, 0);
443 for (stream_id
= 1; stream_id
< ep
->stream_info
->num_streams
;
445 struct xhci_stream_info
*stream_info
= ep
->stream_info
;
446 if (!list_empty(&stream_info
->stream_rings
[stream_id
]->td_list
))
447 xhci_ring_ep_doorbell(xhci
, slot_id
, ep_index
,
453 * Find the segment that trb is in. Start searching in start_seg.
454 * If we must move past a segment that has a link TRB with a toggle cycle state
455 * bit set, then we will toggle the value pointed at by cycle_state.
457 static struct xhci_segment
*find_trb_seg(
458 struct xhci_segment
*start_seg
,
459 union xhci_trb
*trb
, int *cycle_state
)
461 struct xhci_segment
*cur_seg
= start_seg
;
462 struct xhci_generic_trb
*generic_trb
;
464 while (cur_seg
->trbs
> trb
||
465 &cur_seg
->trbs
[TRBS_PER_SEGMENT
- 1] < trb
) {
466 generic_trb
= &cur_seg
->trbs
[TRBS_PER_SEGMENT
- 1].generic
;
467 if (generic_trb
->field
[3] & cpu_to_le32(LINK_TOGGLE
))
469 cur_seg
= cur_seg
->next
;
470 if (cur_seg
== start_seg
)
471 /* Looped over the entire list. Oops! */
478 static struct xhci_ring
*xhci_triad_to_transfer_ring(struct xhci_hcd
*xhci
,
479 unsigned int slot_id
, unsigned int ep_index
,
480 unsigned int stream_id
)
482 struct xhci_virt_ep
*ep
;
484 ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
485 /* Common case: no streams */
486 if (!(ep
->ep_state
& EP_HAS_STREAMS
))
489 if (stream_id
== 0) {
491 "WARN: Slot ID %u, ep index %u has streams, "
492 "but URB has no stream ID.\n",
497 if (stream_id
< ep
->stream_info
->num_streams
)
498 return ep
->stream_info
->stream_rings
[stream_id
];
501 "WARN: Slot ID %u, ep index %u has "
502 "stream IDs 1 to %u allocated, "
503 "but stream ID %u is requested.\n",
505 ep
->stream_info
->num_streams
- 1,
510 /* Get the right ring for the given URB.
511 * If the endpoint supports streams, boundary check the URB's stream ID.
512 * If the endpoint doesn't support streams, return the singular endpoint ring.
514 static struct xhci_ring
*xhci_urb_to_transfer_ring(struct xhci_hcd
*xhci
,
517 return xhci_triad_to_transfer_ring(xhci
, urb
->dev
->slot_id
,
518 xhci_get_endpoint_index(&urb
->ep
->desc
), urb
->stream_id
);
522 * Move the xHC's endpoint ring dequeue pointer past cur_td.
523 * Record the new state of the xHC's endpoint ring dequeue segment,
524 * dequeue pointer, and new consumer cycle state in state.
525 * Update our internal representation of the ring's dequeue pointer.
527 * We do this in three jumps:
528 * - First we update our new ring state to be the same as when the xHC stopped.
529 * - Then we traverse the ring to find the segment that contains
530 * the last TRB in the TD. We toggle the xHC's new cycle state when we pass
531 * any link TRBs with the toggle cycle bit set.
532 * - Finally we move the dequeue state one TRB further, toggling the cycle bit
533 * if we've moved it past a link TRB with the toggle cycle bit set.
535 * Some of the uses of xhci_generic_trb are grotty, but if they're done
536 * with correct __le32 accesses they should work fine. Only users of this are
539 void xhci_find_new_dequeue_state(struct xhci_hcd
*xhci
,
540 unsigned int slot_id
, unsigned int ep_index
,
541 unsigned int stream_id
, struct xhci_td
*cur_td
,
542 struct xhci_dequeue_state
*state
)
544 struct xhci_virt_device
*dev
= xhci
->devs
[slot_id
];
545 struct xhci_ring
*ep_ring
;
546 struct xhci_generic_trb
*trb
;
547 struct xhci_ep_ctx
*ep_ctx
;
550 ep_ring
= xhci_triad_to_transfer_ring(xhci
, slot_id
,
551 ep_index
, stream_id
);
553 xhci_warn(xhci
, "WARN can't find new dequeue state "
554 "for invalid stream ID %u.\n",
558 state
->new_cycle_state
= 0;
559 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
560 "Finding segment containing stopped TRB.");
561 state
->new_deq_seg
= find_trb_seg(cur_td
->start_seg
,
562 dev
->eps
[ep_index
].stopped_trb
,
563 &state
->new_cycle_state
);
564 if (!state
->new_deq_seg
) {
569 /* Dig out the cycle state saved by the xHC during the stop ep cmd */
570 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
571 "Finding endpoint context");
572 ep_ctx
= xhci_get_ep_ctx(xhci
, dev
->out_ctx
, ep_index
);
573 state
->new_cycle_state
= 0x1 & le64_to_cpu(ep_ctx
->deq
);
575 state
->new_deq_ptr
= cur_td
->last_trb
;
576 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
577 "Finding segment containing last TRB in TD.");
578 state
->new_deq_seg
= find_trb_seg(state
->new_deq_seg
,
580 &state
->new_cycle_state
);
581 if (!state
->new_deq_seg
) {
586 trb
= &state
->new_deq_ptr
->generic
;
587 if (TRB_TYPE_LINK_LE32(trb
->field
[3]) &&
588 (trb
->field
[3] & cpu_to_le32(LINK_TOGGLE
)))
589 state
->new_cycle_state
^= 0x1;
590 next_trb(xhci
, ep_ring
, &state
->new_deq_seg
, &state
->new_deq_ptr
);
593 * If there is only one segment in a ring, find_trb_seg()'s while loop
594 * will not run, and it will return before it has a chance to see if it
595 * needs to toggle the cycle bit. It can't tell if the stalled transfer
596 * ended just before the link TRB on a one-segment ring, or if the TD
597 * wrapped around the top of the ring, because it doesn't have the TD in
598 * question. Look for the one-segment case where stalled TRB's address
599 * is greater than the new dequeue pointer address.
601 if (ep_ring
->first_seg
== ep_ring
->first_seg
->next
&&
602 state
->new_deq_ptr
< dev
->eps
[ep_index
].stopped_trb
)
603 state
->new_cycle_state
^= 0x1;
604 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
605 "Cycle state = 0x%x", state
->new_cycle_state
);
607 /* Don't update the ring cycle state for the producer (us). */
608 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
609 "New dequeue segment = %p (virtual)",
611 addr
= xhci_trb_virt_to_dma(state
->new_deq_seg
, state
->new_deq_ptr
);
612 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
613 "New dequeue pointer = 0x%llx (DMA)",
614 (unsigned long long) addr
);
617 /* flip_cycle means flip the cycle bit of all but the first and last TRB.
618 * (The last TRB actually points to the ring enqueue pointer, which is not part
619 * of this TD.) This is used to remove partially enqueued isoc TDs from a ring.
621 static void td_to_noop(struct xhci_hcd
*xhci
, struct xhci_ring
*ep_ring
,
622 struct xhci_td
*cur_td
, bool flip_cycle
)
624 struct xhci_segment
*cur_seg
;
625 union xhci_trb
*cur_trb
;
627 for (cur_seg
= cur_td
->start_seg
, cur_trb
= cur_td
->first_trb
;
629 next_trb(xhci
, ep_ring
, &cur_seg
, &cur_trb
)) {
630 if (TRB_TYPE_LINK_LE32(cur_trb
->generic
.field
[3])) {
631 /* Unchain any chained Link TRBs, but
632 * leave the pointers intact.
634 cur_trb
->generic
.field
[3] &= cpu_to_le32(~TRB_CHAIN
);
635 /* Flip the cycle bit (link TRBs can't be the first
639 cur_trb
->generic
.field
[3] ^=
640 cpu_to_le32(TRB_CYCLE
);
641 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
642 "Cancel (unchain) link TRB");
643 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
644 "Address = %p (0x%llx dma); "
645 "in seg %p (0x%llx dma)",
647 (unsigned long long)xhci_trb_virt_to_dma(cur_seg
, cur_trb
),
649 (unsigned long long)cur_seg
->dma
);
651 cur_trb
->generic
.field
[0] = 0;
652 cur_trb
->generic
.field
[1] = 0;
653 cur_trb
->generic
.field
[2] = 0;
654 /* Preserve only the cycle bit of this TRB */
655 cur_trb
->generic
.field
[3] &= cpu_to_le32(TRB_CYCLE
);
656 /* Flip the cycle bit except on the first or last TRB */
657 if (flip_cycle
&& cur_trb
!= cur_td
->first_trb
&&
658 cur_trb
!= cur_td
->last_trb
)
659 cur_trb
->generic
.field
[3] ^=
660 cpu_to_le32(TRB_CYCLE
);
661 cur_trb
->generic
.field
[3] |= cpu_to_le32(
662 TRB_TYPE(TRB_TR_NOOP
));
663 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
664 "TRB to noop at offset 0x%llx",
666 xhci_trb_virt_to_dma(cur_seg
, cur_trb
));
668 if (cur_trb
== cur_td
->last_trb
)
673 static int queue_set_tr_deq(struct xhci_hcd
*xhci
, int slot_id
,
674 unsigned int ep_index
, unsigned int stream_id
,
675 struct xhci_segment
*deq_seg
,
676 union xhci_trb
*deq_ptr
, u32 cycle_state
);
678 void xhci_queue_new_dequeue_state(struct xhci_hcd
*xhci
,
679 unsigned int slot_id
, unsigned int ep_index
,
680 unsigned int stream_id
,
681 struct xhci_dequeue_state
*deq_state
)
683 struct xhci_virt_ep
*ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
685 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
686 "Set TR Deq Ptr cmd, new deq seg = %p (0x%llx dma), "
687 "new deq ptr = %p (0x%llx dma), new cycle = %u",
688 deq_state
->new_deq_seg
,
689 (unsigned long long)deq_state
->new_deq_seg
->dma
,
690 deq_state
->new_deq_ptr
,
691 (unsigned long long)xhci_trb_virt_to_dma(deq_state
->new_deq_seg
, deq_state
->new_deq_ptr
),
692 deq_state
->new_cycle_state
);
693 queue_set_tr_deq(xhci
, slot_id
, ep_index
, stream_id
,
694 deq_state
->new_deq_seg
,
695 deq_state
->new_deq_ptr
,
696 (u32
) deq_state
->new_cycle_state
);
697 /* Stop the TD queueing code from ringing the doorbell until
698 * this command completes. The HC won't set the dequeue pointer
699 * if the ring is running, and ringing the doorbell starts the
702 ep
->ep_state
|= SET_DEQ_PENDING
;
705 static void xhci_stop_watchdog_timer_in_irq(struct xhci_hcd
*xhci
,
706 struct xhci_virt_ep
*ep
)
708 ep
->ep_state
&= ~EP_HALT_PENDING
;
709 /* Can't del_timer_sync in interrupt, so we attempt to cancel. If the
710 * timer is running on another CPU, we don't decrement stop_cmds_pending
711 * (since we didn't successfully stop the watchdog timer).
713 if (del_timer(&ep
->stop_cmd_timer
))
714 ep
->stop_cmds_pending
--;
717 /* Must be called with xhci->lock held in interrupt context */
718 static void xhci_giveback_urb_in_irq(struct xhci_hcd
*xhci
,
719 struct xhci_td
*cur_td
, int status
, char *adjective
)
723 struct urb_priv
*urb_priv
;
726 urb_priv
= urb
->hcpriv
;
728 hcd
= bus_to_hcd(urb
->dev
->bus
);
730 /* Only giveback urb when this is the last td in urb */
731 if (urb_priv
->td_cnt
== urb_priv
->length
) {
732 if (usb_pipetype(urb
->pipe
) == PIPE_ISOCHRONOUS
) {
733 xhci_to_hcd(xhci
)->self
.bandwidth_isoc_reqs
--;
734 if (xhci_to_hcd(xhci
)->self
.bandwidth_isoc_reqs
== 0) {
735 if (xhci
->quirks
& XHCI_AMD_PLL_FIX
)
736 usb_amd_quirk_pll_enable();
739 usb_hcd_unlink_urb_from_ep(hcd
, urb
);
741 spin_unlock(&xhci
->lock
);
742 usb_hcd_giveback_urb(hcd
, urb
, status
);
743 xhci_urb_free_priv(xhci
, urb_priv
);
744 spin_lock(&xhci
->lock
);
749 * When we get a command completion for a Stop Endpoint Command, we need to
750 * unlink any cancelled TDs from the ring. There are two ways to do that:
752 * 1. If the HW was in the middle of processing the TD that needs to be
753 * cancelled, then we must move the ring's dequeue pointer past the last TRB
754 * in the TD with a Set Dequeue Pointer Command.
755 * 2. Otherwise, we turn all the TRBs in the TD into No-op TRBs (with the chain
756 * bit cleared) so that the HW will skip over them.
758 static void handle_stopped_endpoint(struct xhci_hcd
*xhci
,
759 union xhci_trb
*trb
, struct xhci_event_cmd
*event
)
761 unsigned int slot_id
;
762 unsigned int ep_index
;
763 struct xhci_virt_device
*virt_dev
;
764 struct xhci_ring
*ep_ring
;
765 struct xhci_virt_ep
*ep
;
766 struct list_head
*entry
;
767 struct xhci_td
*cur_td
= NULL
;
768 struct xhci_td
*last_unlinked_td
;
770 struct xhci_dequeue_state deq_state
;
772 if (unlikely(TRB_TO_SUSPEND_PORT(
773 le32_to_cpu(xhci
->cmd_ring
->dequeue
->generic
.field
[3])))) {
774 slot_id
= TRB_TO_SLOT_ID(
775 le32_to_cpu(xhci
->cmd_ring
->dequeue
->generic
.field
[3]));
776 virt_dev
= xhci
->devs
[slot_id
];
778 handle_cmd_in_cmd_wait_list(xhci
, virt_dev
,
781 xhci_warn(xhci
, "Stop endpoint command "
782 "completion for disabled slot %u\n",
787 memset(&deq_state
, 0, sizeof(deq_state
));
788 slot_id
= TRB_TO_SLOT_ID(le32_to_cpu(trb
->generic
.field
[3]));
789 ep_index
= TRB_TO_EP_INDEX(le32_to_cpu(trb
->generic
.field
[3]));
790 ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
792 if (list_empty(&ep
->cancelled_td_list
)) {
793 xhci_stop_watchdog_timer_in_irq(xhci
, ep
);
794 ep
->stopped_td
= NULL
;
795 ep
->stopped_trb
= NULL
;
796 ring_doorbell_for_active_rings(xhci
, slot_id
, ep_index
);
800 /* Fix up the ep ring first, so HW stops executing cancelled TDs.
801 * We have the xHCI lock, so nothing can modify this list until we drop
802 * it. We're also in the event handler, so we can't get re-interrupted
803 * if another Stop Endpoint command completes
805 list_for_each(entry
, &ep
->cancelled_td_list
) {
806 cur_td
= list_entry(entry
, struct xhci_td
, cancelled_td_list
);
807 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
808 "Removing canceled TD starting at 0x%llx (dma).",
809 (unsigned long long)xhci_trb_virt_to_dma(
810 cur_td
->start_seg
, cur_td
->first_trb
));
811 ep_ring
= xhci_urb_to_transfer_ring(xhci
, cur_td
->urb
);
813 /* This shouldn't happen unless a driver is mucking
814 * with the stream ID after submission. This will
815 * leave the TD on the hardware ring, and the hardware
816 * will try to execute it, and may access a buffer
817 * that has already been freed. In the best case, the
818 * hardware will execute it, and the event handler will
819 * ignore the completion event for that TD, since it was
820 * removed from the td_list for that endpoint. In
821 * short, don't muck with the stream ID after
824 xhci_warn(xhci
, "WARN Cancelled URB %p "
825 "has invalid stream ID %u.\n",
827 cur_td
->urb
->stream_id
);
828 goto remove_finished_td
;
831 * If we stopped on the TD we need to cancel, then we have to
832 * move the xHC endpoint ring dequeue pointer past this TD.
834 if (cur_td
== ep
->stopped_td
)
835 xhci_find_new_dequeue_state(xhci
, slot_id
, ep_index
,
836 cur_td
->urb
->stream_id
,
839 td_to_noop(xhci
, ep_ring
, cur_td
, false);
842 * The event handler won't see a completion for this TD anymore,
843 * so remove it from the endpoint ring's TD list. Keep it in
844 * the cancelled TD list for URB completion later.
846 list_del_init(&cur_td
->td_list
);
848 last_unlinked_td
= cur_td
;
849 xhci_stop_watchdog_timer_in_irq(xhci
, ep
);
851 /* If necessary, queue a Set Transfer Ring Dequeue Pointer command */
852 if (deq_state
.new_deq_ptr
&& deq_state
.new_deq_seg
) {
853 xhci_queue_new_dequeue_state(xhci
,
855 ep
->stopped_td
->urb
->stream_id
,
857 xhci_ring_cmd_db(xhci
);
859 /* Otherwise ring the doorbell(s) to restart queued transfers */
860 ring_doorbell_for_active_rings(xhci
, slot_id
, ep_index
);
862 ep
->stopped_td
= NULL
;
863 ep
->stopped_trb
= NULL
;
866 * Drop the lock and complete the URBs in the cancelled TD list.
867 * New TDs to be cancelled might be added to the end of the list before
868 * we can complete all the URBs for the TDs we already unlinked.
869 * So stop when we've completed the URB for the last TD we unlinked.
872 cur_td
= list_entry(ep
->cancelled_td_list
.next
,
873 struct xhci_td
, cancelled_td_list
);
874 list_del_init(&cur_td
->cancelled_td_list
);
876 /* Clean up the cancelled URB */
877 /* Doesn't matter what we pass for status, since the core will
878 * just overwrite it (because the URB has been unlinked).
880 xhci_giveback_urb_in_irq(xhci
, cur_td
, 0, "cancelled");
882 /* Stop processing the cancelled list if the watchdog timer is
885 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
887 } while (cur_td
!= last_unlinked_td
);
889 /* Return to the event handler with xhci->lock re-acquired */
892 /* Watchdog timer function for when a stop endpoint command fails to complete.
893 * In this case, we assume the host controller is broken or dying or dead. The
894 * host may still be completing some other events, so we have to be careful to
895 * let the event ring handler and the URB dequeueing/enqueueing functions know
896 * through xhci->state.
898 * The timer may also fire if the host takes a very long time to respond to the
899 * command, and the stop endpoint command completion handler cannot delete the
900 * timer before the timer function is called. Another endpoint cancellation may
901 * sneak in before the timer function can grab the lock, and that may queue
902 * another stop endpoint command and add the timer back. So we cannot use a
903 * simple flag to say whether there is a pending stop endpoint command for a
904 * particular endpoint.
906 * Instead we use a combination of that flag and a counter for the number of
907 * pending stop endpoint commands. If the timer is the tail end of the last
908 * stop endpoint command, and the endpoint's command is still pending, we assume
911 void xhci_stop_endpoint_command_watchdog(unsigned long arg
)
913 struct xhci_hcd
*xhci
;
914 struct xhci_virt_ep
*ep
;
915 struct xhci_virt_ep
*temp_ep
;
916 struct xhci_ring
*ring
;
917 struct xhci_td
*cur_td
;
921 ep
= (struct xhci_virt_ep
*) arg
;
924 spin_lock_irqsave(&xhci
->lock
, flags
);
926 ep
->stop_cmds_pending
--;
927 if (xhci
->xhc_state
& XHCI_STATE_DYING
) {
928 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
929 "Stop EP timer ran, but another timer marked "
930 "xHCI as DYING, exiting.");
931 spin_unlock_irqrestore(&xhci
->lock
, flags
);
934 if (!(ep
->stop_cmds_pending
== 0 && (ep
->ep_state
& EP_HALT_PENDING
))) {
935 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
936 "Stop EP timer ran, but no command pending, "
938 spin_unlock_irqrestore(&xhci
->lock
, flags
);
942 xhci_warn(xhci
, "xHCI host not responding to stop endpoint command.\n");
943 xhci_warn(xhci
, "Assuming host is dying, halting host.\n");
944 /* Oops, HC is dead or dying or at least not responding to the stop
947 xhci
->xhc_state
|= XHCI_STATE_DYING
;
948 /* Disable interrupts from the host controller and start halting it */
950 spin_unlock_irqrestore(&xhci
->lock
, flags
);
952 ret
= xhci_halt(xhci
);
954 spin_lock_irqsave(&xhci
->lock
, flags
);
956 /* This is bad; the host is not responding to commands and it's
957 * not allowing itself to be halted. At least interrupts are
958 * disabled. If we call usb_hc_died(), it will attempt to
959 * disconnect all device drivers under this host. Those
960 * disconnect() methods will wait for all URBs to be unlinked,
961 * so we must complete them.
963 xhci_warn(xhci
, "Non-responsive xHCI host is not halting.\n");
964 xhci_warn(xhci
, "Completing active URBs anyway.\n");
965 /* We could turn all TDs on the rings to no-ops. This won't
966 * help if the host has cached part of the ring, and is slow if
967 * we want to preserve the cycle bit. Skip it and hope the host
968 * doesn't touch the memory.
971 for (i
= 0; i
< MAX_HC_SLOTS
; i
++) {
974 for (j
= 0; j
< 31; j
++) {
975 temp_ep
= &xhci
->devs
[i
]->eps
[j
];
976 ring
= temp_ep
->ring
;
979 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
980 "Killing URBs for slot ID %u, "
981 "ep index %u", i
, j
);
982 while (!list_empty(&ring
->td_list
)) {
983 cur_td
= list_first_entry(&ring
->td_list
,
986 list_del_init(&cur_td
->td_list
);
987 if (!list_empty(&cur_td
->cancelled_td_list
))
988 list_del_init(&cur_td
->cancelled_td_list
);
989 xhci_giveback_urb_in_irq(xhci
, cur_td
,
990 -ESHUTDOWN
, "killed");
992 while (!list_empty(&temp_ep
->cancelled_td_list
)) {
993 cur_td
= list_first_entry(
994 &temp_ep
->cancelled_td_list
,
997 list_del_init(&cur_td
->cancelled_td_list
);
998 xhci_giveback_urb_in_irq(xhci
, cur_td
,
999 -ESHUTDOWN
, "killed");
1003 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1004 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
1005 "Calling usb_hc_died()");
1006 usb_hc_died(xhci_to_hcd(xhci
)->primary_hcd
);
1007 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
1008 "xHCI host controller is dead.");
1012 static void update_ring_for_set_deq_completion(struct xhci_hcd
*xhci
,
1013 struct xhci_virt_device
*dev
,
1014 struct xhci_ring
*ep_ring
,
1015 unsigned int ep_index
)
1017 union xhci_trb
*dequeue_temp
;
1018 int num_trbs_free_temp
;
1019 bool revert
= false;
1021 num_trbs_free_temp
= ep_ring
->num_trbs_free
;
1022 dequeue_temp
= ep_ring
->dequeue
;
1024 /* If we get two back-to-back stalls, and the first stalled transfer
1025 * ends just before a link TRB, the dequeue pointer will be left on
1026 * the link TRB by the code in the while loop. So we have to update
1027 * the dequeue pointer one segment further, or we'll jump off
1028 * the segment into la-la-land.
1030 if (last_trb(xhci
, ep_ring
, ep_ring
->deq_seg
, ep_ring
->dequeue
)) {
1031 ep_ring
->deq_seg
= ep_ring
->deq_seg
->next
;
1032 ep_ring
->dequeue
= ep_ring
->deq_seg
->trbs
;
1035 while (ep_ring
->dequeue
!= dev
->eps
[ep_index
].queued_deq_ptr
) {
1036 /* We have more usable TRBs */
1037 ep_ring
->num_trbs_free
++;
1039 if (last_trb(xhci
, ep_ring
, ep_ring
->deq_seg
,
1040 ep_ring
->dequeue
)) {
1041 if (ep_ring
->dequeue
==
1042 dev
->eps
[ep_index
].queued_deq_ptr
)
1044 ep_ring
->deq_seg
= ep_ring
->deq_seg
->next
;
1045 ep_ring
->dequeue
= ep_ring
->deq_seg
->trbs
;
1047 if (ep_ring
->dequeue
== dequeue_temp
) {
1054 xhci_dbg(xhci
, "Unable to find new dequeue pointer\n");
1055 ep_ring
->num_trbs_free
= num_trbs_free_temp
;
1060 * When we get a completion for a Set Transfer Ring Dequeue Pointer command,
1061 * we need to clear the set deq pending flag in the endpoint ring state, so that
1062 * the TD queueing code can ring the doorbell again. We also need to ring the
1063 * endpoint doorbell to restart the ring, but only if there aren't more
1064 * cancellations pending.
1066 static void handle_set_deq_completion(struct xhci_hcd
*xhci
,
1067 struct xhci_event_cmd
*event
,
1068 union xhci_trb
*trb
)
1070 unsigned int slot_id
;
1071 unsigned int ep_index
;
1072 unsigned int stream_id
;
1073 struct xhci_ring
*ep_ring
;
1074 struct xhci_virt_device
*dev
;
1075 struct xhci_ep_ctx
*ep_ctx
;
1076 struct xhci_slot_ctx
*slot_ctx
;
1078 slot_id
= TRB_TO_SLOT_ID(le32_to_cpu(trb
->generic
.field
[3]));
1079 ep_index
= TRB_TO_EP_INDEX(le32_to_cpu(trb
->generic
.field
[3]));
1080 stream_id
= TRB_TO_STREAM_ID(le32_to_cpu(trb
->generic
.field
[2]));
1081 dev
= xhci
->devs
[slot_id
];
1083 ep_ring
= xhci_stream_id_to_ring(dev
, ep_index
, stream_id
);
1085 xhci_warn(xhci
, "WARN Set TR deq ptr command for "
1086 "freed stream ID %u\n",
1088 /* XXX: Harmless??? */
1089 dev
->eps
[ep_index
].ep_state
&= ~SET_DEQ_PENDING
;
1093 ep_ctx
= xhci_get_ep_ctx(xhci
, dev
->out_ctx
, ep_index
);
1094 slot_ctx
= xhci_get_slot_ctx(xhci
, dev
->out_ctx
);
1096 if (GET_COMP_CODE(le32_to_cpu(event
->status
)) != COMP_SUCCESS
) {
1097 unsigned int ep_state
;
1098 unsigned int slot_state
;
1100 switch (GET_COMP_CODE(le32_to_cpu(event
->status
))) {
1102 xhci_warn(xhci
, "WARN Set TR Deq Ptr cmd invalid because "
1103 "of stream ID configuration\n");
1105 case COMP_CTX_STATE
:
1106 xhci_warn(xhci
, "WARN Set TR Deq Ptr cmd failed due "
1107 "to incorrect slot or ep state.\n");
1108 ep_state
= le32_to_cpu(ep_ctx
->ep_info
);
1109 ep_state
&= EP_STATE_MASK
;
1110 slot_state
= le32_to_cpu(slot_ctx
->dev_state
);
1111 slot_state
= GET_SLOT_STATE(slot_state
);
1112 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
1113 "Slot state = %u, EP state = %u",
1114 slot_state
, ep_state
);
1117 xhci_warn(xhci
, "WARN Set TR Deq Ptr cmd failed because "
1118 "slot %u was not enabled.\n", slot_id
);
1121 xhci_warn(xhci
, "WARN Set TR Deq Ptr cmd with unknown "
1122 "completion code of %u.\n",
1123 GET_COMP_CODE(le32_to_cpu(event
->status
)));
1126 /* OK what do we do now? The endpoint state is hosed, and we
1127 * should never get to this point if the synchronization between
1128 * queueing, and endpoint state are correct. This might happen
1129 * if the device gets disconnected after we've finished
1130 * cancelling URBs, which might not be an error...
1133 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
1134 "Successful Set TR Deq Ptr cmd, deq = @%08llx",
1135 le64_to_cpu(ep_ctx
->deq
));
1136 if (xhci_trb_virt_to_dma(dev
->eps
[ep_index
].queued_deq_seg
,
1137 dev
->eps
[ep_index
].queued_deq_ptr
) ==
1138 (le64_to_cpu(ep_ctx
->deq
) & ~(EP_CTX_CYCLE_MASK
))) {
1139 /* Update the ring's dequeue segment and dequeue pointer
1140 * to reflect the new position.
1142 update_ring_for_set_deq_completion(xhci
, dev
,
1145 xhci_warn(xhci
, "Mismatch between completed Set TR Deq "
1146 "Ptr command & xHCI internal state.\n");
1147 xhci_warn(xhci
, "ep deq seg = %p, deq ptr = %p\n",
1148 dev
->eps
[ep_index
].queued_deq_seg
,
1149 dev
->eps
[ep_index
].queued_deq_ptr
);
1153 dev
->eps
[ep_index
].ep_state
&= ~SET_DEQ_PENDING
;
1154 dev
->eps
[ep_index
].queued_deq_seg
= NULL
;
1155 dev
->eps
[ep_index
].queued_deq_ptr
= NULL
;
1156 /* Restart any rings with pending URBs */
1157 ring_doorbell_for_active_rings(xhci
, slot_id
, ep_index
);
1160 static void handle_reset_ep_completion(struct xhci_hcd
*xhci
,
1161 struct xhci_event_cmd
*event
,
1162 union xhci_trb
*trb
)
1165 unsigned int ep_index
;
1167 slot_id
= TRB_TO_SLOT_ID(le32_to_cpu(trb
->generic
.field
[3]));
1168 ep_index
= TRB_TO_EP_INDEX(le32_to_cpu(trb
->generic
.field
[3]));
1169 /* This command will only fail if the endpoint wasn't halted,
1170 * but we don't care.
1172 xhci_dbg_trace(xhci
, trace_xhci_dbg_reset_ep
,
1173 "Ignoring reset ep completion code of %u",
1174 GET_COMP_CODE(le32_to_cpu(event
->status
)));
1176 /* HW with the reset endpoint quirk needs to have a configure endpoint
1177 * command complete before the endpoint can be used. Queue that here
1178 * because the HW can't handle two commands being queued in a row.
1180 if (xhci
->quirks
& XHCI_RESET_EP_QUIRK
) {
1181 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1182 "Queueing configure endpoint command");
1183 xhci_queue_configure_endpoint(xhci
,
1184 xhci
->devs
[slot_id
]->in_ctx
->dma
, slot_id
,
1186 xhci_ring_cmd_db(xhci
);
1188 /* Clear our internal halted state and restart the ring(s) */
1189 xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&= ~EP_HALTED
;
1190 ring_doorbell_for_active_rings(xhci
, slot_id
, ep_index
);
1194 /* Complete the command and detele it from the devcie's command queue.
1196 static void xhci_complete_cmd_in_cmd_wait_list(struct xhci_hcd
*xhci
,
1197 struct xhci_command
*command
, u32 status
)
1199 command
->status
= status
;
1200 list_del(&command
->cmd_list
);
1201 if (command
->completion
)
1202 complete(command
->completion
);
1204 xhci_free_command(xhci
, command
);
1208 /* Check to see if a command in the device's command queue matches this one.
1209 * Signal the completion or free the command, and return 1. Return 0 if the
1210 * completed command isn't at the head of the command list.
1212 static int handle_cmd_in_cmd_wait_list(struct xhci_hcd
*xhci
,
1213 struct xhci_virt_device
*virt_dev
,
1214 struct xhci_event_cmd
*event
)
1216 struct xhci_command
*command
;
1218 if (list_empty(&virt_dev
->cmd_list
))
1221 command
= list_entry(virt_dev
->cmd_list
.next
,
1222 struct xhci_command
, cmd_list
);
1223 if (xhci
->cmd_ring
->dequeue
!= command
->command_trb
)
1226 xhci_complete_cmd_in_cmd_wait_list(xhci
, command
,
1227 GET_COMP_CODE(le32_to_cpu(event
->status
)));
1232 * Finding the command trb need to be cancelled and modifying it to
1233 * NO OP command. And if the command is in device's command wait
1234 * list, finishing and freeing it.
1236 * If we can't find the command trb, we think it had already been
1239 static void xhci_cmd_to_noop(struct xhci_hcd
*xhci
, struct xhci_cd
*cur_cd
)
1241 struct xhci_segment
*cur_seg
;
1242 union xhci_trb
*cmd_trb
;
1245 if (xhci
->cmd_ring
->dequeue
== xhci
->cmd_ring
->enqueue
)
1248 /* find the current segment of command ring */
1249 cur_seg
= find_trb_seg(xhci
->cmd_ring
->first_seg
,
1250 xhci
->cmd_ring
->dequeue
, &cycle_state
);
1253 xhci_warn(xhci
, "Command ring mismatch, dequeue = %p %llx (dma)\n",
1254 xhci
->cmd_ring
->dequeue
,
1255 (unsigned long long)
1256 xhci_trb_virt_to_dma(xhci
->cmd_ring
->deq_seg
,
1257 xhci
->cmd_ring
->dequeue
));
1258 xhci_debug_ring(xhci
, xhci
->cmd_ring
);
1259 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
1263 /* find the command trb matched by cd from command ring */
1264 for (cmd_trb
= xhci
->cmd_ring
->dequeue
;
1265 cmd_trb
!= xhci
->cmd_ring
->enqueue
;
1266 next_trb(xhci
, xhci
->cmd_ring
, &cur_seg
, &cmd_trb
)) {
1267 /* If the trb is link trb, continue */
1268 if (TRB_TYPE_LINK_LE32(cmd_trb
->generic
.field
[3]))
1271 if (cur_cd
->cmd_trb
== cmd_trb
) {
1273 /* If the command in device's command list, we should
1274 * finish it and free the command structure.
1276 if (cur_cd
->command
)
1277 xhci_complete_cmd_in_cmd_wait_list(xhci
,
1278 cur_cd
->command
, COMP_CMD_STOP
);
1280 /* get cycle state from the origin command trb */
1281 cycle_state
= le32_to_cpu(cmd_trb
->generic
.field
[3])
1284 /* modify the command trb to NO OP command */
1285 cmd_trb
->generic
.field
[0] = 0;
1286 cmd_trb
->generic
.field
[1] = 0;
1287 cmd_trb
->generic
.field
[2] = 0;
1288 cmd_trb
->generic
.field
[3] = cpu_to_le32(
1289 TRB_TYPE(TRB_CMD_NOOP
) | cycle_state
);
1295 static void xhci_cancel_cmd_in_cd_list(struct xhci_hcd
*xhci
)
1297 struct xhci_cd
*cur_cd
, *next_cd
;
1299 if (list_empty(&xhci
->cancel_cmd_list
))
1302 list_for_each_entry_safe(cur_cd
, next_cd
,
1303 &xhci
->cancel_cmd_list
, cancel_cmd_list
) {
1304 xhci_cmd_to_noop(xhci
, cur_cd
);
1305 list_del(&cur_cd
->cancel_cmd_list
);
1311 * traversing the cancel_cmd_list. If the command descriptor according
1312 * to cmd_trb is found, the function free it and return 1, otherwise
1315 static int xhci_search_cmd_trb_in_cd_list(struct xhci_hcd
*xhci
,
1316 union xhci_trb
*cmd_trb
)
1318 struct xhci_cd
*cur_cd
, *next_cd
;
1320 if (list_empty(&xhci
->cancel_cmd_list
))
1323 list_for_each_entry_safe(cur_cd
, next_cd
,
1324 &xhci
->cancel_cmd_list
, cancel_cmd_list
) {
1325 if (cur_cd
->cmd_trb
== cmd_trb
) {
1326 if (cur_cd
->command
)
1327 xhci_complete_cmd_in_cmd_wait_list(xhci
,
1328 cur_cd
->command
, COMP_CMD_STOP
);
1329 list_del(&cur_cd
->cancel_cmd_list
);
1339 * If the cmd_trb_comp_code is COMP_CMD_ABORT, we just check whether the
1340 * trb pointed by the command ring dequeue pointer is the trb we want to
1341 * cancel or not. And if the cmd_trb_comp_code is COMP_CMD_STOP, we will
1342 * traverse the cancel_cmd_list to trun the all of the commands according
1343 * to command descriptor to NO-OP trb.
1345 static int handle_stopped_cmd_ring(struct xhci_hcd
*xhci
,
1346 int cmd_trb_comp_code
)
1348 int cur_trb_is_good
= 0;
1350 /* Searching the cmd trb pointed by the command ring dequeue
1351 * pointer in command descriptor list. If it is found, free it.
1353 cur_trb_is_good
= xhci_search_cmd_trb_in_cd_list(xhci
,
1354 xhci
->cmd_ring
->dequeue
);
1356 if (cmd_trb_comp_code
== COMP_CMD_ABORT
)
1357 xhci
->cmd_ring_state
= CMD_RING_STATE_STOPPED
;
1358 else if (cmd_trb_comp_code
== COMP_CMD_STOP
) {
1359 /* traversing the cancel_cmd_list and canceling
1360 * the command according to command descriptor
1362 xhci_cancel_cmd_in_cd_list(xhci
);
1364 xhci
->cmd_ring_state
= CMD_RING_STATE_RUNNING
;
1366 * ring command ring doorbell again to restart the
1369 if (xhci
->cmd_ring
->dequeue
!= xhci
->cmd_ring
->enqueue
)
1370 xhci_ring_cmd_db(xhci
);
1372 return cur_trb_is_good
;
1375 static void handle_cmd_completion(struct xhci_hcd
*xhci
,
1376 struct xhci_event_cmd
*event
)
1378 int slot_id
= TRB_TO_SLOT_ID(le32_to_cpu(event
->flags
));
1380 dma_addr_t cmd_dequeue_dma
;
1381 struct xhci_input_control_ctx
*ctrl_ctx
;
1382 struct xhci_virt_device
*virt_dev
;
1383 unsigned int ep_index
;
1384 struct xhci_ring
*ep_ring
;
1385 unsigned int ep_state
;
1387 cmd_dma
= le64_to_cpu(event
->cmd_trb
);
1388 cmd_dequeue_dma
= xhci_trb_virt_to_dma(xhci
->cmd_ring
->deq_seg
,
1389 xhci
->cmd_ring
->dequeue
);
1390 /* Is the command ring deq ptr out of sync with the deq seg ptr? */
1391 if (cmd_dequeue_dma
== 0) {
1392 xhci
->error_bitmask
|= 1 << 4;
1395 /* Does the DMA address match our internal dequeue pointer address? */
1396 if (cmd_dma
!= (u64
) cmd_dequeue_dma
) {
1397 xhci
->error_bitmask
|= 1 << 5;
1401 trace_xhci_cmd_completion(&xhci
->cmd_ring
->dequeue
->generic
,
1402 (struct xhci_generic_trb
*) event
);
1404 if ((GET_COMP_CODE(le32_to_cpu(event
->status
)) == COMP_CMD_ABORT
) ||
1405 (GET_COMP_CODE(le32_to_cpu(event
->status
)) == COMP_CMD_STOP
)) {
1406 /* If the return value is 0, we think the trb pointed by
1407 * command ring dequeue pointer is a good trb. The good
1408 * trb means we don't want to cancel the trb, but it have
1409 * been stopped by host. So we should handle it normally.
1410 * Otherwise, driver should invoke inc_deq() and return.
1412 if (handle_stopped_cmd_ring(xhci
,
1413 GET_COMP_CODE(le32_to_cpu(event
->status
)))) {
1414 inc_deq(xhci
, xhci
->cmd_ring
);
1417 /* There is no command to handle if we get a stop event when the
1418 * command ring is empty, event->cmd_trb points to the next
1421 if (xhci
->cmd_ring
->dequeue
== xhci
->cmd_ring
->enqueue
)
1425 switch (le32_to_cpu(xhci
->cmd_ring
->dequeue
->generic
.field
[3])
1426 & TRB_TYPE_BITMASK
) {
1427 case TRB_TYPE(TRB_ENABLE_SLOT
):
1428 if (GET_COMP_CODE(le32_to_cpu(event
->status
)) == COMP_SUCCESS
)
1429 xhci
->slot_id
= slot_id
;
1432 complete(&xhci
->addr_dev
);
1434 case TRB_TYPE(TRB_DISABLE_SLOT
):
1435 if (xhci
->devs
[slot_id
]) {
1436 if (xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)
1437 /* Delete default control endpoint resources */
1438 xhci_free_device_endpoint_resources(xhci
,
1439 xhci
->devs
[slot_id
], true);
1440 xhci_free_virt_device(xhci
, slot_id
);
1443 case TRB_TYPE(TRB_CONFIG_EP
):
1444 virt_dev
= xhci
->devs
[slot_id
];
1445 if (handle_cmd_in_cmd_wait_list(xhci
, virt_dev
, event
))
1448 * Configure endpoint commands can come from the USB core
1449 * configuration or alt setting changes, or because the HW
1450 * needed an extra configure endpoint command after a reset
1451 * endpoint command or streams were being configured.
1452 * If the command was for a halted endpoint, the xHCI driver
1453 * is not waiting on the configure endpoint command.
1455 ctrl_ctx
= xhci_get_input_control_ctx(xhci
,
1458 xhci_warn(xhci
, "Could not get input context, bad type.\n");
1461 /* Input ctx add_flags are the endpoint index plus one */
1462 ep_index
= xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx
->add_flags
)) - 1;
1463 /* A usb_set_interface() call directly after clearing a halted
1464 * condition may race on this quirky hardware. Not worth
1465 * worrying about, since this is prototype hardware. Not sure
1466 * if this will work for streams, but streams support was
1467 * untested on this prototype.
1469 if (xhci
->quirks
& XHCI_RESET_EP_QUIRK
&&
1470 ep_index
!= (unsigned int) -1 &&
1471 le32_to_cpu(ctrl_ctx
->add_flags
) - SLOT_FLAG
==
1472 le32_to_cpu(ctrl_ctx
->drop_flags
)) {
1473 ep_ring
= xhci
->devs
[slot_id
]->eps
[ep_index
].ring
;
1474 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
1475 if (!(ep_state
& EP_HALTED
))
1476 goto bandwidth_change
;
1477 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1478 "Completed config ep cmd - "
1479 "last ep index = %d, state = %d",
1480 ep_index
, ep_state
);
1481 /* Clear internal halted state and restart ring(s) */
1482 xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&=
1484 ring_doorbell_for_active_rings(xhci
, slot_id
, ep_index
);
1488 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1489 "Completed config ep cmd");
1490 xhci
->devs
[slot_id
]->cmd_status
=
1491 GET_COMP_CODE(le32_to_cpu(event
->status
));
1492 complete(&xhci
->devs
[slot_id
]->cmd_completion
);
1494 case TRB_TYPE(TRB_EVAL_CONTEXT
):
1495 virt_dev
= xhci
->devs
[slot_id
];
1496 if (handle_cmd_in_cmd_wait_list(xhci
, virt_dev
, event
))
1498 xhci
->devs
[slot_id
]->cmd_status
= GET_COMP_CODE(le32_to_cpu(event
->status
));
1499 complete(&xhci
->devs
[slot_id
]->cmd_completion
);
1501 case TRB_TYPE(TRB_ADDR_DEV
):
1502 xhci
->devs
[slot_id
]->cmd_status
= GET_COMP_CODE(le32_to_cpu(event
->status
));
1503 complete(&xhci
->addr_dev
);
1505 case TRB_TYPE(TRB_STOP_RING
):
1506 handle_stopped_endpoint(xhci
, xhci
->cmd_ring
->dequeue
, event
);
1508 case TRB_TYPE(TRB_SET_DEQ
):
1509 handle_set_deq_completion(xhci
, event
, xhci
->cmd_ring
->dequeue
);
1511 case TRB_TYPE(TRB_CMD_NOOP
):
1513 case TRB_TYPE(TRB_RESET_EP
):
1514 handle_reset_ep_completion(xhci
, event
, xhci
->cmd_ring
->dequeue
);
1516 case TRB_TYPE(TRB_RESET_DEV
):
1517 xhci_dbg(xhci
, "Completed reset device command.\n");
1518 slot_id
= TRB_TO_SLOT_ID(
1519 le32_to_cpu(xhci
->cmd_ring
->dequeue
->generic
.field
[3]));
1520 virt_dev
= xhci
->devs
[slot_id
];
1522 handle_cmd_in_cmd_wait_list(xhci
, virt_dev
, event
);
1524 xhci_warn(xhci
, "Reset device command completion "
1525 "for disabled slot %u\n", slot_id
);
1527 case TRB_TYPE(TRB_NEC_GET_FW
):
1528 if (!(xhci
->quirks
& XHCI_NEC_HOST
)) {
1529 xhci
->error_bitmask
|= 1 << 6;
1532 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1533 "NEC firmware version %2x.%02x",
1534 NEC_FW_MAJOR(le32_to_cpu(event
->status
)),
1535 NEC_FW_MINOR(le32_to_cpu(event
->status
)));
1538 /* Skip over unknown commands on the event ring */
1539 xhci
->error_bitmask
|= 1 << 6;
1542 inc_deq(xhci
, xhci
->cmd_ring
);
1545 static void handle_vendor_event(struct xhci_hcd
*xhci
,
1546 union xhci_trb
*event
)
1550 trb_type
= TRB_FIELD_TO_TYPE(le32_to_cpu(event
->generic
.field
[3]));
1551 xhci_dbg(xhci
, "Vendor specific event TRB type = %u\n", trb_type
);
1552 if (trb_type
== TRB_NEC_CMD_COMP
&& (xhci
->quirks
& XHCI_NEC_HOST
))
1553 handle_cmd_completion(xhci
, &event
->event_cmd
);
1556 /* @port_id: the one-based port ID from the hardware (indexed from array of all
1557 * port registers -- USB 3.0 and USB 2.0).
1559 * Returns a zero-based port number, which is suitable for indexing into each of
1560 * the split roothubs' port arrays and bus state arrays.
1561 * Add one to it in order to call xhci_find_slot_id_by_port.
1563 static unsigned int find_faked_portnum_from_hw_portnum(struct usb_hcd
*hcd
,
1564 struct xhci_hcd
*xhci
, u32 port_id
)
1567 unsigned int num_similar_speed_ports
= 0;
1569 /* port_id from the hardware is 1-based, but port_array[], usb3_ports[],
1570 * and usb2_ports are 0-based indexes. Count the number of similar
1571 * speed ports, up to 1 port before this port.
1573 for (i
= 0; i
< (port_id
- 1); i
++) {
1574 u8 port_speed
= xhci
->port_array
[i
];
1577 * Skip ports that don't have known speeds, or have duplicate
1578 * Extended Capabilities port speed entries.
1580 if (port_speed
== 0 || port_speed
== DUPLICATE_ENTRY
)
1584 * USB 3.0 ports are always under a USB 3.0 hub. USB 2.0 and
1585 * 1.1 ports are under the USB 2.0 hub. If the port speed
1586 * matches the device speed, it's a similar speed port.
1588 if ((port_speed
== 0x03) == (hcd
->speed
== HCD_USB3
))
1589 num_similar_speed_ports
++;
1591 return num_similar_speed_ports
;
1594 static void handle_device_notification(struct xhci_hcd
*xhci
,
1595 union xhci_trb
*event
)
1598 struct usb_device
*udev
;
1600 slot_id
= TRB_TO_SLOT_ID(event
->generic
.field
[3]);
1601 if (!xhci
->devs
[slot_id
]) {
1602 xhci_warn(xhci
, "Device Notification event for "
1603 "unused slot %u\n", slot_id
);
1607 xhci_dbg(xhci
, "Device Wake Notification event for slot ID %u\n",
1609 udev
= xhci
->devs
[slot_id
]->udev
;
1610 if (udev
&& udev
->parent
)
1611 usb_wakeup_notification(udev
->parent
, udev
->portnum
);
1614 static void handle_port_status(struct xhci_hcd
*xhci
,
1615 union xhci_trb
*event
)
1617 struct usb_hcd
*hcd
;
1622 unsigned int faked_port_index
;
1624 struct xhci_bus_state
*bus_state
;
1625 __le32 __iomem
**port_array
;
1626 bool bogus_port_status
= false;
1628 /* Port status change events always have a successful completion code */
1629 if (GET_COMP_CODE(le32_to_cpu(event
->generic
.field
[2])) != COMP_SUCCESS
) {
1630 xhci_warn(xhci
, "WARN: xHC returned failed port status event\n");
1631 xhci
->error_bitmask
|= 1 << 8;
1633 port_id
= GET_PORT_ID(le32_to_cpu(event
->generic
.field
[0]));
1634 xhci_dbg(xhci
, "Port Status Change Event for port %d\n", port_id
);
1636 max_ports
= HCS_MAX_PORTS(xhci
->hcs_params1
);
1637 if ((port_id
<= 0) || (port_id
> max_ports
)) {
1638 xhci_warn(xhci
, "Invalid port id %d\n", port_id
);
1639 inc_deq(xhci
, xhci
->event_ring
);
1643 /* Figure out which usb_hcd this port is attached to:
1644 * is it a USB 3.0 port or a USB 2.0/1.1 port?
1646 major_revision
= xhci
->port_array
[port_id
- 1];
1648 /* Find the right roothub. */
1649 hcd
= xhci_to_hcd(xhci
);
1650 if ((major_revision
== 0x03) != (hcd
->speed
== HCD_USB3
))
1651 hcd
= xhci
->shared_hcd
;
1653 if (major_revision
== 0) {
1654 xhci_warn(xhci
, "Event for port %u not in "
1655 "Extended Capabilities, ignoring.\n",
1657 bogus_port_status
= true;
1660 if (major_revision
== DUPLICATE_ENTRY
) {
1661 xhci_warn(xhci
, "Event for port %u duplicated in"
1662 "Extended Capabilities, ignoring.\n",
1664 bogus_port_status
= true;
1669 * Hardware port IDs reported by a Port Status Change Event include USB
1670 * 3.0 and USB 2.0 ports. We want to check if the port has reported a
1671 * resume event, but we first need to translate the hardware port ID
1672 * into the index into the ports on the correct split roothub, and the
1673 * correct bus_state structure.
1675 bus_state
= &xhci
->bus_state
[hcd_index(hcd
)];
1676 if (hcd
->speed
== HCD_USB3
)
1677 port_array
= xhci
->usb3_ports
;
1679 port_array
= xhci
->usb2_ports
;
1680 /* Find the faked port hub number */
1681 faked_port_index
= find_faked_portnum_from_hw_portnum(hcd
, xhci
,
1684 temp
= xhci_readl(xhci
, port_array
[faked_port_index
]);
1685 if (hcd
->state
== HC_STATE_SUSPENDED
) {
1686 xhci_dbg(xhci
, "resume root hub\n");
1687 usb_hcd_resume_root_hub(hcd
);
1690 if ((temp
& PORT_PLC
) && (temp
& PORT_PLS_MASK
) == XDEV_RESUME
) {
1691 xhci_dbg(xhci
, "port resume event for port %d\n", port_id
);
1693 temp1
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
1694 if (!(temp1
& CMD_RUN
)) {
1695 xhci_warn(xhci
, "xHC is not running.\n");
1699 if (DEV_SUPERSPEED(temp
)) {
1700 xhci_dbg(xhci
, "remote wake SS port %d\n", port_id
);
1701 /* Set a flag to say the port signaled remote wakeup,
1702 * so we can tell the difference between the end of
1703 * device and host initiated resume.
1705 bus_state
->port_remote_wakeup
|= 1 << faked_port_index
;
1706 xhci_test_and_clear_bit(xhci
, port_array
,
1707 faked_port_index
, PORT_PLC
);
1708 xhci_set_link_state(xhci
, port_array
, faked_port_index
,
1710 /* Need to wait until the next link state change
1711 * indicates the device is actually in U0.
1713 bogus_port_status
= true;
1716 xhci_dbg(xhci
, "resume HS port %d\n", port_id
);
1717 bus_state
->resume_done
[faked_port_index
] = jiffies
+
1718 msecs_to_jiffies(20);
1719 set_bit(faked_port_index
, &bus_state
->resuming_ports
);
1720 mod_timer(&hcd
->rh_timer
,
1721 bus_state
->resume_done
[faked_port_index
]);
1722 /* Do the rest in GetPortStatus */
1726 if ((temp
& PORT_PLC
) && (temp
& PORT_PLS_MASK
) == XDEV_U0
&&
1727 DEV_SUPERSPEED(temp
)) {
1728 xhci_dbg(xhci
, "resume SS port %d finished\n", port_id
);
1729 /* We've just brought the device into U0 through either the
1730 * Resume state after a device remote wakeup, or through the
1731 * U3Exit state after a host-initiated resume. If it's a device
1732 * initiated remote wake, don't pass up the link state change,
1733 * so the roothub behavior is consistent with external
1734 * USB 3.0 hub behavior.
1736 slot_id
= xhci_find_slot_id_by_port(hcd
, xhci
,
1737 faked_port_index
+ 1);
1738 if (slot_id
&& xhci
->devs
[slot_id
])
1739 xhci_ring_device(xhci
, slot_id
);
1740 if (bus_state
->port_remote_wakeup
& (1 << faked_port_index
)) {
1741 bus_state
->port_remote_wakeup
&=
1742 ~(1 << faked_port_index
);
1743 xhci_test_and_clear_bit(xhci
, port_array
,
1744 faked_port_index
, PORT_PLC
);
1745 usb_wakeup_notification(hcd
->self
.root_hub
,
1746 faked_port_index
+ 1);
1747 bogus_port_status
= true;
1752 if (hcd
->speed
!= HCD_USB3
)
1753 xhci_test_and_clear_bit(xhci
, port_array
, faked_port_index
,
1757 /* Update event ring dequeue pointer before dropping the lock */
1758 inc_deq(xhci
, xhci
->event_ring
);
1760 /* Don't make the USB core poll the roothub if we got a bad port status
1761 * change event. Besides, at that point we can't tell which roothub
1762 * (USB 2.0 or USB 3.0) to kick.
1764 if (bogus_port_status
)
1768 * xHCI port-status-change events occur when the "or" of all the
1769 * status-change bits in the portsc register changes from 0 to 1.
1770 * New status changes won't cause an event if any other change
1771 * bits are still set. When an event occurs, switch over to
1772 * polling to avoid losing status changes.
1774 xhci_dbg(xhci
, "%s: starting port polling.\n", __func__
);
1775 set_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
1776 spin_unlock(&xhci
->lock
);
1777 /* Pass this up to the core */
1778 usb_hcd_poll_rh_status(hcd
);
1779 spin_lock(&xhci
->lock
);
1783 * This TD is defined by the TRBs starting at start_trb in start_seg and ending
1784 * at end_trb, which may be in another segment. If the suspect DMA address is a
1785 * TRB in this TD, this function returns that TRB's segment. Otherwise it
1788 struct xhci_segment
*trb_in_td(struct xhci_segment
*start_seg
,
1789 union xhci_trb
*start_trb
,
1790 union xhci_trb
*end_trb
,
1791 dma_addr_t suspect_dma
)
1793 dma_addr_t start_dma
;
1794 dma_addr_t end_seg_dma
;
1795 dma_addr_t end_trb_dma
;
1796 struct xhci_segment
*cur_seg
;
1798 start_dma
= xhci_trb_virt_to_dma(start_seg
, start_trb
);
1799 cur_seg
= start_seg
;
1804 /* We may get an event for a Link TRB in the middle of a TD */
1805 end_seg_dma
= xhci_trb_virt_to_dma(cur_seg
,
1806 &cur_seg
->trbs
[TRBS_PER_SEGMENT
- 1]);
1807 /* If the end TRB isn't in this segment, this is set to 0 */
1808 end_trb_dma
= xhci_trb_virt_to_dma(cur_seg
, end_trb
);
1810 if (end_trb_dma
> 0) {
1811 /* The end TRB is in this segment, so suspect should be here */
1812 if (start_dma
<= end_trb_dma
) {
1813 if (suspect_dma
>= start_dma
&& suspect_dma
<= end_trb_dma
)
1816 /* Case for one segment with
1817 * a TD wrapped around to the top
1819 if ((suspect_dma
>= start_dma
&&
1820 suspect_dma
<= end_seg_dma
) ||
1821 (suspect_dma
>= cur_seg
->dma
&&
1822 suspect_dma
<= end_trb_dma
))
1827 /* Might still be somewhere in this segment */
1828 if (suspect_dma
>= start_dma
&& suspect_dma
<= end_seg_dma
)
1831 cur_seg
= cur_seg
->next
;
1832 start_dma
= xhci_trb_virt_to_dma(cur_seg
, &cur_seg
->trbs
[0]);
1833 } while (cur_seg
!= start_seg
);
1838 static void xhci_cleanup_halted_endpoint(struct xhci_hcd
*xhci
,
1839 unsigned int slot_id
, unsigned int ep_index
,
1840 unsigned int stream_id
,
1841 struct xhci_td
*td
, union xhci_trb
*event_trb
)
1843 struct xhci_virt_ep
*ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
1844 ep
->ep_state
|= EP_HALTED
;
1845 ep
->stopped_td
= td
;
1846 ep
->stopped_trb
= event_trb
;
1847 ep
->stopped_stream
= stream_id
;
1849 xhci_queue_reset_ep(xhci
, slot_id
, ep_index
);
1850 xhci_cleanup_stalled_ring(xhci
, td
->urb
->dev
, ep_index
);
1852 ep
->stopped_td
= NULL
;
1853 ep
->stopped_trb
= NULL
;
1854 ep
->stopped_stream
= 0;
1856 xhci_ring_cmd_db(xhci
);
1859 /* Check if an error has halted the endpoint ring. The class driver will
1860 * cleanup the halt for a non-default control endpoint if we indicate a stall.
1861 * However, a babble and other errors also halt the endpoint ring, and the class
1862 * driver won't clear the halt in that case, so we need to issue a Set Transfer
1863 * Ring Dequeue Pointer command manually.
1865 static int xhci_requires_manual_halt_cleanup(struct xhci_hcd
*xhci
,
1866 struct xhci_ep_ctx
*ep_ctx
,
1867 unsigned int trb_comp_code
)
1869 /* TRB completion codes that may require a manual halt cleanup */
1870 if (trb_comp_code
== COMP_TX_ERR
||
1871 trb_comp_code
== COMP_BABBLE
||
1872 trb_comp_code
== COMP_SPLIT_ERR
)
1873 /* The 0.96 spec says a babbling control endpoint
1874 * is not halted. The 0.96 spec says it is. Some HW
1875 * claims to be 0.95 compliant, but it halts the control
1876 * endpoint anyway. Check if a babble halted the
1879 if ((ep_ctx
->ep_info
& cpu_to_le32(EP_STATE_MASK
)) ==
1880 cpu_to_le32(EP_STATE_HALTED
))
1886 int xhci_is_vendor_info_code(struct xhci_hcd
*xhci
, unsigned int trb_comp_code
)
1888 if (trb_comp_code
>= 224 && trb_comp_code
<= 255) {
1889 /* Vendor defined "informational" completion code,
1890 * treat as not-an-error.
1892 xhci_dbg(xhci
, "Vendor defined info completion code %u\n",
1894 xhci_dbg(xhci
, "Treating code as success.\n");
1901 * Finish the td processing, remove the td from td list;
1902 * Return 1 if the urb can be given back.
1904 static int finish_td(struct xhci_hcd
*xhci
, struct xhci_td
*td
,
1905 union xhci_trb
*event_trb
, struct xhci_transfer_event
*event
,
1906 struct xhci_virt_ep
*ep
, int *status
, bool skip
)
1908 struct xhci_virt_device
*xdev
;
1909 struct xhci_ring
*ep_ring
;
1910 unsigned int slot_id
;
1912 struct urb
*urb
= NULL
;
1913 struct xhci_ep_ctx
*ep_ctx
;
1915 struct urb_priv
*urb_priv
;
1918 slot_id
= TRB_TO_SLOT_ID(le32_to_cpu(event
->flags
));
1919 xdev
= xhci
->devs
[slot_id
];
1920 ep_index
= TRB_TO_EP_ID(le32_to_cpu(event
->flags
)) - 1;
1921 ep_ring
= xhci_dma_to_transfer_ring(ep
, le64_to_cpu(event
->buffer
));
1922 ep_ctx
= xhci_get_ep_ctx(xhci
, xdev
->out_ctx
, ep_index
);
1923 trb_comp_code
= GET_COMP_CODE(le32_to_cpu(event
->transfer_len
));
1928 if (trb_comp_code
== COMP_STOP_INVAL
||
1929 trb_comp_code
== COMP_STOP
) {
1930 /* The Endpoint Stop Command completion will take care of any
1931 * stopped TDs. A stopped TD may be restarted, so don't update
1932 * the ring dequeue pointer or take this TD off any lists yet.
1934 ep
->stopped_td
= td
;
1935 ep
->stopped_trb
= event_trb
;
1938 if (trb_comp_code
== COMP_STALL
) {
1939 /* The transfer is completed from the driver's
1940 * perspective, but we need to issue a set dequeue
1941 * command for this stalled endpoint to move the dequeue
1942 * pointer past the TD. We can't do that here because
1943 * the halt condition must be cleared first. Let the
1944 * USB class driver clear the stall later.
1946 ep
->stopped_td
= td
;
1947 ep
->stopped_trb
= event_trb
;
1948 ep
->stopped_stream
= ep_ring
->stream_id
;
1949 } else if (xhci_requires_manual_halt_cleanup(xhci
,
1950 ep_ctx
, trb_comp_code
)) {
1951 /* Other types of errors halt the endpoint, but the
1952 * class driver doesn't call usb_reset_endpoint() unless
1953 * the error is -EPIPE. Clear the halted status in the
1954 * xHCI hardware manually.
1956 xhci_cleanup_halted_endpoint(xhci
,
1957 slot_id
, ep_index
, ep_ring
->stream_id
,
1960 /* Update ring dequeue pointer */
1961 while (ep_ring
->dequeue
!= td
->last_trb
)
1962 inc_deq(xhci
, ep_ring
);
1963 inc_deq(xhci
, ep_ring
);
1967 /* Clean up the endpoint's TD list */
1969 urb_priv
= urb
->hcpriv
;
1971 /* Do one last check of the actual transfer length.
1972 * If the host controller said we transferred more data than
1973 * the buffer length, urb->actual_length will be a very big
1974 * number (since it's unsigned). Play it safe and say we didn't
1975 * transfer anything.
1977 if (urb
->actual_length
> urb
->transfer_buffer_length
) {
1978 xhci_warn(xhci
, "URB transfer length is wrong, "
1979 "xHC issue? req. len = %u, "
1981 urb
->transfer_buffer_length
,
1982 urb
->actual_length
);
1983 urb
->actual_length
= 0;
1984 if (td
->urb
->transfer_flags
& URB_SHORT_NOT_OK
)
1985 *status
= -EREMOTEIO
;
1989 list_del_init(&td
->td_list
);
1990 /* Was this TD slated to be cancelled but completed anyway? */
1991 if (!list_empty(&td
->cancelled_td_list
))
1992 list_del_init(&td
->cancelled_td_list
);
1995 /* Giveback the urb when all the tds are completed */
1996 if (urb_priv
->td_cnt
== urb_priv
->length
) {
1998 if (usb_pipetype(urb
->pipe
) == PIPE_ISOCHRONOUS
) {
1999 xhci_to_hcd(xhci
)->self
.bandwidth_isoc_reqs
--;
2000 if (xhci_to_hcd(xhci
)->self
.bandwidth_isoc_reqs
2002 if (xhci
->quirks
& XHCI_AMD_PLL_FIX
)
2003 usb_amd_quirk_pll_enable();
2013 * Process control tds, update urb status and actual_length.
2015 static int process_ctrl_td(struct xhci_hcd
*xhci
, struct xhci_td
*td
,
2016 union xhci_trb
*event_trb
, struct xhci_transfer_event
*event
,
2017 struct xhci_virt_ep
*ep
, int *status
)
2019 struct xhci_virt_device
*xdev
;
2020 struct xhci_ring
*ep_ring
;
2021 unsigned int slot_id
;
2023 struct xhci_ep_ctx
*ep_ctx
;
2026 slot_id
= TRB_TO_SLOT_ID(le32_to_cpu(event
->flags
));
2027 xdev
= xhci
->devs
[slot_id
];
2028 ep_index
= TRB_TO_EP_ID(le32_to_cpu(event
->flags
)) - 1;
2029 ep_ring
= xhci_dma_to_transfer_ring(ep
, le64_to_cpu(event
->buffer
));
2030 ep_ctx
= xhci_get_ep_ctx(xhci
, xdev
->out_ctx
, ep_index
);
2031 trb_comp_code
= GET_COMP_CODE(le32_to_cpu(event
->transfer_len
));
2033 switch (trb_comp_code
) {
2035 if (event_trb
== ep_ring
->dequeue
) {
2036 xhci_warn(xhci
, "WARN: Success on ctrl setup TRB "
2037 "without IOC set??\n");
2038 *status
= -ESHUTDOWN
;
2039 } else if (event_trb
!= td
->last_trb
) {
2040 xhci_warn(xhci
, "WARN: Success on ctrl data TRB "
2041 "without IOC set??\n");
2042 *status
= -ESHUTDOWN
;
2048 if (td
->urb
->transfer_flags
& URB_SHORT_NOT_OK
)
2049 *status
= -EREMOTEIO
;
2053 case COMP_STOP_INVAL
:
2055 return finish_td(xhci
, td
, event_trb
, event
, ep
, status
, false);
2057 if (!xhci_requires_manual_halt_cleanup(xhci
,
2058 ep_ctx
, trb_comp_code
))
2060 xhci_dbg(xhci
, "TRB error code %u, "
2061 "halted endpoint index = %u\n",
2062 trb_comp_code
, ep_index
);
2063 /* else fall through */
2065 /* Did we transfer part of the data (middle) phase? */
2066 if (event_trb
!= ep_ring
->dequeue
&&
2067 event_trb
!= td
->last_trb
)
2068 td
->urb
->actual_length
=
2069 td
->urb
->transfer_buffer_length
-
2070 EVENT_TRB_LEN(le32_to_cpu(event
->transfer_len
));
2072 td
->urb
->actual_length
= 0;
2074 xhci_cleanup_halted_endpoint(xhci
,
2075 slot_id
, ep_index
, 0, td
, event_trb
);
2076 return finish_td(xhci
, td
, event_trb
, event
, ep
, status
, true);
2079 * Did we transfer any data, despite the errors that might have
2080 * happened? I.e. did we get past the setup stage?
2082 if (event_trb
!= ep_ring
->dequeue
) {
2083 /* The event was for the status stage */
2084 if (event_trb
== td
->last_trb
) {
2085 if (td
->urb
->actual_length
!= 0) {
2086 /* Don't overwrite a previously set error code
2088 if ((*status
== -EINPROGRESS
|| *status
== 0) &&
2089 (td
->urb
->transfer_flags
2090 & URB_SHORT_NOT_OK
))
2091 /* Did we already see a short data
2093 *status
= -EREMOTEIO
;
2095 td
->urb
->actual_length
=
2096 td
->urb
->transfer_buffer_length
;
2099 /* Maybe the event was for the data stage? */
2100 td
->urb
->actual_length
=
2101 td
->urb
->transfer_buffer_length
-
2102 EVENT_TRB_LEN(le32_to_cpu(event
->transfer_len
));
2103 xhci_dbg(xhci
, "Waiting for status "
2109 return finish_td(xhci
, td
, event_trb
, event
, ep
, status
, false);
2113 * Process isochronous tds, update urb packet status and actual_length.
2115 static int process_isoc_td(struct xhci_hcd
*xhci
, struct xhci_td
*td
,
2116 union xhci_trb
*event_trb
, struct xhci_transfer_event
*event
,
2117 struct xhci_virt_ep
*ep
, int *status
)
2119 struct xhci_ring
*ep_ring
;
2120 struct urb_priv
*urb_priv
;
2123 union xhci_trb
*cur_trb
;
2124 struct xhci_segment
*cur_seg
;
2125 struct usb_iso_packet_descriptor
*frame
;
2127 bool skip_td
= false;
2129 ep_ring
= xhci_dma_to_transfer_ring(ep
, le64_to_cpu(event
->buffer
));
2130 trb_comp_code
= GET_COMP_CODE(le32_to_cpu(event
->transfer_len
));
2131 urb_priv
= td
->urb
->hcpriv
;
2132 idx
= urb_priv
->td_cnt
;
2133 frame
= &td
->urb
->iso_frame_desc
[idx
];
2135 /* handle completion code */
2136 switch (trb_comp_code
) {
2138 if (EVENT_TRB_LEN(le32_to_cpu(event
->transfer_len
)) == 0) {
2142 if ((xhci
->quirks
& XHCI_TRUST_TX_LENGTH
))
2143 trb_comp_code
= COMP_SHORT_TX
;
2145 frame
->status
= td
->urb
->transfer_flags
& URB_SHORT_NOT_OK
?
2149 frame
->status
= -ECOMM
;
2152 case COMP_BUFF_OVER
:
2154 frame
->status
= -EOVERFLOW
;
2160 frame
->status
= -EPROTO
;
2164 case COMP_STOP_INVAL
:
2171 if (trb_comp_code
== COMP_SUCCESS
|| skip_td
) {
2172 frame
->actual_length
= frame
->length
;
2173 td
->urb
->actual_length
+= frame
->length
;
2175 for (cur_trb
= ep_ring
->dequeue
,
2176 cur_seg
= ep_ring
->deq_seg
; cur_trb
!= event_trb
;
2177 next_trb(xhci
, ep_ring
, &cur_seg
, &cur_trb
)) {
2178 if (!TRB_TYPE_NOOP_LE32(cur_trb
->generic
.field
[3]) &&
2179 !TRB_TYPE_LINK_LE32(cur_trb
->generic
.field
[3]))
2180 len
+= TRB_LEN(le32_to_cpu(cur_trb
->generic
.field
[2]));
2182 len
+= TRB_LEN(le32_to_cpu(cur_trb
->generic
.field
[2])) -
2183 EVENT_TRB_LEN(le32_to_cpu(event
->transfer_len
));
2185 if (trb_comp_code
!= COMP_STOP_INVAL
) {
2186 frame
->actual_length
= len
;
2187 td
->urb
->actual_length
+= len
;
2191 return finish_td(xhci
, td
, event_trb
, event
, ep
, status
, false);
2194 static int skip_isoc_td(struct xhci_hcd
*xhci
, struct xhci_td
*td
,
2195 struct xhci_transfer_event
*event
,
2196 struct xhci_virt_ep
*ep
, int *status
)
2198 struct xhci_ring
*ep_ring
;
2199 struct urb_priv
*urb_priv
;
2200 struct usb_iso_packet_descriptor
*frame
;
2203 ep_ring
= xhci_dma_to_transfer_ring(ep
, le64_to_cpu(event
->buffer
));
2204 urb_priv
= td
->urb
->hcpriv
;
2205 idx
= urb_priv
->td_cnt
;
2206 frame
= &td
->urb
->iso_frame_desc
[idx
];
2208 /* The transfer is partly done. */
2209 frame
->status
= -EXDEV
;
2211 /* calc actual length */
2212 frame
->actual_length
= 0;
2214 /* Update ring dequeue pointer */
2215 while (ep_ring
->dequeue
!= td
->last_trb
)
2216 inc_deq(xhci
, ep_ring
);
2217 inc_deq(xhci
, ep_ring
);
2219 return finish_td(xhci
, td
, NULL
, event
, ep
, status
, true);
2223 * Process bulk and interrupt tds, update urb status and actual_length.
2225 static int process_bulk_intr_td(struct xhci_hcd
*xhci
, struct xhci_td
*td
,
2226 union xhci_trb
*event_trb
, struct xhci_transfer_event
*event
,
2227 struct xhci_virt_ep
*ep
, int *status
)
2229 struct xhci_ring
*ep_ring
;
2230 union xhci_trb
*cur_trb
;
2231 struct xhci_segment
*cur_seg
;
2234 ep_ring
= xhci_dma_to_transfer_ring(ep
, le64_to_cpu(event
->buffer
));
2235 trb_comp_code
= GET_COMP_CODE(le32_to_cpu(event
->transfer_len
));
2237 switch (trb_comp_code
) {
2239 /* Double check that the HW transferred everything. */
2240 if (event_trb
!= td
->last_trb
||
2241 EVENT_TRB_LEN(le32_to_cpu(event
->transfer_len
)) != 0) {
2242 xhci_warn(xhci
, "WARN Successful completion "
2244 if (td
->urb
->transfer_flags
& URB_SHORT_NOT_OK
)
2245 *status
= -EREMOTEIO
;
2248 if ((xhci
->quirks
& XHCI_TRUST_TX_LENGTH
))
2249 trb_comp_code
= COMP_SHORT_TX
;
2255 if (td
->urb
->transfer_flags
& URB_SHORT_NOT_OK
)
2256 *status
= -EREMOTEIO
;
2261 /* Others already handled above */
2264 if (trb_comp_code
== COMP_SHORT_TX
)
2265 xhci_dbg(xhci
, "ep %#x - asked for %d bytes, "
2266 "%d bytes untransferred\n",
2267 td
->urb
->ep
->desc
.bEndpointAddress
,
2268 td
->urb
->transfer_buffer_length
,
2269 EVENT_TRB_LEN(le32_to_cpu(event
->transfer_len
)));
2270 /* Fast path - was this the last TRB in the TD for this URB? */
2271 if (event_trb
== td
->last_trb
) {
2272 if (EVENT_TRB_LEN(le32_to_cpu(event
->transfer_len
)) != 0) {
2273 td
->urb
->actual_length
=
2274 td
->urb
->transfer_buffer_length
-
2275 EVENT_TRB_LEN(le32_to_cpu(event
->transfer_len
));
2276 if (td
->urb
->transfer_buffer_length
<
2277 td
->urb
->actual_length
) {
2278 xhci_warn(xhci
, "HC gave bad length "
2279 "of %d bytes left\n",
2280 EVENT_TRB_LEN(le32_to_cpu(event
->transfer_len
)));
2281 td
->urb
->actual_length
= 0;
2282 if (td
->urb
->transfer_flags
& URB_SHORT_NOT_OK
)
2283 *status
= -EREMOTEIO
;
2287 /* Don't overwrite a previously set error code */
2288 if (*status
== -EINPROGRESS
) {
2289 if (td
->urb
->transfer_flags
& URB_SHORT_NOT_OK
)
2290 *status
= -EREMOTEIO
;
2295 td
->urb
->actual_length
=
2296 td
->urb
->transfer_buffer_length
;
2297 /* Ignore a short packet completion if the
2298 * untransferred length was zero.
2300 if (*status
== -EREMOTEIO
)
2304 /* Slow path - walk the list, starting from the dequeue
2305 * pointer, to get the actual length transferred.
2307 td
->urb
->actual_length
= 0;
2308 for (cur_trb
= ep_ring
->dequeue
, cur_seg
= ep_ring
->deq_seg
;
2309 cur_trb
!= event_trb
;
2310 next_trb(xhci
, ep_ring
, &cur_seg
, &cur_trb
)) {
2311 if (!TRB_TYPE_NOOP_LE32(cur_trb
->generic
.field
[3]) &&
2312 !TRB_TYPE_LINK_LE32(cur_trb
->generic
.field
[3]))
2313 td
->urb
->actual_length
+=
2314 TRB_LEN(le32_to_cpu(cur_trb
->generic
.field
[2]));
2316 /* If the ring didn't stop on a Link or No-op TRB, add
2317 * in the actual bytes transferred from the Normal TRB
2319 if (trb_comp_code
!= COMP_STOP_INVAL
)
2320 td
->urb
->actual_length
+=
2321 TRB_LEN(le32_to_cpu(cur_trb
->generic
.field
[2])) -
2322 EVENT_TRB_LEN(le32_to_cpu(event
->transfer_len
));
2325 return finish_td(xhci
, td
, event_trb
, event
, ep
, status
, false);
2329 * If this function returns an error condition, it means it got a Transfer
2330 * event with a corrupted Slot ID, Endpoint ID, or TRB DMA address.
2331 * At this point, the host controller is probably hosed and should be reset.
2333 static int handle_tx_event(struct xhci_hcd
*xhci
,
2334 struct xhci_transfer_event
*event
)
2335 __releases(&xhci
->lock
)
2336 __acquires(&xhci
->lock
)
2338 struct xhci_virt_device
*xdev
;
2339 struct xhci_virt_ep
*ep
;
2340 struct xhci_ring
*ep_ring
;
2341 unsigned int slot_id
;
2343 struct xhci_td
*td
= NULL
;
2344 dma_addr_t event_dma
;
2345 struct xhci_segment
*event_seg
;
2346 union xhci_trb
*event_trb
;
2347 struct urb
*urb
= NULL
;
2348 int status
= -EINPROGRESS
;
2349 struct urb_priv
*urb_priv
;
2350 struct xhci_ep_ctx
*ep_ctx
;
2351 struct list_head
*tmp
;
2356 slot_id
= TRB_TO_SLOT_ID(le32_to_cpu(event
->flags
));
2357 xdev
= xhci
->devs
[slot_id
];
2359 xhci_err(xhci
, "ERROR Transfer event pointed to bad slot\n");
2360 xhci_err(xhci
, "@%016llx %08x %08x %08x %08x\n",
2361 (unsigned long long) xhci_trb_virt_to_dma(
2362 xhci
->event_ring
->deq_seg
,
2363 xhci
->event_ring
->dequeue
),
2364 lower_32_bits(le64_to_cpu(event
->buffer
)),
2365 upper_32_bits(le64_to_cpu(event
->buffer
)),
2366 le32_to_cpu(event
->transfer_len
),
2367 le32_to_cpu(event
->flags
));
2368 xhci_dbg(xhci
, "Event ring:\n");
2369 xhci_debug_segment(xhci
, xhci
->event_ring
->deq_seg
);
2373 /* Endpoint ID is 1 based, our index is zero based */
2374 ep_index
= TRB_TO_EP_ID(le32_to_cpu(event
->flags
)) - 1;
2375 ep
= &xdev
->eps
[ep_index
];
2376 ep_ring
= xhci_dma_to_transfer_ring(ep
, le64_to_cpu(event
->buffer
));
2377 ep_ctx
= xhci_get_ep_ctx(xhci
, xdev
->out_ctx
, ep_index
);
2379 (le32_to_cpu(ep_ctx
->ep_info
) & EP_STATE_MASK
) ==
2380 EP_STATE_DISABLED
) {
2381 xhci_err(xhci
, "ERROR Transfer event for disabled endpoint "
2382 "or incorrect stream ring\n");
2383 xhci_err(xhci
, "@%016llx %08x %08x %08x %08x\n",
2384 (unsigned long long) xhci_trb_virt_to_dma(
2385 xhci
->event_ring
->deq_seg
,
2386 xhci
->event_ring
->dequeue
),
2387 lower_32_bits(le64_to_cpu(event
->buffer
)),
2388 upper_32_bits(le64_to_cpu(event
->buffer
)),
2389 le32_to_cpu(event
->transfer_len
),
2390 le32_to_cpu(event
->flags
));
2391 xhci_dbg(xhci
, "Event ring:\n");
2392 xhci_debug_segment(xhci
, xhci
->event_ring
->deq_seg
);
2396 /* Count current td numbers if ep->skip is set */
2398 list_for_each(tmp
, &ep_ring
->td_list
)
2402 event_dma
= le64_to_cpu(event
->buffer
);
2403 trb_comp_code
= GET_COMP_CODE(le32_to_cpu(event
->transfer_len
));
2404 /* Look for common error cases */
2405 switch (trb_comp_code
) {
2406 /* Skip codes that require special handling depending on
2410 if (EVENT_TRB_LEN(le32_to_cpu(event
->transfer_len
)) == 0)
2412 if (xhci
->quirks
& XHCI_TRUST_TX_LENGTH
)
2413 trb_comp_code
= COMP_SHORT_TX
;
2415 xhci_warn_ratelimited(xhci
,
2416 "WARN Successful completion on short TX: needs XHCI_TRUST_TX_LENGTH quirk?\n");
2420 xhci_dbg(xhci
, "Stopped on Transfer TRB\n");
2422 case COMP_STOP_INVAL
:
2423 xhci_dbg(xhci
, "Stopped on No-op or Link TRB\n");
2426 xhci_dbg(xhci
, "Stalled endpoint\n");
2427 ep
->ep_state
|= EP_HALTED
;
2431 xhci_warn(xhci
, "WARN: TRB error on endpoint\n");
2434 case COMP_SPLIT_ERR
:
2436 xhci_dbg(xhci
, "Transfer error on endpoint\n");
2440 xhci_dbg(xhci
, "Babble error on endpoint\n");
2441 status
= -EOVERFLOW
;
2444 xhci_warn(xhci
, "WARN: HC couldn't access mem fast enough\n");
2448 xhci_warn(xhci
, "WARN: bandwidth overrun event on endpoint\n");
2450 case COMP_BUFF_OVER
:
2451 xhci_warn(xhci
, "WARN: buffer overrun event on endpoint\n");
2455 * When the Isoch ring is empty, the xHC will generate
2456 * a Ring Overrun Event for IN Isoch endpoint or Ring
2457 * Underrun Event for OUT Isoch endpoint.
2459 xhci_dbg(xhci
, "underrun event on endpoint\n");
2460 if (!list_empty(&ep_ring
->td_list
))
2461 xhci_dbg(xhci
, "Underrun Event for slot %d ep %d "
2462 "still with TDs queued?\n",
2463 TRB_TO_SLOT_ID(le32_to_cpu(event
->flags
)),
2467 xhci_dbg(xhci
, "overrun event on endpoint\n");
2468 if (!list_empty(&ep_ring
->td_list
))
2469 xhci_dbg(xhci
, "Overrun Event for slot %d ep %d "
2470 "still with TDs queued?\n",
2471 TRB_TO_SLOT_ID(le32_to_cpu(event
->flags
)),
2475 xhci_warn(xhci
, "WARN: detect an incompatible device");
2478 case COMP_MISSED_INT
:
2480 * When encounter missed service error, one or more isoc tds
2481 * may be missed by xHC.
2482 * Set skip flag of the ep_ring; Complete the missed tds as
2483 * short transfer when process the ep_ring next time.
2486 xhci_dbg(xhci
, "Miss service interval error, set skip flag\n");
2489 if (xhci_is_vendor_info_code(xhci
, trb_comp_code
)) {
2493 xhci_warn(xhci
, "ERROR Unknown event condition, HC probably "
2499 /* This TRB should be in the TD at the head of this ring's
2502 if (list_empty(&ep_ring
->td_list
)) {
2504 * A stopped endpoint may generate an extra completion
2505 * event if the device was suspended. Don't print
2508 if (!(trb_comp_code
== COMP_STOP
||
2509 trb_comp_code
== COMP_STOP_INVAL
)) {
2510 xhci_warn(xhci
, "WARN Event TRB for slot %d ep %d with no TDs queued?\n",
2511 TRB_TO_SLOT_ID(le32_to_cpu(event
->flags
)),
2513 xhci_dbg(xhci
, "Event TRB with TRB type ID %u\n",
2514 (le32_to_cpu(event
->flags
) &
2515 TRB_TYPE_BITMASK
)>>10);
2516 xhci_print_trb_offsets(xhci
, (union xhci_trb
*) event
);
2520 xhci_dbg(xhci
, "td_list is empty while skip "
2521 "flag set. Clear skip flag.\n");
2527 /* We've skipped all the TDs on the ep ring when ep->skip set */
2528 if (ep
->skip
&& td_num
== 0) {
2530 xhci_dbg(xhci
, "All tds on the ep_ring skipped. "
2531 "Clear skip flag.\n");
2536 td
= list_entry(ep_ring
->td_list
.next
, struct xhci_td
, td_list
);
2540 /* Is this a TRB in the currently executing TD? */
2541 event_seg
= trb_in_td(ep_ring
->deq_seg
, ep_ring
->dequeue
,
2542 td
->last_trb
, event_dma
);
2545 * Skip the Force Stopped Event. The event_trb(event_dma) of FSE
2546 * is not in the current TD pointed by ep_ring->dequeue because
2547 * that the hardware dequeue pointer still at the previous TRB
2548 * of the current TD. The previous TRB maybe a Link TD or the
2549 * last TRB of the previous TD. The command completion handle
2550 * will take care the rest.
2552 if (!event_seg
&& trb_comp_code
== COMP_STOP_INVAL
) {
2559 !usb_endpoint_xfer_isoc(&td
->urb
->ep
->desc
)) {
2560 /* Some host controllers give a spurious
2561 * successful event after a short transfer.
2564 if ((xhci
->quirks
& XHCI_SPURIOUS_SUCCESS
) &&
2565 ep_ring
->last_td_was_short
) {
2566 ep_ring
->last_td_was_short
= false;
2570 /* HC is busted, give up! */
2572 "ERROR Transfer event TRB DMA ptr not "
2573 "part of current TD\n");
2577 ret
= skip_isoc_td(xhci
, td
, event
, ep
, &status
);
2580 if (trb_comp_code
== COMP_SHORT_TX
)
2581 ep_ring
->last_td_was_short
= true;
2583 ep_ring
->last_td_was_short
= false;
2586 xhci_dbg(xhci
, "Found td. Clear skip flag.\n");
2590 event_trb
= &event_seg
->trbs
[(event_dma
- event_seg
->dma
) /
2591 sizeof(*event_trb
)];
2593 * No-op TRB should not trigger interrupts.
2594 * If event_trb is a no-op TRB, it means the
2595 * corresponding TD has been cancelled. Just ignore
2598 if (TRB_TYPE_NOOP_LE32(event_trb
->generic
.field
[3])) {
2600 "event_trb is a no-op TRB. Skip it\n");
2604 /* Now update the urb's actual_length and give back to
2607 if (usb_endpoint_xfer_control(&td
->urb
->ep
->desc
))
2608 ret
= process_ctrl_td(xhci
, td
, event_trb
, event
, ep
,
2610 else if (usb_endpoint_xfer_isoc(&td
->urb
->ep
->desc
))
2611 ret
= process_isoc_td(xhci
, td
, event_trb
, event
, ep
,
2614 ret
= process_bulk_intr_td(xhci
, td
, event_trb
, event
,
2619 * Do not update event ring dequeue pointer if ep->skip is set.
2620 * Will roll back to continue process missed tds.
2622 if (trb_comp_code
== COMP_MISSED_INT
|| !ep
->skip
) {
2623 inc_deq(xhci
, xhci
->event_ring
);
2628 urb_priv
= urb
->hcpriv
;
2629 /* Leave the TD around for the reset endpoint function
2630 * to use(but only if it's not a control endpoint,
2631 * since we already queued the Set TR dequeue pointer
2632 * command for stalled control endpoints).
2634 if (usb_endpoint_xfer_control(&urb
->ep
->desc
) ||
2635 (trb_comp_code
!= COMP_STALL
&&
2636 trb_comp_code
!= COMP_BABBLE
))
2637 xhci_urb_free_priv(xhci
, urb_priv
);
2641 usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb
->dev
->bus
), urb
);
2642 if ((urb
->actual_length
!= urb
->transfer_buffer_length
&&
2643 (urb
->transfer_flags
&
2644 URB_SHORT_NOT_OK
)) ||
2646 !usb_endpoint_xfer_isoc(&urb
->ep
->desc
)))
2647 xhci_dbg(xhci
, "Giveback URB %p, len = %d, "
2648 "expected = %d, status = %d\n",
2649 urb
, urb
->actual_length
,
2650 urb
->transfer_buffer_length
,
2652 spin_unlock(&xhci
->lock
);
2653 /* EHCI, UHCI, and OHCI always unconditionally set the
2654 * urb->status of an isochronous endpoint to 0.
2656 if (usb_pipetype(urb
->pipe
) == PIPE_ISOCHRONOUS
)
2658 usb_hcd_giveback_urb(bus_to_hcd(urb
->dev
->bus
), urb
, status
);
2659 spin_lock(&xhci
->lock
);
2663 * If ep->skip is set, it means there are missed tds on the
2664 * endpoint ring need to take care of.
2665 * Process them as short transfer until reach the td pointed by
2668 } while (ep
->skip
&& trb_comp_code
!= COMP_MISSED_INT
);
2674 * This function handles all OS-owned events on the event ring. It may drop
2675 * xhci->lock between event processing (e.g. to pass up port status changes).
2676 * Returns >0 for "possibly more events to process" (caller should call again),
2677 * otherwise 0 if done. In future, <0 returns should indicate error code.
2679 static int xhci_handle_event(struct xhci_hcd
*xhci
)
2681 union xhci_trb
*event
;
2682 int update_ptrs
= 1;
2685 if (!xhci
->event_ring
|| !xhci
->event_ring
->dequeue
) {
2686 xhci
->error_bitmask
|= 1 << 1;
2690 event
= xhci
->event_ring
->dequeue
;
2691 /* Does the HC or OS own the TRB? */
2692 if ((le32_to_cpu(event
->event_cmd
.flags
) & TRB_CYCLE
) !=
2693 xhci
->event_ring
->cycle_state
) {
2694 xhci
->error_bitmask
|= 1 << 2;
2699 * Barrier between reading the TRB_CYCLE (valid) flag above and any
2700 * speculative reads of the event's flags/data below.
2703 /* FIXME: Handle more event types. */
2704 switch ((le32_to_cpu(event
->event_cmd
.flags
) & TRB_TYPE_BITMASK
)) {
2705 case TRB_TYPE(TRB_COMPLETION
):
2706 handle_cmd_completion(xhci
, &event
->event_cmd
);
2708 case TRB_TYPE(TRB_PORT_STATUS
):
2709 handle_port_status(xhci
, event
);
2712 case TRB_TYPE(TRB_TRANSFER
):
2713 ret
= handle_tx_event(xhci
, &event
->trans_event
);
2715 xhci
->error_bitmask
|= 1 << 9;
2719 case TRB_TYPE(TRB_DEV_NOTE
):
2720 handle_device_notification(xhci
, event
);
2723 if ((le32_to_cpu(event
->event_cmd
.flags
) & TRB_TYPE_BITMASK
) >=
2725 handle_vendor_event(xhci
, event
);
2727 xhci
->error_bitmask
|= 1 << 3;
2729 /* Any of the above functions may drop and re-acquire the lock, so check
2730 * to make sure a watchdog timer didn't mark the host as non-responsive.
2732 if (xhci
->xhc_state
& XHCI_STATE_DYING
) {
2733 xhci_dbg(xhci
, "xHCI host dying, returning from "
2734 "event handler.\n");
2739 /* Update SW event ring dequeue pointer */
2740 inc_deq(xhci
, xhci
->event_ring
);
2742 /* Are there more items on the event ring? Caller will call us again to
2749 * xHCI spec says we can get an interrupt, and if the HC has an error condition,
2750 * we might get bad data out of the event ring. Section 4.10.2.7 has a list of
2751 * indicators of an event TRB error, but we check the status *first* to be safe.
2753 irqreturn_t
xhci_irq(struct usb_hcd
*hcd
)
2755 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
2758 union xhci_trb
*event_ring_deq
;
2761 spin_lock(&xhci
->lock
);
2762 /* Check if the xHC generated the interrupt, or the irq is shared */
2763 status
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
2764 if (status
== 0xffffffff)
2767 if (!(status
& STS_EINT
)) {
2768 spin_unlock(&xhci
->lock
);
2771 if (status
& STS_FATAL
) {
2772 xhci_warn(xhci
, "WARNING: Host System Error\n");
2775 spin_unlock(&xhci
->lock
);
2780 * Clear the op reg interrupt status first,
2781 * so we can receive interrupts from other MSI-X interrupters.
2782 * Write 1 to clear the interrupt status.
2785 xhci_writel(xhci
, status
, &xhci
->op_regs
->status
);
2786 /* FIXME when MSI-X is supported and there are multiple vectors */
2787 /* Clear the MSI-X event interrupt status */
2791 /* Acknowledge the PCI interrupt */
2792 irq_pending
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
2793 irq_pending
|= IMAN_IP
;
2794 xhci_writel(xhci
, irq_pending
, &xhci
->ir_set
->irq_pending
);
2797 if (xhci
->xhc_state
& XHCI_STATE_DYING
) {
2798 xhci_dbg(xhci
, "xHCI dying, ignoring interrupt. "
2799 "Shouldn't IRQs be disabled?\n");
2800 /* Clear the event handler busy flag (RW1C);
2801 * the event ring should be empty.
2803 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
2804 xhci_write_64(xhci
, temp_64
| ERST_EHB
,
2805 &xhci
->ir_set
->erst_dequeue
);
2806 spin_unlock(&xhci
->lock
);
2811 event_ring_deq
= xhci
->event_ring
->dequeue
;
2812 /* FIXME this should be a delayed service routine
2813 * that clears the EHB.
2815 while (xhci_handle_event(xhci
) > 0) {}
2817 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
2818 /* If necessary, update the HW's version of the event ring deq ptr. */
2819 if (event_ring_deq
!= xhci
->event_ring
->dequeue
) {
2820 deq
= xhci_trb_virt_to_dma(xhci
->event_ring
->deq_seg
,
2821 xhci
->event_ring
->dequeue
);
2823 xhci_warn(xhci
, "WARN something wrong with SW event "
2824 "ring dequeue ptr.\n");
2825 /* Update HC event ring dequeue pointer */
2826 temp_64
&= ERST_PTR_MASK
;
2827 temp_64
|= ((u64
) deq
& (u64
) ~ERST_PTR_MASK
);
2830 /* Clear the event handler busy flag (RW1C); event ring is empty. */
2831 temp_64
|= ERST_EHB
;
2832 xhci_write_64(xhci
, temp_64
, &xhci
->ir_set
->erst_dequeue
);
2834 spin_unlock(&xhci
->lock
);
2839 irqreturn_t
xhci_msi_irq(int irq
, void *hcd
)
2841 return xhci_irq(hcd
);
2844 /**** Endpoint Ring Operations ****/
2847 * Generic function for queueing a TRB on a ring.
2848 * The caller must have checked to make sure there's room on the ring.
2850 * @more_trbs_coming: Will you enqueue more TRBs before calling
2851 * prepare_transfer()?
2853 static void queue_trb(struct xhci_hcd
*xhci
, struct xhci_ring
*ring
,
2854 bool more_trbs_coming
,
2855 u32 field1
, u32 field2
, u32 field3
, u32 field4
)
2857 struct xhci_generic_trb
*trb
;
2859 trb
= &ring
->enqueue
->generic
;
2860 trb
->field
[0] = cpu_to_le32(field1
);
2861 trb
->field
[1] = cpu_to_le32(field2
);
2862 trb
->field
[2] = cpu_to_le32(field3
);
2863 trb
->field
[3] = cpu_to_le32(field4
);
2864 inc_enq(xhci
, ring
, more_trbs_coming
);
2868 * Does various checks on the endpoint ring, and makes it ready to queue num_trbs.
2869 * FIXME allocate segments if the ring is full.
2871 static int prepare_ring(struct xhci_hcd
*xhci
, struct xhci_ring
*ep_ring
,
2872 u32 ep_state
, unsigned int num_trbs
, gfp_t mem_flags
)
2874 unsigned int num_trbs_needed
;
2876 /* Make sure the endpoint has been added to xHC schedule */
2878 case EP_STATE_DISABLED
:
2880 * USB core changed config/interfaces without notifying us,
2881 * or hardware is reporting the wrong state.
2883 xhci_warn(xhci
, "WARN urb submitted to disabled ep\n");
2885 case EP_STATE_ERROR
:
2886 xhci_warn(xhci
, "WARN waiting for error on ep to be cleared\n");
2887 /* FIXME event handling code for error needs to clear it */
2888 /* XXX not sure if this should be -ENOENT or not */
2890 case EP_STATE_HALTED
:
2891 xhci_dbg(xhci
, "WARN halted endpoint, queueing URB anyway.\n");
2892 case EP_STATE_STOPPED
:
2893 case EP_STATE_RUNNING
:
2896 xhci_err(xhci
, "ERROR unknown endpoint state for ep\n");
2898 * FIXME issue Configure Endpoint command to try to get the HC
2899 * back into a known state.
2905 if (room_on_ring(xhci
, ep_ring
, num_trbs
))
2908 if (ep_ring
== xhci
->cmd_ring
) {
2909 xhci_err(xhci
, "Do not support expand command ring\n");
2913 xhci_dbg_trace(xhci
, trace_xhci_dbg_ring_expansion
,
2914 "ERROR no room on ep ring, try ring expansion");
2915 num_trbs_needed
= num_trbs
- ep_ring
->num_trbs_free
;
2916 if (xhci_ring_expansion(xhci
, ep_ring
, num_trbs_needed
,
2918 xhci_err(xhci
, "Ring expansion failed\n");
2923 if (enqueue_is_link_trb(ep_ring
)) {
2924 struct xhci_ring
*ring
= ep_ring
;
2925 union xhci_trb
*next
;
2927 next
= ring
->enqueue
;
2929 while (last_trb(xhci
, ring
, ring
->enq_seg
, next
)) {
2930 /* If we're not dealing with 0.95 hardware or isoc rings
2931 * on AMD 0.96 host, clear the chain bit.
2933 if (!xhci_link_trb_quirk(xhci
) &&
2934 !(ring
->type
== TYPE_ISOC
&&
2935 (xhci
->quirks
& XHCI_AMD_0x96_HOST
)))
2936 next
->link
.control
&= cpu_to_le32(~TRB_CHAIN
);
2938 next
->link
.control
|= cpu_to_le32(TRB_CHAIN
);
2941 next
->link
.control
^= cpu_to_le32(TRB_CYCLE
);
2943 /* Toggle the cycle bit after the last ring segment. */
2944 if (last_trb_on_last_seg(xhci
, ring
, ring
->enq_seg
, next
)) {
2945 ring
->cycle_state
= (ring
->cycle_state
? 0 : 1);
2947 ring
->enq_seg
= ring
->enq_seg
->next
;
2948 ring
->enqueue
= ring
->enq_seg
->trbs
;
2949 next
= ring
->enqueue
;
2956 static int prepare_transfer(struct xhci_hcd
*xhci
,
2957 struct xhci_virt_device
*xdev
,
2958 unsigned int ep_index
,
2959 unsigned int stream_id
,
2960 unsigned int num_trbs
,
2962 unsigned int td_index
,
2966 struct urb_priv
*urb_priv
;
2968 struct xhci_ring
*ep_ring
;
2969 struct xhci_ep_ctx
*ep_ctx
= xhci_get_ep_ctx(xhci
, xdev
->out_ctx
, ep_index
);
2971 ep_ring
= xhci_stream_id_to_ring(xdev
, ep_index
, stream_id
);
2973 xhci_dbg(xhci
, "Can't prepare ring for bad stream ID %u\n",
2978 ret
= prepare_ring(xhci
, ep_ring
,
2979 le32_to_cpu(ep_ctx
->ep_info
) & EP_STATE_MASK
,
2980 num_trbs
, mem_flags
);
2984 urb_priv
= urb
->hcpriv
;
2985 td
= urb_priv
->td
[td_index
];
2987 INIT_LIST_HEAD(&td
->td_list
);
2988 INIT_LIST_HEAD(&td
->cancelled_td_list
);
2990 if (td_index
== 0) {
2991 ret
= usb_hcd_link_urb_to_ep(bus_to_hcd(urb
->dev
->bus
), urb
);
2997 /* Add this TD to the tail of the endpoint ring's TD list */
2998 list_add_tail(&td
->td_list
, &ep_ring
->td_list
);
2999 td
->start_seg
= ep_ring
->enq_seg
;
3000 td
->first_trb
= ep_ring
->enqueue
;
3002 urb_priv
->td
[td_index
] = td
;
3007 static unsigned int count_sg_trbs_needed(struct xhci_hcd
*xhci
, struct urb
*urb
)
3009 int num_sgs
, num_trbs
, running_total
, temp
, i
;
3010 struct scatterlist
*sg
;
3013 num_sgs
= urb
->num_mapped_sgs
;
3014 temp
= urb
->transfer_buffer_length
;
3017 for_each_sg(urb
->sg
, sg
, num_sgs
, i
) {
3018 unsigned int len
= sg_dma_len(sg
);
3020 /* Scatter gather list entries may cross 64KB boundaries */
3021 running_total
= TRB_MAX_BUFF_SIZE
-
3022 (sg_dma_address(sg
) & (TRB_MAX_BUFF_SIZE
- 1));
3023 running_total
&= TRB_MAX_BUFF_SIZE
- 1;
3024 if (running_total
!= 0)
3027 /* How many more 64KB chunks to transfer, how many more TRBs? */
3028 while (running_total
< sg_dma_len(sg
) && running_total
< temp
) {
3030 running_total
+= TRB_MAX_BUFF_SIZE
;
3032 len
= min_t(int, len
, temp
);
3040 static void check_trb_math(struct urb
*urb
, int num_trbs
, int running_total
)
3043 dev_err(&urb
->dev
->dev
, "%s - ep %#x - Miscalculated number of "
3044 "TRBs, %d left\n", __func__
,
3045 urb
->ep
->desc
.bEndpointAddress
, num_trbs
);
3046 if (running_total
!= urb
->transfer_buffer_length
)
3047 dev_err(&urb
->dev
->dev
, "%s - ep %#x - Miscalculated tx length, "
3048 "queued %#x (%d), asked for %#x (%d)\n",
3050 urb
->ep
->desc
.bEndpointAddress
,
3051 running_total
, running_total
,
3052 urb
->transfer_buffer_length
,
3053 urb
->transfer_buffer_length
);
3056 static void giveback_first_trb(struct xhci_hcd
*xhci
, int slot_id
,
3057 unsigned int ep_index
, unsigned int stream_id
, int start_cycle
,
3058 struct xhci_generic_trb
*start_trb
)
3061 * Pass all the TRBs to the hardware at once and make sure this write
3066 start_trb
->field
[3] |= cpu_to_le32(start_cycle
);
3068 start_trb
->field
[3] &= cpu_to_le32(~TRB_CYCLE
);
3069 xhci_ring_ep_doorbell(xhci
, slot_id
, ep_index
, stream_id
);
3073 * xHCI uses normal TRBs for both bulk and interrupt. When the interrupt
3074 * endpoint is to be serviced, the xHC will consume (at most) one TD. A TD
3075 * (comprised of sg list entries) can take several service intervals to
3078 int xhci_queue_intr_tx(struct xhci_hcd
*xhci
, gfp_t mem_flags
,
3079 struct urb
*urb
, int slot_id
, unsigned int ep_index
)
3081 struct xhci_ep_ctx
*ep_ctx
= xhci_get_ep_ctx(xhci
,
3082 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
3086 xhci_interval
= EP_INTERVAL_TO_UFRAMES(le32_to_cpu(ep_ctx
->ep_info
));
3087 ep_interval
= urb
->interval
;
3088 /* Convert to microframes */
3089 if (urb
->dev
->speed
== USB_SPEED_LOW
||
3090 urb
->dev
->speed
== USB_SPEED_FULL
)
3092 /* FIXME change this to a warning and a suggestion to use the new API
3093 * to set the polling interval (once the API is added).
3095 if (xhci_interval
!= ep_interval
) {
3096 dev_dbg_ratelimited(&urb
->dev
->dev
,
3097 "Driver uses different interval (%d microframe%s) than xHCI (%d microframe%s)\n",
3098 ep_interval
, ep_interval
== 1 ? "" : "s",
3099 xhci_interval
, xhci_interval
== 1 ? "" : "s");
3100 urb
->interval
= xhci_interval
;
3101 /* Convert back to frames for LS/FS devices */
3102 if (urb
->dev
->speed
== USB_SPEED_LOW
||
3103 urb
->dev
->speed
== USB_SPEED_FULL
)
3106 return xhci_queue_bulk_tx(xhci
, mem_flags
, urb
, slot_id
, ep_index
);
3110 * The TD size is the number of bytes remaining in the TD (including this TRB),
3111 * right shifted by 10.
3112 * It must fit in bits 21:17, so it can't be bigger than 31.
3114 static u32
xhci_td_remainder(unsigned int remainder
)
3116 u32 max
= (1 << (21 - 17 + 1)) - 1;
3118 if ((remainder
>> 10) >= max
)
3121 return (remainder
>> 10) << 17;
3125 * For xHCI 1.0 host controllers, TD size is the number of max packet sized
3126 * packets remaining in the TD (*not* including this TRB).
3128 * Total TD packet count = total_packet_count =
3129 * DIV_ROUND_UP(TD size in bytes / wMaxPacketSize)
3131 * Packets transferred up to and including this TRB = packets_transferred =
3132 * rounddown(total bytes transferred including this TRB / wMaxPacketSize)
3134 * TD size = total_packet_count - packets_transferred
3136 * It must fit in bits 21:17, so it can't be bigger than 31.
3137 * The last TRB in a TD must have the TD size set to zero.
3139 static u32
xhci_v1_0_td_remainder(int running_total
, int trb_buff_len
,
3140 unsigned int total_packet_count
, struct urb
*urb
,
3141 unsigned int num_trbs_left
)
3143 int packets_transferred
;
3145 /* One TRB with a zero-length data packet. */
3146 if (num_trbs_left
== 0 || (running_total
== 0 && trb_buff_len
== 0))
3149 /* All the TRB queueing functions don't count the current TRB in
3152 packets_transferred
= (running_total
+ trb_buff_len
) /
3153 GET_MAX_PACKET(usb_endpoint_maxp(&urb
->ep
->desc
));
3155 if ((total_packet_count
- packets_transferred
) > 31)
3157 return (total_packet_count
- packets_transferred
) << 17;
3160 static int queue_bulk_sg_tx(struct xhci_hcd
*xhci
, gfp_t mem_flags
,
3161 struct urb
*urb
, int slot_id
, unsigned int ep_index
)
3163 struct xhci_ring
*ep_ring
;
3164 unsigned int num_trbs
;
3165 struct urb_priv
*urb_priv
;
3167 struct scatterlist
*sg
;
3169 int trb_buff_len
, this_sg_len
, running_total
;
3170 unsigned int total_packet_count
;
3173 bool more_trbs_coming
;
3175 struct xhci_generic_trb
*start_trb
;
3178 ep_ring
= xhci_urb_to_transfer_ring(xhci
, urb
);
3182 num_trbs
= count_sg_trbs_needed(xhci
, urb
);
3183 num_sgs
= urb
->num_mapped_sgs
;
3184 total_packet_count
= DIV_ROUND_UP(urb
->transfer_buffer_length
,
3185 usb_endpoint_maxp(&urb
->ep
->desc
));
3187 trb_buff_len
= prepare_transfer(xhci
, xhci
->devs
[slot_id
],
3188 ep_index
, urb
->stream_id
,
3189 num_trbs
, urb
, 0, mem_flags
);
3190 if (trb_buff_len
< 0)
3191 return trb_buff_len
;
3193 urb_priv
= urb
->hcpriv
;
3194 td
= urb_priv
->td
[0];
3197 * Don't give the first TRB to the hardware (by toggling the cycle bit)
3198 * until we've finished creating all the other TRBs. The ring's cycle
3199 * state may change as we enqueue the other TRBs, so save it too.
3201 start_trb
= &ep_ring
->enqueue
->generic
;
3202 start_cycle
= ep_ring
->cycle_state
;
3206 * How much data is in the first TRB?
3208 * There are three forces at work for TRB buffer pointers and lengths:
3209 * 1. We don't want to walk off the end of this sg-list entry buffer.
3210 * 2. The transfer length that the driver requested may be smaller than
3211 * the amount of memory allocated for this scatter-gather list.
3212 * 3. TRBs buffers can't cross 64KB boundaries.
3215 addr
= (u64
) sg_dma_address(sg
);
3216 this_sg_len
= sg_dma_len(sg
);
3217 trb_buff_len
= TRB_MAX_BUFF_SIZE
- (addr
& (TRB_MAX_BUFF_SIZE
- 1));
3218 trb_buff_len
= min_t(int, trb_buff_len
, this_sg_len
);
3219 if (trb_buff_len
> urb
->transfer_buffer_length
)
3220 trb_buff_len
= urb
->transfer_buffer_length
;
3223 /* Queue the first TRB, even if it's zero-length */
3226 u32 length_field
= 0;
3229 /* Don't change the cycle bit of the first TRB until later */
3232 if (start_cycle
== 0)
3235 field
|= ep_ring
->cycle_state
;
3237 /* Chain all the TRBs together; clear the chain bit in the last
3238 * TRB to indicate it's the last TRB in the chain.
3243 /* FIXME - add check for ZERO_PACKET flag before this */
3244 td
->last_trb
= ep_ring
->enqueue
;
3248 /* Only set interrupt on short packet for IN endpoints */
3249 if (usb_urb_dir_in(urb
))
3252 if (TRB_MAX_BUFF_SIZE
-
3253 (addr
& (TRB_MAX_BUFF_SIZE
- 1)) < trb_buff_len
) {
3254 xhci_warn(xhci
, "WARN: sg dma xfer crosses 64KB boundaries!\n");
3255 xhci_dbg(xhci
, "Next boundary at %#x, end dma = %#x\n",
3256 (unsigned int) (addr
+ TRB_MAX_BUFF_SIZE
) & ~(TRB_MAX_BUFF_SIZE
- 1),
3257 (unsigned int) addr
+ trb_buff_len
);
3260 /* Set the TRB length, TD size, and interrupter fields. */
3261 if (xhci
->hci_version
< 0x100) {
3262 remainder
= xhci_td_remainder(
3263 urb
->transfer_buffer_length
-
3266 remainder
= xhci_v1_0_td_remainder(running_total
,
3267 trb_buff_len
, total_packet_count
, urb
,
3270 length_field
= TRB_LEN(trb_buff_len
) |
3275 more_trbs_coming
= true;
3277 more_trbs_coming
= false;
3278 queue_trb(xhci
, ep_ring
, more_trbs_coming
,
3279 lower_32_bits(addr
),
3280 upper_32_bits(addr
),
3282 field
| TRB_TYPE(TRB_NORMAL
));
3284 running_total
+= trb_buff_len
;
3286 /* Calculate length for next transfer --
3287 * Are we done queueing all the TRBs for this sg entry?
3289 this_sg_len
-= trb_buff_len
;
3290 if (this_sg_len
== 0) {
3295 addr
= (u64
) sg_dma_address(sg
);
3296 this_sg_len
= sg_dma_len(sg
);
3298 addr
+= trb_buff_len
;
3301 trb_buff_len
= TRB_MAX_BUFF_SIZE
-
3302 (addr
& (TRB_MAX_BUFF_SIZE
- 1));
3303 trb_buff_len
= min_t(int, trb_buff_len
, this_sg_len
);
3304 if (running_total
+ trb_buff_len
> urb
->transfer_buffer_length
)
3306 urb
->transfer_buffer_length
- running_total
;
3307 } while (running_total
< urb
->transfer_buffer_length
);
3309 check_trb_math(urb
, num_trbs
, running_total
);
3310 giveback_first_trb(xhci
, slot_id
, ep_index
, urb
->stream_id
,
3311 start_cycle
, start_trb
);
3315 /* This is very similar to what ehci-q.c qtd_fill() does */
3316 int xhci_queue_bulk_tx(struct xhci_hcd
*xhci
, gfp_t mem_flags
,
3317 struct urb
*urb
, int slot_id
, unsigned int ep_index
)
3319 struct xhci_ring
*ep_ring
;
3320 struct urb_priv
*urb_priv
;
3323 struct xhci_generic_trb
*start_trb
;
3325 bool more_trbs_coming
;
3327 u32 field
, length_field
;
3329 int running_total
, trb_buff_len
, ret
;
3330 unsigned int total_packet_count
;
3334 return queue_bulk_sg_tx(xhci
, mem_flags
, urb
, slot_id
, ep_index
);
3336 ep_ring
= xhci_urb_to_transfer_ring(xhci
, urb
);
3341 /* How much data is (potentially) left before the 64KB boundary? */
3342 running_total
= TRB_MAX_BUFF_SIZE
-
3343 (urb
->transfer_dma
& (TRB_MAX_BUFF_SIZE
- 1));
3344 running_total
&= TRB_MAX_BUFF_SIZE
- 1;
3346 /* If there's some data on this 64KB chunk, or we have to send a
3347 * zero-length transfer, we need at least one TRB
3349 if (running_total
!= 0 || urb
->transfer_buffer_length
== 0)
3351 /* How many more 64KB chunks to transfer, how many more TRBs? */
3352 while (running_total
< urb
->transfer_buffer_length
) {
3354 running_total
+= TRB_MAX_BUFF_SIZE
;
3356 /* FIXME: this doesn't deal with URB_ZERO_PACKET - need one more */
3358 ret
= prepare_transfer(xhci
, xhci
->devs
[slot_id
],
3359 ep_index
, urb
->stream_id
,
3360 num_trbs
, urb
, 0, mem_flags
);
3364 urb_priv
= urb
->hcpriv
;
3365 td
= urb_priv
->td
[0];
3368 * Don't give the first TRB to the hardware (by toggling the cycle bit)
3369 * until we've finished creating all the other TRBs. The ring's cycle
3370 * state may change as we enqueue the other TRBs, so save it too.
3372 start_trb
= &ep_ring
->enqueue
->generic
;
3373 start_cycle
= ep_ring
->cycle_state
;
3376 total_packet_count
= DIV_ROUND_UP(urb
->transfer_buffer_length
,
3377 usb_endpoint_maxp(&urb
->ep
->desc
));
3378 /* How much data is in the first TRB? */
3379 addr
= (u64
) urb
->transfer_dma
;
3380 trb_buff_len
= TRB_MAX_BUFF_SIZE
-
3381 (urb
->transfer_dma
& (TRB_MAX_BUFF_SIZE
- 1));
3382 if (trb_buff_len
> urb
->transfer_buffer_length
)
3383 trb_buff_len
= urb
->transfer_buffer_length
;
3387 /* Queue the first TRB, even if it's zero-length */
3392 /* Don't change the cycle bit of the first TRB until later */
3395 if (start_cycle
== 0)
3398 field
|= ep_ring
->cycle_state
;
3400 /* Chain all the TRBs together; clear the chain bit in the last
3401 * TRB to indicate it's the last TRB in the chain.
3406 /* FIXME - add check for ZERO_PACKET flag before this */
3407 td
->last_trb
= ep_ring
->enqueue
;
3411 /* Only set interrupt on short packet for IN endpoints */
3412 if (usb_urb_dir_in(urb
))
3415 /* Set the TRB length, TD size, and interrupter fields. */
3416 if (xhci
->hci_version
< 0x100) {
3417 remainder
= xhci_td_remainder(
3418 urb
->transfer_buffer_length
-
3421 remainder
= xhci_v1_0_td_remainder(running_total
,
3422 trb_buff_len
, total_packet_count
, urb
,
3425 length_field
= TRB_LEN(trb_buff_len
) |
3430 more_trbs_coming
= true;
3432 more_trbs_coming
= false;
3433 queue_trb(xhci
, ep_ring
, more_trbs_coming
,
3434 lower_32_bits(addr
),
3435 upper_32_bits(addr
),
3437 field
| TRB_TYPE(TRB_NORMAL
));
3439 running_total
+= trb_buff_len
;
3441 /* Calculate length for next transfer */
3442 addr
+= trb_buff_len
;
3443 trb_buff_len
= urb
->transfer_buffer_length
- running_total
;
3444 if (trb_buff_len
> TRB_MAX_BUFF_SIZE
)
3445 trb_buff_len
= TRB_MAX_BUFF_SIZE
;
3446 } while (running_total
< urb
->transfer_buffer_length
);
3448 check_trb_math(urb
, num_trbs
, running_total
);
3449 giveback_first_trb(xhci
, slot_id
, ep_index
, urb
->stream_id
,
3450 start_cycle
, start_trb
);
3454 /* Caller must have locked xhci->lock */
3455 int xhci_queue_ctrl_tx(struct xhci_hcd
*xhci
, gfp_t mem_flags
,
3456 struct urb
*urb
, int slot_id
, unsigned int ep_index
)
3458 struct xhci_ring
*ep_ring
;
3461 struct usb_ctrlrequest
*setup
;
3462 struct xhci_generic_trb
*start_trb
;
3464 u32 field
, length_field
;
3465 struct urb_priv
*urb_priv
;
3468 ep_ring
= xhci_urb_to_transfer_ring(xhci
, urb
);
3473 * Need to copy setup packet into setup TRB, so we can't use the setup
3476 if (!urb
->setup_packet
)
3479 /* 1 TRB for setup, 1 for status */
3482 * Don't need to check if we need additional event data and normal TRBs,
3483 * since data in control transfers will never get bigger than 16MB
3484 * XXX: can we get a buffer that crosses 64KB boundaries?
3486 if (urb
->transfer_buffer_length
> 0)
3488 ret
= prepare_transfer(xhci
, xhci
->devs
[slot_id
],
3489 ep_index
, urb
->stream_id
,
3490 num_trbs
, urb
, 0, mem_flags
);
3494 urb_priv
= urb
->hcpriv
;
3495 td
= urb_priv
->td
[0];
3498 * Don't give the first TRB to the hardware (by toggling the cycle bit)
3499 * until we've finished creating all the other TRBs. The ring's cycle
3500 * state may change as we enqueue the other TRBs, so save it too.
3502 start_trb
= &ep_ring
->enqueue
->generic
;
3503 start_cycle
= ep_ring
->cycle_state
;
3505 /* Queue setup TRB - see section 6.4.1.2.1 */
3506 /* FIXME better way to translate setup_packet into two u32 fields? */
3507 setup
= (struct usb_ctrlrequest
*) urb
->setup_packet
;
3509 field
|= TRB_IDT
| TRB_TYPE(TRB_SETUP
);
3510 if (start_cycle
== 0)
3513 /* xHCI 1.0 6.4.1.2.1: Transfer Type field */
3514 if (xhci
->hci_version
== 0x100) {
3515 if (urb
->transfer_buffer_length
> 0) {
3516 if (setup
->bRequestType
& USB_DIR_IN
)
3517 field
|= TRB_TX_TYPE(TRB_DATA_IN
);
3519 field
|= TRB_TX_TYPE(TRB_DATA_OUT
);
3523 queue_trb(xhci
, ep_ring
, true,
3524 setup
->bRequestType
| setup
->bRequest
<< 8 | le16_to_cpu(setup
->wValue
) << 16,
3525 le16_to_cpu(setup
->wIndex
) | le16_to_cpu(setup
->wLength
) << 16,
3526 TRB_LEN(8) | TRB_INTR_TARGET(0),
3527 /* Immediate data in pointer */
3530 /* If there's data, queue data TRBs */
3531 /* Only set interrupt on short packet for IN endpoints */
3532 if (usb_urb_dir_in(urb
))
3533 field
= TRB_ISP
| TRB_TYPE(TRB_DATA
);
3535 field
= TRB_TYPE(TRB_DATA
);
3537 length_field
= TRB_LEN(urb
->transfer_buffer_length
) |
3538 xhci_td_remainder(urb
->transfer_buffer_length
) |
3540 if (urb
->transfer_buffer_length
> 0) {
3541 if (setup
->bRequestType
& USB_DIR_IN
)
3542 field
|= TRB_DIR_IN
;
3543 queue_trb(xhci
, ep_ring
, true,
3544 lower_32_bits(urb
->transfer_dma
),
3545 upper_32_bits(urb
->transfer_dma
),
3547 field
| ep_ring
->cycle_state
);
3550 /* Save the DMA address of the last TRB in the TD */
3551 td
->last_trb
= ep_ring
->enqueue
;
3553 /* Queue status TRB - see Table 7 and sections 4.11.2.2 and 6.4.1.2.3 */
3554 /* If the device sent data, the status stage is an OUT transfer */
3555 if (urb
->transfer_buffer_length
> 0 && setup
->bRequestType
& USB_DIR_IN
)
3559 queue_trb(xhci
, ep_ring
, false,
3563 /* Event on completion */
3564 field
| TRB_IOC
| TRB_TYPE(TRB_STATUS
) | ep_ring
->cycle_state
);
3566 giveback_first_trb(xhci
, slot_id
, ep_index
, 0,
3567 start_cycle
, start_trb
);
3571 static int count_isoc_trbs_needed(struct xhci_hcd
*xhci
,
3572 struct urb
*urb
, int i
)
3577 addr
= (u64
) (urb
->transfer_dma
+ urb
->iso_frame_desc
[i
].offset
);
3578 td_len
= urb
->iso_frame_desc
[i
].length
;
3580 num_trbs
= DIV_ROUND_UP(td_len
+ (addr
& (TRB_MAX_BUFF_SIZE
- 1)),
3589 * The transfer burst count field of the isochronous TRB defines the number of
3590 * bursts that are required to move all packets in this TD. Only SuperSpeed
3591 * devices can burst up to bMaxBurst number of packets per service interval.
3592 * This field is zero based, meaning a value of zero in the field means one
3593 * burst. Basically, for everything but SuperSpeed devices, this field will be
3594 * zero. Only xHCI 1.0 host controllers support this field.
3596 static unsigned int xhci_get_burst_count(struct xhci_hcd
*xhci
,
3597 struct usb_device
*udev
,
3598 struct urb
*urb
, unsigned int total_packet_count
)
3600 unsigned int max_burst
;
3602 if (xhci
->hci_version
< 0x100 || udev
->speed
!= USB_SPEED_SUPER
)
3605 max_burst
= urb
->ep
->ss_ep_comp
.bMaxBurst
;
3606 return roundup(total_packet_count
, max_burst
+ 1) - 1;
3610 * Returns the number of packets in the last "burst" of packets. This field is
3611 * valid for all speeds of devices. USB 2.0 devices can only do one "burst", so
3612 * the last burst packet count is equal to the total number of packets in the
3613 * TD. SuperSpeed endpoints can have up to 3 bursts. All but the last burst
3614 * must contain (bMaxBurst + 1) number of packets, but the last burst can
3615 * contain 1 to (bMaxBurst + 1) packets.
3617 static unsigned int xhci_get_last_burst_packet_count(struct xhci_hcd
*xhci
,
3618 struct usb_device
*udev
,
3619 struct urb
*urb
, unsigned int total_packet_count
)
3621 unsigned int max_burst
;
3622 unsigned int residue
;
3624 if (xhci
->hci_version
< 0x100)
3627 switch (udev
->speed
) {
3628 case USB_SPEED_SUPER
:
3629 /* bMaxBurst is zero based: 0 means 1 packet per burst */
3630 max_burst
= urb
->ep
->ss_ep_comp
.bMaxBurst
;
3631 residue
= total_packet_count
% (max_burst
+ 1);
3632 /* If residue is zero, the last burst contains (max_burst + 1)
3633 * number of packets, but the TLBPC field is zero-based.
3639 if (total_packet_count
== 0)
3641 return total_packet_count
- 1;
3645 /* This is for isoc transfer */
3646 static int xhci_queue_isoc_tx(struct xhci_hcd
*xhci
, gfp_t mem_flags
,
3647 struct urb
*urb
, int slot_id
, unsigned int ep_index
)
3649 struct xhci_ring
*ep_ring
;
3650 struct urb_priv
*urb_priv
;
3652 int num_tds
, trbs_per_td
;
3653 struct xhci_generic_trb
*start_trb
;
3656 u32 field
, length_field
;
3657 int running_total
, trb_buff_len
, td_len
, td_remain_len
, ret
;
3658 u64 start_addr
, addr
;
3660 bool more_trbs_coming
;
3662 ep_ring
= xhci
->devs
[slot_id
]->eps
[ep_index
].ring
;
3664 num_tds
= urb
->number_of_packets
;
3666 xhci_dbg(xhci
, "Isoc URB with zero packets?\n");
3670 start_addr
= (u64
) urb
->transfer_dma
;
3671 start_trb
= &ep_ring
->enqueue
->generic
;
3672 start_cycle
= ep_ring
->cycle_state
;
3674 urb_priv
= urb
->hcpriv
;
3675 /* Queue the first TRB, even if it's zero-length */
3676 for (i
= 0; i
< num_tds
; i
++) {
3677 unsigned int total_packet_count
;
3678 unsigned int burst_count
;
3679 unsigned int residue
;
3683 addr
= start_addr
+ urb
->iso_frame_desc
[i
].offset
;
3684 td_len
= urb
->iso_frame_desc
[i
].length
;
3685 td_remain_len
= td_len
;
3686 total_packet_count
= DIV_ROUND_UP(td_len
,
3688 usb_endpoint_maxp(&urb
->ep
->desc
)));
3689 /* A zero-length transfer still involves at least one packet. */
3690 if (total_packet_count
== 0)
3691 total_packet_count
++;
3692 burst_count
= xhci_get_burst_count(xhci
, urb
->dev
, urb
,
3693 total_packet_count
);
3694 residue
= xhci_get_last_burst_packet_count(xhci
,
3695 urb
->dev
, urb
, total_packet_count
);
3697 trbs_per_td
= count_isoc_trbs_needed(xhci
, urb
, i
);
3699 ret
= prepare_transfer(xhci
, xhci
->devs
[slot_id
], ep_index
,
3700 urb
->stream_id
, trbs_per_td
, urb
, i
, mem_flags
);
3707 td
= urb_priv
->td
[i
];
3708 for (j
= 0; j
< trbs_per_td
; j
++) {
3713 field
= TRB_TBC(burst_count
) |
3715 /* Queue the isoc TRB */
3716 field
|= TRB_TYPE(TRB_ISOC
);
3717 /* Assume URB_ISO_ASAP is set */
3720 if (start_cycle
== 0)
3723 field
|= ep_ring
->cycle_state
;
3726 /* Queue other normal TRBs */
3727 field
|= TRB_TYPE(TRB_NORMAL
);
3728 field
|= ep_ring
->cycle_state
;
3731 /* Only set interrupt on short packet for IN EPs */
3732 if (usb_urb_dir_in(urb
))
3735 /* Chain all the TRBs together; clear the chain bit in
3736 * the last TRB to indicate it's the last TRB in the
3739 if (j
< trbs_per_td
- 1) {
3741 more_trbs_coming
= true;
3743 td
->last_trb
= ep_ring
->enqueue
;
3745 if (xhci
->hci_version
== 0x100 &&
3748 /* Set BEI bit except for the last td */
3749 if (i
< num_tds
- 1)
3752 more_trbs_coming
= false;
3755 /* Calculate TRB length */
3756 trb_buff_len
= TRB_MAX_BUFF_SIZE
-
3757 (addr
& ((1 << TRB_MAX_BUFF_SHIFT
) - 1));
3758 if (trb_buff_len
> td_remain_len
)
3759 trb_buff_len
= td_remain_len
;
3761 /* Set the TRB length, TD size, & interrupter fields. */
3762 if (xhci
->hci_version
< 0x100) {
3763 remainder
= xhci_td_remainder(
3764 td_len
- running_total
);
3766 remainder
= xhci_v1_0_td_remainder(
3767 running_total
, trb_buff_len
,
3768 total_packet_count
, urb
,
3769 (trbs_per_td
- j
- 1));
3771 length_field
= TRB_LEN(trb_buff_len
) |
3775 queue_trb(xhci
, ep_ring
, more_trbs_coming
,
3776 lower_32_bits(addr
),
3777 upper_32_bits(addr
),
3780 running_total
+= trb_buff_len
;
3782 addr
+= trb_buff_len
;
3783 td_remain_len
-= trb_buff_len
;
3786 /* Check TD length */
3787 if (running_total
!= td_len
) {
3788 xhci_err(xhci
, "ISOC TD length unmatch\n");
3794 if (xhci_to_hcd(xhci
)->self
.bandwidth_isoc_reqs
== 0) {
3795 if (xhci
->quirks
& XHCI_AMD_PLL_FIX
)
3796 usb_amd_quirk_pll_disable();
3798 xhci_to_hcd(xhci
)->self
.bandwidth_isoc_reqs
++;
3800 giveback_first_trb(xhci
, slot_id
, ep_index
, urb
->stream_id
,
3801 start_cycle
, start_trb
);
3804 /* Clean up a partially enqueued isoc transfer. */
3806 for (i
--; i
>= 0; i
--)
3807 list_del_init(&urb_priv
->td
[i
]->td_list
);
3809 /* Use the first TD as a temporary variable to turn the TDs we've queued
3810 * into No-ops with a software-owned cycle bit. That way the hardware
3811 * won't accidentally start executing bogus TDs when we partially
3812 * overwrite them. td->first_trb and td->start_seg are already set.
3814 urb_priv
->td
[0]->last_trb
= ep_ring
->enqueue
;
3815 /* Every TRB except the first & last will have its cycle bit flipped. */
3816 td_to_noop(xhci
, ep_ring
, urb_priv
->td
[0], true);
3818 /* Reset the ring enqueue back to the first TRB and its cycle bit. */
3819 ep_ring
->enqueue
= urb_priv
->td
[0]->first_trb
;
3820 ep_ring
->enq_seg
= urb_priv
->td
[0]->start_seg
;
3821 ep_ring
->cycle_state
= start_cycle
;
3822 ep_ring
->num_trbs_free
= ep_ring
->num_trbs_free_temp
;
3823 usb_hcd_unlink_urb_from_ep(bus_to_hcd(urb
->dev
->bus
), urb
);
3828 * Check transfer ring to guarantee there is enough room for the urb.
3829 * Update ISO URB start_frame and interval.
3830 * Update interval as xhci_queue_intr_tx does. Just use xhci frame_index to
3831 * update the urb->start_frame by now.
3832 * Always assume URB_ISO_ASAP set, and NEVER use urb->start_frame as input.
3834 int xhci_queue_isoc_tx_prepare(struct xhci_hcd
*xhci
, gfp_t mem_flags
,
3835 struct urb
*urb
, int slot_id
, unsigned int ep_index
)
3837 struct xhci_virt_device
*xdev
;
3838 struct xhci_ring
*ep_ring
;
3839 struct xhci_ep_ctx
*ep_ctx
;
3843 int num_tds
, num_trbs
, i
;
3846 xdev
= xhci
->devs
[slot_id
];
3847 ep_ring
= xdev
->eps
[ep_index
].ring
;
3848 ep_ctx
= xhci_get_ep_ctx(xhci
, xdev
->out_ctx
, ep_index
);
3851 num_tds
= urb
->number_of_packets
;
3852 for (i
= 0; i
< num_tds
; i
++)
3853 num_trbs
+= count_isoc_trbs_needed(xhci
, urb
, i
);
3855 /* Check the ring to guarantee there is enough room for the whole urb.
3856 * Do not insert any td of the urb to the ring if the check failed.
3858 ret
= prepare_ring(xhci
, ep_ring
, le32_to_cpu(ep_ctx
->ep_info
) & EP_STATE_MASK
,
3859 num_trbs
, mem_flags
);
3863 start_frame
= xhci_readl(xhci
, &xhci
->run_regs
->microframe_index
);
3864 start_frame
&= 0x3fff;
3866 urb
->start_frame
= start_frame
;
3867 if (urb
->dev
->speed
== USB_SPEED_LOW
||
3868 urb
->dev
->speed
== USB_SPEED_FULL
)
3869 urb
->start_frame
>>= 3;
3871 xhci_interval
= EP_INTERVAL_TO_UFRAMES(le32_to_cpu(ep_ctx
->ep_info
));
3872 ep_interval
= urb
->interval
;
3873 /* Convert to microframes */
3874 if (urb
->dev
->speed
== USB_SPEED_LOW
||
3875 urb
->dev
->speed
== USB_SPEED_FULL
)
3877 /* FIXME change this to a warning and a suggestion to use the new API
3878 * to set the polling interval (once the API is added).
3880 if (xhci_interval
!= ep_interval
) {
3881 dev_dbg_ratelimited(&urb
->dev
->dev
,
3882 "Driver uses different interval (%d microframe%s) than xHCI (%d microframe%s)\n",
3883 ep_interval
, ep_interval
== 1 ? "" : "s",
3884 xhci_interval
, xhci_interval
== 1 ? "" : "s");
3885 urb
->interval
= xhci_interval
;
3886 /* Convert back to frames for LS/FS devices */
3887 if (urb
->dev
->speed
== USB_SPEED_LOW
||
3888 urb
->dev
->speed
== USB_SPEED_FULL
)
3891 ep_ring
->num_trbs_free_temp
= ep_ring
->num_trbs_free
;
3893 return xhci_queue_isoc_tx(xhci
, mem_flags
, urb
, slot_id
, ep_index
);
3896 /**** Command Ring Operations ****/
3898 /* Generic function for queueing a command TRB on the command ring.
3899 * Check to make sure there's room on the command ring for one command TRB.
3900 * Also check that there's room reserved for commands that must not fail.
3901 * If this is a command that must not fail, meaning command_must_succeed = TRUE,
3902 * then only check for the number of reserved spots.
3903 * Don't decrement xhci->cmd_ring_reserved_trbs after we've queued the TRB
3904 * because the command event handler may want to resubmit a failed command.
3906 static int queue_command(struct xhci_hcd
*xhci
, u32 field1
, u32 field2
,
3907 u32 field3
, u32 field4
, bool command_must_succeed
)
3909 int reserved_trbs
= xhci
->cmd_ring_reserved_trbs
;
3912 if (!command_must_succeed
)
3915 ret
= prepare_ring(xhci
, xhci
->cmd_ring
, EP_STATE_RUNNING
,
3916 reserved_trbs
, GFP_ATOMIC
);
3918 xhci_err(xhci
, "ERR: No room for command on command ring\n");
3919 if (command_must_succeed
)
3920 xhci_err(xhci
, "ERR: Reserved TRB counting for "
3921 "unfailable commands failed.\n");
3924 queue_trb(xhci
, xhci
->cmd_ring
, false, field1
, field2
, field3
,
3925 field4
| xhci
->cmd_ring
->cycle_state
);
3929 /* Queue a slot enable or disable request on the command ring */
3930 int xhci_queue_slot_control(struct xhci_hcd
*xhci
, u32 trb_type
, u32 slot_id
)
3932 return queue_command(xhci
, 0, 0, 0,
3933 TRB_TYPE(trb_type
) | SLOT_ID_FOR_TRB(slot_id
), false);
3936 /* Queue an address device command TRB */
3937 int xhci_queue_address_device(struct xhci_hcd
*xhci
, dma_addr_t in_ctx_ptr
,
3940 return queue_command(xhci
, lower_32_bits(in_ctx_ptr
),
3941 upper_32_bits(in_ctx_ptr
), 0,
3942 TRB_TYPE(TRB_ADDR_DEV
) | SLOT_ID_FOR_TRB(slot_id
),
3946 int xhci_queue_vendor_command(struct xhci_hcd
*xhci
,
3947 u32 field1
, u32 field2
, u32 field3
, u32 field4
)
3949 return queue_command(xhci
, field1
, field2
, field3
, field4
, false);
3952 /* Queue a reset device command TRB */
3953 int xhci_queue_reset_device(struct xhci_hcd
*xhci
, u32 slot_id
)
3955 return queue_command(xhci
, 0, 0, 0,
3956 TRB_TYPE(TRB_RESET_DEV
) | SLOT_ID_FOR_TRB(slot_id
),
3960 /* Queue a configure endpoint command TRB */
3961 int xhci_queue_configure_endpoint(struct xhci_hcd
*xhci
, dma_addr_t in_ctx_ptr
,
3962 u32 slot_id
, bool command_must_succeed
)
3964 return queue_command(xhci
, lower_32_bits(in_ctx_ptr
),
3965 upper_32_bits(in_ctx_ptr
), 0,
3966 TRB_TYPE(TRB_CONFIG_EP
) | SLOT_ID_FOR_TRB(slot_id
),
3967 command_must_succeed
);
3970 /* Queue an evaluate context command TRB */
3971 int xhci_queue_evaluate_context(struct xhci_hcd
*xhci
, dma_addr_t in_ctx_ptr
,
3972 u32 slot_id
, bool command_must_succeed
)
3974 return queue_command(xhci
, lower_32_bits(in_ctx_ptr
),
3975 upper_32_bits(in_ctx_ptr
), 0,
3976 TRB_TYPE(TRB_EVAL_CONTEXT
) | SLOT_ID_FOR_TRB(slot_id
),
3977 command_must_succeed
);
3981 * Suspend is set to indicate "Stop Endpoint Command" is being issued to stop
3982 * activity on an endpoint that is about to be suspended.
3984 int xhci_queue_stop_endpoint(struct xhci_hcd
*xhci
, int slot_id
,
3985 unsigned int ep_index
, int suspend
)
3987 u32 trb_slot_id
= SLOT_ID_FOR_TRB(slot_id
);
3988 u32 trb_ep_index
= EP_ID_FOR_TRB(ep_index
);
3989 u32 type
= TRB_TYPE(TRB_STOP_RING
);
3990 u32 trb_suspend
= SUSPEND_PORT_FOR_TRB(suspend
);
3992 return queue_command(xhci
, 0, 0, 0,
3993 trb_slot_id
| trb_ep_index
| type
| trb_suspend
, false);
3996 /* Set Transfer Ring Dequeue Pointer command.
3997 * This should not be used for endpoints that have streams enabled.
3999 static int queue_set_tr_deq(struct xhci_hcd
*xhci
, int slot_id
,
4000 unsigned int ep_index
, unsigned int stream_id
,
4001 struct xhci_segment
*deq_seg
,
4002 union xhci_trb
*deq_ptr
, u32 cycle_state
)
4005 u32 trb_slot_id
= SLOT_ID_FOR_TRB(slot_id
);
4006 u32 trb_ep_index
= EP_ID_FOR_TRB(ep_index
);
4007 u32 trb_stream_id
= STREAM_ID_FOR_TRB(stream_id
);
4008 u32 type
= TRB_TYPE(TRB_SET_DEQ
);
4009 struct xhci_virt_ep
*ep
;
4011 addr
= xhci_trb_virt_to_dma(deq_seg
, deq_ptr
);
4013 xhci_warn(xhci
, "WARN Cannot submit Set TR Deq Ptr\n");
4014 xhci_warn(xhci
, "WARN deq seg = %p, deq pt = %p\n",
4018 ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
4019 if ((ep
->ep_state
& SET_DEQ_PENDING
)) {
4020 xhci_warn(xhci
, "WARN Cannot submit Set TR Deq Ptr\n");
4021 xhci_warn(xhci
, "A Set TR Deq Ptr command is pending.\n");
4024 ep
->queued_deq_seg
= deq_seg
;
4025 ep
->queued_deq_ptr
= deq_ptr
;
4026 return queue_command(xhci
, lower_32_bits(addr
) | cycle_state
,
4027 upper_32_bits(addr
), trb_stream_id
,
4028 trb_slot_id
| trb_ep_index
| type
, false);
4031 int xhci_queue_reset_ep(struct xhci_hcd
*xhci
, int slot_id
,
4032 unsigned int ep_index
)
4034 u32 trb_slot_id
= SLOT_ID_FOR_TRB(slot_id
);
4035 u32 trb_ep_index
= EP_ID_FOR_TRB(ep_index
);
4036 u32 type
= TRB_TYPE(TRB_RESET_EP
);
4038 return queue_command(xhci
, 0, 0, 0, trb_slot_id
| trb_ep_index
| type
,