2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
32 #define DRIVER_AUTHOR "Sarah Sharp"
33 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
35 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
36 static int link_quirk
;
37 module_param(link_quirk
, int, S_IRUGO
| S_IWUSR
);
38 MODULE_PARM_DESC(link_quirk
, "Don't clear the chain bit on a link TRB");
40 /* TODO: copied from ehci-hcd.c - can this be refactored? */
42 * handshake - spin reading hc until handshake completes or fails
43 * @ptr: address of hc register to be read
44 * @mask: bits to look at in result of read
45 * @done: value of those bits when handshake succeeds
46 * @usec: timeout in microseconds
48 * Returns negative errno, or zero on success
50 * Success happens when the "mask" bits have the specified value (hardware
51 * handshake done). There are two failure modes: "usec" have passed (major
52 * hardware flakeout), or the register reads as all-ones (hardware removed).
54 static int handshake(struct xhci_hcd
*xhci
, void __iomem
*ptr
,
55 u32 mask
, u32 done
, int usec
)
60 result
= xhci_readl(xhci
, ptr
);
61 if (result
== ~(u32
)0) /* card removed */
73 * Disable interrupts and begin the xHCI halting process.
75 void xhci_quiesce(struct xhci_hcd
*xhci
)
82 halted
= xhci_readl(xhci
, &xhci
->op_regs
->status
) & STS_HALT
;
86 cmd
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
88 xhci_writel(xhci
, cmd
, &xhci
->op_regs
->command
);
92 * Force HC into halt state.
94 * Disable any IRQs and clear the run/stop bit.
95 * HC will complete any current and actively pipelined transactions, and
96 * should halt within 16 microframes of the run/stop bit being cleared.
97 * Read HC Halted bit in the status register to see when the HC is finished.
98 * XXX: shouldn't we set HC_STATE_HALT here somewhere?
100 int xhci_halt(struct xhci_hcd
*xhci
)
102 xhci_dbg(xhci
, "// Halt the HC\n");
105 return handshake(xhci
, &xhci
->op_regs
->status
,
106 STS_HALT
, STS_HALT
, XHCI_MAX_HALT_USEC
);
110 * Set the run bit and wait for the host to be running.
112 int xhci_start(struct xhci_hcd
*xhci
)
117 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
119 xhci_dbg(xhci
, "// Turn on HC, cmd = 0x%x.\n",
121 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
124 * Wait for the HCHalted Status bit to be 0 to indicate the host is
127 ret
= handshake(xhci
, &xhci
->op_regs
->status
,
128 STS_HALT
, 0, XHCI_MAX_HALT_USEC
);
129 if (ret
== -ETIMEDOUT
)
130 xhci_err(xhci
, "Host took too long to start, "
131 "waited %u microseconds.\n",
137 * Reset a halted HC, and set the internal HC state to HC_STATE_HALT.
139 * This resets pipelines, timers, counters, state machines, etc.
140 * Transactions will be terminated immediately, and operational registers
141 * will be set to their defaults.
143 int xhci_reset(struct xhci_hcd
*xhci
)
149 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
150 if ((state
& STS_HALT
) == 0) {
151 xhci_warn(xhci
, "Host controller not halted, aborting reset.\n");
155 xhci_dbg(xhci
, "// Reset the HC\n");
156 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
157 command
|= CMD_RESET
;
158 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
159 /* XXX: Why does EHCI set this here? Shouldn't other code do this? */
160 xhci_to_hcd(xhci
)->state
= HC_STATE_HALT
;
162 ret
= handshake(xhci
, &xhci
->op_regs
->command
,
163 CMD_RESET
, 0, 250 * 1000);
167 xhci_dbg(xhci
, "Wait for controller to be ready for doorbell rings\n");
169 * xHCI cannot write to any doorbells or operational registers other
170 * than status until the "Controller Not Ready" flag is cleared.
172 return handshake(xhci
, &xhci
->op_regs
->status
, STS_CNR
, 0, 250 * 1000);
177 * free all IRQs request
179 static void xhci_free_irq(struct xhci_hcd
*xhci
)
182 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
184 /* return if using legacy interrupt */
185 if (xhci_to_hcd(xhci
)->irq
>= 0)
188 if (xhci
->msix_entries
) {
189 for (i
= 0; i
< xhci
->msix_count
; i
++)
190 if (xhci
->msix_entries
[i
].vector
)
191 free_irq(xhci
->msix_entries
[i
].vector
,
193 } else if (pdev
->irq
>= 0)
194 free_irq(pdev
->irq
, xhci_to_hcd(xhci
));
202 static int xhci_setup_msi(struct xhci_hcd
*xhci
)
205 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
207 ret
= pci_enable_msi(pdev
);
209 xhci_err(xhci
, "failed to allocate MSI entry\n");
213 ret
= request_irq(pdev
->irq
, (irq_handler_t
)xhci_msi_irq
,
214 0, "xhci_hcd", xhci_to_hcd(xhci
));
216 xhci_err(xhci
, "disable MSI interrupt\n");
217 pci_disable_msi(pdev
);
226 static int xhci_setup_msix(struct xhci_hcd
*xhci
)
229 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
232 * calculate number of msi-x vectors supported.
233 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
234 * with max number of interrupters based on the xhci HCSPARAMS1.
235 * - num_online_cpus: maximum msi-x vectors per CPUs core.
236 * Add additional 1 vector to ensure always available interrupt.
238 xhci
->msix_count
= min(num_online_cpus() + 1,
239 HCS_MAX_INTRS(xhci
->hcs_params1
));
242 kmalloc((sizeof(struct msix_entry
))*xhci
->msix_count
,
244 if (!xhci
->msix_entries
) {
245 xhci_err(xhci
, "Failed to allocate MSI-X entries\n");
249 for (i
= 0; i
< xhci
->msix_count
; i
++) {
250 xhci
->msix_entries
[i
].entry
= i
;
251 xhci
->msix_entries
[i
].vector
= 0;
254 ret
= pci_enable_msix(pdev
, xhci
->msix_entries
, xhci
->msix_count
);
256 xhci_err(xhci
, "Failed to enable MSI-X\n");
260 for (i
= 0; i
< xhci
->msix_count
; i
++) {
261 ret
= request_irq(xhci
->msix_entries
[i
].vector
,
262 (irq_handler_t
)xhci_msi_irq
,
263 0, "xhci_hcd", xhci_to_hcd(xhci
));
271 xhci_err(xhci
, "disable MSI-X interrupt\n");
273 pci_disable_msix(pdev
);
275 kfree(xhci
->msix_entries
);
276 xhci
->msix_entries
= NULL
;
280 /* Free any IRQs and disable MSI-X */
281 static void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
283 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
287 if (xhci
->msix_entries
) {
288 pci_disable_msix(pdev
);
289 kfree(xhci
->msix_entries
);
290 xhci
->msix_entries
= NULL
;
292 pci_disable_msi(pdev
);
299 * Initialize memory for HCD and xHC (one-time init).
301 * Program the PAGESIZE register, initialize the device context array, create
302 * device contexts (?), set up a command ring segment (or two?), create event
303 * ring (one for now).
305 int xhci_init(struct usb_hcd
*hcd
)
307 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
310 xhci_dbg(xhci
, "xhci_init\n");
311 spin_lock_init(&xhci
->lock
);
313 xhci_dbg(xhci
, "QUIRK: Not clearing Link TRB chain bits.\n");
314 xhci
->quirks
|= XHCI_LINK_TRB_QUIRK
;
316 xhci_dbg(xhci
, "xHCI doesn't need link TRB QUIRK\n");
318 retval
= xhci_mem_init(xhci
, GFP_KERNEL
);
319 xhci_dbg(xhci
, "Finished xhci_init\n");
324 /*-------------------------------------------------------------------------*/
327 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
328 void xhci_event_ring_work(unsigned long arg
)
333 struct xhci_hcd
*xhci
= (struct xhci_hcd
*) arg
;
336 xhci_dbg(xhci
, "Poll event ring: %lu\n", jiffies
);
338 spin_lock_irqsave(&xhci
->lock
, flags
);
339 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
340 xhci_dbg(xhci
, "op reg status = 0x%x\n", temp
);
341 if (temp
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
)) {
342 xhci_dbg(xhci
, "HW died, polling stopped.\n");
343 spin_unlock_irqrestore(&xhci
->lock
, flags
);
347 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
348 xhci_dbg(xhci
, "ir_set 0 pending = 0x%x\n", temp
);
349 xhci_dbg(xhci
, "No-op commands handled = %d\n", xhci
->noops_handled
);
350 xhci_dbg(xhci
, "HC error bitmask = 0x%x\n", xhci
->error_bitmask
);
351 xhci
->error_bitmask
= 0;
352 xhci_dbg(xhci
, "Event ring:\n");
353 xhci_debug_segment(xhci
, xhci
->event_ring
->deq_seg
);
354 xhci_dbg_ring_ptrs(xhci
, xhci
->event_ring
);
355 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
356 temp_64
&= ~ERST_PTR_MASK
;
357 xhci_dbg(xhci
, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64
);
358 xhci_dbg(xhci
, "Command ring:\n");
359 xhci_debug_segment(xhci
, xhci
->cmd_ring
->deq_seg
);
360 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
361 xhci_dbg_cmd_ptrs(xhci
);
362 for (i
= 0; i
< MAX_HC_SLOTS
; ++i
) {
365 for (j
= 0; j
< 31; ++j
) {
366 xhci_dbg_ep_rings(xhci
, i
, j
, &xhci
->devs
[i
]->eps
[j
]);
370 if (xhci
->noops_submitted
!= NUM_TEST_NOOPS
)
371 if (xhci_setup_one_noop(xhci
))
372 xhci_ring_cmd_db(xhci
);
373 spin_unlock_irqrestore(&xhci
->lock
, flags
);
376 mod_timer(&xhci
->event_ring_timer
, jiffies
+ POLL_TIMEOUT
* HZ
);
378 xhci_dbg(xhci
, "Quit polling the event ring.\n");
383 * Start the HC after it was halted.
385 * This function is called by the USB core when the HC driver is added.
386 * Its opposite is xhci_stop().
388 * xhci_init() must be called once before this function can be called.
389 * Reset the HC, enable device slot contexts, program DCBAAP, and
390 * set command ring pointer and event ring pointer.
392 * Setup MSI-X vectors and enable interrupts.
394 int xhci_run(struct usb_hcd
*hcd
)
399 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
400 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
401 void (*doorbell
)(struct xhci_hcd
*) = NULL
;
403 hcd
->uses_new_polling
= 1;
405 xhci_dbg(xhci
, "xhci_run\n");
406 /* unregister the legacy interrupt */
408 free_irq(hcd
->irq
, hcd
);
411 ret
= xhci_setup_msix(xhci
);
413 /* fall back to msi*/
414 ret
= xhci_setup_msi(xhci
);
417 /* fall back to legacy interrupt*/
418 ret
= request_irq(pdev
->irq
, &usb_hcd_irq
, IRQF_SHARED
,
419 hcd
->irq_descr
, hcd
);
421 xhci_err(xhci
, "request interrupt %d failed\n",
425 hcd
->irq
= pdev
->irq
;
428 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
429 init_timer(&xhci
->event_ring_timer
);
430 xhci
->event_ring_timer
.data
= (unsigned long) xhci
;
431 xhci
->event_ring_timer
.function
= xhci_event_ring_work
;
432 /* Poll the event ring */
433 xhci
->event_ring_timer
.expires
= jiffies
+ POLL_TIMEOUT
* HZ
;
435 xhci_dbg(xhci
, "Setting event ring polling timer\n");
436 add_timer(&xhci
->event_ring_timer
);
439 xhci_dbg(xhci
, "Command ring memory map follows:\n");
440 xhci_debug_ring(xhci
, xhci
->cmd_ring
);
441 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
442 xhci_dbg_cmd_ptrs(xhci
);
444 xhci_dbg(xhci
, "ERST memory map follows:\n");
445 xhci_dbg_erst(xhci
, &xhci
->erst
);
446 xhci_dbg(xhci
, "Event ring:\n");
447 xhci_debug_ring(xhci
, xhci
->event_ring
);
448 xhci_dbg_ring_ptrs(xhci
, xhci
->event_ring
);
449 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
450 temp_64
&= ~ERST_PTR_MASK
;
451 xhci_dbg(xhci
, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64
);
453 xhci_dbg(xhci
, "// Set the interrupt modulation register\n");
454 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_control
);
455 temp
&= ~ER_IRQ_INTERVAL_MASK
;
457 xhci_writel(xhci
, temp
, &xhci
->ir_set
->irq_control
);
459 /* Set the HCD state before we enable the irqs */
460 hcd
->state
= HC_STATE_RUNNING
;
461 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
463 xhci_dbg(xhci
, "// Enable interrupts, cmd = 0x%x.\n",
465 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
467 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
468 xhci_dbg(xhci
, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
469 xhci
->ir_set
, (unsigned int) ER_IRQ_ENABLE(temp
));
470 xhci_writel(xhci
, ER_IRQ_ENABLE(temp
),
471 &xhci
->ir_set
->irq_pending
);
472 xhci_print_ir_set(xhci
, xhci
->ir_set
, 0);
474 if (NUM_TEST_NOOPS
> 0)
475 doorbell
= xhci_setup_one_noop(xhci
);
476 if (xhci
->quirks
& XHCI_NEC_HOST
)
477 xhci_queue_vendor_command(xhci
, 0, 0, 0,
478 TRB_TYPE(TRB_NEC_GET_FW
));
480 if (xhci_start(xhci
)) {
487 if (xhci
->quirks
& XHCI_NEC_HOST
)
488 xhci_ring_cmd_db(xhci
);
490 xhci_dbg(xhci
, "Finished xhci_run\n");
497 * This function is called by the USB core when the HC driver is removed.
498 * Its opposite is xhci_run().
500 * Disable device contexts, disable IRQs, and quiesce the HC.
501 * Reset the HC, finish any completed transactions, and cleanup memory.
503 void xhci_stop(struct usb_hcd
*hcd
)
506 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
508 spin_lock_irq(&xhci
->lock
);
511 xhci_cleanup_msix(xhci
);
512 spin_unlock_irq(&xhci
->lock
);
514 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
515 /* Tell the event ring poll function not to reschedule */
517 del_timer_sync(&xhci
->event_ring_timer
);
520 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
521 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
522 xhci_writel(xhci
, temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
523 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
524 xhci_writel(xhci
, ER_IRQ_DISABLE(temp
),
525 &xhci
->ir_set
->irq_pending
);
526 xhci_print_ir_set(xhci
, xhci
->ir_set
, 0);
528 xhci_dbg(xhci
, "cleaning up memory\n");
529 xhci_mem_cleanup(xhci
);
530 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
531 xhci_readl(xhci
, &xhci
->op_regs
->status
));
535 * Shutdown HC (not bus-specific)
537 * This is called when the machine is rebooting or halting. We assume that the
538 * machine will be powered off, and the HC's internal state will be reset.
539 * Don't bother to free memory.
541 void xhci_shutdown(struct usb_hcd
*hcd
)
543 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
545 spin_lock_irq(&xhci
->lock
);
547 xhci_cleanup_msix(xhci
);
548 spin_unlock_irq(&xhci
->lock
);
550 xhci_dbg(xhci
, "xhci_shutdown completed - status = %x\n",
551 xhci_readl(xhci
, &xhci
->op_regs
->status
));
555 static void xhci_save_registers(struct xhci_hcd
*xhci
)
557 xhci
->s3
.command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
558 xhci
->s3
.dev_nt
= xhci_readl(xhci
, &xhci
->op_regs
->dev_notification
);
559 xhci
->s3
.dcbaa_ptr
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
560 xhci
->s3
.config_reg
= xhci_readl(xhci
, &xhci
->op_regs
->config_reg
);
561 xhci
->s3
.irq_pending
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
562 xhci
->s3
.irq_control
= xhci_readl(xhci
, &xhci
->ir_set
->irq_control
);
563 xhci
->s3
.erst_size
= xhci_readl(xhci
, &xhci
->ir_set
->erst_size
);
564 xhci
->s3
.erst_base
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_base
);
565 xhci
->s3
.erst_dequeue
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
568 static void xhci_restore_registers(struct xhci_hcd
*xhci
)
570 xhci_writel(xhci
, xhci
->s3
.command
, &xhci
->op_regs
->command
);
571 xhci_writel(xhci
, xhci
->s3
.dev_nt
, &xhci
->op_regs
->dev_notification
);
572 xhci_write_64(xhci
, xhci
->s3
.dcbaa_ptr
, &xhci
->op_regs
->dcbaa_ptr
);
573 xhci_writel(xhci
, xhci
->s3
.config_reg
, &xhci
->op_regs
->config_reg
);
574 xhci_writel(xhci
, xhci
->s3
.irq_pending
, &xhci
->ir_set
->irq_pending
);
575 xhci_writel(xhci
, xhci
->s3
.irq_control
, &xhci
->ir_set
->irq_control
);
576 xhci_writel(xhci
, xhci
->s3
.erst_size
, &xhci
->ir_set
->erst_size
);
577 xhci_write_64(xhci
, xhci
->s3
.erst_base
, &xhci
->ir_set
->erst_base
);
581 * Stop HC (not bus-specific)
583 * This is called when the machine transition into S3/S4 mode.
586 int xhci_suspend(struct xhci_hcd
*xhci
)
589 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
592 spin_lock_irq(&xhci
->lock
);
593 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
594 /* step 1: stop endpoint */
595 /* skipped assuming that port suspend has done */
597 /* step 2: clear Run/Stop bit */
598 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
600 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
601 if (handshake(xhci
, &xhci
->op_regs
->status
,
602 STS_HALT
, STS_HALT
, 100*100)) {
603 xhci_warn(xhci
, "WARN: xHC CMD_RUN timeout\n");
604 spin_unlock_irq(&xhci
->lock
);
608 /* step 3: save registers */
609 xhci_save_registers(xhci
);
611 /* step 4: set CSS flag */
612 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
614 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
615 if (handshake(xhci
, &xhci
->op_regs
->status
, STS_SAVE
, 0, 10*100)) {
616 xhci_warn(xhci
, "WARN: xHC CMD_CSS timeout\n");
617 spin_unlock_irq(&xhci
->lock
);
620 /* step 5: remove core well power */
621 xhci_cleanup_msix(xhci
);
622 spin_unlock_irq(&xhci
->lock
);
628 * start xHC (not bus-specific)
630 * This is called when the machine transition from S3/S4 mode.
633 int xhci_resume(struct xhci_hcd
*xhci
, bool hibernated
)
635 u32 command
, temp
= 0;
636 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
637 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
639 int old_state
, retval
;
641 old_state
= hcd
->state
;
642 if (time_before(jiffies
, xhci
->next_statechange
))
645 spin_lock_irq(&xhci
->lock
);
648 /* step 1: restore register */
649 xhci_restore_registers(xhci
);
650 /* step 2: initialize command ring buffer */
651 val_64
= xhci_read_64(xhci
, &xhci
->op_regs
->cmd_ring
);
652 val_64
= (val_64
& (u64
) CMD_RING_RSVD_BITS
) |
653 (xhci_trb_virt_to_dma(xhci
->cmd_ring
->deq_seg
,
654 xhci
->cmd_ring
->dequeue
) &
655 (u64
) ~CMD_RING_RSVD_BITS
) |
656 xhci
->cmd_ring
->cycle_state
;
657 xhci_dbg(xhci
, "// Setting command ring address to 0x%llx\n",
658 (long unsigned long) val_64
);
659 xhci_write_64(xhci
, val_64
, &xhci
->op_regs
->cmd_ring
);
660 /* step 3: restore state and start state*/
661 /* step 3: set CRS flag */
662 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
664 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
665 if (handshake(xhci
, &xhci
->op_regs
->status
,
666 STS_RESTORE
, 0, 10*100)) {
667 xhci_dbg(xhci
, "WARN: xHC CMD_CSS timeout\n");
668 spin_unlock_irq(&xhci
->lock
);
671 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
674 /* If restore operation fails, re-initialize the HC during resume */
675 if ((temp
& STS_SRE
) || hibernated
) {
676 usb_root_hub_lost_power(hcd
->self
.root_hub
);
678 xhci_dbg(xhci
, "Stop HCD\n");
682 xhci_cleanup_msix(xhci
);
683 spin_unlock_irq(&xhci
->lock
);
685 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
686 /* Tell the event ring poll function not to reschedule */
688 del_timer_sync(&xhci
->event_ring_timer
);
691 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
692 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
693 xhci_writel(xhci
, temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
694 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
695 xhci_writel(xhci
, ER_IRQ_DISABLE(temp
),
696 &xhci
->ir_set
->irq_pending
);
697 xhci_print_ir_set(xhci
, xhci
->ir_set
, 0);
699 xhci_dbg(xhci
, "cleaning up memory\n");
700 xhci_mem_cleanup(xhci
);
701 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
702 xhci_readl(xhci
, &xhci
->op_regs
->status
));
704 xhci_dbg(xhci
, "Initialize the HCD\n");
705 retval
= xhci_init(hcd
);
709 xhci_dbg(xhci
, "Start the HCD\n");
710 retval
= xhci_run(hcd
);
712 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
713 hcd
->state
= HC_STATE_SUSPENDED
;
719 free_irq(hcd
->irq
, hcd
);
722 retval
= xhci_setup_msix(xhci
);
724 /* fall back to msi*/
725 retval
= xhci_setup_msi(xhci
);
728 /* fall back to legacy interrupt*/
729 retval
= request_irq(pdev
->irq
, &usb_hcd_irq
, IRQF_SHARED
,
730 hcd
->irq_descr
, hcd
);
732 xhci_err(xhci
, "request interrupt %d failed\n",
736 hcd
->irq
= pdev
->irq
;
739 /* step 4: set Run/Stop bit */
740 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
742 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
743 handshake(xhci
, &xhci
->op_regs
->status
, STS_HALT
,
746 /* step 5: walk topology and initialize portsc,
747 * portpmsc and portli
749 /* this is done in bus_resume */
751 /* step 6: restart each of the previously
752 * Running endpoints by ringing their doorbells
755 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
757 hcd
->state
= old_state
;
759 hcd
->state
= HC_STATE_SUSPENDED
;
761 spin_unlock_irq(&xhci
->lock
);
764 #endif /* CONFIG_PM */
766 /*-------------------------------------------------------------------------*/
769 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
770 * HCDs. Find the index for an endpoint given its descriptor. Use the return
771 * value to right shift 1 for the bitmask.
773 * Index = (epnum * 2) + direction - 1,
774 * where direction = 0 for OUT, 1 for IN.
775 * For control endpoints, the IN index is used (OUT index is unused), so
776 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
778 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor
*desc
)
781 if (usb_endpoint_xfer_control(desc
))
782 index
= (unsigned int) (usb_endpoint_num(desc
)*2);
784 index
= (unsigned int) (usb_endpoint_num(desc
)*2) +
785 (usb_endpoint_dir_in(desc
) ? 1 : 0) - 1;
789 /* Find the flag for this endpoint (for use in the control context). Use the
790 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
793 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor
*desc
)
795 return 1 << (xhci_get_endpoint_index(desc
) + 1);
798 /* Find the flag for this endpoint (for use in the control context). Use the
799 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
802 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index
)
804 return 1 << (ep_index
+ 1);
807 /* Compute the last valid endpoint context index. Basically, this is the
808 * endpoint index plus one. For slot contexts with more than valid endpoint,
809 * we find the most significant bit set in the added contexts flags.
810 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
811 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
813 unsigned int xhci_last_valid_endpoint(u32 added_ctxs
)
815 return fls(added_ctxs
) - 1;
818 /* Returns 1 if the arguments are OK;
819 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
821 int xhci_check_args(struct usb_hcd
*hcd
, struct usb_device
*udev
,
822 struct usb_host_endpoint
*ep
, int check_ep
, bool check_virt_dev
,
824 struct xhci_hcd
*xhci
;
825 struct xhci_virt_device
*virt_dev
;
827 if (!hcd
|| (check_ep
&& !ep
) || !udev
) {
828 printk(KERN_DEBUG
"xHCI %s called with invalid args\n",
833 printk(KERN_DEBUG
"xHCI %s called for root hub\n",
838 if (check_virt_dev
) {
839 xhci
= hcd_to_xhci(hcd
);
840 if (!udev
->slot_id
|| !xhci
->devs
841 || !xhci
->devs
[udev
->slot_id
]) {
842 printk(KERN_DEBUG
"xHCI %s called with unaddressed "
847 virt_dev
= xhci
->devs
[udev
->slot_id
];
848 if (virt_dev
->udev
!= udev
) {
849 printk(KERN_DEBUG
"xHCI %s called with udev and "
850 "virt_dev does not match\n", func
);
858 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
859 struct usb_device
*udev
, struct xhci_command
*command
,
860 bool ctx_change
, bool must_succeed
);
863 * Full speed devices may have a max packet size greater than 8 bytes, but the
864 * USB core doesn't know that until it reads the first 8 bytes of the
865 * descriptor. If the usb_device's max packet size changes after that point,
866 * we need to issue an evaluate context command and wait on it.
868 static int xhci_check_maxpacket(struct xhci_hcd
*xhci
, unsigned int slot_id
,
869 unsigned int ep_index
, struct urb
*urb
)
871 struct xhci_container_ctx
*in_ctx
;
872 struct xhci_container_ctx
*out_ctx
;
873 struct xhci_input_control_ctx
*ctrl_ctx
;
874 struct xhci_ep_ctx
*ep_ctx
;
876 int hw_max_packet_size
;
879 out_ctx
= xhci
->devs
[slot_id
]->out_ctx
;
880 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
881 hw_max_packet_size
= MAX_PACKET_DECODED(ep_ctx
->ep_info2
);
882 max_packet_size
= urb
->dev
->ep0
.desc
.wMaxPacketSize
;
883 if (hw_max_packet_size
!= max_packet_size
) {
884 xhci_dbg(xhci
, "Max Packet Size for ep 0 changed.\n");
885 xhci_dbg(xhci
, "Max packet size in usb_device = %d\n",
887 xhci_dbg(xhci
, "Max packet size in xHCI HW = %d\n",
889 xhci_dbg(xhci
, "Issuing evaluate context command.\n");
891 /* Set up the modified control endpoint 0 */
892 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
893 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
894 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
895 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
896 ep_ctx
->ep_info2
&= ~MAX_PACKET_MASK
;
897 ep_ctx
->ep_info2
|= MAX_PACKET(max_packet_size
);
899 /* Set up the input context flags for the command */
900 /* FIXME: This won't work if a non-default control endpoint
901 * changes max packet sizes.
903 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
904 ctrl_ctx
->add_flags
= EP0_FLAG
;
905 ctrl_ctx
->drop_flags
= 0;
907 xhci_dbg(xhci
, "Slot %d input context\n", slot_id
);
908 xhci_dbg_ctx(xhci
, in_ctx
, ep_index
);
909 xhci_dbg(xhci
, "Slot %d output context\n", slot_id
);
910 xhci_dbg_ctx(xhci
, out_ctx
, ep_index
);
912 ret
= xhci_configure_endpoint(xhci
, urb
->dev
, NULL
,
915 /* Clean up the input context for later use by bandwidth
918 ctrl_ctx
->add_flags
= SLOT_FLAG
;
924 * non-error returns are a promise to giveback() the urb later
925 * we drop ownership so next owner (or urb unlink) can get it
927 int xhci_urb_enqueue(struct usb_hcd
*hcd
, struct urb
*urb
, gfp_t mem_flags
)
929 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
932 unsigned int slot_id
, ep_index
;
933 struct urb_priv
*urb_priv
;
936 if (!urb
|| xhci_check_args(hcd
, urb
->dev
, urb
->ep
,
937 true, true, __func__
) <= 0)
940 slot_id
= urb
->dev
->slot_id
;
941 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
943 if (!HCD_HW_ACCESSIBLE(hcd
)) {
945 xhci_dbg(xhci
, "urb submitted during PCI suspend\n");
950 if (usb_endpoint_xfer_isoc(&urb
->ep
->desc
))
951 size
= urb
->number_of_packets
;
955 urb_priv
= kzalloc(sizeof(struct urb_priv
) +
956 size
* sizeof(struct xhci_td
*), mem_flags
);
960 for (i
= 0; i
< size
; i
++) {
961 urb_priv
->td
[i
] = kzalloc(sizeof(struct xhci_td
), mem_flags
);
962 if (!urb_priv
->td
[i
]) {
963 urb_priv
->length
= i
;
964 xhci_urb_free_priv(xhci
, urb_priv
);
969 urb_priv
->length
= size
;
970 urb_priv
->td_cnt
= 0;
971 urb
->hcpriv
= urb_priv
;
973 if (usb_endpoint_xfer_control(&urb
->ep
->desc
)) {
974 /* Check to see if the max packet size for the default control
975 * endpoint changed during FS device enumeration
977 if (urb
->dev
->speed
== USB_SPEED_FULL
) {
978 ret
= xhci_check_maxpacket(xhci
, slot_id
,
984 /* We have a spinlock and interrupts disabled, so we must pass
985 * atomic context to this function, which may allocate memory.
987 spin_lock_irqsave(&xhci
->lock
, flags
);
988 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
990 ret
= xhci_queue_ctrl_tx(xhci
, GFP_ATOMIC
, urb
,
992 spin_unlock_irqrestore(&xhci
->lock
, flags
);
993 } else if (usb_endpoint_xfer_bulk(&urb
->ep
->desc
)) {
994 spin_lock_irqsave(&xhci
->lock
, flags
);
995 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
997 if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
998 EP_GETTING_STREAMS
) {
999 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1000 "is transitioning to using streams.\n");
1002 } else if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
1003 EP_GETTING_NO_STREAMS
) {
1004 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1005 "is transitioning to "
1006 "not having streams.\n");
1009 ret
= xhci_queue_bulk_tx(xhci
, GFP_ATOMIC
, urb
,
1012 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1013 } else if (usb_endpoint_xfer_int(&urb
->ep
->desc
)) {
1014 spin_lock_irqsave(&xhci
->lock
, flags
);
1015 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1017 ret
= xhci_queue_intr_tx(xhci
, GFP_ATOMIC
, urb
,
1019 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1021 spin_lock_irqsave(&xhci
->lock
, flags
);
1022 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1024 ret
= xhci_queue_isoc_tx_prepare(xhci
, GFP_ATOMIC
, urb
,
1026 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1031 xhci_urb_free_priv(xhci
, urb_priv
);
1033 xhci_dbg(xhci
, "Ep 0x%x: URB %p submitted for "
1034 "non-responsive xHCI host.\n",
1035 urb
->ep
->desc
.bEndpointAddress
, urb
);
1036 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1040 /* Get the right ring for the given URB.
1041 * If the endpoint supports streams, boundary check the URB's stream ID.
1042 * If the endpoint doesn't support streams, return the singular endpoint ring.
1044 static struct xhci_ring
*xhci_urb_to_transfer_ring(struct xhci_hcd
*xhci
,
1047 unsigned int slot_id
;
1048 unsigned int ep_index
;
1049 unsigned int stream_id
;
1050 struct xhci_virt_ep
*ep
;
1052 slot_id
= urb
->dev
->slot_id
;
1053 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1054 stream_id
= urb
->stream_id
;
1055 ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
1056 /* Common case: no streams */
1057 if (!(ep
->ep_state
& EP_HAS_STREAMS
))
1060 if (stream_id
== 0) {
1062 "WARN: Slot ID %u, ep index %u has streams, "
1063 "but URB has no stream ID.\n",
1068 if (stream_id
< ep
->stream_info
->num_streams
)
1069 return ep
->stream_info
->stream_rings
[stream_id
];
1072 "WARN: Slot ID %u, ep index %u has "
1073 "stream IDs 1 to %u allocated, "
1074 "but stream ID %u is requested.\n",
1076 ep
->stream_info
->num_streams
- 1,
1082 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1083 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1084 * should pick up where it left off in the TD, unless a Set Transfer Ring
1085 * Dequeue Pointer is issued.
1087 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1088 * the ring. Since the ring is a contiguous structure, they can't be physically
1089 * removed. Instead, there are two options:
1091 * 1) If the HC is in the middle of processing the URB to be canceled, we
1092 * simply move the ring's dequeue pointer past those TRBs using the Set
1093 * Transfer Ring Dequeue Pointer command. This will be the common case,
1094 * when drivers timeout on the last submitted URB and attempt to cancel.
1096 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1097 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1098 * HC will need to invalidate the any TRBs it has cached after the stop
1099 * endpoint command, as noted in the xHCI 0.95 errata.
1101 * 3) The TD may have completed by the time the Stop Endpoint Command
1102 * completes, so software needs to handle that case too.
1104 * This function should protect against the TD enqueueing code ringing the
1105 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1106 * It also needs to account for multiple cancellations on happening at the same
1107 * time for the same endpoint.
1109 * Note that this function can be called in any context, or so says
1110 * usb_hcd_unlink_urb()
1112 int xhci_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
1114 unsigned long flags
;
1117 struct xhci_hcd
*xhci
;
1118 struct urb_priv
*urb_priv
;
1120 unsigned int ep_index
;
1121 struct xhci_ring
*ep_ring
;
1122 struct xhci_virt_ep
*ep
;
1124 xhci
= hcd_to_xhci(hcd
);
1125 spin_lock_irqsave(&xhci
->lock
, flags
);
1126 /* Make sure the URB hasn't completed or been unlinked already */
1127 ret
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
1128 if (ret
|| !urb
->hcpriv
)
1130 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
1131 if (temp
== 0xffffffff) {
1132 xhci_dbg(xhci
, "HW died, freeing TD.\n");
1133 urb_priv
= urb
->hcpriv
;
1135 usb_hcd_unlink_urb_from_ep(hcd
, urb
);
1136 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1137 usb_hcd_giveback_urb(xhci_to_hcd(xhci
), urb
, -ESHUTDOWN
);
1138 xhci_urb_free_priv(xhci
, urb_priv
);
1141 if (xhci
->xhc_state
& XHCI_STATE_DYING
) {
1142 xhci_dbg(xhci
, "Ep 0x%x: URB %p to be canceled on "
1143 "non-responsive xHCI host.\n",
1144 urb
->ep
->desc
.bEndpointAddress
, urb
);
1145 /* Let the stop endpoint command watchdog timer (which set this
1146 * state) finish cleaning up the endpoint TD lists. We must
1147 * have caught it in the middle of dropping a lock and giving
1153 xhci_dbg(xhci
, "Cancel URB %p\n", urb
);
1154 xhci_dbg(xhci
, "Event ring:\n");
1155 xhci_debug_ring(xhci
, xhci
->event_ring
);
1156 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1157 ep
= &xhci
->devs
[urb
->dev
->slot_id
]->eps
[ep_index
];
1158 ep_ring
= xhci_urb_to_transfer_ring(xhci
, urb
);
1164 xhci_dbg(xhci
, "Endpoint ring:\n");
1165 xhci_debug_ring(xhci
, ep_ring
);
1167 urb_priv
= urb
->hcpriv
;
1169 for (i
= urb_priv
->td_cnt
; i
< urb_priv
->length
; i
++) {
1170 td
= urb_priv
->td
[i
];
1171 list_add_tail(&td
->cancelled_td_list
, &ep
->cancelled_td_list
);
1174 /* Queue a stop endpoint command, but only if this is
1175 * the first cancellation to be handled.
1177 if (!(ep
->ep_state
& EP_HALT_PENDING
)) {
1178 ep
->ep_state
|= EP_HALT_PENDING
;
1179 ep
->stop_cmds_pending
++;
1180 ep
->stop_cmd_timer
.expires
= jiffies
+
1181 XHCI_STOP_EP_CMD_TIMEOUT
* HZ
;
1182 add_timer(&ep
->stop_cmd_timer
);
1183 xhci_queue_stop_endpoint(xhci
, urb
->dev
->slot_id
, ep_index
, 0);
1184 xhci_ring_cmd_db(xhci
);
1187 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1191 /* Drop an endpoint from a new bandwidth configuration for this device.
1192 * Only one call to this function is allowed per endpoint before
1193 * check_bandwidth() or reset_bandwidth() must be called.
1194 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1195 * add the endpoint to the schedule with possibly new parameters denoted by a
1196 * different endpoint descriptor in usb_host_endpoint.
1197 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1200 * The USB core will not allow URBs to be queued to an endpoint that is being
1201 * disabled, so there's no need for mutual exclusion to protect
1202 * the xhci->devs[slot_id] structure.
1204 int xhci_drop_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1205 struct usb_host_endpoint
*ep
)
1207 struct xhci_hcd
*xhci
;
1208 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1209 struct xhci_input_control_ctx
*ctrl_ctx
;
1210 struct xhci_slot_ctx
*slot_ctx
;
1211 unsigned int last_ctx
;
1212 unsigned int ep_index
;
1213 struct xhci_ep_ctx
*ep_ctx
;
1215 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1218 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1221 xhci
= hcd_to_xhci(hcd
);
1222 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
1224 drop_flag
= xhci_get_endpoint_flag(&ep
->desc
);
1225 if (drop_flag
== SLOT_FLAG
|| drop_flag
== EP0_FLAG
) {
1226 xhci_dbg(xhci
, "xHCI %s - can't drop slot or ep 0 %#x\n",
1227 __func__
, drop_flag
);
1231 in_ctx
= xhci
->devs
[udev
->slot_id
]->in_ctx
;
1232 out_ctx
= xhci
->devs
[udev
->slot_id
]->out_ctx
;
1233 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1234 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1235 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1236 /* If the HC already knows the endpoint is disabled,
1237 * or the HCD has noted it is disabled, ignore this request
1239 if ((ep_ctx
->ep_info
& EP_STATE_MASK
) == EP_STATE_DISABLED
||
1240 ctrl_ctx
->drop_flags
& xhci_get_endpoint_flag(&ep
->desc
)) {
1241 xhci_warn(xhci
, "xHCI %s called with disabled ep %p\n",
1246 ctrl_ctx
->drop_flags
|= drop_flag
;
1247 new_drop_flags
= ctrl_ctx
->drop_flags
;
1249 ctrl_ctx
->add_flags
&= ~drop_flag
;
1250 new_add_flags
= ctrl_ctx
->add_flags
;
1252 last_ctx
= xhci_last_valid_endpoint(ctrl_ctx
->add_flags
);
1253 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1254 /* Update the last valid endpoint context, if we deleted the last one */
1255 if ((slot_ctx
->dev_info
& LAST_CTX_MASK
) > LAST_CTX(last_ctx
)) {
1256 slot_ctx
->dev_info
&= ~LAST_CTX_MASK
;
1257 slot_ctx
->dev_info
|= LAST_CTX(last_ctx
);
1259 new_slot_info
= slot_ctx
->dev_info
;
1261 xhci_endpoint_zero(xhci
, xhci
->devs
[udev
->slot_id
], ep
);
1263 xhci_dbg(xhci
, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1264 (unsigned int) ep
->desc
.bEndpointAddress
,
1266 (unsigned int) new_drop_flags
,
1267 (unsigned int) new_add_flags
,
1268 (unsigned int) new_slot_info
);
1272 /* Add an endpoint to a new possible bandwidth configuration for this device.
1273 * Only one call to this function is allowed per endpoint before
1274 * check_bandwidth() or reset_bandwidth() must be called.
1275 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1276 * add the endpoint to the schedule with possibly new parameters denoted by a
1277 * different endpoint descriptor in usb_host_endpoint.
1278 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1281 * The USB core will not allow URBs to be queued to an endpoint until the
1282 * configuration or alt setting is installed in the device, so there's no need
1283 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1285 int xhci_add_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1286 struct usb_host_endpoint
*ep
)
1288 struct xhci_hcd
*xhci
;
1289 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1290 unsigned int ep_index
;
1291 struct xhci_ep_ctx
*ep_ctx
;
1292 struct xhci_slot_ctx
*slot_ctx
;
1293 struct xhci_input_control_ctx
*ctrl_ctx
;
1295 unsigned int last_ctx
;
1296 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1299 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1301 /* So we won't queue a reset ep command for a root hub */
1305 xhci
= hcd_to_xhci(hcd
);
1307 added_ctxs
= xhci_get_endpoint_flag(&ep
->desc
);
1308 last_ctx
= xhci_last_valid_endpoint(added_ctxs
);
1309 if (added_ctxs
== SLOT_FLAG
|| added_ctxs
== EP0_FLAG
) {
1310 /* FIXME when we have to issue an evaluate endpoint command to
1311 * deal with ep0 max packet size changing once we get the
1314 xhci_dbg(xhci
, "xHCI %s - can't add slot or ep 0 %#x\n",
1315 __func__
, added_ctxs
);
1319 in_ctx
= xhci
->devs
[udev
->slot_id
]->in_ctx
;
1320 out_ctx
= xhci
->devs
[udev
->slot_id
]->out_ctx
;
1321 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1322 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1323 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1324 /* If the HCD has already noted the endpoint is enabled,
1325 * ignore this request.
1327 if (ctrl_ctx
->add_flags
& xhci_get_endpoint_flag(&ep
->desc
)) {
1328 xhci_warn(xhci
, "xHCI %s called with enabled ep %p\n",
1334 * Configuration and alternate setting changes must be done in
1335 * process context, not interrupt context (or so documenation
1336 * for usb_set_interface() and usb_set_configuration() claim).
1338 if (xhci_endpoint_init(xhci
, xhci
->devs
[udev
->slot_id
],
1339 udev
, ep
, GFP_NOIO
) < 0) {
1340 dev_dbg(&udev
->dev
, "%s - could not initialize ep %#x\n",
1341 __func__
, ep
->desc
.bEndpointAddress
);
1345 ctrl_ctx
->add_flags
|= added_ctxs
;
1346 new_add_flags
= ctrl_ctx
->add_flags
;
1348 /* If xhci_endpoint_disable() was called for this endpoint, but the
1349 * xHC hasn't been notified yet through the check_bandwidth() call,
1350 * this re-adds a new state for the endpoint from the new endpoint
1351 * descriptors. We must drop and re-add this endpoint, so we leave the
1354 new_drop_flags
= ctrl_ctx
->drop_flags
;
1356 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1357 /* Update the last valid endpoint context, if we just added one past */
1358 if ((slot_ctx
->dev_info
& LAST_CTX_MASK
) < LAST_CTX(last_ctx
)) {
1359 slot_ctx
->dev_info
&= ~LAST_CTX_MASK
;
1360 slot_ctx
->dev_info
|= LAST_CTX(last_ctx
);
1362 new_slot_info
= slot_ctx
->dev_info
;
1364 /* Store the usb_device pointer for later use */
1367 xhci_dbg(xhci
, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1368 (unsigned int) ep
->desc
.bEndpointAddress
,
1370 (unsigned int) new_drop_flags
,
1371 (unsigned int) new_add_flags
,
1372 (unsigned int) new_slot_info
);
1376 static void xhci_zero_in_ctx(struct xhci_hcd
*xhci
, struct xhci_virt_device
*virt_dev
)
1378 struct xhci_input_control_ctx
*ctrl_ctx
;
1379 struct xhci_ep_ctx
*ep_ctx
;
1380 struct xhci_slot_ctx
*slot_ctx
;
1383 /* When a device's add flag and drop flag are zero, any subsequent
1384 * configure endpoint command will leave that endpoint's state
1385 * untouched. Make sure we don't leave any old state in the input
1386 * endpoint contexts.
1388 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
1389 ctrl_ctx
->drop_flags
= 0;
1390 ctrl_ctx
->add_flags
= 0;
1391 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
1392 slot_ctx
->dev_info
&= ~LAST_CTX_MASK
;
1393 /* Endpoint 0 is always valid */
1394 slot_ctx
->dev_info
|= LAST_CTX(1);
1395 for (i
= 1; i
< 31; ++i
) {
1396 ep_ctx
= xhci_get_ep_ctx(xhci
, virt_dev
->in_ctx
, i
);
1397 ep_ctx
->ep_info
= 0;
1398 ep_ctx
->ep_info2
= 0;
1400 ep_ctx
->tx_info
= 0;
1404 static int xhci_configure_endpoint_result(struct xhci_hcd
*xhci
,
1405 struct usb_device
*udev
, int *cmd_status
)
1409 switch (*cmd_status
) {
1411 dev_warn(&udev
->dev
, "Not enough host controller resources "
1412 "for new device state.\n");
1414 /* FIXME: can we allocate more resources for the HC? */
1417 dev_warn(&udev
->dev
, "Not enough bandwidth "
1418 "for new device state.\n");
1420 /* FIXME: can we go back to the old state? */
1423 /* the HCD set up something wrong */
1424 dev_warn(&udev
->dev
, "ERROR: Endpoint drop flag = 0, "
1426 "and endpoint is not disabled.\n");
1430 dev_dbg(&udev
->dev
, "Successful Endpoint Configure command\n");
1434 xhci_err(xhci
, "ERROR: unexpected command completion "
1435 "code 0x%x.\n", *cmd_status
);
1442 static int xhci_evaluate_context_result(struct xhci_hcd
*xhci
,
1443 struct usb_device
*udev
, int *cmd_status
)
1446 struct xhci_virt_device
*virt_dev
= xhci
->devs
[udev
->slot_id
];
1448 switch (*cmd_status
) {
1450 dev_warn(&udev
->dev
, "WARN: xHCI driver setup invalid evaluate "
1451 "context command.\n");
1455 dev_warn(&udev
->dev
, "WARN: slot not enabled for"
1456 "evaluate context command.\n");
1457 case COMP_CTX_STATE
:
1458 dev_warn(&udev
->dev
, "WARN: invalid context state for "
1459 "evaluate context command.\n");
1460 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 1);
1464 dev_dbg(&udev
->dev
, "Successful evaluate context command\n");
1468 xhci_err(xhci
, "ERROR: unexpected command completion "
1469 "code 0x%x.\n", *cmd_status
);
1476 /* Issue a configure endpoint command or evaluate context command
1477 * and wait for it to finish.
1479 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
1480 struct usb_device
*udev
,
1481 struct xhci_command
*command
,
1482 bool ctx_change
, bool must_succeed
)
1486 unsigned long flags
;
1487 struct xhci_container_ctx
*in_ctx
;
1488 struct completion
*cmd_completion
;
1490 struct xhci_virt_device
*virt_dev
;
1492 spin_lock_irqsave(&xhci
->lock
, flags
);
1493 virt_dev
= xhci
->devs
[udev
->slot_id
];
1495 in_ctx
= command
->in_ctx
;
1496 cmd_completion
= command
->completion
;
1497 cmd_status
= &command
->status
;
1498 command
->command_trb
= xhci
->cmd_ring
->enqueue
;
1499 list_add_tail(&command
->cmd_list
, &virt_dev
->cmd_list
);
1501 in_ctx
= virt_dev
->in_ctx
;
1502 cmd_completion
= &virt_dev
->cmd_completion
;
1503 cmd_status
= &virt_dev
->cmd_status
;
1505 init_completion(cmd_completion
);
1508 ret
= xhci_queue_configure_endpoint(xhci
, in_ctx
->dma
,
1509 udev
->slot_id
, must_succeed
);
1511 ret
= xhci_queue_evaluate_context(xhci
, in_ctx
->dma
,
1515 list_del(&command
->cmd_list
);
1516 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1517 xhci_dbg(xhci
, "FIXME allocate a new ring segment\n");
1520 xhci_ring_cmd_db(xhci
);
1521 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1523 /* Wait for the configure endpoint command to complete */
1524 timeleft
= wait_for_completion_interruptible_timeout(
1526 USB_CTRL_SET_TIMEOUT
);
1527 if (timeleft
<= 0) {
1528 xhci_warn(xhci
, "%s while waiting for %s command\n",
1529 timeleft
== 0 ? "Timeout" : "Signal",
1531 "configure endpoint" :
1532 "evaluate context");
1533 /* FIXME cancel the configure endpoint command */
1538 return xhci_configure_endpoint_result(xhci
, udev
, cmd_status
);
1539 return xhci_evaluate_context_result(xhci
, udev
, cmd_status
);
1542 /* Called after one or more calls to xhci_add_endpoint() or
1543 * xhci_drop_endpoint(). If this call fails, the USB core is expected
1544 * to call xhci_reset_bandwidth().
1546 * Since we are in the middle of changing either configuration or
1547 * installing a new alt setting, the USB core won't allow URBs to be
1548 * enqueued for any endpoint on the old config or interface. Nothing
1549 * else should be touching the xhci->devs[slot_id] structure, so we
1550 * don't need to take the xhci->lock for manipulating that.
1552 int xhci_check_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
1556 struct xhci_hcd
*xhci
;
1557 struct xhci_virt_device
*virt_dev
;
1558 struct xhci_input_control_ctx
*ctrl_ctx
;
1559 struct xhci_slot_ctx
*slot_ctx
;
1561 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
1564 xhci
= hcd_to_xhci(hcd
);
1566 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
1567 virt_dev
= xhci
->devs
[udev
->slot_id
];
1569 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
1570 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
1571 ctrl_ctx
->add_flags
|= SLOT_FLAG
;
1572 ctrl_ctx
->add_flags
&= ~EP0_FLAG
;
1573 ctrl_ctx
->drop_flags
&= ~SLOT_FLAG
;
1574 ctrl_ctx
->drop_flags
&= ~EP0_FLAG
;
1575 xhci_dbg(xhci
, "New Input Control Context:\n");
1576 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
1577 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
,
1578 LAST_CTX_TO_EP_NUM(slot_ctx
->dev_info
));
1580 ret
= xhci_configure_endpoint(xhci
, udev
, NULL
,
1583 /* Callee should call reset_bandwidth() */
1587 xhci_dbg(xhci
, "Output context after successful config ep cmd:\n");
1588 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
,
1589 LAST_CTX_TO_EP_NUM(slot_ctx
->dev_info
));
1591 xhci_zero_in_ctx(xhci
, virt_dev
);
1592 /* Install new rings and free or cache any old rings */
1593 for (i
= 1; i
< 31; ++i
) {
1594 if (!virt_dev
->eps
[i
].new_ring
)
1596 /* Only cache or free the old ring if it exists.
1597 * It may not if this is the first add of an endpoint.
1599 if (virt_dev
->eps
[i
].ring
) {
1600 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
1602 virt_dev
->eps
[i
].ring
= virt_dev
->eps
[i
].new_ring
;
1603 virt_dev
->eps
[i
].new_ring
= NULL
;
1609 void xhci_reset_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
1611 struct xhci_hcd
*xhci
;
1612 struct xhci_virt_device
*virt_dev
;
1615 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
1618 xhci
= hcd_to_xhci(hcd
);
1620 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
1621 virt_dev
= xhci
->devs
[udev
->slot_id
];
1622 /* Free any rings allocated for added endpoints */
1623 for (i
= 0; i
< 31; ++i
) {
1624 if (virt_dev
->eps
[i
].new_ring
) {
1625 xhci_ring_free(xhci
, virt_dev
->eps
[i
].new_ring
);
1626 virt_dev
->eps
[i
].new_ring
= NULL
;
1629 xhci_zero_in_ctx(xhci
, virt_dev
);
1632 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd
*xhci
,
1633 struct xhci_container_ctx
*in_ctx
,
1634 struct xhci_container_ctx
*out_ctx
,
1635 u32 add_flags
, u32 drop_flags
)
1637 struct xhci_input_control_ctx
*ctrl_ctx
;
1638 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1639 ctrl_ctx
->add_flags
= add_flags
;
1640 ctrl_ctx
->drop_flags
= drop_flags
;
1641 xhci_slot_copy(xhci
, in_ctx
, out_ctx
);
1642 ctrl_ctx
->add_flags
|= SLOT_FLAG
;
1644 xhci_dbg(xhci
, "Input Context:\n");
1645 xhci_dbg_ctx(xhci
, in_ctx
, xhci_last_valid_endpoint(add_flags
));
1648 void xhci_setup_input_ctx_for_quirk(struct xhci_hcd
*xhci
,
1649 unsigned int slot_id
, unsigned int ep_index
,
1650 struct xhci_dequeue_state
*deq_state
)
1652 struct xhci_container_ctx
*in_ctx
;
1653 struct xhci_ep_ctx
*ep_ctx
;
1657 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
1658 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
1659 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
1660 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
1661 addr
= xhci_trb_virt_to_dma(deq_state
->new_deq_seg
,
1662 deq_state
->new_deq_ptr
);
1664 xhci_warn(xhci
, "WARN Cannot submit config ep after "
1665 "reset ep command\n");
1666 xhci_warn(xhci
, "WARN deq seg = %p, deq ptr = %p\n",
1667 deq_state
->new_deq_seg
,
1668 deq_state
->new_deq_ptr
);
1671 ep_ctx
->deq
= addr
| deq_state
->new_cycle_state
;
1673 added_ctxs
= xhci_get_endpoint_flag_from_index(ep_index
);
1674 xhci_setup_input_ctx_for_config_ep(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
1675 xhci
->devs
[slot_id
]->out_ctx
, added_ctxs
, added_ctxs
);
1678 void xhci_cleanup_stalled_ring(struct xhci_hcd
*xhci
,
1679 struct usb_device
*udev
, unsigned int ep_index
)
1681 struct xhci_dequeue_state deq_state
;
1682 struct xhci_virt_ep
*ep
;
1684 xhci_dbg(xhci
, "Cleaning up stalled endpoint ring\n");
1685 ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
1686 /* We need to move the HW's dequeue pointer past this TD,
1687 * or it will attempt to resend it on the next doorbell ring.
1689 xhci_find_new_dequeue_state(xhci
, udev
->slot_id
,
1690 ep_index
, ep
->stopped_stream
, ep
->stopped_td
,
1693 /* HW with the reset endpoint quirk will use the saved dequeue state to
1694 * issue a configure endpoint command later.
1696 if (!(xhci
->quirks
& XHCI_RESET_EP_QUIRK
)) {
1697 xhci_dbg(xhci
, "Queueing new dequeue state\n");
1698 xhci_queue_new_dequeue_state(xhci
, udev
->slot_id
,
1699 ep_index
, ep
->stopped_stream
, &deq_state
);
1701 /* Better hope no one uses the input context between now and the
1702 * reset endpoint completion!
1703 * XXX: No idea how this hardware will react when stream rings
1706 xhci_dbg(xhci
, "Setting up input context for "
1707 "configure endpoint command\n");
1708 xhci_setup_input_ctx_for_quirk(xhci
, udev
->slot_id
,
1709 ep_index
, &deq_state
);
1713 /* Deal with stalled endpoints. The core should have sent the control message
1714 * to clear the halt condition. However, we need to make the xHCI hardware
1715 * reset its sequence number, since a device will expect a sequence number of
1716 * zero after the halt condition is cleared.
1717 * Context: in_interrupt
1719 void xhci_endpoint_reset(struct usb_hcd
*hcd
,
1720 struct usb_host_endpoint
*ep
)
1722 struct xhci_hcd
*xhci
;
1723 struct usb_device
*udev
;
1724 unsigned int ep_index
;
1725 unsigned long flags
;
1727 struct xhci_virt_ep
*virt_ep
;
1729 xhci
= hcd_to_xhci(hcd
);
1730 udev
= (struct usb_device
*) ep
->hcpriv
;
1731 /* Called with a root hub endpoint (or an endpoint that wasn't added
1732 * with xhci_add_endpoint()
1736 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1737 virt_ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
1738 if (!virt_ep
->stopped_td
) {
1739 xhci_dbg(xhci
, "Endpoint 0x%x not halted, refusing to reset.\n",
1740 ep
->desc
.bEndpointAddress
);
1743 if (usb_endpoint_xfer_control(&ep
->desc
)) {
1744 xhci_dbg(xhci
, "Control endpoint stall already handled.\n");
1748 xhci_dbg(xhci
, "Queueing reset endpoint command\n");
1749 spin_lock_irqsave(&xhci
->lock
, flags
);
1750 ret
= xhci_queue_reset_ep(xhci
, udev
->slot_id
, ep_index
);
1752 * Can't change the ring dequeue pointer until it's transitioned to the
1753 * stopped state, which is only upon a successful reset endpoint
1754 * command. Better hope that last command worked!
1757 xhci_cleanup_stalled_ring(xhci
, udev
, ep_index
);
1758 kfree(virt_ep
->stopped_td
);
1759 xhci_ring_cmd_db(xhci
);
1761 virt_ep
->stopped_td
= NULL
;
1762 virt_ep
->stopped_trb
= NULL
;
1763 virt_ep
->stopped_stream
= 0;
1764 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1767 xhci_warn(xhci
, "FIXME allocate a new ring segment\n");
1770 static int xhci_check_streams_endpoint(struct xhci_hcd
*xhci
,
1771 struct usb_device
*udev
, struct usb_host_endpoint
*ep
,
1772 unsigned int slot_id
)
1775 unsigned int ep_index
;
1776 unsigned int ep_state
;
1780 ret
= xhci_check_args(xhci_to_hcd(xhci
), udev
, ep
, 1, true, __func__
);
1783 if (ep
->ss_ep_comp
.bmAttributes
== 0) {
1784 xhci_warn(xhci
, "WARN: SuperSpeed Endpoint Companion"
1785 " descriptor for ep 0x%x does not support streams\n",
1786 ep
->desc
.bEndpointAddress
);
1790 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1791 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
1792 if (ep_state
& EP_HAS_STREAMS
||
1793 ep_state
& EP_GETTING_STREAMS
) {
1794 xhci_warn(xhci
, "WARN: SuperSpeed bulk endpoint 0x%x "
1795 "already has streams set up.\n",
1796 ep
->desc
.bEndpointAddress
);
1797 xhci_warn(xhci
, "Send email to xHCI maintainer and ask for "
1798 "dynamic stream context array reallocation.\n");
1801 if (!list_empty(&xhci
->devs
[slot_id
]->eps
[ep_index
].ring
->td_list
)) {
1802 xhci_warn(xhci
, "Cannot setup streams for SuperSpeed bulk "
1803 "endpoint 0x%x; URBs are pending.\n",
1804 ep
->desc
.bEndpointAddress
);
1810 static void xhci_calculate_streams_entries(struct xhci_hcd
*xhci
,
1811 unsigned int *num_streams
, unsigned int *num_stream_ctxs
)
1813 unsigned int max_streams
;
1815 /* The stream context array size must be a power of two */
1816 *num_stream_ctxs
= roundup_pow_of_two(*num_streams
);
1818 * Find out how many primary stream array entries the host controller
1819 * supports. Later we may use secondary stream arrays (similar to 2nd
1820 * level page entries), but that's an optional feature for xHCI host
1821 * controllers. xHCs must support at least 4 stream IDs.
1823 max_streams
= HCC_MAX_PSA(xhci
->hcc_params
);
1824 if (*num_stream_ctxs
> max_streams
) {
1825 xhci_dbg(xhci
, "xHCI HW only supports %u stream ctx entries.\n",
1827 *num_stream_ctxs
= max_streams
;
1828 *num_streams
= max_streams
;
1832 /* Returns an error code if one of the endpoint already has streams.
1833 * This does not change any data structures, it only checks and gathers
1836 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd
*xhci
,
1837 struct usb_device
*udev
,
1838 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
1839 unsigned int *num_streams
, u32
*changed_ep_bitmask
)
1841 unsigned int max_streams
;
1842 unsigned int endpoint_flag
;
1846 for (i
= 0; i
< num_eps
; i
++) {
1847 ret
= xhci_check_streams_endpoint(xhci
, udev
,
1848 eps
[i
], udev
->slot_id
);
1852 max_streams
= USB_SS_MAX_STREAMS(
1853 eps
[i
]->ss_ep_comp
.bmAttributes
);
1854 if (max_streams
< (*num_streams
- 1)) {
1855 xhci_dbg(xhci
, "Ep 0x%x only supports %u stream IDs.\n",
1856 eps
[i
]->desc
.bEndpointAddress
,
1858 *num_streams
= max_streams
+1;
1861 endpoint_flag
= xhci_get_endpoint_flag(&eps
[i
]->desc
);
1862 if (*changed_ep_bitmask
& endpoint_flag
)
1864 *changed_ep_bitmask
|= endpoint_flag
;
1869 static u32
xhci_calculate_no_streams_bitmask(struct xhci_hcd
*xhci
,
1870 struct usb_device
*udev
,
1871 struct usb_host_endpoint
**eps
, unsigned int num_eps
)
1873 u32 changed_ep_bitmask
= 0;
1874 unsigned int slot_id
;
1875 unsigned int ep_index
;
1876 unsigned int ep_state
;
1879 slot_id
= udev
->slot_id
;
1880 if (!xhci
->devs
[slot_id
])
1883 for (i
= 0; i
< num_eps
; i
++) {
1884 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
1885 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
1886 /* Are streams already being freed for the endpoint? */
1887 if (ep_state
& EP_GETTING_NO_STREAMS
) {
1888 xhci_warn(xhci
, "WARN Can't disable streams for "
1890 "streams are being disabled already.",
1891 eps
[i
]->desc
.bEndpointAddress
);
1894 /* Are there actually any streams to free? */
1895 if (!(ep_state
& EP_HAS_STREAMS
) &&
1896 !(ep_state
& EP_GETTING_STREAMS
)) {
1897 xhci_warn(xhci
, "WARN Can't disable streams for "
1899 "streams are already disabled!",
1900 eps
[i
]->desc
.bEndpointAddress
);
1901 xhci_warn(xhci
, "WARN xhci_free_streams() called "
1902 "with non-streams endpoint\n");
1905 changed_ep_bitmask
|= xhci_get_endpoint_flag(&eps
[i
]->desc
);
1907 return changed_ep_bitmask
;
1911 * The USB device drivers use this function (though the HCD interface in USB
1912 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
1913 * coordinate mass storage command queueing across multiple endpoints (basically
1914 * a stream ID == a task ID).
1916 * Setting up streams involves allocating the same size stream context array
1917 * for each endpoint and issuing a configure endpoint command for all endpoints.
1919 * Don't allow the call to succeed if one endpoint only supports one stream
1920 * (which means it doesn't support streams at all).
1922 * Drivers may get less stream IDs than they asked for, if the host controller
1923 * hardware or endpoints claim they can't support the number of requested
1926 int xhci_alloc_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1927 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
1928 unsigned int num_streams
, gfp_t mem_flags
)
1931 struct xhci_hcd
*xhci
;
1932 struct xhci_virt_device
*vdev
;
1933 struct xhci_command
*config_cmd
;
1934 unsigned int ep_index
;
1935 unsigned int num_stream_ctxs
;
1936 unsigned long flags
;
1937 u32 changed_ep_bitmask
= 0;
1942 /* Add one to the number of streams requested to account for
1943 * stream 0 that is reserved for xHCI usage.
1946 xhci
= hcd_to_xhci(hcd
);
1947 xhci_dbg(xhci
, "Driver wants %u stream IDs (including stream 0).\n",
1950 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
1952 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
1956 /* Check to make sure all endpoints are not already configured for
1957 * streams. While we're at it, find the maximum number of streams that
1958 * all the endpoints will support and check for duplicate endpoints.
1960 spin_lock_irqsave(&xhci
->lock
, flags
);
1961 ret
= xhci_calculate_streams_and_bitmask(xhci
, udev
, eps
,
1962 num_eps
, &num_streams
, &changed_ep_bitmask
);
1964 xhci_free_command(xhci
, config_cmd
);
1965 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1968 if (num_streams
<= 1) {
1969 xhci_warn(xhci
, "WARN: endpoints can't handle "
1970 "more than one stream.\n");
1971 xhci_free_command(xhci
, config_cmd
);
1972 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1975 vdev
= xhci
->devs
[udev
->slot_id
];
1976 /* Mark each endpoint as being in transistion, so
1977 * xhci_urb_enqueue() will reject all URBs.
1979 for (i
= 0; i
< num_eps
; i
++) {
1980 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
1981 vdev
->eps
[ep_index
].ep_state
|= EP_GETTING_STREAMS
;
1983 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1985 /* Setup internal data structures and allocate HW data structures for
1986 * streams (but don't install the HW structures in the input context
1987 * until we're sure all memory allocation succeeded).
1989 xhci_calculate_streams_entries(xhci
, &num_streams
, &num_stream_ctxs
);
1990 xhci_dbg(xhci
, "Need %u stream ctx entries for %u stream IDs.\n",
1991 num_stream_ctxs
, num_streams
);
1993 for (i
= 0; i
< num_eps
; i
++) {
1994 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
1995 vdev
->eps
[ep_index
].stream_info
= xhci_alloc_stream_info(xhci
,
1997 num_streams
, mem_flags
);
1998 if (!vdev
->eps
[ep_index
].stream_info
)
2000 /* Set maxPstreams in endpoint context and update deq ptr to
2001 * point to stream context array. FIXME
2005 /* Set up the input context for a configure endpoint command. */
2006 for (i
= 0; i
< num_eps
; i
++) {
2007 struct xhci_ep_ctx
*ep_ctx
;
2009 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
2010 ep_ctx
= xhci_get_ep_ctx(xhci
, config_cmd
->in_ctx
, ep_index
);
2012 xhci_endpoint_copy(xhci
, config_cmd
->in_ctx
,
2013 vdev
->out_ctx
, ep_index
);
2014 xhci_setup_streams_ep_input_ctx(xhci
, ep_ctx
,
2015 vdev
->eps
[ep_index
].stream_info
);
2017 /* Tell the HW to drop its old copy of the endpoint context info
2018 * and add the updated copy from the input context.
2020 xhci_setup_input_ctx_for_config_ep(xhci
, config_cmd
->in_ctx
,
2021 vdev
->out_ctx
, changed_ep_bitmask
, changed_ep_bitmask
);
2023 /* Issue and wait for the configure endpoint command */
2024 ret
= xhci_configure_endpoint(xhci
, udev
, config_cmd
,
2027 /* xHC rejected the configure endpoint command for some reason, so we
2028 * leave the old ring intact and free our internal streams data
2034 spin_lock_irqsave(&xhci
->lock
, flags
);
2035 for (i
= 0; i
< num_eps
; i
++) {
2036 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
2037 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
2038 xhci_dbg(xhci
, "Slot %u ep ctx %u now has streams.\n",
2039 udev
->slot_id
, ep_index
);
2040 vdev
->eps
[ep_index
].ep_state
|= EP_HAS_STREAMS
;
2042 xhci_free_command(xhci
, config_cmd
);
2043 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2045 /* Subtract 1 for stream 0, which drivers can't use */
2046 return num_streams
- 1;
2049 /* If it didn't work, free the streams! */
2050 for (i
= 0; i
< num_eps
; i
++) {
2051 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
2052 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
2053 vdev
->eps
[ep_index
].stream_info
= NULL
;
2054 /* FIXME Unset maxPstreams in endpoint context and
2055 * update deq ptr to point to normal string ring.
2057 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
2058 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
2059 xhci_endpoint_zero(xhci
, vdev
, eps
[i
]);
2061 xhci_free_command(xhci
, config_cmd
);
2065 /* Transition the endpoint from using streams to being a "normal" endpoint
2068 * Modify the endpoint context state, submit a configure endpoint command,
2069 * and free all endpoint rings for streams if that completes successfully.
2071 int xhci_free_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
2072 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
2076 struct xhci_hcd
*xhci
;
2077 struct xhci_virt_device
*vdev
;
2078 struct xhci_command
*command
;
2079 unsigned int ep_index
;
2080 unsigned long flags
;
2081 u32 changed_ep_bitmask
;
2083 xhci
= hcd_to_xhci(hcd
);
2084 vdev
= xhci
->devs
[udev
->slot_id
];
2086 /* Set up a configure endpoint command to remove the streams rings */
2087 spin_lock_irqsave(&xhci
->lock
, flags
);
2088 changed_ep_bitmask
= xhci_calculate_no_streams_bitmask(xhci
,
2089 udev
, eps
, num_eps
);
2090 if (changed_ep_bitmask
== 0) {
2091 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2095 /* Use the xhci_command structure from the first endpoint. We may have
2096 * allocated too many, but the driver may call xhci_free_streams() for
2097 * each endpoint it grouped into one call to xhci_alloc_streams().
2099 ep_index
= xhci_get_endpoint_index(&eps
[0]->desc
);
2100 command
= vdev
->eps
[ep_index
].stream_info
->free_streams_command
;
2101 for (i
= 0; i
< num_eps
; i
++) {
2102 struct xhci_ep_ctx
*ep_ctx
;
2104 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
2105 ep_ctx
= xhci_get_ep_ctx(xhci
, command
->in_ctx
, ep_index
);
2106 xhci
->devs
[udev
->slot_id
]->eps
[ep_index
].ep_state
|=
2107 EP_GETTING_NO_STREAMS
;
2109 xhci_endpoint_copy(xhci
, command
->in_ctx
,
2110 vdev
->out_ctx
, ep_index
);
2111 xhci_setup_no_streams_ep_input_ctx(xhci
, ep_ctx
,
2112 &vdev
->eps
[ep_index
]);
2114 xhci_setup_input_ctx_for_config_ep(xhci
, command
->in_ctx
,
2115 vdev
->out_ctx
, changed_ep_bitmask
, changed_ep_bitmask
);
2116 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2118 /* Issue and wait for the configure endpoint command,
2119 * which must succeed.
2121 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
2124 /* xHC rejected the configure endpoint command for some reason, so we
2125 * leave the streams rings intact.
2130 spin_lock_irqsave(&xhci
->lock
, flags
);
2131 for (i
= 0; i
< num_eps
; i
++) {
2132 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
2133 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
2134 vdev
->eps
[ep_index
].stream_info
= NULL
;
2135 /* FIXME Unset maxPstreams in endpoint context and
2136 * update deq ptr to point to normal string ring.
2138 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_NO_STREAMS
;
2139 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
2141 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2147 * This submits a Reset Device Command, which will set the device state to 0,
2148 * set the device address to 0, and disable all the endpoints except the default
2149 * control endpoint. The USB core should come back and call
2150 * xhci_address_device(), and then re-set up the configuration. If this is
2151 * called because of a usb_reset_and_verify_device(), then the old alternate
2152 * settings will be re-installed through the normal bandwidth allocation
2155 * Wait for the Reset Device command to finish. Remove all structures
2156 * associated with the endpoints that were disabled. Clear the input device
2157 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
2159 * If the virt_dev to be reset does not exist or does not match the udev,
2160 * it means the device is lost, possibly due to the xHC restore error and
2161 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
2162 * re-allocate the device.
2164 int xhci_discover_or_reset_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2167 unsigned long flags
;
2168 struct xhci_hcd
*xhci
;
2169 unsigned int slot_id
;
2170 struct xhci_virt_device
*virt_dev
;
2171 struct xhci_command
*reset_device_cmd
;
2173 int last_freed_endpoint
;
2175 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, false, __func__
);
2178 xhci
= hcd_to_xhci(hcd
);
2179 slot_id
= udev
->slot_id
;
2180 virt_dev
= xhci
->devs
[slot_id
];
2182 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
2183 "not exist. Re-allocate the device\n", slot_id
);
2184 ret
= xhci_alloc_dev(hcd
, udev
);
2191 if (virt_dev
->udev
!= udev
) {
2192 /* If the virt_dev and the udev does not match, this virt_dev
2193 * may belong to another udev.
2194 * Re-allocate the device.
2196 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
2197 "not match the udev. Re-allocate the device\n",
2199 ret
= xhci_alloc_dev(hcd
, udev
);
2206 xhci_dbg(xhci
, "Resetting device with slot ID %u\n", slot_id
);
2207 /* Allocate the command structure that holds the struct completion.
2208 * Assume we're in process context, since the normal device reset
2209 * process has to wait for the device anyway. Storage devices are
2210 * reset as part of error handling, so use GFP_NOIO instead of
2213 reset_device_cmd
= xhci_alloc_command(xhci
, false, true, GFP_NOIO
);
2214 if (!reset_device_cmd
) {
2215 xhci_dbg(xhci
, "Couldn't allocate command structure.\n");
2219 /* Attempt to submit the Reset Device command to the command ring */
2220 spin_lock_irqsave(&xhci
->lock
, flags
);
2221 reset_device_cmd
->command_trb
= xhci
->cmd_ring
->enqueue
;
2222 list_add_tail(&reset_device_cmd
->cmd_list
, &virt_dev
->cmd_list
);
2223 ret
= xhci_queue_reset_device(xhci
, slot_id
);
2225 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
2226 list_del(&reset_device_cmd
->cmd_list
);
2227 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2228 goto command_cleanup
;
2230 xhci_ring_cmd_db(xhci
);
2231 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2233 /* Wait for the Reset Device command to finish */
2234 timeleft
= wait_for_completion_interruptible_timeout(
2235 reset_device_cmd
->completion
,
2236 USB_CTRL_SET_TIMEOUT
);
2237 if (timeleft
<= 0) {
2238 xhci_warn(xhci
, "%s while waiting for reset device command\n",
2239 timeleft
== 0 ? "Timeout" : "Signal");
2240 spin_lock_irqsave(&xhci
->lock
, flags
);
2241 /* The timeout might have raced with the event ring handler, so
2242 * only delete from the list if the item isn't poisoned.
2244 if (reset_device_cmd
->cmd_list
.next
!= LIST_POISON1
)
2245 list_del(&reset_device_cmd
->cmd_list
);
2246 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2248 goto command_cleanup
;
2251 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
2252 * unless we tried to reset a slot ID that wasn't enabled,
2253 * or the device wasn't in the addressed or configured state.
2255 ret
= reset_device_cmd
->status
;
2257 case COMP_EBADSLT
: /* 0.95 completion code for bad slot ID */
2258 case COMP_CTX_STATE
: /* 0.96 completion code for same thing */
2259 xhci_info(xhci
, "Can't reset device (slot ID %u) in %s state\n",
2261 xhci_get_slot_state(xhci
, virt_dev
->out_ctx
));
2262 xhci_info(xhci
, "Not freeing device rings.\n");
2263 /* Don't treat this as an error. May change my mind later. */
2265 goto command_cleanup
;
2267 xhci_dbg(xhci
, "Successful reset device command.\n");
2270 if (xhci_is_vendor_info_code(xhci
, ret
))
2272 xhci_warn(xhci
, "Unknown completion code %u for "
2273 "reset device command.\n", ret
);
2275 goto command_cleanup
;
2278 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
2279 last_freed_endpoint
= 1;
2280 for (i
= 1; i
< 31; ++i
) {
2281 if (!virt_dev
->eps
[i
].ring
)
2283 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
2284 last_freed_endpoint
= i
;
2286 xhci_dbg(xhci
, "Output context after successful reset device cmd:\n");
2287 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, last_freed_endpoint
);
2291 xhci_free_command(xhci
, reset_device_cmd
);
2296 * At this point, the struct usb_device is about to go away, the device has
2297 * disconnected, and all traffic has been stopped and the endpoints have been
2298 * disabled. Free any HC data structures associated with that device.
2300 void xhci_free_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2302 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
2303 struct xhci_virt_device
*virt_dev
;
2304 unsigned long flags
;
2308 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2312 virt_dev
= xhci
->devs
[udev
->slot_id
];
2314 /* Stop any wayward timer functions (which may grab the lock) */
2315 for (i
= 0; i
< 31; ++i
) {
2316 virt_dev
->eps
[i
].ep_state
&= ~EP_HALT_PENDING
;
2317 del_timer_sync(&virt_dev
->eps
[i
].stop_cmd_timer
);
2320 spin_lock_irqsave(&xhci
->lock
, flags
);
2321 /* Don't disable the slot if the host controller is dead. */
2322 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
2323 if (state
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
)) {
2324 xhci_free_virt_device(xhci
, udev
->slot_id
);
2325 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2329 if (xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
)) {
2330 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2331 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
2334 xhci_ring_cmd_db(xhci
);
2335 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2337 * Event command completion handler will free any data structures
2338 * associated with the slot. XXX Can free sleep?
2343 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
2344 * timed out, or allocating memory failed. Returns 1 on success.
2346 int xhci_alloc_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2348 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
2349 unsigned long flags
;
2353 spin_lock_irqsave(&xhci
->lock
, flags
);
2354 ret
= xhci_queue_slot_control(xhci
, TRB_ENABLE_SLOT
, 0);
2356 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2357 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
2360 xhci_ring_cmd_db(xhci
);
2361 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2363 /* XXX: how much time for xHC slot assignment? */
2364 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
2365 USB_CTRL_SET_TIMEOUT
);
2366 if (timeleft
<= 0) {
2367 xhci_warn(xhci
, "%s while waiting for a slot\n",
2368 timeleft
== 0 ? "Timeout" : "Signal");
2369 /* FIXME cancel the enable slot request */
2373 if (!xhci
->slot_id
) {
2374 xhci_err(xhci
, "Error while assigning device slot ID\n");
2377 /* xhci_alloc_virt_device() does not touch rings; no need to lock */
2378 if (!xhci_alloc_virt_device(xhci
, xhci
->slot_id
, udev
, GFP_KERNEL
)) {
2379 /* Disable slot, if we can do it without mem alloc */
2380 xhci_warn(xhci
, "Could not allocate xHCI USB device data structures\n");
2381 spin_lock_irqsave(&xhci
->lock
, flags
);
2382 if (!xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
))
2383 xhci_ring_cmd_db(xhci
);
2384 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2387 udev
->slot_id
= xhci
->slot_id
;
2388 /* Is this a LS or FS device under a HS hub? */
2389 /* Hub or peripherial? */
2394 * Issue an Address Device command (which will issue a SetAddress request to
2396 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
2397 * we should only issue and wait on one address command at the same time.
2399 * We add one to the device address issued by the hardware because the USB core
2400 * uses address 1 for the root hubs (even though they're not really devices).
2402 int xhci_address_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2404 unsigned long flags
;
2406 struct xhci_virt_device
*virt_dev
;
2408 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
2409 struct xhci_slot_ctx
*slot_ctx
;
2410 struct xhci_input_control_ctx
*ctrl_ctx
;
2413 if (!udev
->slot_id
) {
2414 xhci_dbg(xhci
, "Bad Slot ID %d\n", udev
->slot_id
);
2418 virt_dev
= xhci
->devs
[udev
->slot_id
];
2420 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
2422 * If this is the first Set Address since device plug-in or
2423 * virt_device realloaction after a resume with an xHCI power loss,
2424 * then set up the slot context.
2426 if (!slot_ctx
->dev_info
)
2427 xhci_setup_addressable_virt_dev(xhci
, udev
);
2428 /* Otherwise, update the control endpoint ring enqueue pointer. */
2430 xhci_copy_ep0_dequeue_into_input_ctx(xhci
, udev
);
2431 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
2432 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
2434 spin_lock_irqsave(&xhci
->lock
, flags
);
2435 ret
= xhci_queue_address_device(xhci
, virt_dev
->in_ctx
->dma
,
2438 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2439 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
2442 xhci_ring_cmd_db(xhci
);
2443 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2445 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
2446 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
2447 USB_CTRL_SET_TIMEOUT
);
2448 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
2449 * the SetAddress() "recovery interval" required by USB and aborting the
2450 * command on a timeout.
2452 if (timeleft
<= 0) {
2453 xhci_warn(xhci
, "%s while waiting for a slot\n",
2454 timeleft
== 0 ? "Timeout" : "Signal");
2455 /* FIXME cancel the address device command */
2459 switch (virt_dev
->cmd_status
) {
2460 case COMP_CTX_STATE
:
2462 xhci_err(xhci
, "Setup ERROR: address device command for slot %d.\n",
2467 dev_warn(&udev
->dev
, "Device not responding to set address.\n");
2471 xhci_dbg(xhci
, "Successful Address Device command\n");
2474 xhci_err(xhci
, "ERROR: unexpected command completion "
2475 "code 0x%x.\n", virt_dev
->cmd_status
);
2476 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
2477 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
2484 temp_64
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
2485 xhci_dbg(xhci
, "Op regs DCBAA ptr = %#016llx\n", temp_64
);
2486 xhci_dbg(xhci
, "Slot ID %d dcbaa entry @%p = %#016llx\n",
2488 &xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
],
2489 (unsigned long long)
2490 xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
]);
2491 xhci_dbg(xhci
, "Output Context DMA address = %#08llx\n",
2492 (unsigned long long)virt_dev
->out_ctx
->dma
);
2493 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
2494 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
2495 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
2496 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
2498 * USB core uses address 1 for the roothubs, so we add one to the
2499 * address given back to us by the HC.
2501 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
2502 /* Use kernel assigned address for devices; store xHC assigned
2503 * address locally. */
2504 virt_dev
->address
= (slot_ctx
->dev_state
& DEV_ADDR_MASK
) + 1;
2505 /* Zero the input context control for later use */
2506 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
2507 ctrl_ctx
->add_flags
= 0;
2508 ctrl_ctx
->drop_flags
= 0;
2510 xhci_dbg(xhci
, "Internal device address = %d\n", virt_dev
->address
);
2515 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
2516 * internal data structures for the device.
2518 int xhci_update_hub_device(struct usb_hcd
*hcd
, struct usb_device
*hdev
,
2519 struct usb_tt
*tt
, gfp_t mem_flags
)
2521 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
2522 struct xhci_virt_device
*vdev
;
2523 struct xhci_command
*config_cmd
;
2524 struct xhci_input_control_ctx
*ctrl_ctx
;
2525 struct xhci_slot_ctx
*slot_ctx
;
2526 unsigned long flags
;
2527 unsigned think_time
;
2530 /* Ignore root hubs */
2534 vdev
= xhci
->devs
[hdev
->slot_id
];
2536 xhci_warn(xhci
, "Cannot update hub desc for unknown device.\n");
2539 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
2541 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
2545 spin_lock_irqsave(&xhci
->lock
, flags
);
2546 xhci_slot_copy(xhci
, config_cmd
->in_ctx
, vdev
->out_ctx
);
2547 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, config_cmd
->in_ctx
);
2548 ctrl_ctx
->add_flags
|= SLOT_FLAG
;
2549 slot_ctx
= xhci_get_slot_ctx(xhci
, config_cmd
->in_ctx
);
2550 slot_ctx
->dev_info
|= DEV_HUB
;
2552 slot_ctx
->dev_info
|= DEV_MTT
;
2553 if (xhci
->hci_version
> 0x95) {
2554 xhci_dbg(xhci
, "xHCI version %x needs hub "
2555 "TT think time and number of ports\n",
2556 (unsigned int) xhci
->hci_version
);
2557 slot_ctx
->dev_info2
|= XHCI_MAX_PORTS(hdev
->maxchild
);
2558 /* Set TT think time - convert from ns to FS bit times.
2559 * 0 = 8 FS bit times, 1 = 16 FS bit times,
2560 * 2 = 24 FS bit times, 3 = 32 FS bit times.
2562 think_time
= tt
->think_time
;
2563 if (think_time
!= 0)
2564 think_time
= (think_time
/ 666) - 1;
2565 slot_ctx
->tt_info
|= TT_THINK_TIME(think_time
);
2567 xhci_dbg(xhci
, "xHCI version %x doesn't need hub "
2568 "TT think time or number of ports\n",
2569 (unsigned int) xhci
->hci_version
);
2571 slot_ctx
->dev_state
= 0;
2572 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2574 xhci_dbg(xhci
, "Set up %s for hub device.\n",
2575 (xhci
->hci_version
> 0x95) ?
2576 "configure endpoint" : "evaluate context");
2577 xhci_dbg(xhci
, "Slot %u Input Context:\n", hdev
->slot_id
);
2578 xhci_dbg_ctx(xhci
, config_cmd
->in_ctx
, 0);
2580 /* Issue and wait for the configure endpoint or
2581 * evaluate context command.
2583 if (xhci
->hci_version
> 0x95)
2584 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
2587 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
2590 xhci_dbg(xhci
, "Slot %u Output Context:\n", hdev
->slot_id
);
2591 xhci_dbg_ctx(xhci
, vdev
->out_ctx
, 0);
2593 xhci_free_command(xhci
, config_cmd
);
2597 int xhci_get_frame(struct usb_hcd
*hcd
)
2599 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
2600 /* EHCI mods by the periodic size. Why? */
2601 return xhci_readl(xhci
, &xhci
->run_regs
->microframe_index
) >> 3;
2604 MODULE_DESCRIPTION(DRIVER_DESC
);
2605 MODULE_AUTHOR(DRIVER_AUTHOR
);
2606 MODULE_LICENSE("GPL");
2608 static int __init
xhci_hcd_init(void)
2613 retval
= xhci_register_pci();
2616 printk(KERN_DEBUG
"Problem registering PCI driver.");
2621 * Check the compiler generated sizes of structures that must be laid
2622 * out in specific ways for hardware access.
2624 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array
) != 256*32/8);
2625 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx
) != 8*32/8);
2626 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx
) != 8*32/8);
2627 /* xhci_device_control has eight fields, and also
2628 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
2630 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx
) != 4*32/8);
2631 BUILD_BUG_ON(sizeof(union xhci_trb
) != 4*32/8);
2632 BUILD_BUG_ON(sizeof(struct xhci_erst_entry
) != 4*32/8);
2633 BUILD_BUG_ON(sizeof(struct xhci_cap_regs
) != 7*32/8);
2634 BUILD_BUG_ON(sizeof(struct xhci_intr_reg
) != 8*32/8);
2635 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
2636 BUILD_BUG_ON(sizeof(struct xhci_run_regs
) != (8+8*128)*32/8);
2637 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array
) != 256*32/8);
2640 module_init(xhci_hcd_init
);
2642 static void __exit
xhci_hcd_cleanup(void)
2645 xhci_unregister_pci();
2648 module_exit(xhci_hcd_cleanup
);