2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
30 #include <linux/dma-mapping.h>
33 #include "xhci-trace.h"
35 #define DRIVER_AUTHOR "Sarah Sharp"
36 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
38 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
39 static int link_quirk
;
40 module_param(link_quirk
, int, S_IRUGO
| S_IWUSR
);
41 MODULE_PARM_DESC(link_quirk
, "Don't clear the chain bit on a link TRB");
43 /* TODO: copied from ehci-hcd.c - can this be refactored? */
45 * xhci_handshake - spin reading hc until handshake completes or fails
46 * @ptr: address of hc register to be read
47 * @mask: bits to look at in result of read
48 * @done: value of those bits when handshake succeeds
49 * @usec: timeout in microseconds
51 * Returns negative errno, or zero on success
53 * Success happens when the "mask" bits have the specified value (hardware
54 * handshake done). There are two failure modes: "usec" have passed (major
55 * hardware flakeout), or the register reads as all-ones (hardware removed).
57 int xhci_handshake(struct xhci_hcd
*xhci
, void __iomem
*ptr
,
58 u32 mask
, u32 done
, int usec
)
64 if (result
== ~(u32
)0) /* card removed */
76 * Disable interrupts and begin the xHCI halting process.
78 void xhci_quiesce(struct xhci_hcd
*xhci
)
85 halted
= readl(&xhci
->op_regs
->status
) & STS_HALT
;
89 cmd
= readl(&xhci
->op_regs
->command
);
91 writel(cmd
, &xhci
->op_regs
->command
);
95 * Force HC into halt state.
97 * Disable any IRQs and clear the run/stop bit.
98 * HC will complete any current and actively pipelined transactions, and
99 * should halt within 16 ms of the run/stop bit being cleared.
100 * Read HC Halted bit in the status register to see when the HC is finished.
102 int xhci_halt(struct xhci_hcd
*xhci
)
105 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "// Halt the HC");
108 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->status
,
109 STS_HALT
, STS_HALT
, XHCI_MAX_HALT_USEC
);
111 xhci
->xhc_state
|= XHCI_STATE_HALTED
;
112 xhci
->cmd_ring_state
= CMD_RING_STATE_STOPPED
;
114 xhci_warn(xhci
, "Host not halted after %u microseconds.\n",
120 * Set the run bit and wait for the host to be running.
122 static int xhci_start(struct xhci_hcd
*xhci
)
127 temp
= readl(&xhci
->op_regs
->command
);
129 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "// Turn on HC, cmd = 0x%x.",
131 writel(temp
, &xhci
->op_regs
->command
);
134 * Wait for the HCHalted Status bit to be 0 to indicate the host is
137 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->status
,
138 STS_HALT
, 0, XHCI_MAX_HALT_USEC
);
139 if (ret
== -ETIMEDOUT
)
140 xhci_err(xhci
, "Host took too long to start, "
141 "waited %u microseconds.\n",
144 xhci
->xhc_state
&= ~XHCI_STATE_HALTED
;
151 * This resets pipelines, timers, counters, state machines, etc.
152 * Transactions will be terminated immediately, and operational registers
153 * will be set to their defaults.
155 int xhci_reset(struct xhci_hcd
*xhci
)
161 state
= readl(&xhci
->op_regs
->status
);
162 if ((state
& STS_HALT
) == 0) {
163 xhci_warn(xhci
, "Host controller not halted, aborting reset.\n");
167 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "// Reset the HC");
168 command
= readl(&xhci
->op_regs
->command
);
169 command
|= CMD_RESET
;
170 writel(command
, &xhci
->op_regs
->command
);
172 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->command
,
173 CMD_RESET
, 0, 10 * 1000 * 1000);
177 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
178 "Wait for controller to be ready for doorbell rings");
180 * xHCI cannot write to any doorbells or operational registers other
181 * than status until the "Controller Not Ready" flag is cleared.
183 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->status
,
184 STS_CNR
, 0, 10 * 1000 * 1000);
186 for (i
= 0; i
< 2; ++i
) {
187 xhci
->bus_state
[i
].port_c_suspend
= 0;
188 xhci
->bus_state
[i
].suspended_ports
= 0;
189 xhci
->bus_state
[i
].resuming_ports
= 0;
196 static int xhci_free_msi(struct xhci_hcd
*xhci
)
200 if (!xhci
->msix_entries
)
203 for (i
= 0; i
< xhci
->msix_count
; i
++)
204 if (xhci
->msix_entries
[i
].vector
)
205 free_irq(xhci
->msix_entries
[i
].vector
,
213 static int xhci_setup_msi(struct xhci_hcd
*xhci
)
216 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
218 ret
= pci_enable_msi(pdev
);
220 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
221 "failed to allocate MSI entry");
225 ret
= request_irq(pdev
->irq
, xhci_msi_irq
,
226 0, "xhci_hcd", xhci_to_hcd(xhci
));
228 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
229 "disable MSI interrupt");
230 pci_disable_msi(pdev
);
238 * free all IRQs request
240 static void xhci_free_irq(struct xhci_hcd
*xhci
)
242 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
245 /* return if using legacy interrupt */
246 if (xhci_to_hcd(xhci
)->irq
> 0)
249 ret
= xhci_free_msi(xhci
);
253 free_irq(pdev
->irq
, xhci_to_hcd(xhci
));
261 static int xhci_setup_msix(struct xhci_hcd
*xhci
)
264 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
265 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
268 * calculate number of msi-x vectors supported.
269 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
270 * with max number of interrupters based on the xhci HCSPARAMS1.
271 * - num_online_cpus: maximum msi-x vectors per CPUs core.
272 * Add additional 1 vector to ensure always available interrupt.
274 xhci
->msix_count
= min(num_online_cpus() + 1,
275 HCS_MAX_INTRS(xhci
->hcs_params1
));
278 kmalloc((sizeof(struct msix_entry
))*xhci
->msix_count
,
280 if (!xhci
->msix_entries
) {
281 xhci_err(xhci
, "Failed to allocate MSI-X entries\n");
285 for (i
= 0; i
< xhci
->msix_count
; i
++) {
286 xhci
->msix_entries
[i
].entry
= i
;
287 xhci
->msix_entries
[i
].vector
= 0;
290 ret
= pci_enable_msix(pdev
, xhci
->msix_entries
, xhci
->msix_count
);
292 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
293 "Failed to enable MSI-X");
297 for (i
= 0; i
< xhci
->msix_count
; i
++) {
298 ret
= request_irq(xhci
->msix_entries
[i
].vector
,
300 0, "xhci_hcd", xhci_to_hcd(xhci
));
305 hcd
->msix_enabled
= 1;
309 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "disable MSI-X interrupt");
311 pci_disable_msix(pdev
);
313 kfree(xhci
->msix_entries
);
314 xhci
->msix_entries
= NULL
;
318 /* Free any IRQs and disable MSI-X */
319 static void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
321 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
322 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
326 if (xhci
->msix_entries
) {
327 pci_disable_msix(pdev
);
328 kfree(xhci
->msix_entries
);
329 xhci
->msix_entries
= NULL
;
331 pci_disable_msi(pdev
);
334 hcd
->msix_enabled
= 0;
338 static void __maybe_unused
xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
342 if (xhci
->msix_entries
) {
343 for (i
= 0; i
< xhci
->msix_count
; i
++)
344 synchronize_irq(xhci
->msix_entries
[i
].vector
);
348 static int xhci_try_enable_msi(struct usb_hcd
*hcd
)
350 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
351 struct pci_dev
*pdev
;
354 /* The xhci platform device has set up IRQs through usb_add_hcd. */
355 if (xhci
->quirks
& XHCI_PLAT
)
358 pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
360 * Some Fresco Logic host controllers advertise MSI, but fail to
361 * generate interrupts. Don't even try to enable MSI.
363 if (xhci
->quirks
& XHCI_BROKEN_MSI
)
366 /* unregister the legacy interrupt */
368 free_irq(hcd
->irq
, hcd
);
371 ret
= xhci_setup_msix(xhci
);
373 /* fall back to msi*/
374 ret
= xhci_setup_msi(xhci
);
377 /* hcd->irq is 0, we have MSI */
381 xhci_err(xhci
, "No msi-x/msi found and no IRQ in BIOS\n");
386 /* fall back to legacy interrupt*/
387 ret
= request_irq(pdev
->irq
, &usb_hcd_irq
, IRQF_SHARED
,
388 hcd
->irq_descr
, hcd
);
390 xhci_err(xhci
, "request interrupt %d failed\n",
394 hcd
->irq
= pdev
->irq
;
400 static int xhci_try_enable_msi(struct usb_hcd
*hcd
)
405 static void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
409 static void xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
415 static void compliance_mode_recovery(unsigned long arg
)
417 struct xhci_hcd
*xhci
;
422 xhci
= (struct xhci_hcd
*)arg
;
424 for (i
= 0; i
< xhci
->num_usb3_ports
; i
++) {
425 temp
= readl(xhci
->usb3_ports
[i
]);
426 if ((temp
& PORT_PLS_MASK
) == USB_SS_PORT_LS_COMP_MOD
) {
428 * Compliance Mode Detected. Letting USB Core
429 * handle the Warm Reset
431 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
432 "Compliance mode detected->port %d",
434 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
435 "Attempting compliance mode recovery");
436 hcd
= xhci
->shared_hcd
;
438 if (hcd
->state
== HC_STATE_SUSPENDED
)
439 usb_hcd_resume_root_hub(hcd
);
441 usb_hcd_poll_rh_status(hcd
);
445 if (xhci
->port_status_u0
!= ((1 << xhci
->num_usb3_ports
)-1))
446 mod_timer(&xhci
->comp_mode_recovery_timer
,
447 jiffies
+ msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
));
451 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
452 * that causes ports behind that hardware to enter compliance mode sometimes.
453 * The quirk creates a timer that polls every 2 seconds the link state of
454 * each host controller's port and recovers it by issuing a Warm reset
455 * if Compliance mode is detected, otherwise the port will become "dead" (no
456 * device connections or disconnections will be detected anymore). Becasue no
457 * status event is generated when entering compliance mode (per xhci spec),
458 * this quirk is needed on systems that have the failing hardware installed.
460 static void compliance_mode_recovery_timer_init(struct xhci_hcd
*xhci
)
462 xhci
->port_status_u0
= 0;
463 init_timer(&xhci
->comp_mode_recovery_timer
);
465 xhci
->comp_mode_recovery_timer
.data
= (unsigned long) xhci
;
466 xhci
->comp_mode_recovery_timer
.function
= compliance_mode_recovery
;
467 xhci
->comp_mode_recovery_timer
.expires
= jiffies
+
468 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
);
470 set_timer_slack(&xhci
->comp_mode_recovery_timer
,
471 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
));
472 add_timer(&xhci
->comp_mode_recovery_timer
);
473 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
474 "Compliance mode recovery timer initialized");
478 * This function identifies the systems that have installed the SN65LVPE502CP
479 * USB3.0 re-driver and that need the Compliance Mode Quirk.
481 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
483 bool xhci_compliance_mode_recovery_timer_quirk_check(void)
485 const char *dmi_product_name
, *dmi_sys_vendor
;
487 dmi_product_name
= dmi_get_system_info(DMI_PRODUCT_NAME
);
488 dmi_sys_vendor
= dmi_get_system_info(DMI_SYS_VENDOR
);
489 if (!dmi_product_name
|| !dmi_sys_vendor
)
492 if (!(strstr(dmi_sys_vendor
, "Hewlett-Packard")))
495 if (strstr(dmi_product_name
, "Z420") ||
496 strstr(dmi_product_name
, "Z620") ||
497 strstr(dmi_product_name
, "Z820") ||
498 strstr(dmi_product_name
, "Z1 Workstation"))
504 static int xhci_all_ports_seen_u0(struct xhci_hcd
*xhci
)
506 return (xhci
->port_status_u0
== ((1 << xhci
->num_usb3_ports
)-1));
511 * Initialize memory for HCD and xHC (one-time init).
513 * Program the PAGESIZE register, initialize the device context array, create
514 * device contexts (?), set up a command ring segment (or two?), create event
515 * ring (one for now).
517 int xhci_init(struct usb_hcd
*hcd
)
519 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
522 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "xhci_init");
523 spin_lock_init(&xhci
->lock
);
524 if (xhci
->hci_version
== 0x95 && link_quirk
) {
525 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
526 "QUIRK: Not clearing Link TRB chain bits.");
527 xhci
->quirks
|= XHCI_LINK_TRB_QUIRK
;
529 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
530 "xHCI doesn't need link TRB QUIRK");
532 retval
= xhci_mem_init(xhci
, GFP_KERNEL
);
533 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "Finished xhci_init");
535 /* Initializing Compliance Mode Recovery Data If Needed */
536 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
537 xhci
->quirks
|= XHCI_COMP_MODE_QUIRK
;
538 compliance_mode_recovery_timer_init(xhci
);
544 /*-------------------------------------------------------------------------*/
547 static int xhci_run_finished(struct xhci_hcd
*xhci
)
549 if (xhci_start(xhci
)) {
553 xhci
->shared_hcd
->state
= HC_STATE_RUNNING
;
554 xhci
->cmd_ring_state
= CMD_RING_STATE_RUNNING
;
556 if (xhci
->quirks
& XHCI_NEC_HOST
)
557 xhci_ring_cmd_db(xhci
);
559 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
560 "Finished xhci_run for USB3 roothub");
565 * Start the HC after it was halted.
567 * This function is called by the USB core when the HC driver is added.
568 * Its opposite is xhci_stop().
570 * xhci_init() must be called once before this function can be called.
571 * Reset the HC, enable device slot contexts, program DCBAAP, and
572 * set command ring pointer and event ring pointer.
574 * Setup MSI-X vectors and enable interrupts.
576 int xhci_run(struct usb_hcd
*hcd
)
581 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
583 /* Start the xHCI host controller running only after the USB 2.0 roothub
587 hcd
->uses_new_polling
= 1;
588 if (!usb_hcd_is_primary_hcd(hcd
))
589 return xhci_run_finished(xhci
);
591 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "xhci_run");
593 ret
= xhci_try_enable_msi(hcd
);
597 xhci_dbg(xhci
, "Command ring memory map follows:\n");
598 xhci_debug_ring(xhci
, xhci
->cmd_ring
);
599 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
600 xhci_dbg_cmd_ptrs(xhci
);
602 xhci_dbg(xhci
, "ERST memory map follows:\n");
603 xhci_dbg_erst(xhci
, &xhci
->erst
);
604 xhci_dbg(xhci
, "Event ring:\n");
605 xhci_debug_ring(xhci
, xhci
->event_ring
);
606 xhci_dbg_ring_ptrs(xhci
, xhci
->event_ring
);
607 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
608 temp_64
&= ~ERST_PTR_MASK
;
609 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
610 "ERST deq = 64'h%0lx", (long unsigned int) temp_64
);
612 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
613 "// Set the interrupt modulation register");
614 temp
= readl(&xhci
->ir_set
->irq_control
);
615 temp
&= ~ER_IRQ_INTERVAL_MASK
;
617 writel(temp
, &xhci
->ir_set
->irq_control
);
619 /* Set the HCD state before we enable the irqs */
620 temp
= readl(&xhci
->op_regs
->command
);
622 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
623 "// Enable interrupts, cmd = 0x%x.", temp
);
624 writel(temp
, &xhci
->op_regs
->command
);
626 temp
= readl(&xhci
->ir_set
->irq_pending
);
627 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
628 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
629 xhci
->ir_set
, (unsigned int) ER_IRQ_ENABLE(temp
));
630 writel(ER_IRQ_ENABLE(temp
), &xhci
->ir_set
->irq_pending
);
631 xhci_print_ir_set(xhci
, 0);
633 if (xhci
->quirks
& XHCI_NEC_HOST
)
634 xhci_queue_vendor_command(xhci
, 0, 0, 0,
635 TRB_TYPE(TRB_NEC_GET_FW
));
637 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
638 "Finished xhci_run for USB2 roothub");
642 static void xhci_only_stop_hcd(struct usb_hcd
*hcd
)
644 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
646 spin_lock_irq(&xhci
->lock
);
649 /* The shared_hcd is going to be deallocated shortly (the USB core only
650 * calls this function when allocation fails in usb_add_hcd(), or
651 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
653 xhci
->shared_hcd
= NULL
;
654 spin_unlock_irq(&xhci
->lock
);
660 * This function is called by the USB core when the HC driver is removed.
661 * Its opposite is xhci_run().
663 * Disable device contexts, disable IRQs, and quiesce the HC.
664 * Reset the HC, finish any completed transactions, and cleanup memory.
666 void xhci_stop(struct usb_hcd
*hcd
)
669 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
671 if (!usb_hcd_is_primary_hcd(hcd
)) {
672 xhci_only_stop_hcd(xhci
->shared_hcd
);
676 spin_lock_irq(&xhci
->lock
);
677 /* Make sure the xHC is halted for a USB3 roothub
678 * (xhci_stop() could be called as part of failed init).
682 spin_unlock_irq(&xhci
->lock
);
684 xhci_cleanup_msix(xhci
);
686 /* Deleting Compliance Mode Recovery Timer */
687 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
688 (!(xhci_all_ports_seen_u0(xhci
)))) {
689 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
690 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
691 "%s: compliance mode recovery timer deleted",
695 if (xhci
->quirks
& XHCI_AMD_PLL_FIX
)
698 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
699 "// Disabling event ring interrupts");
700 temp
= readl(&xhci
->op_regs
->status
);
701 writel(temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
702 temp
= readl(&xhci
->ir_set
->irq_pending
);
703 writel(ER_IRQ_DISABLE(temp
), &xhci
->ir_set
->irq_pending
);
704 xhci_print_ir_set(xhci
, 0);
706 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "cleaning up memory");
707 xhci_mem_cleanup(xhci
);
708 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
709 "xhci_stop completed - status = %x",
710 readl(&xhci
->op_regs
->status
));
714 * Shutdown HC (not bus-specific)
716 * This is called when the machine is rebooting or halting. We assume that the
717 * machine will be powered off, and the HC's internal state will be reset.
718 * Don't bother to free memory.
720 * This will only ever be called with the main usb_hcd (the USB3 roothub).
722 void xhci_shutdown(struct usb_hcd
*hcd
)
724 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
726 if (xhci
->quirks
& XHCI_SPURIOUS_REBOOT
)
727 usb_disable_xhci_ports(to_pci_dev(hcd
->self
.controller
));
729 spin_lock_irq(&xhci
->lock
);
731 /* Workaround for spurious wakeups at shutdown with HSW */
732 if (xhci
->quirks
& XHCI_SPURIOUS_WAKEUP
)
734 spin_unlock_irq(&xhci
->lock
);
736 xhci_cleanup_msix(xhci
);
738 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
739 "xhci_shutdown completed - status = %x",
740 readl(&xhci
->op_regs
->status
));
742 /* Yet another workaround for spurious wakeups at shutdown with HSW */
743 if (xhci
->quirks
& XHCI_SPURIOUS_WAKEUP
)
744 pci_set_power_state(to_pci_dev(hcd
->self
.controller
), PCI_D3hot
);
748 static void xhci_save_registers(struct xhci_hcd
*xhci
)
750 xhci
->s3
.command
= readl(&xhci
->op_regs
->command
);
751 xhci
->s3
.dev_nt
= readl(&xhci
->op_regs
->dev_notification
);
752 xhci
->s3
.dcbaa_ptr
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
753 xhci
->s3
.config_reg
= readl(&xhci
->op_regs
->config_reg
);
754 xhci
->s3
.erst_size
= readl(&xhci
->ir_set
->erst_size
);
755 xhci
->s3
.erst_base
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_base
);
756 xhci
->s3
.erst_dequeue
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
757 xhci
->s3
.irq_pending
= readl(&xhci
->ir_set
->irq_pending
);
758 xhci
->s3
.irq_control
= readl(&xhci
->ir_set
->irq_control
);
761 static void xhci_restore_registers(struct xhci_hcd
*xhci
)
763 writel(xhci
->s3
.command
, &xhci
->op_regs
->command
);
764 writel(xhci
->s3
.dev_nt
, &xhci
->op_regs
->dev_notification
);
765 xhci_write_64(xhci
, xhci
->s3
.dcbaa_ptr
, &xhci
->op_regs
->dcbaa_ptr
);
766 writel(xhci
->s3
.config_reg
, &xhci
->op_regs
->config_reg
);
767 writel(xhci
->s3
.erst_size
, &xhci
->ir_set
->erst_size
);
768 xhci_write_64(xhci
, xhci
->s3
.erst_base
, &xhci
->ir_set
->erst_base
);
769 xhci_write_64(xhci
, xhci
->s3
.erst_dequeue
, &xhci
->ir_set
->erst_dequeue
);
770 writel(xhci
->s3
.irq_pending
, &xhci
->ir_set
->irq_pending
);
771 writel(xhci
->s3
.irq_control
, &xhci
->ir_set
->irq_control
);
774 static void xhci_set_cmd_ring_deq(struct xhci_hcd
*xhci
)
778 /* step 2: initialize command ring buffer */
779 val_64
= xhci_read_64(xhci
, &xhci
->op_regs
->cmd_ring
);
780 val_64
= (val_64
& (u64
) CMD_RING_RSVD_BITS
) |
781 (xhci_trb_virt_to_dma(xhci
->cmd_ring
->deq_seg
,
782 xhci
->cmd_ring
->dequeue
) &
783 (u64
) ~CMD_RING_RSVD_BITS
) |
784 xhci
->cmd_ring
->cycle_state
;
785 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
786 "// Setting command ring address to 0x%llx",
787 (long unsigned long) val_64
);
788 xhci_write_64(xhci
, val_64
, &xhci
->op_regs
->cmd_ring
);
792 * The whole command ring must be cleared to zero when we suspend the host.
794 * The host doesn't save the command ring pointer in the suspend well, so we
795 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
796 * aligned, because of the reserved bits in the command ring dequeue pointer
797 * register. Therefore, we can't just set the dequeue pointer back in the
798 * middle of the ring (TRBs are 16-byte aligned).
800 static void xhci_clear_command_ring(struct xhci_hcd
*xhci
)
802 struct xhci_ring
*ring
;
803 struct xhci_segment
*seg
;
805 ring
= xhci
->cmd_ring
;
809 sizeof(union xhci_trb
) * (TRBS_PER_SEGMENT
- 1));
810 seg
->trbs
[TRBS_PER_SEGMENT
- 1].link
.control
&=
811 cpu_to_le32(~TRB_CYCLE
);
813 } while (seg
!= ring
->deq_seg
);
815 /* Reset the software enqueue and dequeue pointers */
816 ring
->deq_seg
= ring
->first_seg
;
817 ring
->dequeue
= ring
->first_seg
->trbs
;
818 ring
->enq_seg
= ring
->deq_seg
;
819 ring
->enqueue
= ring
->dequeue
;
821 ring
->num_trbs_free
= ring
->num_segs
* (TRBS_PER_SEGMENT
- 1) - 1;
823 * Ring is now zeroed, so the HW should look for change of ownership
824 * when the cycle bit is set to 1.
826 ring
->cycle_state
= 1;
829 * Reset the hardware dequeue pointer.
830 * Yes, this will need to be re-written after resume, but we're paranoid
831 * and want to make sure the hardware doesn't access bogus memory
832 * because, say, the BIOS or an SMI started the host without changing
833 * the command ring pointers.
835 xhci_set_cmd_ring_deq(xhci
);
839 * Stop HC (not bus-specific)
841 * This is called when the machine transition into S3/S4 mode.
844 int xhci_suspend(struct xhci_hcd
*xhci
)
847 unsigned int delay
= XHCI_MAX_HALT_USEC
;
848 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
851 if (hcd
->state
!= HC_STATE_SUSPENDED
||
852 xhci
->shared_hcd
->state
!= HC_STATE_SUSPENDED
)
855 /* Don't poll the roothubs on bus suspend. */
856 xhci_dbg(xhci
, "%s: stopping port polling.\n", __func__
);
857 clear_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
858 del_timer_sync(&hcd
->rh_timer
);
860 spin_lock_irq(&xhci
->lock
);
861 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
862 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
863 /* step 1: stop endpoint */
864 /* skipped assuming that port suspend has done */
866 /* step 2: clear Run/Stop bit */
867 command
= readl(&xhci
->op_regs
->command
);
869 writel(command
, &xhci
->op_regs
->command
);
871 /* Some chips from Fresco Logic need an extraordinary delay */
872 delay
*= (xhci
->quirks
& XHCI_SLOW_SUSPEND
) ? 10 : 1;
874 if (xhci_handshake(xhci
, &xhci
->op_regs
->status
,
875 STS_HALT
, STS_HALT
, delay
)) {
876 xhci_warn(xhci
, "WARN: xHC CMD_RUN timeout\n");
877 spin_unlock_irq(&xhci
->lock
);
880 xhci_clear_command_ring(xhci
);
882 /* step 3: save registers */
883 xhci_save_registers(xhci
);
885 /* step 4: set CSS flag */
886 command
= readl(&xhci
->op_regs
->command
);
888 writel(command
, &xhci
->op_regs
->command
);
889 if (xhci_handshake(xhci
, &xhci
->op_regs
->status
,
890 STS_SAVE
, 0, 10 * 1000)) {
891 xhci_warn(xhci
, "WARN: xHC save state timeout\n");
892 spin_unlock_irq(&xhci
->lock
);
895 spin_unlock_irq(&xhci
->lock
);
898 * Deleting Compliance Mode Recovery Timer because the xHCI Host
899 * is about to be suspended.
901 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
902 (!(xhci_all_ports_seen_u0(xhci
)))) {
903 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
904 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
905 "%s: compliance mode recovery timer deleted",
909 /* step 5: remove core well power */
910 /* synchronize irq when using MSI-X */
911 xhci_msix_sync_irqs(xhci
);
917 * start xHC (not bus-specific)
919 * This is called when the machine transition from S3/S4 mode.
922 int xhci_resume(struct xhci_hcd
*xhci
, bool hibernated
)
924 u32 command
, temp
= 0;
925 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
926 struct usb_hcd
*secondary_hcd
;
928 bool comp_timer_running
= false;
930 /* Wait a bit if either of the roothubs need to settle from the
931 * transition into bus suspend.
933 if (time_before(jiffies
, xhci
->bus_state
[0].next_statechange
) ||
935 xhci
->bus_state
[1].next_statechange
))
938 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
939 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
941 spin_lock_irq(&xhci
->lock
);
942 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
946 /* step 1: restore register */
947 xhci_restore_registers(xhci
);
948 /* step 2: initialize command ring buffer */
949 xhci_set_cmd_ring_deq(xhci
);
950 /* step 3: restore state and start state*/
951 /* step 3: set CRS flag */
952 command
= readl(&xhci
->op_regs
->command
);
954 writel(command
, &xhci
->op_regs
->command
);
955 if (xhci_handshake(xhci
, &xhci
->op_regs
->status
,
956 STS_RESTORE
, 0, 10 * 1000)) {
957 xhci_warn(xhci
, "WARN: xHC restore state timeout\n");
958 spin_unlock_irq(&xhci
->lock
);
961 temp
= readl(&xhci
->op_regs
->status
);
964 /* If restore operation fails, re-initialize the HC during resume */
965 if ((temp
& STS_SRE
) || hibernated
) {
967 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
968 !(xhci_all_ports_seen_u0(xhci
))) {
969 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
970 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
971 "Compliance Mode Recovery Timer deleted!");
974 /* Let the USB core know _both_ roothubs lost power. */
975 usb_root_hub_lost_power(xhci
->main_hcd
->self
.root_hub
);
976 usb_root_hub_lost_power(xhci
->shared_hcd
->self
.root_hub
);
978 xhci_dbg(xhci
, "Stop HCD\n");
981 spin_unlock_irq(&xhci
->lock
);
982 xhci_cleanup_msix(xhci
);
984 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
985 temp
= readl(&xhci
->op_regs
->status
);
986 writel(temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
987 temp
= readl(&xhci
->ir_set
->irq_pending
);
988 writel(ER_IRQ_DISABLE(temp
), &xhci
->ir_set
->irq_pending
);
989 xhci_print_ir_set(xhci
, 0);
991 xhci_dbg(xhci
, "cleaning up memory\n");
992 xhci_mem_cleanup(xhci
);
993 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
994 readl(&xhci
->op_regs
->status
));
996 /* USB core calls the PCI reinit and start functions twice:
997 * first with the primary HCD, and then with the secondary HCD.
998 * If we don't do the same, the host will never be started.
1000 if (!usb_hcd_is_primary_hcd(hcd
))
1001 secondary_hcd
= hcd
;
1003 secondary_hcd
= xhci
->shared_hcd
;
1005 xhci_dbg(xhci
, "Initialize the xhci_hcd\n");
1006 retval
= xhci_init(hcd
->primary_hcd
);
1009 comp_timer_running
= true;
1011 xhci_dbg(xhci
, "Start the primary HCD\n");
1012 retval
= xhci_run(hcd
->primary_hcd
);
1014 xhci_dbg(xhci
, "Start the secondary HCD\n");
1015 retval
= xhci_run(secondary_hcd
);
1017 hcd
->state
= HC_STATE_SUSPENDED
;
1018 xhci
->shared_hcd
->state
= HC_STATE_SUSPENDED
;
1022 /* step 4: set Run/Stop bit */
1023 command
= readl(&xhci
->op_regs
->command
);
1025 writel(command
, &xhci
->op_regs
->command
);
1026 xhci_handshake(xhci
, &xhci
->op_regs
->status
, STS_HALT
,
1029 /* step 5: walk topology and initialize portsc,
1030 * portpmsc and portli
1032 /* this is done in bus_resume */
1034 /* step 6: restart each of the previously
1035 * Running endpoints by ringing their doorbells
1038 spin_unlock_irq(&xhci
->lock
);
1042 usb_hcd_resume_root_hub(hcd
);
1043 usb_hcd_resume_root_hub(xhci
->shared_hcd
);
1047 * If system is subject to the Quirk, Compliance Mode Timer needs to
1048 * be re-initialized Always after a system resume. Ports are subject
1049 * to suffer the Compliance Mode issue again. It doesn't matter if
1050 * ports have entered previously to U0 before system's suspension.
1052 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) && !comp_timer_running
)
1053 compliance_mode_recovery_timer_init(xhci
);
1055 /* Re-enable port polling. */
1056 xhci_dbg(xhci
, "%s: starting port polling.\n", __func__
);
1057 set_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
1058 usb_hcd_poll_rh_status(hcd
);
1062 #endif /* CONFIG_PM */
1064 /*-------------------------------------------------------------------------*/
1067 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1068 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1069 * value to right shift 1 for the bitmask.
1071 * Index = (epnum * 2) + direction - 1,
1072 * where direction = 0 for OUT, 1 for IN.
1073 * For control endpoints, the IN index is used (OUT index is unused), so
1074 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1076 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor
*desc
)
1079 if (usb_endpoint_xfer_control(desc
))
1080 index
= (unsigned int) (usb_endpoint_num(desc
)*2);
1082 index
= (unsigned int) (usb_endpoint_num(desc
)*2) +
1083 (usb_endpoint_dir_in(desc
) ? 1 : 0) - 1;
1087 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1088 * address from the XHCI endpoint index.
1090 unsigned int xhci_get_endpoint_address(unsigned int ep_index
)
1092 unsigned int number
= DIV_ROUND_UP(ep_index
, 2);
1093 unsigned int direction
= ep_index
% 2 ? USB_DIR_OUT
: USB_DIR_IN
;
1094 return direction
| number
;
1097 /* Find the flag for this endpoint (for use in the control context). Use the
1098 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1101 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor
*desc
)
1103 return 1 << (xhci_get_endpoint_index(desc
) + 1);
1106 /* Find the flag for this endpoint (for use in the control context). Use the
1107 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1110 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index
)
1112 return 1 << (ep_index
+ 1);
1115 /* Compute the last valid endpoint context index. Basically, this is the
1116 * endpoint index plus one. For slot contexts with more than valid endpoint,
1117 * we find the most significant bit set in the added contexts flags.
1118 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1119 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1121 unsigned int xhci_last_valid_endpoint(u32 added_ctxs
)
1123 return fls(added_ctxs
) - 1;
1126 /* Returns 1 if the arguments are OK;
1127 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1129 static int xhci_check_args(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1130 struct usb_host_endpoint
*ep
, int check_ep
, bool check_virt_dev
,
1132 struct xhci_hcd
*xhci
;
1133 struct xhci_virt_device
*virt_dev
;
1135 if (!hcd
|| (check_ep
&& !ep
) || !udev
) {
1136 pr_debug("xHCI %s called with invalid args\n", func
);
1139 if (!udev
->parent
) {
1140 pr_debug("xHCI %s called for root hub\n", func
);
1144 xhci
= hcd_to_xhci(hcd
);
1145 if (check_virt_dev
) {
1146 if (!udev
->slot_id
|| !xhci
->devs
[udev
->slot_id
]) {
1147 xhci_dbg(xhci
, "xHCI %s called with unaddressed device\n",
1152 virt_dev
= xhci
->devs
[udev
->slot_id
];
1153 if (virt_dev
->udev
!= udev
) {
1154 xhci_dbg(xhci
, "xHCI %s called with udev and "
1155 "virt_dev does not match\n", func
);
1160 if (xhci
->xhc_state
& XHCI_STATE_HALTED
)
1166 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
1167 struct usb_device
*udev
, struct xhci_command
*command
,
1168 bool ctx_change
, bool must_succeed
);
1171 * Full speed devices may have a max packet size greater than 8 bytes, but the
1172 * USB core doesn't know that until it reads the first 8 bytes of the
1173 * descriptor. If the usb_device's max packet size changes after that point,
1174 * we need to issue an evaluate context command and wait on it.
1176 static int xhci_check_maxpacket(struct xhci_hcd
*xhci
, unsigned int slot_id
,
1177 unsigned int ep_index
, struct urb
*urb
)
1179 struct xhci_container_ctx
*in_ctx
;
1180 struct xhci_container_ctx
*out_ctx
;
1181 struct xhci_input_control_ctx
*ctrl_ctx
;
1182 struct xhci_ep_ctx
*ep_ctx
;
1183 int max_packet_size
;
1184 int hw_max_packet_size
;
1187 out_ctx
= xhci
->devs
[slot_id
]->out_ctx
;
1188 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1189 hw_max_packet_size
= MAX_PACKET_DECODED(le32_to_cpu(ep_ctx
->ep_info2
));
1190 max_packet_size
= usb_endpoint_maxp(&urb
->dev
->ep0
.desc
);
1191 if (hw_max_packet_size
!= max_packet_size
) {
1192 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1193 "Max Packet Size for ep 0 changed.");
1194 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1195 "Max packet size in usb_device = %d",
1197 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1198 "Max packet size in xHCI HW = %d",
1199 hw_max_packet_size
);
1200 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1201 "Issuing evaluate context command.");
1203 /* Set up the input context flags for the command */
1204 /* FIXME: This won't work if a non-default control endpoint
1205 * changes max packet sizes.
1207 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
1208 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1210 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
1214 /* Set up the modified control endpoint 0 */
1215 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
1216 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
1218 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
1219 ep_ctx
->ep_info2
&= cpu_to_le32(~MAX_PACKET_MASK
);
1220 ep_ctx
->ep_info2
|= cpu_to_le32(MAX_PACKET(max_packet_size
));
1222 ctrl_ctx
->add_flags
= cpu_to_le32(EP0_FLAG
);
1223 ctrl_ctx
->drop_flags
= 0;
1225 xhci_dbg(xhci
, "Slot %d input context\n", slot_id
);
1226 xhci_dbg_ctx(xhci
, in_ctx
, ep_index
);
1227 xhci_dbg(xhci
, "Slot %d output context\n", slot_id
);
1228 xhci_dbg_ctx(xhci
, out_ctx
, ep_index
);
1230 ret
= xhci_configure_endpoint(xhci
, urb
->dev
, NULL
,
1233 /* Clean up the input context for later use by bandwidth
1236 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
);
1242 * non-error returns are a promise to giveback() the urb later
1243 * we drop ownership so next owner (or urb unlink) can get it
1245 int xhci_urb_enqueue(struct usb_hcd
*hcd
, struct urb
*urb
, gfp_t mem_flags
)
1247 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
1248 struct xhci_td
*buffer
;
1249 unsigned long flags
;
1251 unsigned int slot_id
, ep_index
;
1252 struct urb_priv
*urb_priv
;
1255 if (!urb
|| xhci_check_args(hcd
, urb
->dev
, urb
->ep
,
1256 true, true, __func__
) <= 0)
1259 slot_id
= urb
->dev
->slot_id
;
1260 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1262 if (!HCD_HW_ACCESSIBLE(hcd
)) {
1263 if (!in_interrupt())
1264 xhci_dbg(xhci
, "urb submitted during PCI suspend\n");
1269 if (usb_endpoint_xfer_isoc(&urb
->ep
->desc
))
1270 size
= urb
->number_of_packets
;
1274 urb_priv
= kzalloc(sizeof(struct urb_priv
) +
1275 size
* sizeof(struct xhci_td
*), mem_flags
);
1279 buffer
= kzalloc(size
* sizeof(struct xhci_td
), mem_flags
);
1285 for (i
= 0; i
< size
; i
++) {
1286 urb_priv
->td
[i
] = buffer
;
1290 urb_priv
->length
= size
;
1291 urb_priv
->td_cnt
= 0;
1292 urb
->hcpriv
= urb_priv
;
1294 if (usb_endpoint_xfer_control(&urb
->ep
->desc
)) {
1295 /* Check to see if the max packet size for the default control
1296 * endpoint changed during FS device enumeration
1298 if (urb
->dev
->speed
== USB_SPEED_FULL
) {
1299 ret
= xhci_check_maxpacket(xhci
, slot_id
,
1302 xhci_urb_free_priv(xhci
, urb_priv
);
1308 /* We have a spinlock and interrupts disabled, so we must pass
1309 * atomic context to this function, which may allocate memory.
1311 spin_lock_irqsave(&xhci
->lock
, flags
);
1312 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1314 ret
= xhci_queue_ctrl_tx(xhci
, GFP_ATOMIC
, urb
,
1318 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1319 } else if (usb_endpoint_xfer_bulk(&urb
->ep
->desc
)) {
1320 spin_lock_irqsave(&xhci
->lock
, flags
);
1321 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1323 if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
1324 EP_GETTING_STREAMS
) {
1325 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1326 "is transitioning to using streams.\n");
1328 } else if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
1329 EP_GETTING_NO_STREAMS
) {
1330 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1331 "is transitioning to "
1332 "not having streams.\n");
1335 ret
= xhci_queue_bulk_tx(xhci
, GFP_ATOMIC
, urb
,
1340 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1341 } else if (usb_endpoint_xfer_int(&urb
->ep
->desc
)) {
1342 spin_lock_irqsave(&xhci
->lock
, flags
);
1343 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1345 ret
= xhci_queue_intr_tx(xhci
, GFP_ATOMIC
, urb
,
1349 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1351 spin_lock_irqsave(&xhci
->lock
, flags
);
1352 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1354 ret
= xhci_queue_isoc_tx_prepare(xhci
, GFP_ATOMIC
, urb
,
1358 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1363 xhci_dbg(xhci
, "Ep 0x%x: URB %p submitted for "
1364 "non-responsive xHCI host.\n",
1365 urb
->ep
->desc
.bEndpointAddress
, urb
);
1368 xhci_urb_free_priv(xhci
, urb_priv
);
1370 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1374 /* Get the right ring for the given URB.
1375 * If the endpoint supports streams, boundary check the URB's stream ID.
1376 * If the endpoint doesn't support streams, return the singular endpoint ring.
1378 static struct xhci_ring
*xhci_urb_to_transfer_ring(struct xhci_hcd
*xhci
,
1381 unsigned int slot_id
;
1382 unsigned int ep_index
;
1383 unsigned int stream_id
;
1384 struct xhci_virt_ep
*ep
;
1386 slot_id
= urb
->dev
->slot_id
;
1387 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1388 stream_id
= urb
->stream_id
;
1389 ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
1390 /* Common case: no streams */
1391 if (!(ep
->ep_state
& EP_HAS_STREAMS
))
1394 if (stream_id
== 0) {
1396 "WARN: Slot ID %u, ep index %u has streams, "
1397 "but URB has no stream ID.\n",
1402 if (stream_id
< ep
->stream_info
->num_streams
)
1403 return ep
->stream_info
->stream_rings
[stream_id
];
1406 "WARN: Slot ID %u, ep index %u has "
1407 "stream IDs 1 to %u allocated, "
1408 "but stream ID %u is requested.\n",
1410 ep
->stream_info
->num_streams
- 1,
1416 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1417 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1418 * should pick up where it left off in the TD, unless a Set Transfer Ring
1419 * Dequeue Pointer is issued.
1421 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1422 * the ring. Since the ring is a contiguous structure, they can't be physically
1423 * removed. Instead, there are two options:
1425 * 1) If the HC is in the middle of processing the URB to be canceled, we
1426 * simply move the ring's dequeue pointer past those TRBs using the Set
1427 * Transfer Ring Dequeue Pointer command. This will be the common case,
1428 * when drivers timeout on the last submitted URB and attempt to cancel.
1430 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1431 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1432 * HC will need to invalidate the any TRBs it has cached after the stop
1433 * endpoint command, as noted in the xHCI 0.95 errata.
1435 * 3) The TD may have completed by the time the Stop Endpoint Command
1436 * completes, so software needs to handle that case too.
1438 * This function should protect against the TD enqueueing code ringing the
1439 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1440 * It also needs to account for multiple cancellations on happening at the same
1441 * time for the same endpoint.
1443 * Note that this function can be called in any context, or so says
1444 * usb_hcd_unlink_urb()
1446 int xhci_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
1448 unsigned long flags
;
1451 struct xhci_hcd
*xhci
;
1452 struct urb_priv
*urb_priv
;
1454 unsigned int ep_index
;
1455 struct xhci_ring
*ep_ring
;
1456 struct xhci_virt_ep
*ep
;
1458 xhci
= hcd_to_xhci(hcd
);
1459 spin_lock_irqsave(&xhci
->lock
, flags
);
1460 /* Make sure the URB hasn't completed or been unlinked already */
1461 ret
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
1462 if (ret
|| !urb
->hcpriv
)
1464 temp
= readl(&xhci
->op_regs
->status
);
1465 if (temp
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
1466 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
1467 "HW died, freeing TD.");
1468 urb_priv
= urb
->hcpriv
;
1469 for (i
= urb_priv
->td_cnt
; i
< urb_priv
->length
; i
++) {
1470 td
= urb_priv
->td
[i
];
1471 if (!list_empty(&td
->td_list
))
1472 list_del_init(&td
->td_list
);
1473 if (!list_empty(&td
->cancelled_td_list
))
1474 list_del_init(&td
->cancelled_td_list
);
1477 usb_hcd_unlink_urb_from_ep(hcd
, urb
);
1478 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1479 usb_hcd_giveback_urb(hcd
, urb
, -ESHUTDOWN
);
1480 xhci_urb_free_priv(xhci
, urb_priv
);
1483 if ((xhci
->xhc_state
& XHCI_STATE_DYING
) ||
1484 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
1485 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
1486 "Ep 0x%x: URB %p to be canceled on "
1487 "non-responsive xHCI host.",
1488 urb
->ep
->desc
.bEndpointAddress
, urb
);
1489 /* Let the stop endpoint command watchdog timer (which set this
1490 * state) finish cleaning up the endpoint TD lists. We must
1491 * have caught it in the middle of dropping a lock and giving
1497 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1498 ep
= &xhci
->devs
[urb
->dev
->slot_id
]->eps
[ep_index
];
1499 ep_ring
= xhci_urb_to_transfer_ring(xhci
, urb
);
1505 urb_priv
= urb
->hcpriv
;
1506 i
= urb_priv
->td_cnt
;
1507 if (i
< urb_priv
->length
)
1508 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
1509 "Cancel URB %p, dev %s, ep 0x%x, "
1510 "starting at offset 0x%llx",
1511 urb
, urb
->dev
->devpath
,
1512 urb
->ep
->desc
.bEndpointAddress
,
1513 (unsigned long long) xhci_trb_virt_to_dma(
1514 urb_priv
->td
[i
]->start_seg
,
1515 urb_priv
->td
[i
]->first_trb
));
1517 for (; i
< urb_priv
->length
; i
++) {
1518 td
= urb_priv
->td
[i
];
1519 list_add_tail(&td
->cancelled_td_list
, &ep
->cancelled_td_list
);
1522 /* Queue a stop endpoint command, but only if this is
1523 * the first cancellation to be handled.
1525 if (!(ep
->ep_state
& EP_HALT_PENDING
)) {
1526 ep
->ep_state
|= EP_HALT_PENDING
;
1527 ep
->stop_cmds_pending
++;
1528 ep
->stop_cmd_timer
.expires
= jiffies
+
1529 XHCI_STOP_EP_CMD_TIMEOUT
* HZ
;
1530 add_timer(&ep
->stop_cmd_timer
);
1531 xhci_queue_stop_endpoint(xhci
, urb
->dev
->slot_id
, ep_index
, 0);
1532 xhci_ring_cmd_db(xhci
);
1535 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1539 /* Drop an endpoint from a new bandwidth configuration for this device.
1540 * Only one call to this function is allowed per endpoint before
1541 * check_bandwidth() or reset_bandwidth() must be called.
1542 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1543 * add the endpoint to the schedule with possibly new parameters denoted by a
1544 * different endpoint descriptor in usb_host_endpoint.
1545 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1548 * The USB core will not allow URBs to be queued to an endpoint that is being
1549 * disabled, so there's no need for mutual exclusion to protect
1550 * the xhci->devs[slot_id] structure.
1552 int xhci_drop_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1553 struct usb_host_endpoint
*ep
)
1555 struct xhci_hcd
*xhci
;
1556 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1557 struct xhci_input_control_ctx
*ctrl_ctx
;
1558 struct xhci_slot_ctx
*slot_ctx
;
1559 unsigned int last_ctx
;
1560 unsigned int ep_index
;
1561 struct xhci_ep_ctx
*ep_ctx
;
1563 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1566 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1569 xhci
= hcd_to_xhci(hcd
);
1570 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1573 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
1574 drop_flag
= xhci_get_endpoint_flag(&ep
->desc
);
1575 if (drop_flag
== SLOT_FLAG
|| drop_flag
== EP0_FLAG
) {
1576 xhci_dbg(xhci
, "xHCI %s - can't drop slot or ep 0 %#x\n",
1577 __func__
, drop_flag
);
1581 in_ctx
= xhci
->devs
[udev
->slot_id
]->in_ctx
;
1582 out_ctx
= xhci
->devs
[udev
->slot_id
]->out_ctx
;
1583 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1585 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
1590 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1591 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1592 /* If the HC already knows the endpoint is disabled,
1593 * or the HCD has noted it is disabled, ignore this request
1595 if (((ep_ctx
->ep_info
& cpu_to_le32(EP_STATE_MASK
)) ==
1596 cpu_to_le32(EP_STATE_DISABLED
)) ||
1597 le32_to_cpu(ctrl_ctx
->drop_flags
) &
1598 xhci_get_endpoint_flag(&ep
->desc
)) {
1599 xhci_warn(xhci
, "xHCI %s called with disabled ep %p\n",
1604 ctrl_ctx
->drop_flags
|= cpu_to_le32(drop_flag
);
1605 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1607 ctrl_ctx
->add_flags
&= cpu_to_le32(~drop_flag
);
1608 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1610 last_ctx
= xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx
->add_flags
));
1611 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1612 /* Update the last valid endpoint context, if we deleted the last one */
1613 if ((le32_to_cpu(slot_ctx
->dev_info
) & LAST_CTX_MASK
) >
1614 LAST_CTX(last_ctx
)) {
1615 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1616 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(last_ctx
));
1618 new_slot_info
= le32_to_cpu(slot_ctx
->dev_info
);
1620 xhci_endpoint_zero(xhci
, xhci
->devs
[udev
->slot_id
], ep
);
1622 xhci_dbg(xhci
, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1623 (unsigned int) ep
->desc
.bEndpointAddress
,
1625 (unsigned int) new_drop_flags
,
1626 (unsigned int) new_add_flags
,
1627 (unsigned int) new_slot_info
);
1631 /* Add an endpoint to a new possible bandwidth configuration for this device.
1632 * Only one call to this function is allowed per endpoint before
1633 * check_bandwidth() or reset_bandwidth() must be called.
1634 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1635 * add the endpoint to the schedule with possibly new parameters denoted by a
1636 * different endpoint descriptor in usb_host_endpoint.
1637 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1640 * The USB core will not allow URBs to be queued to an endpoint until the
1641 * configuration or alt setting is installed in the device, so there's no need
1642 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1644 int xhci_add_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1645 struct usb_host_endpoint
*ep
)
1647 struct xhci_hcd
*xhci
;
1648 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1649 unsigned int ep_index
;
1650 struct xhci_slot_ctx
*slot_ctx
;
1651 struct xhci_input_control_ctx
*ctrl_ctx
;
1653 unsigned int last_ctx
;
1654 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1655 struct xhci_virt_device
*virt_dev
;
1658 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1660 /* So we won't queue a reset ep command for a root hub */
1664 xhci
= hcd_to_xhci(hcd
);
1665 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1668 added_ctxs
= xhci_get_endpoint_flag(&ep
->desc
);
1669 last_ctx
= xhci_last_valid_endpoint(added_ctxs
);
1670 if (added_ctxs
== SLOT_FLAG
|| added_ctxs
== EP0_FLAG
) {
1671 /* FIXME when we have to issue an evaluate endpoint command to
1672 * deal with ep0 max packet size changing once we get the
1675 xhci_dbg(xhci
, "xHCI %s - can't add slot or ep 0 %#x\n",
1676 __func__
, added_ctxs
);
1680 virt_dev
= xhci
->devs
[udev
->slot_id
];
1681 in_ctx
= virt_dev
->in_ctx
;
1682 out_ctx
= virt_dev
->out_ctx
;
1683 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1685 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
1690 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1691 /* If this endpoint is already in use, and the upper layers are trying
1692 * to add it again without dropping it, reject the addition.
1694 if (virt_dev
->eps
[ep_index
].ring
&&
1695 !(le32_to_cpu(ctrl_ctx
->drop_flags
) &
1696 xhci_get_endpoint_flag(&ep
->desc
))) {
1697 xhci_warn(xhci
, "Trying to add endpoint 0x%x "
1698 "without dropping it.\n",
1699 (unsigned int) ep
->desc
.bEndpointAddress
);
1703 /* If the HCD has already noted the endpoint is enabled,
1704 * ignore this request.
1706 if (le32_to_cpu(ctrl_ctx
->add_flags
) &
1707 xhci_get_endpoint_flag(&ep
->desc
)) {
1708 xhci_warn(xhci
, "xHCI %s called with enabled ep %p\n",
1714 * Configuration and alternate setting changes must be done in
1715 * process context, not interrupt context (or so documenation
1716 * for usb_set_interface() and usb_set_configuration() claim).
1718 if (xhci_endpoint_init(xhci
, virt_dev
, udev
, ep
, GFP_NOIO
) < 0) {
1719 dev_dbg(&udev
->dev
, "%s - could not initialize ep %#x\n",
1720 __func__
, ep
->desc
.bEndpointAddress
);
1724 ctrl_ctx
->add_flags
|= cpu_to_le32(added_ctxs
);
1725 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1727 /* If xhci_endpoint_disable() was called for this endpoint, but the
1728 * xHC hasn't been notified yet through the check_bandwidth() call,
1729 * this re-adds a new state for the endpoint from the new endpoint
1730 * descriptors. We must drop and re-add this endpoint, so we leave the
1733 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1735 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1736 /* Update the last valid endpoint context, if we just added one past */
1737 if ((le32_to_cpu(slot_ctx
->dev_info
) & LAST_CTX_MASK
) <
1738 LAST_CTX(last_ctx
)) {
1739 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1740 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(last_ctx
));
1742 new_slot_info
= le32_to_cpu(slot_ctx
->dev_info
);
1744 /* Store the usb_device pointer for later use */
1747 xhci_dbg(xhci
, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1748 (unsigned int) ep
->desc
.bEndpointAddress
,
1750 (unsigned int) new_drop_flags
,
1751 (unsigned int) new_add_flags
,
1752 (unsigned int) new_slot_info
);
1756 static void xhci_zero_in_ctx(struct xhci_hcd
*xhci
, struct xhci_virt_device
*virt_dev
)
1758 struct xhci_input_control_ctx
*ctrl_ctx
;
1759 struct xhci_ep_ctx
*ep_ctx
;
1760 struct xhci_slot_ctx
*slot_ctx
;
1763 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
1765 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
1770 /* When a device's add flag and drop flag are zero, any subsequent
1771 * configure endpoint command will leave that endpoint's state
1772 * untouched. Make sure we don't leave any old state in the input
1773 * endpoint contexts.
1775 ctrl_ctx
->drop_flags
= 0;
1776 ctrl_ctx
->add_flags
= 0;
1777 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
1778 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1779 /* Endpoint 0 is always valid */
1780 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(1));
1781 for (i
= 1; i
< 31; ++i
) {
1782 ep_ctx
= xhci_get_ep_ctx(xhci
, virt_dev
->in_ctx
, i
);
1783 ep_ctx
->ep_info
= 0;
1784 ep_ctx
->ep_info2
= 0;
1786 ep_ctx
->tx_info
= 0;
1790 static int xhci_configure_endpoint_result(struct xhci_hcd
*xhci
,
1791 struct usb_device
*udev
, u32
*cmd_status
)
1795 switch (*cmd_status
) {
1797 dev_warn(&udev
->dev
, "Not enough host controller resources "
1798 "for new device state.\n");
1800 /* FIXME: can we allocate more resources for the HC? */
1803 case COMP_2ND_BW_ERR
:
1804 dev_warn(&udev
->dev
, "Not enough bandwidth "
1805 "for new device state.\n");
1807 /* FIXME: can we go back to the old state? */
1810 /* the HCD set up something wrong */
1811 dev_warn(&udev
->dev
, "ERROR: Endpoint drop flag = 0, "
1813 "and endpoint is not disabled.\n");
1817 dev_warn(&udev
->dev
, "ERROR: Incompatible device for endpoint "
1818 "configure command.\n");
1822 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1823 "Successful Endpoint Configure command");
1827 xhci_err(xhci
, "ERROR: unexpected command completion "
1828 "code 0x%x.\n", *cmd_status
);
1835 static int xhci_evaluate_context_result(struct xhci_hcd
*xhci
,
1836 struct usb_device
*udev
, u32
*cmd_status
)
1839 struct xhci_virt_device
*virt_dev
= xhci
->devs
[udev
->slot_id
];
1841 switch (*cmd_status
) {
1843 dev_warn(&udev
->dev
, "WARN: xHCI driver setup invalid evaluate "
1844 "context command.\n");
1848 dev_warn(&udev
->dev
, "WARN: slot not enabled for"
1849 "evaluate context command.\n");
1852 case COMP_CTX_STATE
:
1853 dev_warn(&udev
->dev
, "WARN: invalid context state for "
1854 "evaluate context command.\n");
1855 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 1);
1859 dev_warn(&udev
->dev
, "ERROR: Incompatible device for evaluate "
1860 "context command.\n");
1864 /* Max Exit Latency too large error */
1865 dev_warn(&udev
->dev
, "WARN: Max Exit Latency too large\n");
1869 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1870 "Successful evaluate context command");
1874 xhci_err(xhci
, "ERROR: unexpected command completion "
1875 "code 0x%x.\n", *cmd_status
);
1882 static u32
xhci_count_num_new_endpoints(struct xhci_hcd
*xhci
,
1883 struct xhci_input_control_ctx
*ctrl_ctx
)
1885 u32 valid_add_flags
;
1886 u32 valid_drop_flags
;
1888 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1889 * (bit 1). The default control endpoint is added during the Address
1890 * Device command and is never removed until the slot is disabled.
1892 valid_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
) >> 2;
1893 valid_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
) >> 2;
1895 /* Use hweight32 to count the number of ones in the add flags, or
1896 * number of endpoints added. Don't count endpoints that are changed
1897 * (both added and dropped).
1899 return hweight32(valid_add_flags
) -
1900 hweight32(valid_add_flags
& valid_drop_flags
);
1903 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd
*xhci
,
1904 struct xhci_input_control_ctx
*ctrl_ctx
)
1906 u32 valid_add_flags
;
1907 u32 valid_drop_flags
;
1909 valid_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
) >> 2;
1910 valid_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
) >> 2;
1912 return hweight32(valid_drop_flags
) -
1913 hweight32(valid_add_flags
& valid_drop_flags
);
1917 * We need to reserve the new number of endpoints before the configure endpoint
1918 * command completes. We can't subtract the dropped endpoints from the number
1919 * of active endpoints until the command completes because we can oversubscribe
1920 * the host in this case:
1922 * - the first configure endpoint command drops more endpoints than it adds
1923 * - a second configure endpoint command that adds more endpoints is queued
1924 * - the first configure endpoint command fails, so the config is unchanged
1925 * - the second command may succeed, even though there isn't enough resources
1927 * Must be called with xhci->lock held.
1929 static int xhci_reserve_host_resources(struct xhci_hcd
*xhci
,
1930 struct xhci_input_control_ctx
*ctrl_ctx
)
1934 added_eps
= xhci_count_num_new_endpoints(xhci
, ctrl_ctx
);
1935 if (xhci
->num_active_eps
+ added_eps
> xhci
->limit_active_eps
) {
1936 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1937 "Not enough ep ctxs: "
1938 "%u active, need to add %u, limit is %u.",
1939 xhci
->num_active_eps
, added_eps
,
1940 xhci
->limit_active_eps
);
1943 xhci
->num_active_eps
+= added_eps
;
1944 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1945 "Adding %u ep ctxs, %u now active.", added_eps
,
1946 xhci
->num_active_eps
);
1951 * The configure endpoint was failed by the xHC for some other reason, so we
1952 * need to revert the resources that failed configuration would have used.
1954 * Must be called with xhci->lock held.
1956 static void xhci_free_host_resources(struct xhci_hcd
*xhci
,
1957 struct xhci_input_control_ctx
*ctrl_ctx
)
1961 num_failed_eps
= xhci_count_num_new_endpoints(xhci
, ctrl_ctx
);
1962 xhci
->num_active_eps
-= num_failed_eps
;
1963 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1964 "Removing %u failed ep ctxs, %u now active.",
1966 xhci
->num_active_eps
);
1970 * Now that the command has completed, clean up the active endpoint count by
1971 * subtracting out the endpoints that were dropped (but not changed).
1973 * Must be called with xhci->lock held.
1975 static void xhci_finish_resource_reservation(struct xhci_hcd
*xhci
,
1976 struct xhci_input_control_ctx
*ctrl_ctx
)
1978 u32 num_dropped_eps
;
1980 num_dropped_eps
= xhci_count_num_dropped_endpoints(xhci
, ctrl_ctx
);
1981 xhci
->num_active_eps
-= num_dropped_eps
;
1982 if (num_dropped_eps
)
1983 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1984 "Removing %u dropped ep ctxs, %u now active.",
1986 xhci
->num_active_eps
);
1989 static unsigned int xhci_get_block_size(struct usb_device
*udev
)
1991 switch (udev
->speed
) {
1993 case USB_SPEED_FULL
:
1995 case USB_SPEED_HIGH
:
1997 case USB_SPEED_SUPER
:
1999 case USB_SPEED_UNKNOWN
:
2000 case USB_SPEED_WIRELESS
:
2002 /* Should never happen */
2008 xhci_get_largest_overhead(struct xhci_interval_bw
*interval_bw
)
2010 if (interval_bw
->overhead
[LS_OVERHEAD_TYPE
])
2012 if (interval_bw
->overhead
[FS_OVERHEAD_TYPE
])
2017 /* If we are changing a LS/FS device under a HS hub,
2018 * make sure (if we are activating a new TT) that the HS bus has enough
2019 * bandwidth for this new TT.
2021 static int xhci_check_tt_bw_table(struct xhci_hcd
*xhci
,
2022 struct xhci_virt_device
*virt_dev
,
2025 struct xhci_interval_bw_table
*bw_table
;
2026 struct xhci_tt_bw_info
*tt_info
;
2028 /* Find the bandwidth table for the root port this TT is attached to. */
2029 bw_table
= &xhci
->rh_bw
[virt_dev
->real_port
- 1].bw_table
;
2030 tt_info
= virt_dev
->tt_info
;
2031 /* If this TT already had active endpoints, the bandwidth for this TT
2032 * has already been added. Removing all periodic endpoints (and thus
2033 * making the TT enactive) will only decrease the bandwidth used.
2037 if (old_active_eps
== 0 && tt_info
->active_eps
!= 0) {
2038 if (bw_table
->bw_used
+ TT_HS_OVERHEAD
> HS_BW_LIMIT
)
2042 /* Not sure why we would have no new active endpoints...
2044 * Maybe because of an Evaluate Context change for a hub update or a
2045 * control endpoint 0 max packet size change?
2046 * FIXME: skip the bandwidth calculation in that case.
2051 static int xhci_check_ss_bw(struct xhci_hcd
*xhci
,
2052 struct xhci_virt_device
*virt_dev
)
2054 unsigned int bw_reserved
;
2056 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_IN
, 100);
2057 if (virt_dev
->bw_table
->ss_bw_in
> (SS_BW_LIMIT_IN
- bw_reserved
))
2060 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_OUT
, 100);
2061 if (virt_dev
->bw_table
->ss_bw_out
> (SS_BW_LIMIT_OUT
- bw_reserved
))
2068 * This algorithm is a very conservative estimate of the worst-case scheduling
2069 * scenario for any one interval. The hardware dynamically schedules the
2070 * packets, so we can't tell which microframe could be the limiting factor in
2071 * the bandwidth scheduling. This only takes into account periodic endpoints.
2073 * Obviously, we can't solve an NP complete problem to find the minimum worst
2074 * case scenario. Instead, we come up with an estimate that is no less than
2075 * the worst case bandwidth used for any one microframe, but may be an
2078 * We walk the requirements for each endpoint by interval, starting with the
2079 * smallest interval, and place packets in the schedule where there is only one
2080 * possible way to schedule packets for that interval. In order to simplify
2081 * this algorithm, we record the largest max packet size for each interval, and
2082 * assume all packets will be that size.
2084 * For interval 0, we obviously must schedule all packets for each interval.
2085 * The bandwidth for interval 0 is just the amount of data to be transmitted
2086 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2087 * the number of packets).
2089 * For interval 1, we have two possible microframes to schedule those packets
2090 * in. For this algorithm, if we can schedule the same number of packets for
2091 * each possible scheduling opportunity (each microframe), we will do so. The
2092 * remaining number of packets will be saved to be transmitted in the gaps in
2093 * the next interval's scheduling sequence.
2095 * As we move those remaining packets to be scheduled with interval 2 packets,
2096 * we have to double the number of remaining packets to transmit. This is
2097 * because the intervals are actually powers of 2, and we would be transmitting
2098 * the previous interval's packets twice in this interval. We also have to be
2099 * sure that when we look at the largest max packet size for this interval, we
2100 * also look at the largest max packet size for the remaining packets and take
2101 * the greater of the two.
2103 * The algorithm continues to evenly distribute packets in each scheduling
2104 * opportunity, and push the remaining packets out, until we get to the last
2105 * interval. Then those packets and their associated overhead are just added
2106 * to the bandwidth used.
2108 static int xhci_check_bw_table(struct xhci_hcd
*xhci
,
2109 struct xhci_virt_device
*virt_dev
,
2112 unsigned int bw_reserved
;
2113 unsigned int max_bandwidth
;
2114 unsigned int bw_used
;
2115 unsigned int block_size
;
2116 struct xhci_interval_bw_table
*bw_table
;
2117 unsigned int packet_size
= 0;
2118 unsigned int overhead
= 0;
2119 unsigned int packets_transmitted
= 0;
2120 unsigned int packets_remaining
= 0;
2123 if (virt_dev
->udev
->speed
== USB_SPEED_SUPER
)
2124 return xhci_check_ss_bw(xhci
, virt_dev
);
2126 if (virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2127 max_bandwidth
= HS_BW_LIMIT
;
2128 /* Convert percent of bus BW reserved to blocks reserved */
2129 bw_reserved
= DIV_ROUND_UP(HS_BW_RESERVED
* max_bandwidth
, 100);
2131 max_bandwidth
= FS_BW_LIMIT
;
2132 bw_reserved
= DIV_ROUND_UP(FS_BW_RESERVED
* max_bandwidth
, 100);
2135 bw_table
= virt_dev
->bw_table
;
2136 /* We need to translate the max packet size and max ESIT payloads into
2137 * the units the hardware uses.
2139 block_size
= xhci_get_block_size(virt_dev
->udev
);
2141 /* If we are manipulating a LS/FS device under a HS hub, double check
2142 * that the HS bus has enough bandwidth if we are activing a new TT.
2144 if (virt_dev
->tt_info
) {
2145 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2146 "Recalculating BW for rootport %u",
2147 virt_dev
->real_port
);
2148 if (xhci_check_tt_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2149 xhci_warn(xhci
, "Not enough bandwidth on HS bus for "
2150 "newly activated TT.\n");
2153 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2154 "Recalculating BW for TT slot %u port %u",
2155 virt_dev
->tt_info
->slot_id
,
2156 virt_dev
->tt_info
->ttport
);
2158 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2159 "Recalculating BW for rootport %u",
2160 virt_dev
->real_port
);
2163 /* Add in how much bandwidth will be used for interval zero, or the
2164 * rounded max ESIT payload + number of packets * largest overhead.
2166 bw_used
= DIV_ROUND_UP(bw_table
->interval0_esit_payload
, block_size
) +
2167 bw_table
->interval_bw
[0].num_packets
*
2168 xhci_get_largest_overhead(&bw_table
->interval_bw
[0]);
2170 for (i
= 1; i
< XHCI_MAX_INTERVAL
; i
++) {
2171 unsigned int bw_added
;
2172 unsigned int largest_mps
;
2173 unsigned int interval_overhead
;
2176 * How many packets could we transmit in this interval?
2177 * If packets didn't fit in the previous interval, we will need
2178 * to transmit that many packets twice within this interval.
2180 packets_remaining
= 2 * packets_remaining
+
2181 bw_table
->interval_bw
[i
].num_packets
;
2183 /* Find the largest max packet size of this or the previous
2186 if (list_empty(&bw_table
->interval_bw
[i
].endpoints
))
2189 struct xhci_virt_ep
*virt_ep
;
2190 struct list_head
*ep_entry
;
2192 ep_entry
= bw_table
->interval_bw
[i
].endpoints
.next
;
2193 virt_ep
= list_entry(ep_entry
,
2194 struct xhci_virt_ep
, bw_endpoint_list
);
2195 /* Convert to blocks, rounding up */
2196 largest_mps
= DIV_ROUND_UP(
2197 virt_ep
->bw_info
.max_packet_size
,
2200 if (largest_mps
> packet_size
)
2201 packet_size
= largest_mps
;
2203 /* Use the larger overhead of this or the previous interval. */
2204 interval_overhead
= xhci_get_largest_overhead(
2205 &bw_table
->interval_bw
[i
]);
2206 if (interval_overhead
> overhead
)
2207 overhead
= interval_overhead
;
2209 /* How many packets can we evenly distribute across
2210 * (1 << (i + 1)) possible scheduling opportunities?
2212 packets_transmitted
= packets_remaining
>> (i
+ 1);
2214 /* Add in the bandwidth used for those scheduled packets */
2215 bw_added
= packets_transmitted
* (overhead
+ packet_size
);
2217 /* How many packets do we have remaining to transmit? */
2218 packets_remaining
= packets_remaining
% (1 << (i
+ 1));
2220 /* What largest max packet size should those packets have? */
2221 /* If we've transmitted all packets, don't carry over the
2222 * largest packet size.
2224 if (packets_remaining
== 0) {
2227 } else if (packets_transmitted
> 0) {
2228 /* Otherwise if we do have remaining packets, and we've
2229 * scheduled some packets in this interval, take the
2230 * largest max packet size from endpoints with this
2233 packet_size
= largest_mps
;
2234 overhead
= interval_overhead
;
2236 /* Otherwise carry over packet_size and overhead from the last
2237 * time we had a remainder.
2239 bw_used
+= bw_added
;
2240 if (bw_used
> max_bandwidth
) {
2241 xhci_warn(xhci
, "Not enough bandwidth. "
2242 "Proposed: %u, Max: %u\n",
2243 bw_used
, max_bandwidth
);
2248 * Ok, we know we have some packets left over after even-handedly
2249 * scheduling interval 15. We don't know which microframes they will
2250 * fit into, so we over-schedule and say they will be scheduled every
2253 if (packets_remaining
> 0)
2254 bw_used
+= overhead
+ packet_size
;
2256 if (!virt_dev
->tt_info
&& virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2257 unsigned int port_index
= virt_dev
->real_port
- 1;
2259 /* OK, we're manipulating a HS device attached to a
2260 * root port bandwidth domain. Include the number of active TTs
2261 * in the bandwidth used.
2263 bw_used
+= TT_HS_OVERHEAD
*
2264 xhci
->rh_bw
[port_index
].num_active_tts
;
2267 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2268 "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2269 "Available: %u " "percent",
2270 bw_used
, max_bandwidth
, bw_reserved
,
2271 (max_bandwidth
- bw_used
- bw_reserved
) * 100 /
2274 bw_used
+= bw_reserved
;
2275 if (bw_used
> max_bandwidth
) {
2276 xhci_warn(xhci
, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2277 bw_used
, max_bandwidth
);
2281 bw_table
->bw_used
= bw_used
;
2285 static bool xhci_is_async_ep(unsigned int ep_type
)
2287 return (ep_type
!= ISOC_OUT_EP
&& ep_type
!= INT_OUT_EP
&&
2288 ep_type
!= ISOC_IN_EP
&&
2289 ep_type
!= INT_IN_EP
);
2292 static bool xhci_is_sync_in_ep(unsigned int ep_type
)
2294 return (ep_type
== ISOC_IN_EP
|| ep_type
== INT_IN_EP
);
2297 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info
*ep_bw
)
2299 unsigned int mps
= DIV_ROUND_UP(ep_bw
->max_packet_size
, SS_BLOCK
);
2301 if (ep_bw
->ep_interval
== 0)
2302 return SS_OVERHEAD_BURST
+
2303 (ep_bw
->mult
* ep_bw
->num_packets
*
2304 (SS_OVERHEAD
+ mps
));
2305 return DIV_ROUND_UP(ep_bw
->mult
* ep_bw
->num_packets
*
2306 (SS_OVERHEAD
+ mps
+ SS_OVERHEAD_BURST
),
2307 1 << ep_bw
->ep_interval
);
2311 void xhci_drop_ep_from_interval_table(struct xhci_hcd
*xhci
,
2312 struct xhci_bw_info
*ep_bw
,
2313 struct xhci_interval_bw_table
*bw_table
,
2314 struct usb_device
*udev
,
2315 struct xhci_virt_ep
*virt_ep
,
2316 struct xhci_tt_bw_info
*tt_info
)
2318 struct xhci_interval_bw
*interval_bw
;
2319 int normalized_interval
;
2321 if (xhci_is_async_ep(ep_bw
->type
))
2324 if (udev
->speed
== USB_SPEED_SUPER
) {
2325 if (xhci_is_sync_in_ep(ep_bw
->type
))
2326 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
-=
2327 xhci_get_ss_bw_consumed(ep_bw
);
2329 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
-=
2330 xhci_get_ss_bw_consumed(ep_bw
);
2334 /* SuperSpeed endpoints never get added to intervals in the table, so
2335 * this check is only valid for HS/FS/LS devices.
2337 if (list_empty(&virt_ep
->bw_endpoint_list
))
2339 /* For LS/FS devices, we need to translate the interval expressed in
2340 * microframes to frames.
2342 if (udev
->speed
== USB_SPEED_HIGH
)
2343 normalized_interval
= ep_bw
->ep_interval
;
2345 normalized_interval
= ep_bw
->ep_interval
- 3;
2347 if (normalized_interval
== 0)
2348 bw_table
->interval0_esit_payload
-= ep_bw
->max_esit_payload
;
2349 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2350 interval_bw
->num_packets
-= ep_bw
->num_packets
;
2351 switch (udev
->speed
) {
2353 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] -= 1;
2355 case USB_SPEED_FULL
:
2356 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] -= 1;
2358 case USB_SPEED_HIGH
:
2359 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] -= 1;
2361 case USB_SPEED_SUPER
:
2362 case USB_SPEED_UNKNOWN
:
2363 case USB_SPEED_WIRELESS
:
2364 /* Should never happen because only LS/FS/HS endpoints will get
2365 * added to the endpoint list.
2370 tt_info
->active_eps
-= 1;
2371 list_del_init(&virt_ep
->bw_endpoint_list
);
2374 static void xhci_add_ep_to_interval_table(struct xhci_hcd
*xhci
,
2375 struct xhci_bw_info
*ep_bw
,
2376 struct xhci_interval_bw_table
*bw_table
,
2377 struct usb_device
*udev
,
2378 struct xhci_virt_ep
*virt_ep
,
2379 struct xhci_tt_bw_info
*tt_info
)
2381 struct xhci_interval_bw
*interval_bw
;
2382 struct xhci_virt_ep
*smaller_ep
;
2383 int normalized_interval
;
2385 if (xhci_is_async_ep(ep_bw
->type
))
2388 if (udev
->speed
== USB_SPEED_SUPER
) {
2389 if (xhci_is_sync_in_ep(ep_bw
->type
))
2390 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
+=
2391 xhci_get_ss_bw_consumed(ep_bw
);
2393 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
+=
2394 xhci_get_ss_bw_consumed(ep_bw
);
2398 /* For LS/FS devices, we need to translate the interval expressed in
2399 * microframes to frames.
2401 if (udev
->speed
== USB_SPEED_HIGH
)
2402 normalized_interval
= ep_bw
->ep_interval
;
2404 normalized_interval
= ep_bw
->ep_interval
- 3;
2406 if (normalized_interval
== 0)
2407 bw_table
->interval0_esit_payload
+= ep_bw
->max_esit_payload
;
2408 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2409 interval_bw
->num_packets
+= ep_bw
->num_packets
;
2410 switch (udev
->speed
) {
2412 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] += 1;
2414 case USB_SPEED_FULL
:
2415 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] += 1;
2417 case USB_SPEED_HIGH
:
2418 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] += 1;
2420 case USB_SPEED_SUPER
:
2421 case USB_SPEED_UNKNOWN
:
2422 case USB_SPEED_WIRELESS
:
2423 /* Should never happen because only LS/FS/HS endpoints will get
2424 * added to the endpoint list.
2430 tt_info
->active_eps
+= 1;
2431 /* Insert the endpoint into the list, largest max packet size first. */
2432 list_for_each_entry(smaller_ep
, &interval_bw
->endpoints
,
2434 if (ep_bw
->max_packet_size
>=
2435 smaller_ep
->bw_info
.max_packet_size
) {
2436 /* Add the new ep before the smaller endpoint */
2437 list_add_tail(&virt_ep
->bw_endpoint_list
,
2438 &smaller_ep
->bw_endpoint_list
);
2442 /* Add the new endpoint at the end of the list. */
2443 list_add_tail(&virt_ep
->bw_endpoint_list
,
2444 &interval_bw
->endpoints
);
2447 void xhci_update_tt_active_eps(struct xhci_hcd
*xhci
,
2448 struct xhci_virt_device
*virt_dev
,
2451 struct xhci_root_port_bw_info
*rh_bw_info
;
2452 if (!virt_dev
->tt_info
)
2455 rh_bw_info
= &xhci
->rh_bw
[virt_dev
->real_port
- 1];
2456 if (old_active_eps
== 0 &&
2457 virt_dev
->tt_info
->active_eps
!= 0) {
2458 rh_bw_info
->num_active_tts
+= 1;
2459 rh_bw_info
->bw_table
.bw_used
+= TT_HS_OVERHEAD
;
2460 } else if (old_active_eps
!= 0 &&
2461 virt_dev
->tt_info
->active_eps
== 0) {
2462 rh_bw_info
->num_active_tts
-= 1;
2463 rh_bw_info
->bw_table
.bw_used
-= TT_HS_OVERHEAD
;
2467 static int xhci_reserve_bandwidth(struct xhci_hcd
*xhci
,
2468 struct xhci_virt_device
*virt_dev
,
2469 struct xhci_container_ctx
*in_ctx
)
2471 struct xhci_bw_info ep_bw_info
[31];
2473 struct xhci_input_control_ctx
*ctrl_ctx
;
2474 int old_active_eps
= 0;
2476 if (virt_dev
->tt_info
)
2477 old_active_eps
= virt_dev
->tt_info
->active_eps
;
2479 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2481 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
2486 for (i
= 0; i
< 31; i
++) {
2487 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2490 /* Make a copy of the BW info in case we need to revert this */
2491 memcpy(&ep_bw_info
[i
], &virt_dev
->eps
[i
].bw_info
,
2492 sizeof(ep_bw_info
[i
]));
2493 /* Drop the endpoint from the interval table if the endpoint is
2494 * being dropped or changed.
2496 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2497 xhci_drop_ep_from_interval_table(xhci
,
2498 &virt_dev
->eps
[i
].bw_info
,
2504 /* Overwrite the information stored in the endpoints' bw_info */
2505 xhci_update_bw_info(xhci
, virt_dev
->in_ctx
, ctrl_ctx
, virt_dev
);
2506 for (i
= 0; i
< 31; i
++) {
2507 /* Add any changed or added endpoints to the interval table */
2508 if (EP_IS_ADDED(ctrl_ctx
, i
))
2509 xhci_add_ep_to_interval_table(xhci
,
2510 &virt_dev
->eps
[i
].bw_info
,
2517 if (!xhci_check_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2518 /* Ok, this fits in the bandwidth we have.
2519 * Update the number of active TTs.
2521 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
2525 /* We don't have enough bandwidth for this, revert the stored info. */
2526 for (i
= 0; i
< 31; i
++) {
2527 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2530 /* Drop the new copies of any added or changed endpoints from
2531 * the interval table.
2533 if (EP_IS_ADDED(ctrl_ctx
, i
)) {
2534 xhci_drop_ep_from_interval_table(xhci
,
2535 &virt_dev
->eps
[i
].bw_info
,
2541 /* Revert the endpoint back to its old information */
2542 memcpy(&virt_dev
->eps
[i
].bw_info
, &ep_bw_info
[i
],
2543 sizeof(ep_bw_info
[i
]));
2544 /* Add any changed or dropped endpoints back into the table */
2545 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2546 xhci_add_ep_to_interval_table(xhci
,
2547 &virt_dev
->eps
[i
].bw_info
,
2557 /* Issue a configure endpoint command or evaluate context command
2558 * and wait for it to finish.
2560 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
2561 struct usb_device
*udev
,
2562 struct xhci_command
*command
,
2563 bool ctx_change
, bool must_succeed
)
2567 unsigned long flags
;
2568 struct xhci_container_ctx
*in_ctx
;
2569 struct xhci_input_control_ctx
*ctrl_ctx
;
2570 struct completion
*cmd_completion
;
2572 struct xhci_virt_device
*virt_dev
;
2573 union xhci_trb
*cmd_trb
;
2575 spin_lock_irqsave(&xhci
->lock
, flags
);
2576 virt_dev
= xhci
->devs
[udev
->slot_id
];
2579 in_ctx
= command
->in_ctx
;
2581 in_ctx
= virt_dev
->in_ctx
;
2582 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2584 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2585 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
2590 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
) &&
2591 xhci_reserve_host_resources(xhci
, ctrl_ctx
)) {
2592 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2593 xhci_warn(xhci
, "Not enough host resources, "
2594 "active endpoint contexts = %u\n",
2595 xhci
->num_active_eps
);
2598 if ((xhci
->quirks
& XHCI_SW_BW_CHECKING
) &&
2599 xhci_reserve_bandwidth(xhci
, virt_dev
, in_ctx
)) {
2600 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2601 xhci_free_host_resources(xhci
, ctrl_ctx
);
2602 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2603 xhci_warn(xhci
, "Not enough bandwidth\n");
2608 cmd_completion
= command
->completion
;
2609 cmd_status
= &command
->status
;
2610 command
->command_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
2611 list_add_tail(&command
->cmd_list
, &virt_dev
->cmd_list
);
2613 cmd_completion
= &virt_dev
->cmd_completion
;
2614 cmd_status
= &virt_dev
->cmd_status
;
2616 init_completion(cmd_completion
);
2618 cmd_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
2620 ret
= xhci_queue_configure_endpoint(xhci
, in_ctx
->dma
,
2621 udev
->slot_id
, must_succeed
);
2623 ret
= xhci_queue_evaluate_context(xhci
, in_ctx
->dma
,
2624 udev
->slot_id
, must_succeed
);
2627 list_del(&command
->cmd_list
);
2628 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2629 xhci_free_host_resources(xhci
, ctrl_ctx
);
2630 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2631 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
2632 "FIXME allocate a new ring segment");
2635 xhci_ring_cmd_db(xhci
);
2636 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2638 /* Wait for the configure endpoint command to complete */
2639 timeleft
= wait_for_completion_interruptible_timeout(
2641 XHCI_CMD_DEFAULT_TIMEOUT
);
2642 if (timeleft
<= 0) {
2643 xhci_warn(xhci
, "%s while waiting for %s command\n",
2644 timeleft
== 0 ? "Timeout" : "Signal",
2646 "configure endpoint" :
2647 "evaluate context");
2648 /* cancel the configure endpoint command */
2649 ret
= xhci_cancel_cmd(xhci
, command
, cmd_trb
);
2656 ret
= xhci_configure_endpoint_result(xhci
, udev
, cmd_status
);
2658 ret
= xhci_evaluate_context_result(xhci
, udev
, cmd_status
);
2660 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
2661 spin_lock_irqsave(&xhci
->lock
, flags
);
2662 /* If the command failed, remove the reserved resources.
2663 * Otherwise, clean up the estimate to include dropped eps.
2666 xhci_free_host_resources(xhci
, ctrl_ctx
);
2668 xhci_finish_resource_reservation(xhci
, ctrl_ctx
);
2669 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2674 /* Called after one or more calls to xhci_add_endpoint() or
2675 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2676 * to call xhci_reset_bandwidth().
2678 * Since we are in the middle of changing either configuration or
2679 * installing a new alt setting, the USB core won't allow URBs to be
2680 * enqueued for any endpoint on the old config or interface. Nothing
2681 * else should be touching the xhci->devs[slot_id] structure, so we
2682 * don't need to take the xhci->lock for manipulating that.
2684 int xhci_check_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2688 struct xhci_hcd
*xhci
;
2689 struct xhci_virt_device
*virt_dev
;
2690 struct xhci_input_control_ctx
*ctrl_ctx
;
2691 struct xhci_slot_ctx
*slot_ctx
;
2693 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2696 xhci
= hcd_to_xhci(hcd
);
2697 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
2700 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2701 virt_dev
= xhci
->devs
[udev
->slot_id
];
2703 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2704 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
2706 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
2710 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2711 ctrl_ctx
->add_flags
&= cpu_to_le32(~EP0_FLAG
);
2712 ctrl_ctx
->drop_flags
&= cpu_to_le32(~(SLOT_FLAG
| EP0_FLAG
));
2714 /* Don't issue the command if there's no endpoints to update. */
2715 if (ctrl_ctx
->add_flags
== cpu_to_le32(SLOT_FLAG
) &&
2716 ctrl_ctx
->drop_flags
== 0)
2719 xhci_dbg(xhci
, "New Input Control Context:\n");
2720 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
2721 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
,
2722 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx
->dev_info
)));
2724 ret
= xhci_configure_endpoint(xhci
, udev
, NULL
,
2727 /* Callee should call reset_bandwidth() */
2731 xhci_dbg(xhci
, "Output context after successful config ep cmd:\n");
2732 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
,
2733 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx
->dev_info
)));
2735 /* Free any rings that were dropped, but not changed. */
2736 for (i
= 1; i
< 31; ++i
) {
2737 if ((le32_to_cpu(ctrl_ctx
->drop_flags
) & (1 << (i
+ 1))) &&
2738 !(le32_to_cpu(ctrl_ctx
->add_flags
) & (1 << (i
+ 1))))
2739 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
2741 xhci_zero_in_ctx(xhci
, virt_dev
);
2743 * Install any rings for completely new endpoints or changed endpoints,
2744 * and free or cache any old rings from changed endpoints.
2746 for (i
= 1; i
< 31; ++i
) {
2747 if (!virt_dev
->eps
[i
].new_ring
)
2749 /* Only cache or free the old ring if it exists.
2750 * It may not if this is the first add of an endpoint.
2752 if (virt_dev
->eps
[i
].ring
) {
2753 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
2755 virt_dev
->eps
[i
].ring
= virt_dev
->eps
[i
].new_ring
;
2756 virt_dev
->eps
[i
].new_ring
= NULL
;
2762 void xhci_reset_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2764 struct xhci_hcd
*xhci
;
2765 struct xhci_virt_device
*virt_dev
;
2768 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2771 xhci
= hcd_to_xhci(hcd
);
2773 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2774 virt_dev
= xhci
->devs
[udev
->slot_id
];
2775 /* Free any rings allocated for added endpoints */
2776 for (i
= 0; i
< 31; ++i
) {
2777 if (virt_dev
->eps
[i
].new_ring
) {
2778 xhci_ring_free(xhci
, virt_dev
->eps
[i
].new_ring
);
2779 virt_dev
->eps
[i
].new_ring
= NULL
;
2782 xhci_zero_in_ctx(xhci
, virt_dev
);
2785 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd
*xhci
,
2786 struct xhci_container_ctx
*in_ctx
,
2787 struct xhci_container_ctx
*out_ctx
,
2788 struct xhci_input_control_ctx
*ctrl_ctx
,
2789 u32 add_flags
, u32 drop_flags
)
2791 ctrl_ctx
->add_flags
= cpu_to_le32(add_flags
);
2792 ctrl_ctx
->drop_flags
= cpu_to_le32(drop_flags
);
2793 xhci_slot_copy(xhci
, in_ctx
, out_ctx
);
2794 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2796 xhci_dbg(xhci
, "Input Context:\n");
2797 xhci_dbg_ctx(xhci
, in_ctx
, xhci_last_valid_endpoint(add_flags
));
2800 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd
*xhci
,
2801 unsigned int slot_id
, unsigned int ep_index
,
2802 struct xhci_dequeue_state
*deq_state
)
2804 struct xhci_input_control_ctx
*ctrl_ctx
;
2805 struct xhci_container_ctx
*in_ctx
;
2806 struct xhci_ep_ctx
*ep_ctx
;
2810 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
2811 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2813 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
2818 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2819 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
2820 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
2821 addr
= xhci_trb_virt_to_dma(deq_state
->new_deq_seg
,
2822 deq_state
->new_deq_ptr
);
2824 xhci_warn(xhci
, "WARN Cannot submit config ep after "
2825 "reset ep command\n");
2826 xhci_warn(xhci
, "WARN deq seg = %p, deq ptr = %p\n",
2827 deq_state
->new_deq_seg
,
2828 deq_state
->new_deq_ptr
);
2831 ep_ctx
->deq
= cpu_to_le64(addr
| deq_state
->new_cycle_state
);
2833 added_ctxs
= xhci_get_endpoint_flag_from_index(ep_index
);
2834 xhci_setup_input_ctx_for_config_ep(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2835 xhci
->devs
[slot_id
]->out_ctx
, ctrl_ctx
,
2836 added_ctxs
, added_ctxs
);
2839 void xhci_cleanup_stalled_ring(struct xhci_hcd
*xhci
,
2840 struct usb_device
*udev
, unsigned int ep_index
)
2842 struct xhci_dequeue_state deq_state
;
2843 struct xhci_virt_ep
*ep
;
2845 xhci_dbg_trace(xhci
, trace_xhci_dbg_reset_ep
,
2846 "Cleaning up stalled endpoint ring");
2847 ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
2848 /* We need to move the HW's dequeue pointer past this TD,
2849 * or it will attempt to resend it on the next doorbell ring.
2851 xhci_find_new_dequeue_state(xhci
, udev
->slot_id
,
2852 ep_index
, ep
->stopped_stream
, ep
->stopped_td
,
2855 /* HW with the reset endpoint quirk will use the saved dequeue state to
2856 * issue a configure endpoint command later.
2858 if (!(xhci
->quirks
& XHCI_RESET_EP_QUIRK
)) {
2859 xhci_dbg_trace(xhci
, trace_xhci_dbg_reset_ep
,
2860 "Queueing new dequeue state");
2861 xhci_queue_new_dequeue_state(xhci
, udev
->slot_id
,
2862 ep_index
, ep
->stopped_stream
, &deq_state
);
2864 /* Better hope no one uses the input context between now and the
2865 * reset endpoint completion!
2866 * XXX: No idea how this hardware will react when stream rings
2869 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2870 "Setting up input context for "
2871 "configure endpoint command");
2872 xhci_setup_input_ctx_for_quirk(xhci
, udev
->slot_id
,
2873 ep_index
, &deq_state
);
2877 /* Deal with stalled endpoints. The core should have sent the control message
2878 * to clear the halt condition. However, we need to make the xHCI hardware
2879 * reset its sequence number, since a device will expect a sequence number of
2880 * zero after the halt condition is cleared.
2881 * Context: in_interrupt
2883 void xhci_endpoint_reset(struct usb_hcd
*hcd
,
2884 struct usb_host_endpoint
*ep
)
2886 struct xhci_hcd
*xhci
;
2887 struct usb_device
*udev
;
2888 unsigned int ep_index
;
2889 unsigned long flags
;
2891 struct xhci_virt_ep
*virt_ep
;
2893 xhci
= hcd_to_xhci(hcd
);
2894 udev
= (struct usb_device
*) ep
->hcpriv
;
2895 /* Called with a root hub endpoint (or an endpoint that wasn't added
2896 * with xhci_add_endpoint()
2900 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
2901 virt_ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
2902 if (!virt_ep
->stopped_td
) {
2903 xhci_dbg_trace(xhci
, trace_xhci_dbg_reset_ep
,
2904 "Endpoint 0x%x not halted, refusing to reset.",
2905 ep
->desc
.bEndpointAddress
);
2908 if (usb_endpoint_xfer_control(&ep
->desc
)) {
2909 xhci_dbg_trace(xhci
, trace_xhci_dbg_reset_ep
,
2910 "Control endpoint stall already handled.");
2914 xhci_dbg_trace(xhci
, trace_xhci_dbg_reset_ep
,
2915 "Queueing reset endpoint command");
2916 spin_lock_irqsave(&xhci
->lock
, flags
);
2917 ret
= xhci_queue_reset_ep(xhci
, udev
->slot_id
, ep_index
);
2919 * Can't change the ring dequeue pointer until it's transitioned to the
2920 * stopped state, which is only upon a successful reset endpoint
2921 * command. Better hope that last command worked!
2924 xhci_cleanup_stalled_ring(xhci
, udev
, ep_index
);
2925 kfree(virt_ep
->stopped_td
);
2926 xhci_ring_cmd_db(xhci
);
2928 virt_ep
->stopped_td
= NULL
;
2929 virt_ep
->stopped_trb
= NULL
;
2930 virt_ep
->stopped_stream
= 0;
2931 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2934 xhci_warn(xhci
, "FIXME allocate a new ring segment\n");
2937 static int xhci_check_streams_endpoint(struct xhci_hcd
*xhci
,
2938 struct usb_device
*udev
, struct usb_host_endpoint
*ep
,
2939 unsigned int slot_id
)
2942 unsigned int ep_index
;
2943 unsigned int ep_state
;
2947 ret
= xhci_check_args(xhci_to_hcd(xhci
), udev
, ep
, 1, true, __func__
);
2950 if (ep
->ss_ep_comp
.bmAttributes
== 0) {
2951 xhci_warn(xhci
, "WARN: SuperSpeed Endpoint Companion"
2952 " descriptor for ep 0x%x does not support streams\n",
2953 ep
->desc
.bEndpointAddress
);
2957 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
2958 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
2959 if (ep_state
& EP_HAS_STREAMS
||
2960 ep_state
& EP_GETTING_STREAMS
) {
2961 xhci_warn(xhci
, "WARN: SuperSpeed bulk endpoint 0x%x "
2962 "already has streams set up.\n",
2963 ep
->desc
.bEndpointAddress
);
2964 xhci_warn(xhci
, "Send email to xHCI maintainer and ask for "
2965 "dynamic stream context array reallocation.\n");
2968 if (!list_empty(&xhci
->devs
[slot_id
]->eps
[ep_index
].ring
->td_list
)) {
2969 xhci_warn(xhci
, "Cannot setup streams for SuperSpeed bulk "
2970 "endpoint 0x%x; URBs are pending.\n",
2971 ep
->desc
.bEndpointAddress
);
2977 static void xhci_calculate_streams_entries(struct xhci_hcd
*xhci
,
2978 unsigned int *num_streams
, unsigned int *num_stream_ctxs
)
2980 unsigned int max_streams
;
2982 /* The stream context array size must be a power of two */
2983 *num_stream_ctxs
= roundup_pow_of_two(*num_streams
);
2985 * Find out how many primary stream array entries the host controller
2986 * supports. Later we may use secondary stream arrays (similar to 2nd
2987 * level page entries), but that's an optional feature for xHCI host
2988 * controllers. xHCs must support at least 4 stream IDs.
2990 max_streams
= HCC_MAX_PSA(xhci
->hcc_params
);
2991 if (*num_stream_ctxs
> max_streams
) {
2992 xhci_dbg(xhci
, "xHCI HW only supports %u stream ctx entries.\n",
2994 *num_stream_ctxs
= max_streams
;
2995 *num_streams
= max_streams
;
2999 /* Returns an error code if one of the endpoint already has streams.
3000 * This does not change any data structures, it only checks and gathers
3003 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd
*xhci
,
3004 struct usb_device
*udev
,
3005 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3006 unsigned int *num_streams
, u32
*changed_ep_bitmask
)
3008 unsigned int max_streams
;
3009 unsigned int endpoint_flag
;
3013 for (i
= 0; i
< num_eps
; i
++) {
3014 ret
= xhci_check_streams_endpoint(xhci
, udev
,
3015 eps
[i
], udev
->slot_id
);
3019 max_streams
= usb_ss_max_streams(&eps
[i
]->ss_ep_comp
);
3020 if (max_streams
< (*num_streams
- 1)) {
3021 xhci_dbg(xhci
, "Ep 0x%x only supports %u stream IDs.\n",
3022 eps
[i
]->desc
.bEndpointAddress
,
3024 *num_streams
= max_streams
+1;
3027 endpoint_flag
= xhci_get_endpoint_flag(&eps
[i
]->desc
);
3028 if (*changed_ep_bitmask
& endpoint_flag
)
3030 *changed_ep_bitmask
|= endpoint_flag
;
3035 static u32
xhci_calculate_no_streams_bitmask(struct xhci_hcd
*xhci
,
3036 struct usb_device
*udev
,
3037 struct usb_host_endpoint
**eps
, unsigned int num_eps
)
3039 u32 changed_ep_bitmask
= 0;
3040 unsigned int slot_id
;
3041 unsigned int ep_index
;
3042 unsigned int ep_state
;
3045 slot_id
= udev
->slot_id
;
3046 if (!xhci
->devs
[slot_id
])
3049 for (i
= 0; i
< num_eps
; i
++) {
3050 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3051 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
3052 /* Are streams already being freed for the endpoint? */
3053 if (ep_state
& EP_GETTING_NO_STREAMS
) {
3054 xhci_warn(xhci
, "WARN Can't disable streams for "
3056 "streams are being disabled already\n",
3057 eps
[i
]->desc
.bEndpointAddress
);
3060 /* Are there actually any streams to free? */
3061 if (!(ep_state
& EP_HAS_STREAMS
) &&
3062 !(ep_state
& EP_GETTING_STREAMS
)) {
3063 xhci_warn(xhci
, "WARN Can't disable streams for "
3065 "streams are already disabled!\n",
3066 eps
[i
]->desc
.bEndpointAddress
);
3067 xhci_warn(xhci
, "WARN xhci_free_streams() called "
3068 "with non-streams endpoint\n");
3071 changed_ep_bitmask
|= xhci_get_endpoint_flag(&eps
[i
]->desc
);
3073 return changed_ep_bitmask
;
3077 * The USB device drivers use this function (though the HCD interface in USB
3078 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3079 * coordinate mass storage command queueing across multiple endpoints (basically
3080 * a stream ID == a task ID).
3082 * Setting up streams involves allocating the same size stream context array
3083 * for each endpoint and issuing a configure endpoint command for all endpoints.
3085 * Don't allow the call to succeed if one endpoint only supports one stream
3086 * (which means it doesn't support streams at all).
3088 * Drivers may get less stream IDs than they asked for, if the host controller
3089 * hardware or endpoints claim they can't support the number of requested
3092 int xhci_alloc_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3093 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3094 unsigned int num_streams
, gfp_t mem_flags
)
3097 struct xhci_hcd
*xhci
;
3098 struct xhci_virt_device
*vdev
;
3099 struct xhci_command
*config_cmd
;
3100 struct xhci_input_control_ctx
*ctrl_ctx
;
3101 unsigned int ep_index
;
3102 unsigned int num_stream_ctxs
;
3103 unsigned long flags
;
3104 u32 changed_ep_bitmask
= 0;
3109 /* Add one to the number of streams requested to account for
3110 * stream 0 that is reserved for xHCI usage.
3113 xhci
= hcd_to_xhci(hcd
);
3114 xhci_dbg(xhci
, "Driver wants %u stream IDs (including stream 0).\n",
3117 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
3119 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
3122 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, config_cmd
->in_ctx
);
3124 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
3126 xhci_free_command(xhci
, config_cmd
);
3130 /* Check to make sure all endpoints are not already configured for
3131 * streams. While we're at it, find the maximum number of streams that
3132 * all the endpoints will support and check for duplicate endpoints.
3134 spin_lock_irqsave(&xhci
->lock
, flags
);
3135 ret
= xhci_calculate_streams_and_bitmask(xhci
, udev
, eps
,
3136 num_eps
, &num_streams
, &changed_ep_bitmask
);
3138 xhci_free_command(xhci
, config_cmd
);
3139 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3142 if (num_streams
<= 1) {
3143 xhci_warn(xhci
, "WARN: endpoints can't handle "
3144 "more than one stream.\n");
3145 xhci_free_command(xhci
, config_cmd
);
3146 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3149 vdev
= xhci
->devs
[udev
->slot_id
];
3150 /* Mark each endpoint as being in transition, so
3151 * xhci_urb_enqueue() will reject all URBs.
3153 for (i
= 0; i
< num_eps
; i
++) {
3154 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3155 vdev
->eps
[ep_index
].ep_state
|= EP_GETTING_STREAMS
;
3157 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3159 /* Setup internal data structures and allocate HW data structures for
3160 * streams (but don't install the HW structures in the input context
3161 * until we're sure all memory allocation succeeded).
3163 xhci_calculate_streams_entries(xhci
, &num_streams
, &num_stream_ctxs
);
3164 xhci_dbg(xhci
, "Need %u stream ctx entries for %u stream IDs.\n",
3165 num_stream_ctxs
, num_streams
);
3167 for (i
= 0; i
< num_eps
; i
++) {
3168 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3169 vdev
->eps
[ep_index
].stream_info
= xhci_alloc_stream_info(xhci
,
3171 num_streams
, mem_flags
);
3172 if (!vdev
->eps
[ep_index
].stream_info
)
3174 /* Set maxPstreams in endpoint context and update deq ptr to
3175 * point to stream context array. FIXME
3179 /* Set up the input context for a configure endpoint command. */
3180 for (i
= 0; i
< num_eps
; i
++) {
3181 struct xhci_ep_ctx
*ep_ctx
;
3183 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3184 ep_ctx
= xhci_get_ep_ctx(xhci
, config_cmd
->in_ctx
, ep_index
);
3186 xhci_endpoint_copy(xhci
, config_cmd
->in_ctx
,
3187 vdev
->out_ctx
, ep_index
);
3188 xhci_setup_streams_ep_input_ctx(xhci
, ep_ctx
,
3189 vdev
->eps
[ep_index
].stream_info
);
3191 /* Tell the HW to drop its old copy of the endpoint context info
3192 * and add the updated copy from the input context.
3194 xhci_setup_input_ctx_for_config_ep(xhci
, config_cmd
->in_ctx
,
3195 vdev
->out_ctx
, ctrl_ctx
,
3196 changed_ep_bitmask
, changed_ep_bitmask
);
3198 /* Issue and wait for the configure endpoint command */
3199 ret
= xhci_configure_endpoint(xhci
, udev
, config_cmd
,
3202 /* xHC rejected the configure endpoint command for some reason, so we
3203 * leave the old ring intact and free our internal streams data
3209 spin_lock_irqsave(&xhci
->lock
, flags
);
3210 for (i
= 0; i
< num_eps
; i
++) {
3211 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3212 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3213 xhci_dbg(xhci
, "Slot %u ep ctx %u now has streams.\n",
3214 udev
->slot_id
, ep_index
);
3215 vdev
->eps
[ep_index
].ep_state
|= EP_HAS_STREAMS
;
3217 xhci_free_command(xhci
, config_cmd
);
3218 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3220 /* Subtract 1 for stream 0, which drivers can't use */
3221 return num_streams
- 1;
3224 /* If it didn't work, free the streams! */
3225 for (i
= 0; i
< num_eps
; i
++) {
3226 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3227 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3228 vdev
->eps
[ep_index
].stream_info
= NULL
;
3229 /* FIXME Unset maxPstreams in endpoint context and
3230 * update deq ptr to point to normal string ring.
3232 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3233 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3234 xhci_endpoint_zero(xhci
, vdev
, eps
[i
]);
3236 xhci_free_command(xhci
, config_cmd
);
3240 /* Transition the endpoint from using streams to being a "normal" endpoint
3243 * Modify the endpoint context state, submit a configure endpoint command,
3244 * and free all endpoint rings for streams if that completes successfully.
3246 int xhci_free_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3247 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3251 struct xhci_hcd
*xhci
;
3252 struct xhci_virt_device
*vdev
;
3253 struct xhci_command
*command
;
3254 struct xhci_input_control_ctx
*ctrl_ctx
;
3255 unsigned int ep_index
;
3256 unsigned long flags
;
3257 u32 changed_ep_bitmask
;
3259 xhci
= hcd_to_xhci(hcd
);
3260 vdev
= xhci
->devs
[udev
->slot_id
];
3262 /* Set up a configure endpoint command to remove the streams rings */
3263 spin_lock_irqsave(&xhci
->lock
, flags
);
3264 changed_ep_bitmask
= xhci_calculate_no_streams_bitmask(xhci
,
3265 udev
, eps
, num_eps
);
3266 if (changed_ep_bitmask
== 0) {
3267 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3271 /* Use the xhci_command structure from the first endpoint. We may have
3272 * allocated too many, but the driver may call xhci_free_streams() for
3273 * each endpoint it grouped into one call to xhci_alloc_streams().
3275 ep_index
= xhci_get_endpoint_index(&eps
[0]->desc
);
3276 command
= vdev
->eps
[ep_index
].stream_info
->free_streams_command
;
3277 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, command
->in_ctx
);
3279 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3280 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
3285 for (i
= 0; i
< num_eps
; i
++) {
3286 struct xhci_ep_ctx
*ep_ctx
;
3288 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3289 ep_ctx
= xhci_get_ep_ctx(xhci
, command
->in_ctx
, ep_index
);
3290 xhci
->devs
[udev
->slot_id
]->eps
[ep_index
].ep_state
|=
3291 EP_GETTING_NO_STREAMS
;
3293 xhci_endpoint_copy(xhci
, command
->in_ctx
,
3294 vdev
->out_ctx
, ep_index
);
3295 xhci_setup_no_streams_ep_input_ctx(xhci
, ep_ctx
,
3296 &vdev
->eps
[ep_index
]);
3298 xhci_setup_input_ctx_for_config_ep(xhci
, command
->in_ctx
,
3299 vdev
->out_ctx
, ctrl_ctx
,
3300 changed_ep_bitmask
, changed_ep_bitmask
);
3301 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3303 /* Issue and wait for the configure endpoint command,
3304 * which must succeed.
3306 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
3309 /* xHC rejected the configure endpoint command for some reason, so we
3310 * leave the streams rings intact.
3315 spin_lock_irqsave(&xhci
->lock
, flags
);
3316 for (i
= 0; i
< num_eps
; i
++) {
3317 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3318 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3319 vdev
->eps
[ep_index
].stream_info
= NULL
;
3320 /* FIXME Unset maxPstreams in endpoint context and
3321 * update deq ptr to point to normal string ring.
3323 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_NO_STREAMS
;
3324 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3326 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3332 * Deletes endpoint resources for endpoints that were active before a Reset
3333 * Device command, or a Disable Slot command. The Reset Device command leaves
3334 * the control endpoint intact, whereas the Disable Slot command deletes it.
3336 * Must be called with xhci->lock held.
3338 void xhci_free_device_endpoint_resources(struct xhci_hcd
*xhci
,
3339 struct xhci_virt_device
*virt_dev
, bool drop_control_ep
)
3342 unsigned int num_dropped_eps
= 0;
3343 unsigned int drop_flags
= 0;
3345 for (i
= (drop_control_ep
? 0 : 1); i
< 31; i
++) {
3346 if (virt_dev
->eps
[i
].ring
) {
3347 drop_flags
|= 1 << i
;
3351 xhci
->num_active_eps
-= num_dropped_eps
;
3352 if (num_dropped_eps
)
3353 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
3354 "Dropped %u ep ctxs, flags = 0x%x, "
3356 num_dropped_eps
, drop_flags
,
3357 xhci
->num_active_eps
);
3361 * This submits a Reset Device Command, which will set the device state to 0,
3362 * set the device address to 0, and disable all the endpoints except the default
3363 * control endpoint. The USB core should come back and call
3364 * xhci_address_device(), and then re-set up the configuration. If this is
3365 * called because of a usb_reset_and_verify_device(), then the old alternate
3366 * settings will be re-installed through the normal bandwidth allocation
3369 * Wait for the Reset Device command to finish. Remove all structures
3370 * associated with the endpoints that were disabled. Clear the input device
3371 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3373 * If the virt_dev to be reset does not exist or does not match the udev,
3374 * it means the device is lost, possibly due to the xHC restore error and
3375 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3376 * re-allocate the device.
3378 int xhci_discover_or_reset_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3381 unsigned long flags
;
3382 struct xhci_hcd
*xhci
;
3383 unsigned int slot_id
;
3384 struct xhci_virt_device
*virt_dev
;
3385 struct xhci_command
*reset_device_cmd
;
3387 int last_freed_endpoint
;
3388 struct xhci_slot_ctx
*slot_ctx
;
3389 int old_active_eps
= 0;
3391 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, false, __func__
);
3394 xhci
= hcd_to_xhci(hcd
);
3395 slot_id
= udev
->slot_id
;
3396 virt_dev
= xhci
->devs
[slot_id
];
3398 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3399 "not exist. Re-allocate the device\n", slot_id
);
3400 ret
= xhci_alloc_dev(hcd
, udev
);
3407 if (virt_dev
->udev
!= udev
) {
3408 /* If the virt_dev and the udev does not match, this virt_dev
3409 * may belong to another udev.
3410 * Re-allocate the device.
3412 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3413 "not match the udev. Re-allocate the device\n",
3415 ret
= xhci_alloc_dev(hcd
, udev
);
3422 /* If device is not setup, there is no point in resetting it */
3423 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3424 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx
->dev_state
)) ==
3425 SLOT_STATE_DISABLED
)
3428 xhci_dbg(xhci
, "Resetting device with slot ID %u\n", slot_id
);
3429 /* Allocate the command structure that holds the struct completion.
3430 * Assume we're in process context, since the normal device reset
3431 * process has to wait for the device anyway. Storage devices are
3432 * reset as part of error handling, so use GFP_NOIO instead of
3435 reset_device_cmd
= xhci_alloc_command(xhci
, false, true, GFP_NOIO
);
3436 if (!reset_device_cmd
) {
3437 xhci_dbg(xhci
, "Couldn't allocate command structure.\n");
3441 /* Attempt to submit the Reset Device command to the command ring */
3442 spin_lock_irqsave(&xhci
->lock
, flags
);
3443 reset_device_cmd
->command_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
3445 list_add_tail(&reset_device_cmd
->cmd_list
, &virt_dev
->cmd_list
);
3446 ret
= xhci_queue_reset_device(xhci
, slot_id
);
3448 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3449 list_del(&reset_device_cmd
->cmd_list
);
3450 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3451 goto command_cleanup
;
3453 xhci_ring_cmd_db(xhci
);
3454 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3456 /* Wait for the Reset Device command to finish */
3457 timeleft
= wait_for_completion_interruptible_timeout(
3458 reset_device_cmd
->completion
,
3459 XHCI_CMD_DEFAULT_TIMEOUT
);
3460 if (timeleft
<= 0) {
3461 xhci_warn(xhci
, "%s while waiting for reset device command\n",
3462 timeleft
== 0 ? "Timeout" : "Signal");
3463 spin_lock_irqsave(&xhci
->lock
, flags
);
3464 /* The timeout might have raced with the event ring handler, so
3465 * only delete from the list if the item isn't poisoned.
3467 if (reset_device_cmd
->cmd_list
.next
!= LIST_POISON1
)
3468 list_del(&reset_device_cmd
->cmd_list
);
3469 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3471 goto command_cleanup
;
3474 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3475 * unless we tried to reset a slot ID that wasn't enabled,
3476 * or the device wasn't in the addressed or configured state.
3478 ret
= reset_device_cmd
->status
;
3480 case COMP_EBADSLT
: /* 0.95 completion code for bad slot ID */
3481 case COMP_CTX_STATE
: /* 0.96 completion code for same thing */
3482 xhci_dbg(xhci
, "Can't reset device (slot ID %u) in %s state\n",
3484 xhci_get_slot_state(xhci
, virt_dev
->out_ctx
));
3485 xhci_dbg(xhci
, "Not freeing device rings.\n");
3486 /* Don't treat this as an error. May change my mind later. */
3488 goto command_cleanup
;
3490 xhci_dbg(xhci
, "Successful reset device command.\n");
3493 if (xhci_is_vendor_info_code(xhci
, ret
))
3495 xhci_warn(xhci
, "Unknown completion code %u for "
3496 "reset device command.\n", ret
);
3498 goto command_cleanup
;
3501 /* Free up host controller endpoint resources */
3502 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3503 spin_lock_irqsave(&xhci
->lock
, flags
);
3504 /* Don't delete the default control endpoint resources */
3505 xhci_free_device_endpoint_resources(xhci
, virt_dev
, false);
3506 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3509 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3510 last_freed_endpoint
= 1;
3511 for (i
= 1; i
< 31; ++i
) {
3512 struct xhci_virt_ep
*ep
= &virt_dev
->eps
[i
];
3514 if (ep
->ep_state
& EP_HAS_STREAMS
) {
3515 xhci_free_stream_info(xhci
, ep
->stream_info
);
3516 ep
->stream_info
= NULL
;
3517 ep
->ep_state
&= ~EP_HAS_STREAMS
;
3521 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
3522 last_freed_endpoint
= i
;
3524 if (!list_empty(&virt_dev
->eps
[i
].bw_endpoint_list
))
3525 xhci_drop_ep_from_interval_table(xhci
,
3526 &virt_dev
->eps
[i
].bw_info
,
3531 xhci_clear_endpoint_bw_info(&virt_dev
->eps
[i
].bw_info
);
3533 /* If necessary, update the number of active TTs on this root port */
3534 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
3536 xhci_dbg(xhci
, "Output context after successful reset device cmd:\n");
3537 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, last_freed_endpoint
);
3541 xhci_free_command(xhci
, reset_device_cmd
);
3546 * At this point, the struct usb_device is about to go away, the device has
3547 * disconnected, and all traffic has been stopped and the endpoints have been
3548 * disabled. Free any HC data structures associated with that device.
3550 void xhci_free_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3552 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3553 struct xhci_virt_device
*virt_dev
;
3554 unsigned long flags
;
3558 #ifndef CONFIG_USB_DEFAULT_PERSIST
3560 * We called pm_runtime_get_noresume when the device was attached.
3561 * Decrement the counter here to allow controller to runtime suspend
3562 * if no devices remain.
3564 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
3565 pm_runtime_put_noidle(hcd
->self
.controller
);
3568 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
3569 /* If the host is halted due to driver unload, we still need to free the
3572 if (ret
<= 0 && ret
!= -ENODEV
)
3575 virt_dev
= xhci
->devs
[udev
->slot_id
];
3577 /* Stop any wayward timer functions (which may grab the lock) */
3578 for (i
= 0; i
< 31; ++i
) {
3579 virt_dev
->eps
[i
].ep_state
&= ~EP_HALT_PENDING
;
3580 del_timer_sync(&virt_dev
->eps
[i
].stop_cmd_timer
);
3583 spin_lock_irqsave(&xhci
->lock
, flags
);
3584 /* Don't disable the slot if the host controller is dead. */
3585 state
= readl(&xhci
->op_regs
->status
);
3586 if (state
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
) ||
3587 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
3588 xhci_free_virt_device(xhci
, udev
->slot_id
);
3589 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3593 if (xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
)) {
3594 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3595 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3598 xhci_ring_cmd_db(xhci
);
3599 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3601 * Event command completion handler will free any data structures
3602 * associated with the slot. XXX Can free sleep?
3607 * Checks if we have enough host controller resources for the default control
3610 * Must be called with xhci->lock held.
3612 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd
*xhci
)
3614 if (xhci
->num_active_eps
+ 1 > xhci
->limit_active_eps
) {
3615 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
3616 "Not enough ep ctxs: "
3617 "%u active, need to add 1, limit is %u.",
3618 xhci
->num_active_eps
, xhci
->limit_active_eps
);
3621 xhci
->num_active_eps
+= 1;
3622 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
3623 "Adding 1 ep ctx, %u now active.",
3624 xhci
->num_active_eps
);
3630 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3631 * timed out, or allocating memory failed. Returns 1 on success.
3633 int xhci_alloc_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3635 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3636 unsigned long flags
;
3639 union xhci_trb
*cmd_trb
;
3641 spin_lock_irqsave(&xhci
->lock
, flags
);
3642 cmd_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
3643 ret
= xhci_queue_slot_control(xhci
, TRB_ENABLE_SLOT
, 0);
3645 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3646 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3649 xhci_ring_cmd_db(xhci
);
3650 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3652 /* XXX: how much time for xHC slot assignment? */
3653 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
3654 XHCI_CMD_DEFAULT_TIMEOUT
);
3655 if (timeleft
<= 0) {
3656 xhci_warn(xhci
, "%s while waiting for a slot\n",
3657 timeleft
== 0 ? "Timeout" : "Signal");
3658 /* cancel the enable slot request */
3659 return xhci_cancel_cmd(xhci
, NULL
, cmd_trb
);
3662 if (!xhci
->slot_id
) {
3663 xhci_err(xhci
, "Error while assigning device slot ID\n");
3667 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3668 spin_lock_irqsave(&xhci
->lock
, flags
);
3669 ret
= xhci_reserve_host_control_ep_resources(xhci
);
3671 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3672 xhci_warn(xhci
, "Not enough host resources, "
3673 "active endpoint contexts = %u\n",
3674 xhci
->num_active_eps
);
3677 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3679 /* Use GFP_NOIO, since this function can be called from
3680 * xhci_discover_or_reset_device(), which may be called as part of
3681 * mass storage driver error handling.
3683 if (!xhci_alloc_virt_device(xhci
, xhci
->slot_id
, udev
, GFP_NOIO
)) {
3684 xhci_warn(xhci
, "Could not allocate xHCI USB device data structures\n");
3687 udev
->slot_id
= xhci
->slot_id
;
3689 #ifndef CONFIG_USB_DEFAULT_PERSIST
3691 * If resetting upon resume, we can't put the controller into runtime
3692 * suspend if there is a device attached.
3694 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
3695 pm_runtime_get_noresume(hcd
->self
.controller
);
3698 /* Is this a LS or FS device under a HS hub? */
3699 /* Hub or peripherial? */
3703 /* Disable slot, if we can do it without mem alloc */
3704 spin_lock_irqsave(&xhci
->lock
, flags
);
3705 if (!xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
))
3706 xhci_ring_cmd_db(xhci
);
3707 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3712 * Issue an Address Device command (which will issue a SetAddress request to
3714 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3715 * we should only issue and wait on one address command at the same time.
3717 int xhci_address_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3719 unsigned long flags
;
3721 struct xhci_virt_device
*virt_dev
;
3723 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3724 struct xhci_slot_ctx
*slot_ctx
;
3725 struct xhci_input_control_ctx
*ctrl_ctx
;
3727 union xhci_trb
*cmd_trb
;
3729 if (!udev
->slot_id
) {
3730 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3731 "Bad Slot ID %d", udev
->slot_id
);
3735 virt_dev
= xhci
->devs
[udev
->slot_id
];
3737 if (WARN_ON(!virt_dev
)) {
3739 * In plug/unplug torture test with an NEC controller,
3740 * a zero-dereference was observed once due to virt_dev = 0.
3741 * Print useful debug rather than crash if it is observed again!
3743 xhci_warn(xhci
, "Virt dev invalid for slot_id 0x%x!\n",
3748 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
3749 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
3751 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
3756 * If this is the first Set Address since device plug-in or
3757 * virt_device realloaction after a resume with an xHCI power loss,
3758 * then set up the slot context.
3760 if (!slot_ctx
->dev_info
)
3761 xhci_setup_addressable_virt_dev(xhci
, udev
);
3762 /* Otherwise, update the control endpoint ring enqueue pointer. */
3764 xhci_copy_ep0_dequeue_into_input_ctx(xhci
, udev
);
3765 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
| EP0_FLAG
);
3766 ctrl_ctx
->drop_flags
= 0;
3768 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
3769 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
3770 trace_xhci_address_ctx(xhci
, virt_dev
->in_ctx
,
3771 le32_to_cpu(slot_ctx
->dev_info
) >> 27);
3773 spin_lock_irqsave(&xhci
->lock
, flags
);
3774 cmd_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
3775 ret
= xhci_queue_address_device(xhci
, virt_dev
->in_ctx
->dma
,
3778 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3779 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3780 "FIXME: allocate a command ring segment");
3783 xhci_ring_cmd_db(xhci
);
3784 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3786 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3787 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
3788 XHCI_CMD_DEFAULT_TIMEOUT
);
3789 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3790 * the SetAddress() "recovery interval" required by USB and aborting the
3791 * command on a timeout.
3793 if (timeleft
<= 0) {
3794 xhci_warn(xhci
, "%s while waiting for address device command\n",
3795 timeleft
== 0 ? "Timeout" : "Signal");
3796 /* cancel the address device command */
3797 ret
= xhci_cancel_cmd(xhci
, NULL
, cmd_trb
);
3803 switch (virt_dev
->cmd_status
) {
3804 case COMP_CTX_STATE
:
3806 xhci_err(xhci
, "Setup ERROR: address device command for slot %d.\n",
3811 dev_warn(&udev
->dev
, "Device not responding to set address.\n");
3815 dev_warn(&udev
->dev
, "ERROR: Incompatible device for address "
3816 "device command.\n");
3820 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3821 "Successful Address Device command");
3824 xhci_err(xhci
, "ERROR: unexpected command completion "
3825 "code 0x%x.\n", virt_dev
->cmd_status
);
3826 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
3827 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
3828 trace_xhci_address_ctx(xhci
, virt_dev
->out_ctx
, 1);
3835 temp_64
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
3836 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3837 "Op regs DCBAA ptr = %#016llx", temp_64
);
3838 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3839 "Slot ID %d dcbaa entry @%p = %#016llx",
3841 &xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
],
3842 (unsigned long long)
3843 le64_to_cpu(xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
]));
3844 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3845 "Output Context DMA address = %#08llx",
3846 (unsigned long long)virt_dev
->out_ctx
->dma
);
3847 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
3848 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
3849 trace_xhci_address_ctx(xhci
, virt_dev
->in_ctx
,
3850 le32_to_cpu(slot_ctx
->dev_info
) >> 27);
3851 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
3852 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
3854 * USB core uses address 1 for the roothubs, so we add one to the
3855 * address given back to us by the HC.
3857 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3858 trace_xhci_address_ctx(xhci
, virt_dev
->out_ctx
,
3859 le32_to_cpu(slot_ctx
->dev_info
) >> 27);
3860 /* Zero the input context control for later use */
3861 ctrl_ctx
->add_flags
= 0;
3862 ctrl_ctx
->drop_flags
= 0;
3864 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3865 "Internal device address = %d",
3866 le32_to_cpu(slot_ctx
->dev_state
) & DEV_ADDR_MASK
);
3872 * Transfer the port index into real index in the HW port status
3873 * registers. Caculate offset between the port's PORTSC register
3874 * and port status base. Divide the number of per port register
3875 * to get the real index. The raw port number bases 1.
3877 int xhci_find_raw_port_number(struct usb_hcd
*hcd
, int port1
)
3879 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3880 __le32 __iomem
*base_addr
= &xhci
->op_regs
->port_status_base
;
3881 __le32 __iomem
*addr
;
3884 if (hcd
->speed
!= HCD_USB3
)
3885 addr
= xhci
->usb2_ports
[port1
- 1];
3887 addr
= xhci
->usb3_ports
[port1
- 1];
3889 raw_port
= (addr
- base_addr
)/NUM_PORT_REGS
+ 1;
3894 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3895 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
3897 static int __maybe_unused
xhci_change_max_exit_latency(struct xhci_hcd
*xhci
,
3898 struct usb_device
*udev
, u16 max_exit_latency
)
3900 struct xhci_virt_device
*virt_dev
;
3901 struct xhci_command
*command
;
3902 struct xhci_input_control_ctx
*ctrl_ctx
;
3903 struct xhci_slot_ctx
*slot_ctx
;
3904 unsigned long flags
;
3907 spin_lock_irqsave(&xhci
->lock
, flags
);
3908 if (max_exit_latency
== xhci
->devs
[udev
->slot_id
]->current_mel
) {
3909 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3913 /* Attempt to issue an Evaluate Context command to change the MEL. */
3914 virt_dev
= xhci
->devs
[udev
->slot_id
];
3915 command
= xhci
->lpm_command
;
3916 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, command
->in_ctx
);
3918 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3919 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
3924 xhci_slot_copy(xhci
, command
->in_ctx
, virt_dev
->out_ctx
);
3925 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3927 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
3928 slot_ctx
= xhci_get_slot_ctx(xhci
, command
->in_ctx
);
3929 slot_ctx
->dev_info2
&= cpu_to_le32(~((u32
) MAX_EXIT
));
3930 slot_ctx
->dev_info2
|= cpu_to_le32(max_exit_latency
);
3932 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
3933 "Set up evaluate context for LPM MEL change.");
3934 xhci_dbg(xhci
, "Slot %u Input Context:\n", udev
->slot_id
);
3935 xhci_dbg_ctx(xhci
, command
->in_ctx
, 0);
3937 /* Issue and wait for the evaluate context command. */
3938 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
3940 xhci_dbg(xhci
, "Slot %u Output Context:\n", udev
->slot_id
);
3941 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 0);
3944 spin_lock_irqsave(&xhci
->lock
, flags
);
3945 virt_dev
->current_mel
= max_exit_latency
;
3946 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3951 #ifdef CONFIG_PM_RUNTIME
3953 /* BESL to HIRD Encoding array for USB2 LPM */
3954 static int xhci_besl_encoding
[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3955 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3957 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3958 static int xhci_calculate_hird_besl(struct xhci_hcd
*xhci
,
3959 struct usb_device
*udev
)
3961 int u2del
, besl
, besl_host
;
3962 int besl_device
= 0;
3965 u2del
= HCS_U2_LATENCY(xhci
->hcs_params3
);
3966 field
= le32_to_cpu(udev
->bos
->ext_cap
->bmAttributes
);
3968 if (field
& USB_BESL_SUPPORT
) {
3969 for (besl_host
= 0; besl_host
< 16; besl_host
++) {
3970 if (xhci_besl_encoding
[besl_host
] >= u2del
)
3973 /* Use baseline BESL value as default */
3974 if (field
& USB_BESL_BASELINE_VALID
)
3975 besl_device
= USB_GET_BESL_BASELINE(field
);
3976 else if (field
& USB_BESL_DEEP_VALID
)
3977 besl_device
= USB_GET_BESL_DEEP(field
);
3982 besl_host
= (u2del
- 51) / 75 + 1;
3985 besl
= besl_host
+ besl_device
;
3992 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
3993 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device
*udev
)
4000 field
= le32_to_cpu(udev
->bos
->ext_cap
->bmAttributes
);
4002 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
4003 l1
= udev
->l1_params
.timeout
/ 256;
4005 /* device has preferred BESLD */
4006 if (field
& USB_BESL_DEEP_VALID
) {
4007 besld
= USB_GET_BESL_DEEP(field
);
4011 return PORT_BESLD(besld
) | PORT_L1_TIMEOUT(l1
) | PORT_HIRDM(hirdm
);
4014 int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
4015 struct usb_device
*udev
, int enable
)
4017 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4018 __le32 __iomem
**port_array
;
4019 __le32 __iomem
*pm_addr
, *hlpm_addr
;
4020 u32 pm_val
, hlpm_val
, field
;
4021 unsigned int port_num
;
4022 unsigned long flags
;
4023 int hird
, exit_latency
;
4026 if (hcd
->speed
== HCD_USB3
|| !xhci
->hw_lpm_support
||
4030 if (!udev
->parent
|| udev
->parent
->parent
||
4031 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
4034 if (udev
->usb2_hw_lpm_capable
!= 1)
4037 spin_lock_irqsave(&xhci
->lock
, flags
);
4039 port_array
= xhci
->usb2_ports
;
4040 port_num
= udev
->portnum
- 1;
4041 pm_addr
= port_array
[port_num
] + PORTPMSC
;
4042 pm_val
= readl(pm_addr
);
4043 hlpm_addr
= port_array
[port_num
] + PORTHLPMC
;
4044 field
= le32_to_cpu(udev
->bos
->ext_cap
->bmAttributes
);
4046 xhci_dbg(xhci
, "%s port %d USB2 hardware LPM\n",
4047 enable
? "enable" : "disable", port_num
);
4050 /* Host supports BESL timeout instead of HIRD */
4051 if (udev
->usb2_hw_lpm_besl_capable
) {
4052 /* if device doesn't have a preferred BESL value use a
4053 * default one which works with mixed HIRD and BESL
4054 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4056 if ((field
& USB_BESL_SUPPORT
) &&
4057 (field
& USB_BESL_BASELINE_VALID
))
4058 hird
= USB_GET_BESL_BASELINE(field
);
4060 hird
= udev
->l1_params
.besl
;
4062 exit_latency
= xhci_besl_encoding
[hird
];
4063 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4065 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4066 * input context for link powermanagement evaluate
4067 * context commands. It is protected by hcd->bandwidth
4068 * mutex and is shared by all devices. We need to set
4069 * the max ext latency in USB 2 BESL LPM as well, so
4070 * use the same mutex and xhci_change_max_exit_latency()
4072 mutex_lock(hcd
->bandwidth_mutex
);
4073 ret
= xhci_change_max_exit_latency(xhci
, udev
,
4075 mutex_unlock(hcd
->bandwidth_mutex
);
4079 spin_lock_irqsave(&xhci
->lock
, flags
);
4081 hlpm_val
= xhci_calculate_usb2_hw_lpm_params(udev
);
4082 writel(hlpm_val
, hlpm_addr
);
4086 hird
= xhci_calculate_hird_besl(xhci
, udev
);
4089 pm_val
&= ~PORT_HIRD_MASK
;
4090 pm_val
|= PORT_HIRD(hird
) | PORT_RWE
| PORT_L1DS(udev
->slot_id
);
4091 writel(pm_val
, pm_addr
);
4092 pm_val
= readl(pm_addr
);
4094 writel(pm_val
, pm_addr
);
4098 pm_val
&= ~(PORT_HLE
| PORT_RWE
| PORT_HIRD_MASK
| PORT_L1DS_MASK
);
4099 writel(pm_val
, pm_addr
);
4102 if (udev
->usb2_hw_lpm_besl_capable
) {
4103 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4104 mutex_lock(hcd
->bandwidth_mutex
);
4105 xhci_change_max_exit_latency(xhci
, udev
, 0);
4106 mutex_unlock(hcd
->bandwidth_mutex
);
4111 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4115 /* check if a usb2 port supports a given extened capability protocol
4116 * only USB2 ports extended protocol capability values are cached.
4117 * Return 1 if capability is supported
4119 static int xhci_check_usb2_port_capability(struct xhci_hcd
*xhci
, int port
,
4120 unsigned capability
)
4122 u32 port_offset
, port_count
;
4125 for (i
= 0; i
< xhci
->num_ext_caps
; i
++) {
4126 if (xhci
->ext_caps
[i
] & capability
) {
4127 /* port offsets starts at 1 */
4128 port_offset
= XHCI_EXT_PORT_OFF(xhci
->ext_caps
[i
]) - 1;
4129 port_count
= XHCI_EXT_PORT_COUNT(xhci
->ext_caps
[i
]);
4130 if (port
>= port_offset
&&
4131 port
< port_offset
+ port_count
)
4138 int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
4140 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4141 int portnum
= udev
->portnum
- 1;
4143 if (hcd
->speed
== HCD_USB3
|| !xhci
->sw_lpm_support
||
4147 /* we only support lpm for non-hub device connected to root hub yet */
4148 if (!udev
->parent
|| udev
->parent
->parent
||
4149 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
4152 if (xhci
->hw_lpm_support
== 1 &&
4153 xhci_check_usb2_port_capability(
4154 xhci
, portnum
, XHCI_HLC
)) {
4155 udev
->usb2_hw_lpm_capable
= 1;
4156 udev
->l1_params
.timeout
= XHCI_L1_TIMEOUT
;
4157 udev
->l1_params
.besl
= XHCI_DEFAULT_BESL
;
4158 if (xhci_check_usb2_port_capability(xhci
, portnum
,
4160 udev
->usb2_hw_lpm_besl_capable
= 1;
4168 int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
4169 struct usb_device
*udev
, int enable
)
4174 int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
4179 #endif /* CONFIG_PM_RUNTIME */
4181 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4184 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4185 static unsigned long long xhci_service_interval_to_ns(
4186 struct usb_endpoint_descriptor
*desc
)
4188 return (1ULL << (desc
->bInterval
- 1)) * 125 * 1000;
4191 static u16
xhci_get_timeout_no_hub_lpm(struct usb_device
*udev
,
4192 enum usb3_link_state state
)
4194 unsigned long long sel
;
4195 unsigned long long pel
;
4196 unsigned int max_sel_pel
;
4201 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4202 sel
= DIV_ROUND_UP(udev
->u1_params
.sel
, 1000);
4203 pel
= DIV_ROUND_UP(udev
->u1_params
.pel
, 1000);
4204 max_sel_pel
= USB3_LPM_MAX_U1_SEL_PEL
;
4208 sel
= DIV_ROUND_UP(udev
->u2_params
.sel
, 1000);
4209 pel
= DIV_ROUND_UP(udev
->u2_params
.pel
, 1000);
4210 max_sel_pel
= USB3_LPM_MAX_U2_SEL_PEL
;
4214 dev_warn(&udev
->dev
, "%s: Can't get timeout for non-U1 or U2 state.\n",
4216 return USB3_LPM_DISABLED
;
4219 if (sel
<= max_sel_pel
&& pel
<= max_sel_pel
)
4220 return USB3_LPM_DEVICE_INITIATED
;
4222 if (sel
> max_sel_pel
)
4223 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4224 "due to long SEL %llu ms\n",
4227 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4228 "due to long PEL %llu ms\n",
4230 return USB3_LPM_DISABLED
;
4233 /* Returns the hub-encoded U1 timeout value.
4234 * The U1 timeout should be the maximum of the following values:
4235 * - For control endpoints, U1 system exit latency (SEL) * 3
4236 * - For bulk endpoints, U1 SEL * 5
4237 * - For interrupt endpoints:
4238 * - Notification EPs, U1 SEL * 3
4239 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4240 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4242 static u16
xhci_calculate_intel_u1_timeout(struct usb_device
*udev
,
4243 struct usb_endpoint_descriptor
*desc
)
4245 unsigned long long timeout_ns
;
4249 ep_type
= usb_endpoint_type(desc
);
4251 case USB_ENDPOINT_XFER_CONTROL
:
4252 timeout_ns
= udev
->u1_params
.sel
* 3;
4254 case USB_ENDPOINT_XFER_BULK
:
4255 timeout_ns
= udev
->u1_params
.sel
* 5;
4257 case USB_ENDPOINT_XFER_INT
:
4258 intr_type
= usb_endpoint_interrupt_type(desc
);
4259 if (intr_type
== USB_ENDPOINT_INTR_NOTIFICATION
) {
4260 timeout_ns
= udev
->u1_params
.sel
* 3;
4263 /* Otherwise the calculation is the same as isoc eps */
4264 case USB_ENDPOINT_XFER_ISOC
:
4265 timeout_ns
= xhci_service_interval_to_ns(desc
);
4266 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
* 105, 100);
4267 if (timeout_ns
< udev
->u1_params
.sel
* 2)
4268 timeout_ns
= udev
->u1_params
.sel
* 2;
4274 /* The U1 timeout is encoded in 1us intervals. */
4275 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 1000);
4276 /* Don't return a timeout of zero, because that's USB3_LPM_DISABLED. */
4277 if (timeout_ns
== USB3_LPM_DISABLED
)
4280 /* If the necessary timeout value is bigger than what we can set in the
4281 * USB 3.0 hub, we have to disable hub-initiated U1.
4283 if (timeout_ns
<= USB3_LPM_U1_MAX_TIMEOUT
)
4285 dev_dbg(&udev
->dev
, "Hub-initiated U1 disabled "
4286 "due to long timeout %llu ms\n", timeout_ns
);
4287 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U1
);
4290 /* Returns the hub-encoded U2 timeout value.
4291 * The U2 timeout should be the maximum of:
4292 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4293 * - largest bInterval of any active periodic endpoint (to avoid going
4294 * into lower power link states between intervals).
4295 * - the U2 Exit Latency of the device
4297 static u16
xhci_calculate_intel_u2_timeout(struct usb_device
*udev
,
4298 struct usb_endpoint_descriptor
*desc
)
4300 unsigned long long timeout_ns
;
4301 unsigned long long u2_del_ns
;
4303 timeout_ns
= 10 * 1000 * 1000;
4305 if ((usb_endpoint_xfer_int(desc
) || usb_endpoint_xfer_isoc(desc
)) &&
4306 (xhci_service_interval_to_ns(desc
) > timeout_ns
))
4307 timeout_ns
= xhci_service_interval_to_ns(desc
);
4309 u2_del_ns
= le16_to_cpu(udev
->bos
->ss_cap
->bU2DevExitLat
) * 1000ULL;
4310 if (u2_del_ns
> timeout_ns
)
4311 timeout_ns
= u2_del_ns
;
4313 /* The U2 timeout is encoded in 256us intervals */
4314 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 256 * 1000);
4315 /* If the necessary timeout value is bigger than what we can set in the
4316 * USB 3.0 hub, we have to disable hub-initiated U2.
4318 if (timeout_ns
<= USB3_LPM_U2_MAX_TIMEOUT
)
4320 dev_dbg(&udev
->dev
, "Hub-initiated U2 disabled "
4321 "due to long timeout %llu ms\n", timeout_ns
);
4322 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U2
);
4325 static u16
xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4326 struct usb_device
*udev
,
4327 struct usb_endpoint_descriptor
*desc
,
4328 enum usb3_link_state state
,
4331 if (state
== USB3_LPM_U1
) {
4332 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4333 return xhci_calculate_intel_u1_timeout(udev
, desc
);
4335 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4336 return xhci_calculate_intel_u2_timeout(udev
, desc
);
4339 return USB3_LPM_DISABLED
;
4342 static int xhci_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4343 struct usb_device
*udev
,
4344 struct usb_endpoint_descriptor
*desc
,
4345 enum usb3_link_state state
,
4350 alt_timeout
= xhci_call_host_update_timeout_for_endpoint(xhci
, udev
,
4351 desc
, state
, timeout
);
4353 /* If we found we can't enable hub-initiated LPM, or
4354 * the U1 or U2 exit latency was too high to allow
4355 * device-initiated LPM as well, just stop searching.
4357 if (alt_timeout
== USB3_LPM_DISABLED
||
4358 alt_timeout
== USB3_LPM_DEVICE_INITIATED
) {
4359 *timeout
= alt_timeout
;
4362 if (alt_timeout
> *timeout
)
4363 *timeout
= alt_timeout
;
4367 static int xhci_update_timeout_for_interface(struct xhci_hcd
*xhci
,
4368 struct usb_device
*udev
,
4369 struct usb_host_interface
*alt
,
4370 enum usb3_link_state state
,
4375 for (j
= 0; j
< alt
->desc
.bNumEndpoints
; j
++) {
4376 if (xhci_update_timeout_for_endpoint(xhci
, udev
,
4377 &alt
->endpoint
[j
].desc
, state
, timeout
))
4384 static int xhci_check_intel_tier_policy(struct usb_device
*udev
,
4385 enum usb3_link_state state
)
4387 struct usb_device
*parent
;
4388 unsigned int num_hubs
;
4390 if (state
== USB3_LPM_U2
)
4393 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4394 for (parent
= udev
->parent
, num_hubs
= 0; parent
->parent
;
4395 parent
= parent
->parent
)
4401 dev_dbg(&udev
->dev
, "Disabling U1 link state for device"
4402 " below second-tier hub.\n");
4403 dev_dbg(&udev
->dev
, "Plug device into first-tier hub "
4404 "to decrease power consumption.\n");
4408 static int xhci_check_tier_policy(struct xhci_hcd
*xhci
,
4409 struct usb_device
*udev
,
4410 enum usb3_link_state state
)
4412 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4413 return xhci_check_intel_tier_policy(udev
, state
);
4417 /* Returns the U1 or U2 timeout that should be enabled.
4418 * If the tier check or timeout setting functions return with a non-zero exit
4419 * code, that means the timeout value has been finalized and we shouldn't look
4420 * at any more endpoints.
4422 static u16
xhci_calculate_lpm_timeout(struct usb_hcd
*hcd
,
4423 struct usb_device
*udev
, enum usb3_link_state state
)
4425 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4426 struct usb_host_config
*config
;
4429 u16 timeout
= USB3_LPM_DISABLED
;
4431 if (state
== USB3_LPM_U1
)
4433 else if (state
== USB3_LPM_U2
)
4436 dev_warn(&udev
->dev
, "Can't enable unknown link state %i\n",
4441 if (xhci_check_tier_policy(xhci
, udev
, state
) < 0)
4444 /* Gather some information about the currently installed configuration
4445 * and alternate interface settings.
4447 if (xhci_update_timeout_for_endpoint(xhci
, udev
, &udev
->ep0
.desc
,
4451 config
= udev
->actconfig
;
4455 for (i
= 0; i
< config
->desc
.bNumInterfaces
; i
++) {
4456 struct usb_driver
*driver
;
4457 struct usb_interface
*intf
= config
->interface
[i
];
4462 /* Check if any currently bound drivers want hub-initiated LPM
4465 if (intf
->dev
.driver
) {
4466 driver
= to_usb_driver(intf
->dev
.driver
);
4467 if (driver
&& driver
->disable_hub_initiated_lpm
) {
4468 dev_dbg(&udev
->dev
, "Hub-initiated %s disabled "
4469 "at request of driver %s\n",
4470 state_name
, driver
->name
);
4471 return xhci_get_timeout_no_hub_lpm(udev
, state
);
4475 /* Not sure how this could happen... */
4476 if (!intf
->cur_altsetting
)
4479 if (xhci_update_timeout_for_interface(xhci
, udev
,
4480 intf
->cur_altsetting
,
4487 static int calculate_max_exit_latency(struct usb_device
*udev
,
4488 enum usb3_link_state state_changed
,
4489 u16 hub_encoded_timeout
)
4491 unsigned long long u1_mel_us
= 0;
4492 unsigned long long u2_mel_us
= 0;
4493 unsigned long long mel_us
= 0;
4499 disabling_u1
= (state_changed
== USB3_LPM_U1
&&
4500 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4501 disabling_u2
= (state_changed
== USB3_LPM_U2
&&
4502 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4504 enabling_u1
= (state_changed
== USB3_LPM_U1
&&
4505 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4506 enabling_u2
= (state_changed
== USB3_LPM_U2
&&
4507 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4509 /* If U1 was already enabled and we're not disabling it,
4510 * or we're going to enable U1, account for the U1 max exit latency.
4512 if ((udev
->u1_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u1
) ||
4514 u1_mel_us
= DIV_ROUND_UP(udev
->u1_params
.mel
, 1000);
4515 if ((udev
->u2_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u2
) ||
4517 u2_mel_us
= DIV_ROUND_UP(udev
->u2_params
.mel
, 1000);
4519 if (u1_mel_us
> u2_mel_us
)
4523 /* xHCI host controller max exit latency field is only 16 bits wide. */
4524 if (mel_us
> MAX_EXIT
) {
4525 dev_warn(&udev
->dev
, "Link PM max exit latency of %lluus "
4526 "is too big.\n", mel_us
);
4532 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4533 int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4534 struct usb_device
*udev
, enum usb3_link_state state
)
4536 struct xhci_hcd
*xhci
;
4537 u16 hub_encoded_timeout
;
4541 xhci
= hcd_to_xhci(hcd
);
4542 /* The LPM timeout values are pretty host-controller specific, so don't
4543 * enable hub-initiated timeouts unless the vendor has provided
4544 * information about their timeout algorithm.
4546 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4547 !xhci
->devs
[udev
->slot_id
])
4548 return USB3_LPM_DISABLED
;
4550 hub_encoded_timeout
= xhci_calculate_lpm_timeout(hcd
, udev
, state
);
4551 mel
= calculate_max_exit_latency(udev
, state
, hub_encoded_timeout
);
4553 /* Max Exit Latency is too big, disable LPM. */
4554 hub_encoded_timeout
= USB3_LPM_DISABLED
;
4558 ret
= xhci_change_max_exit_latency(xhci
, udev
, mel
);
4561 return hub_encoded_timeout
;
4564 int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4565 struct usb_device
*udev
, enum usb3_link_state state
)
4567 struct xhci_hcd
*xhci
;
4571 xhci
= hcd_to_xhci(hcd
);
4572 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4573 !xhci
->devs
[udev
->slot_id
])
4576 mel
= calculate_max_exit_latency(udev
, state
, USB3_LPM_DISABLED
);
4577 ret
= xhci_change_max_exit_latency(xhci
, udev
, mel
);
4582 #else /* CONFIG_PM */
4584 int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4585 struct usb_device
*udev
, enum usb3_link_state state
)
4587 return USB3_LPM_DISABLED
;
4590 int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4591 struct usb_device
*udev
, enum usb3_link_state state
)
4595 #endif /* CONFIG_PM */
4597 /*-------------------------------------------------------------------------*/
4599 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4600 * internal data structures for the device.
4602 int xhci_update_hub_device(struct usb_hcd
*hcd
, struct usb_device
*hdev
,
4603 struct usb_tt
*tt
, gfp_t mem_flags
)
4605 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4606 struct xhci_virt_device
*vdev
;
4607 struct xhci_command
*config_cmd
;
4608 struct xhci_input_control_ctx
*ctrl_ctx
;
4609 struct xhci_slot_ctx
*slot_ctx
;
4610 unsigned long flags
;
4611 unsigned think_time
;
4614 /* Ignore root hubs */
4618 vdev
= xhci
->devs
[hdev
->slot_id
];
4620 xhci_warn(xhci
, "Cannot update hub desc for unknown device.\n");
4623 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
4625 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
4628 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, config_cmd
->in_ctx
);
4630 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
4632 xhci_free_command(xhci
, config_cmd
);
4636 spin_lock_irqsave(&xhci
->lock
, flags
);
4637 if (hdev
->speed
== USB_SPEED_HIGH
&&
4638 xhci_alloc_tt_info(xhci
, vdev
, hdev
, tt
, GFP_ATOMIC
)) {
4639 xhci_dbg(xhci
, "Could not allocate xHCI TT structure.\n");
4640 xhci_free_command(xhci
, config_cmd
);
4641 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4645 xhci_slot_copy(xhci
, config_cmd
->in_ctx
, vdev
->out_ctx
);
4646 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
4647 slot_ctx
= xhci_get_slot_ctx(xhci
, config_cmd
->in_ctx
);
4648 slot_ctx
->dev_info
|= cpu_to_le32(DEV_HUB
);
4650 slot_ctx
->dev_info
|= cpu_to_le32(DEV_MTT
);
4651 if (xhci
->hci_version
> 0x95) {
4652 xhci_dbg(xhci
, "xHCI version %x needs hub "
4653 "TT think time and number of ports\n",
4654 (unsigned int) xhci
->hci_version
);
4655 slot_ctx
->dev_info2
|= cpu_to_le32(XHCI_MAX_PORTS(hdev
->maxchild
));
4656 /* Set TT think time - convert from ns to FS bit times.
4657 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4658 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4660 * xHCI 1.0: this field shall be 0 if the device is not a
4663 think_time
= tt
->think_time
;
4664 if (think_time
!= 0)
4665 think_time
= (think_time
/ 666) - 1;
4666 if (xhci
->hci_version
< 0x100 || hdev
->speed
== USB_SPEED_HIGH
)
4667 slot_ctx
->tt_info
|=
4668 cpu_to_le32(TT_THINK_TIME(think_time
));
4670 xhci_dbg(xhci
, "xHCI version %x doesn't need hub "
4671 "TT think time or number of ports\n",
4672 (unsigned int) xhci
->hci_version
);
4674 slot_ctx
->dev_state
= 0;
4675 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4677 xhci_dbg(xhci
, "Set up %s for hub device.\n",
4678 (xhci
->hci_version
> 0x95) ?
4679 "configure endpoint" : "evaluate context");
4680 xhci_dbg(xhci
, "Slot %u Input Context:\n", hdev
->slot_id
);
4681 xhci_dbg_ctx(xhci
, config_cmd
->in_ctx
, 0);
4683 /* Issue and wait for the configure endpoint or
4684 * evaluate context command.
4686 if (xhci
->hci_version
> 0x95)
4687 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4690 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4693 xhci_dbg(xhci
, "Slot %u Output Context:\n", hdev
->slot_id
);
4694 xhci_dbg_ctx(xhci
, vdev
->out_ctx
, 0);
4696 xhci_free_command(xhci
, config_cmd
);
4700 int xhci_get_frame(struct usb_hcd
*hcd
)
4702 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4703 /* EHCI mods by the periodic size. Why? */
4704 return readl(&xhci
->run_regs
->microframe_index
) >> 3;
4707 int xhci_gen_setup(struct usb_hcd
*hcd
, xhci_get_quirks_t get_quirks
)
4709 struct xhci_hcd
*xhci
;
4710 struct device
*dev
= hcd
->self
.controller
;
4713 /* Accept arbitrarily long scatter-gather lists */
4714 hcd
->self
.sg_tablesize
= ~0;
4716 /* support to build packet from discontinuous buffers */
4717 hcd
->self
.no_sg_constraint
= 1;
4719 /* XHCI controllers don't stop the ep queue on short packets :| */
4720 hcd
->self
.no_stop_on_short
= 1;
4722 if (usb_hcd_is_primary_hcd(hcd
)) {
4723 xhci
= kzalloc(sizeof(struct xhci_hcd
), GFP_KERNEL
);
4726 *((struct xhci_hcd
**) hcd
->hcd_priv
) = xhci
;
4727 xhci
->main_hcd
= hcd
;
4728 /* Mark the first roothub as being USB 2.0.
4729 * The xHCI driver will register the USB 3.0 roothub.
4731 hcd
->speed
= HCD_USB2
;
4732 hcd
->self
.root_hub
->speed
= USB_SPEED_HIGH
;
4734 * USB 2.0 roothub under xHCI has an integrated TT,
4735 * (rate matching hub) as opposed to having an OHCI/UHCI
4736 * companion controller.
4740 /* xHCI private pointer was set in xhci_pci_probe for the second
4741 * registered roothub.
4746 xhci
->cap_regs
= hcd
->regs
;
4747 xhci
->op_regs
= hcd
->regs
+
4748 HC_LENGTH(readl(&xhci
->cap_regs
->hc_capbase
));
4749 xhci
->run_regs
= hcd
->regs
+
4750 (readl(&xhci
->cap_regs
->run_regs_off
) & RTSOFF_MASK
);
4751 /* Cache read-only capability registers */
4752 xhci
->hcs_params1
= readl(&xhci
->cap_regs
->hcs_params1
);
4753 xhci
->hcs_params2
= readl(&xhci
->cap_regs
->hcs_params2
);
4754 xhci
->hcs_params3
= readl(&xhci
->cap_regs
->hcs_params3
);
4755 xhci
->hcc_params
= readl(&xhci
->cap_regs
->hc_capbase
);
4756 xhci
->hci_version
= HC_VERSION(xhci
->hcc_params
);
4757 xhci
->hcc_params
= readl(&xhci
->cap_regs
->hcc_params
);
4758 xhci_print_registers(xhci
);
4760 get_quirks(dev
, xhci
);
4762 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4763 * success event after a short transfer. This quirk will ignore such
4766 if (xhci
->hci_version
> 0x96)
4767 xhci
->quirks
|= XHCI_SPURIOUS_SUCCESS
;
4769 /* Make sure the HC is halted. */
4770 retval
= xhci_halt(xhci
);
4774 xhci_dbg(xhci
, "Resetting HCD\n");
4775 /* Reset the internal HC memory state and registers. */
4776 retval
= xhci_reset(xhci
);
4779 xhci_dbg(xhci
, "Reset complete\n");
4781 /* Set dma_mask and coherent_dma_mask to 64-bits,
4782 * if xHC supports 64-bit addressing */
4783 if (HCC_64BIT_ADDR(xhci
->hcc_params
) &&
4784 !dma_set_mask(dev
, DMA_BIT_MASK(64))) {
4785 xhci_dbg(xhci
, "Enabling 64-bit DMA addresses.\n");
4786 dma_set_coherent_mask(dev
, DMA_BIT_MASK(64));
4789 xhci_dbg(xhci
, "Calling HCD init\n");
4790 /* Initialize HCD and host controller data structures. */
4791 retval
= xhci_init(hcd
);
4794 xhci_dbg(xhci
, "Called HCD init\n");
4801 MODULE_DESCRIPTION(DRIVER_DESC
);
4802 MODULE_AUTHOR(DRIVER_AUTHOR
);
4803 MODULE_LICENSE("GPL");
4805 static int __init
xhci_hcd_init(void)
4809 retval
= xhci_register_pci();
4811 pr_debug("Problem registering PCI driver.\n");
4814 retval
= xhci_register_plat();
4816 pr_debug("Problem registering platform driver.\n");
4820 * Check the compiler generated sizes of structures that must be laid
4821 * out in specific ways for hardware access.
4823 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array
) != 256*32/8);
4824 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx
) != 8*32/8);
4825 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx
) != 8*32/8);
4826 /* xhci_device_control has eight fields, and also
4827 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4829 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx
) != 4*32/8);
4830 BUILD_BUG_ON(sizeof(union xhci_trb
) != 4*32/8);
4831 BUILD_BUG_ON(sizeof(struct xhci_erst_entry
) != 4*32/8);
4832 BUILD_BUG_ON(sizeof(struct xhci_cap_regs
) != 7*32/8);
4833 BUILD_BUG_ON(sizeof(struct xhci_intr_reg
) != 8*32/8);
4834 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4835 BUILD_BUG_ON(sizeof(struct xhci_run_regs
) != (8+8*128)*32/8);
4838 xhci_unregister_pci();
4841 module_init(xhci_hcd_init
);
4843 static void __exit
xhci_hcd_cleanup(void)
4845 xhci_unregister_pci();
4846 xhci_unregister_plat();
4848 module_exit(xhci_hcd_cleanup
);