2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
32 #define DRIVER_AUTHOR "Sarah Sharp"
33 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
35 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
36 static int link_quirk
;
37 module_param(link_quirk
, int, S_IRUGO
| S_IWUSR
);
38 MODULE_PARM_DESC(link_quirk
, "Don't clear the chain bit on a link TRB");
40 /* TODO: copied from ehci-hcd.c - can this be refactored? */
42 * handshake - spin reading hc until handshake completes or fails
43 * @ptr: address of hc register to be read
44 * @mask: bits to look at in result of read
45 * @done: value of those bits when handshake succeeds
46 * @usec: timeout in microseconds
48 * Returns negative errno, or zero on success
50 * Success happens when the "mask" bits have the specified value (hardware
51 * handshake done). There are two failure modes: "usec" have passed (major
52 * hardware flakeout), or the register reads as all-ones (hardware removed).
54 static int handshake(struct xhci_hcd
*xhci
, void __iomem
*ptr
,
55 u32 mask
, u32 done
, int usec
)
60 result
= xhci_readl(xhci
, ptr
);
61 if (result
== ~(u32
)0) /* card removed */
73 * Disable interrupts and begin the xHCI halting process.
75 void xhci_quiesce(struct xhci_hcd
*xhci
)
82 halted
= xhci_readl(xhci
, &xhci
->op_regs
->status
) & STS_HALT
;
86 cmd
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
88 xhci_writel(xhci
, cmd
, &xhci
->op_regs
->command
);
92 * Force HC into halt state.
94 * Disable any IRQs and clear the run/stop bit.
95 * HC will complete any current and actively pipelined transactions, and
96 * should halt within 16 ms of the run/stop bit being cleared.
97 * Read HC Halted bit in the status register to see when the HC is finished.
99 int xhci_halt(struct xhci_hcd
*xhci
)
102 xhci_dbg(xhci
, "// Halt the HC\n");
105 ret
= handshake(xhci
, &xhci
->op_regs
->status
,
106 STS_HALT
, STS_HALT
, XHCI_MAX_HALT_USEC
);
108 xhci
->xhc_state
|= XHCI_STATE_HALTED
;
110 xhci_warn(xhci
, "Host not halted after %u microseconds.\n",
116 * Set the run bit and wait for the host to be running.
118 static int xhci_start(struct xhci_hcd
*xhci
)
123 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
125 xhci_dbg(xhci
, "// Turn on HC, cmd = 0x%x.\n",
127 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
130 * Wait for the HCHalted Status bit to be 0 to indicate the host is
133 ret
= handshake(xhci
, &xhci
->op_regs
->status
,
134 STS_HALT
, 0, XHCI_MAX_HALT_USEC
);
135 if (ret
== -ETIMEDOUT
)
136 xhci_err(xhci
, "Host took too long to start, "
137 "waited %u microseconds.\n",
140 xhci
->xhc_state
&= ~XHCI_STATE_HALTED
;
147 * This resets pipelines, timers, counters, state machines, etc.
148 * Transactions will be terminated immediately, and operational registers
149 * will be set to their defaults.
151 int xhci_reset(struct xhci_hcd
*xhci
)
157 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
158 if ((state
& STS_HALT
) == 0) {
159 xhci_warn(xhci
, "Host controller not halted, aborting reset.\n");
163 xhci_dbg(xhci
, "// Reset the HC\n");
164 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
165 command
|= CMD_RESET
;
166 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
168 ret
= handshake(xhci
, &xhci
->op_regs
->command
,
169 CMD_RESET
, 0, 250 * 1000);
173 xhci_dbg(xhci
, "Wait for controller to be ready for doorbell rings\n");
175 * xHCI cannot write to any doorbells or operational registers other
176 * than status until the "Controller Not Ready" flag is cleared.
178 return handshake(xhci
, &xhci
->op_regs
->status
, STS_CNR
, 0, 250 * 1000);
182 static int xhci_free_msi(struct xhci_hcd
*xhci
)
186 if (!xhci
->msix_entries
)
189 for (i
= 0; i
< xhci
->msix_count
; i
++)
190 if (xhci
->msix_entries
[i
].vector
)
191 free_irq(xhci
->msix_entries
[i
].vector
,
199 static int xhci_setup_msi(struct xhci_hcd
*xhci
)
202 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
204 ret
= pci_enable_msi(pdev
);
206 xhci_dbg(xhci
, "failed to allocate MSI entry\n");
210 ret
= request_irq(pdev
->irq
, (irq_handler_t
)xhci_msi_irq
,
211 0, "xhci_hcd", xhci_to_hcd(xhci
));
213 xhci_dbg(xhci
, "disable MSI interrupt\n");
214 pci_disable_msi(pdev
);
222 * free all IRQs request
224 static void xhci_free_irq(struct xhci_hcd
*xhci
)
226 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
229 /* return if using legacy interrupt */
230 if (xhci_to_hcd(xhci
)->irq
> 0)
233 ret
= xhci_free_msi(xhci
);
237 free_irq(pdev
->irq
, xhci_to_hcd(xhci
));
245 static int xhci_setup_msix(struct xhci_hcd
*xhci
)
248 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
249 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
252 * calculate number of msi-x vectors supported.
253 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
254 * with max number of interrupters based on the xhci HCSPARAMS1.
255 * - num_online_cpus: maximum msi-x vectors per CPUs core.
256 * Add additional 1 vector to ensure always available interrupt.
258 xhci
->msix_count
= min(num_online_cpus() + 1,
259 HCS_MAX_INTRS(xhci
->hcs_params1
));
262 kmalloc((sizeof(struct msix_entry
))*xhci
->msix_count
,
264 if (!xhci
->msix_entries
) {
265 xhci_err(xhci
, "Failed to allocate MSI-X entries\n");
269 for (i
= 0; i
< xhci
->msix_count
; i
++) {
270 xhci
->msix_entries
[i
].entry
= i
;
271 xhci
->msix_entries
[i
].vector
= 0;
274 ret
= pci_enable_msix(pdev
, xhci
->msix_entries
, xhci
->msix_count
);
276 xhci_dbg(xhci
, "Failed to enable MSI-X\n");
280 for (i
= 0; i
< xhci
->msix_count
; i
++) {
281 ret
= request_irq(xhci
->msix_entries
[i
].vector
,
282 (irq_handler_t
)xhci_msi_irq
,
283 0, "xhci_hcd", xhci_to_hcd(xhci
));
288 hcd
->msix_enabled
= 1;
292 xhci_dbg(xhci
, "disable MSI-X interrupt\n");
294 pci_disable_msix(pdev
);
296 kfree(xhci
->msix_entries
);
297 xhci
->msix_entries
= NULL
;
301 /* Free any IRQs and disable MSI-X */
302 static void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
304 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
305 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
309 if (xhci
->msix_entries
) {
310 pci_disable_msix(pdev
);
311 kfree(xhci
->msix_entries
);
312 xhci
->msix_entries
= NULL
;
314 pci_disable_msi(pdev
);
317 hcd
->msix_enabled
= 0;
321 static void xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
325 if (xhci
->msix_entries
) {
326 for (i
= 0; i
< xhci
->msix_count
; i
++)
327 synchronize_irq(xhci
->msix_entries
[i
].vector
);
331 static int xhci_try_enable_msi(struct usb_hcd
*hcd
)
333 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
334 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
338 * Some Fresco Logic host controllers advertise MSI, but fail to
339 * generate interrupts. Don't even try to enable MSI.
341 if (xhci
->quirks
& XHCI_BROKEN_MSI
)
344 /* unregister the legacy interrupt */
346 free_irq(hcd
->irq
, hcd
);
349 ret
= xhci_setup_msix(xhci
);
351 /* fall back to msi*/
352 ret
= xhci_setup_msi(xhci
);
355 /* hcd->irq is 0, we have MSI */
359 xhci_err(xhci
, "No msi-x/msi found and no IRQ in BIOS\n");
363 /* fall back to legacy interrupt*/
364 ret
= request_irq(pdev
->irq
, &usb_hcd_irq
, IRQF_SHARED
,
365 hcd
->irq_descr
, hcd
);
367 xhci_err(xhci
, "request interrupt %d failed\n",
371 hcd
->irq
= pdev
->irq
;
377 static int xhci_try_enable_msi(struct usb_hcd
*hcd
)
382 static void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
386 static void xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
393 * Initialize memory for HCD and xHC (one-time init).
395 * Program the PAGESIZE register, initialize the device context array, create
396 * device contexts (?), set up a command ring segment (or two?), create event
397 * ring (one for now).
399 int xhci_init(struct usb_hcd
*hcd
)
401 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
404 xhci_dbg(xhci
, "xhci_init\n");
405 spin_lock_init(&xhci
->lock
);
406 if (xhci
->hci_version
== 0x95 && link_quirk
) {
407 xhci_dbg(xhci
, "QUIRK: Not clearing Link TRB chain bits.\n");
408 xhci
->quirks
|= XHCI_LINK_TRB_QUIRK
;
410 xhci_dbg(xhci
, "xHCI doesn't need link TRB QUIRK\n");
412 retval
= xhci_mem_init(xhci
, GFP_KERNEL
);
413 xhci_dbg(xhci
, "Finished xhci_init\n");
418 /*-------------------------------------------------------------------------*/
421 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
422 static void xhci_event_ring_work(unsigned long arg
)
427 struct xhci_hcd
*xhci
= (struct xhci_hcd
*) arg
;
430 xhci_dbg(xhci
, "Poll event ring: %lu\n", jiffies
);
432 spin_lock_irqsave(&xhci
->lock
, flags
);
433 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
434 xhci_dbg(xhci
, "op reg status = 0x%x\n", temp
);
435 if (temp
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
) ||
436 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
437 xhci_dbg(xhci
, "HW died, polling stopped.\n");
438 spin_unlock_irqrestore(&xhci
->lock
, flags
);
442 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
443 xhci_dbg(xhci
, "ir_set 0 pending = 0x%x\n", temp
);
444 xhci_dbg(xhci
, "HC error bitmask = 0x%x\n", xhci
->error_bitmask
);
445 xhci
->error_bitmask
= 0;
446 xhci_dbg(xhci
, "Event ring:\n");
447 xhci_debug_segment(xhci
, xhci
->event_ring
->deq_seg
);
448 xhci_dbg_ring_ptrs(xhci
, xhci
->event_ring
);
449 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
450 temp_64
&= ~ERST_PTR_MASK
;
451 xhci_dbg(xhci
, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64
);
452 xhci_dbg(xhci
, "Command ring:\n");
453 xhci_debug_segment(xhci
, xhci
->cmd_ring
->deq_seg
);
454 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
455 xhci_dbg_cmd_ptrs(xhci
);
456 for (i
= 0; i
< MAX_HC_SLOTS
; ++i
) {
459 for (j
= 0; j
< 31; ++j
) {
460 xhci_dbg_ep_rings(xhci
, i
, j
, &xhci
->devs
[i
]->eps
[j
]);
463 spin_unlock_irqrestore(&xhci
->lock
, flags
);
466 mod_timer(&xhci
->event_ring_timer
, jiffies
+ POLL_TIMEOUT
* HZ
);
468 xhci_dbg(xhci
, "Quit polling the event ring.\n");
472 static int xhci_run_finished(struct xhci_hcd
*xhci
)
474 if (xhci_start(xhci
)) {
478 xhci
->shared_hcd
->state
= HC_STATE_RUNNING
;
480 if (xhci
->quirks
& XHCI_NEC_HOST
)
481 xhci_ring_cmd_db(xhci
);
483 xhci_dbg(xhci
, "Finished xhci_run for USB3 roothub\n");
488 * Start the HC after it was halted.
490 * This function is called by the USB core when the HC driver is added.
491 * Its opposite is xhci_stop().
493 * xhci_init() must be called once before this function can be called.
494 * Reset the HC, enable device slot contexts, program DCBAAP, and
495 * set command ring pointer and event ring pointer.
497 * Setup MSI-X vectors and enable interrupts.
499 int xhci_run(struct usb_hcd
*hcd
)
504 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
506 /* Start the xHCI host controller running only after the USB 2.0 roothub
510 hcd
->uses_new_polling
= 1;
511 if (!usb_hcd_is_primary_hcd(hcd
))
512 return xhci_run_finished(xhci
);
514 xhci_dbg(xhci
, "xhci_run\n");
516 ret
= xhci_try_enable_msi(hcd
);
520 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
521 init_timer(&xhci
->event_ring_timer
);
522 xhci
->event_ring_timer
.data
= (unsigned long) xhci
;
523 xhci
->event_ring_timer
.function
= xhci_event_ring_work
;
524 /* Poll the event ring */
525 xhci
->event_ring_timer
.expires
= jiffies
+ POLL_TIMEOUT
* HZ
;
527 xhci_dbg(xhci
, "Setting event ring polling timer\n");
528 add_timer(&xhci
->event_ring_timer
);
531 xhci_dbg(xhci
, "Command ring memory map follows:\n");
532 xhci_debug_ring(xhci
, xhci
->cmd_ring
);
533 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
534 xhci_dbg_cmd_ptrs(xhci
);
536 xhci_dbg(xhci
, "ERST memory map follows:\n");
537 xhci_dbg_erst(xhci
, &xhci
->erst
);
538 xhci_dbg(xhci
, "Event ring:\n");
539 xhci_debug_ring(xhci
, xhci
->event_ring
);
540 xhci_dbg_ring_ptrs(xhci
, xhci
->event_ring
);
541 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
542 temp_64
&= ~ERST_PTR_MASK
;
543 xhci_dbg(xhci
, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64
);
545 xhci_dbg(xhci
, "// Set the interrupt modulation register\n");
546 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_control
);
547 temp
&= ~ER_IRQ_INTERVAL_MASK
;
549 xhci_writel(xhci
, temp
, &xhci
->ir_set
->irq_control
);
551 /* Set the HCD state before we enable the irqs */
552 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
554 xhci_dbg(xhci
, "// Enable interrupts, cmd = 0x%x.\n",
556 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
558 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
559 xhci_dbg(xhci
, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
560 xhci
->ir_set
, (unsigned int) ER_IRQ_ENABLE(temp
));
561 xhci_writel(xhci
, ER_IRQ_ENABLE(temp
),
562 &xhci
->ir_set
->irq_pending
);
563 xhci_print_ir_set(xhci
, 0);
565 if (xhci
->quirks
& XHCI_NEC_HOST
)
566 xhci_queue_vendor_command(xhci
, 0, 0, 0,
567 TRB_TYPE(TRB_NEC_GET_FW
));
569 xhci_dbg(xhci
, "Finished xhci_run for USB2 roothub\n");
573 static void xhci_only_stop_hcd(struct usb_hcd
*hcd
)
575 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
577 spin_lock_irq(&xhci
->lock
);
580 /* The shared_hcd is going to be deallocated shortly (the USB core only
581 * calls this function when allocation fails in usb_add_hcd(), or
582 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
584 xhci
->shared_hcd
= NULL
;
585 spin_unlock_irq(&xhci
->lock
);
591 * This function is called by the USB core when the HC driver is removed.
592 * Its opposite is xhci_run().
594 * Disable device contexts, disable IRQs, and quiesce the HC.
595 * Reset the HC, finish any completed transactions, and cleanup memory.
597 void xhci_stop(struct usb_hcd
*hcd
)
600 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
602 if (!usb_hcd_is_primary_hcd(hcd
)) {
603 xhci_only_stop_hcd(xhci
->shared_hcd
);
607 spin_lock_irq(&xhci
->lock
);
608 /* Make sure the xHC is halted for a USB3 roothub
609 * (xhci_stop() could be called as part of failed init).
613 spin_unlock_irq(&xhci
->lock
);
615 xhci_cleanup_msix(xhci
);
617 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
618 /* Tell the event ring poll function not to reschedule */
620 del_timer_sync(&xhci
->event_ring_timer
);
623 if (xhci
->quirks
& XHCI_AMD_PLL_FIX
)
626 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
627 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
628 xhci_writel(xhci
, temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
629 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
630 xhci_writel(xhci
, ER_IRQ_DISABLE(temp
),
631 &xhci
->ir_set
->irq_pending
);
632 xhci_print_ir_set(xhci
, 0);
634 xhci_dbg(xhci
, "cleaning up memory\n");
635 xhci_mem_cleanup(xhci
);
636 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
637 xhci_readl(xhci
, &xhci
->op_regs
->status
));
641 * Shutdown HC (not bus-specific)
643 * This is called when the machine is rebooting or halting. We assume that the
644 * machine will be powered off, and the HC's internal state will be reset.
645 * Don't bother to free memory.
647 * This will only ever be called with the main usb_hcd (the USB3 roothub).
649 void xhci_shutdown(struct usb_hcd
*hcd
)
651 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
653 spin_lock_irq(&xhci
->lock
);
655 spin_unlock_irq(&xhci
->lock
);
657 xhci_cleanup_msix(xhci
);
659 xhci_dbg(xhci
, "xhci_shutdown completed - status = %x\n",
660 xhci_readl(xhci
, &xhci
->op_regs
->status
));
664 static void xhci_save_registers(struct xhci_hcd
*xhci
)
666 xhci
->s3
.command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
667 xhci
->s3
.dev_nt
= xhci_readl(xhci
, &xhci
->op_regs
->dev_notification
);
668 xhci
->s3
.dcbaa_ptr
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
669 xhci
->s3
.config_reg
= xhci_readl(xhci
, &xhci
->op_regs
->config_reg
);
670 xhci
->s3
.erst_size
= xhci_readl(xhci
, &xhci
->ir_set
->erst_size
);
671 xhci
->s3
.erst_base
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_base
);
672 xhci
->s3
.erst_dequeue
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
673 xhci
->s3
.irq_pending
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
674 xhci
->s3
.irq_control
= xhci_readl(xhci
, &xhci
->ir_set
->irq_control
);
677 static void xhci_restore_registers(struct xhci_hcd
*xhci
)
679 xhci_writel(xhci
, xhci
->s3
.command
, &xhci
->op_regs
->command
);
680 xhci_writel(xhci
, xhci
->s3
.dev_nt
, &xhci
->op_regs
->dev_notification
);
681 xhci_write_64(xhci
, xhci
->s3
.dcbaa_ptr
, &xhci
->op_regs
->dcbaa_ptr
);
682 xhci_writel(xhci
, xhci
->s3
.config_reg
, &xhci
->op_regs
->config_reg
);
683 xhci_writel(xhci
, xhci
->s3
.erst_size
, &xhci
->ir_set
->erst_size
);
684 xhci_write_64(xhci
, xhci
->s3
.erst_base
, &xhci
->ir_set
->erst_base
);
685 xhci_write_64(xhci
, xhci
->s3
.erst_dequeue
, &xhci
->ir_set
->erst_dequeue
);
686 xhci_writel(xhci
, xhci
->s3
.irq_pending
, &xhci
->ir_set
->irq_pending
);
687 xhci_writel(xhci
, xhci
->s3
.irq_control
, &xhci
->ir_set
->irq_control
);
690 static void xhci_set_cmd_ring_deq(struct xhci_hcd
*xhci
)
694 /* step 2: initialize command ring buffer */
695 val_64
= xhci_read_64(xhci
, &xhci
->op_regs
->cmd_ring
);
696 val_64
= (val_64
& (u64
) CMD_RING_RSVD_BITS
) |
697 (xhci_trb_virt_to_dma(xhci
->cmd_ring
->deq_seg
,
698 xhci
->cmd_ring
->dequeue
) &
699 (u64
) ~CMD_RING_RSVD_BITS
) |
700 xhci
->cmd_ring
->cycle_state
;
701 xhci_dbg(xhci
, "// Setting command ring address to 0x%llx\n",
702 (long unsigned long) val_64
);
703 xhci_write_64(xhci
, val_64
, &xhci
->op_regs
->cmd_ring
);
707 * The whole command ring must be cleared to zero when we suspend the host.
709 * The host doesn't save the command ring pointer in the suspend well, so we
710 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
711 * aligned, because of the reserved bits in the command ring dequeue pointer
712 * register. Therefore, we can't just set the dequeue pointer back in the
713 * middle of the ring (TRBs are 16-byte aligned).
715 static void xhci_clear_command_ring(struct xhci_hcd
*xhci
)
717 struct xhci_ring
*ring
;
718 struct xhci_segment
*seg
;
720 ring
= xhci
->cmd_ring
;
724 sizeof(union xhci_trb
) * (TRBS_PER_SEGMENT
- 1));
725 seg
->trbs
[TRBS_PER_SEGMENT
- 1].link
.control
&=
726 cpu_to_le32(~TRB_CYCLE
);
728 } while (seg
!= ring
->deq_seg
);
730 /* Reset the software enqueue and dequeue pointers */
731 ring
->deq_seg
= ring
->first_seg
;
732 ring
->dequeue
= ring
->first_seg
->trbs
;
733 ring
->enq_seg
= ring
->deq_seg
;
734 ring
->enqueue
= ring
->dequeue
;
736 ring
->num_trbs_free
= ring
->num_segs
* (TRBS_PER_SEGMENT
- 1) - 1;
738 * Ring is now zeroed, so the HW should look for change of ownership
739 * when the cycle bit is set to 1.
741 ring
->cycle_state
= 1;
744 * Reset the hardware dequeue pointer.
745 * Yes, this will need to be re-written after resume, but we're paranoid
746 * and want to make sure the hardware doesn't access bogus memory
747 * because, say, the BIOS or an SMI started the host without changing
748 * the command ring pointers.
750 xhci_set_cmd_ring_deq(xhci
);
754 * Stop HC (not bus-specific)
756 * This is called when the machine transition into S3/S4 mode.
759 int xhci_suspend(struct xhci_hcd
*xhci
)
762 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
765 spin_lock_irq(&xhci
->lock
);
766 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
767 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
768 /* step 1: stop endpoint */
769 /* skipped assuming that port suspend has done */
771 /* step 2: clear Run/Stop bit */
772 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
774 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
775 if (handshake(xhci
, &xhci
->op_regs
->status
,
776 STS_HALT
, STS_HALT
, 100*100)) {
777 xhci_warn(xhci
, "WARN: xHC CMD_RUN timeout\n");
778 spin_unlock_irq(&xhci
->lock
);
781 xhci_clear_command_ring(xhci
);
783 /* step 3: save registers */
784 xhci_save_registers(xhci
);
786 /* step 4: set CSS flag */
787 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
789 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
790 if (handshake(xhci
, &xhci
->op_regs
->status
, STS_SAVE
, 0, 10*100)) {
791 xhci_warn(xhci
, "WARN: xHC CMD_CSS timeout\n");
792 spin_unlock_irq(&xhci
->lock
);
795 spin_unlock_irq(&xhci
->lock
);
797 /* step 5: remove core well power */
798 /* synchronize irq when using MSI-X */
799 xhci_msix_sync_irqs(xhci
);
805 * start xHC (not bus-specific)
807 * This is called when the machine transition from S3/S4 mode.
810 int xhci_resume(struct xhci_hcd
*xhci
, bool hibernated
)
812 u32 command
, temp
= 0;
813 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
814 struct usb_hcd
*secondary_hcd
;
817 /* Wait a bit if either of the roothubs need to settle from the
818 * transition into bus suspend.
820 if (time_before(jiffies
, xhci
->bus_state
[0].next_statechange
) ||
822 xhci
->bus_state
[1].next_statechange
))
825 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
826 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
828 spin_lock_irq(&xhci
->lock
);
829 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
833 /* step 1: restore register */
834 xhci_restore_registers(xhci
);
835 /* step 2: initialize command ring buffer */
836 xhci_set_cmd_ring_deq(xhci
);
837 /* step 3: restore state and start state*/
838 /* step 3: set CRS flag */
839 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
841 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
842 if (handshake(xhci
, &xhci
->op_regs
->status
,
843 STS_RESTORE
, 0, 10*100)) {
844 xhci_dbg(xhci
, "WARN: xHC CMD_CSS timeout\n");
845 spin_unlock_irq(&xhci
->lock
);
848 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
851 /* If restore operation fails, re-initialize the HC during resume */
852 if ((temp
& STS_SRE
) || hibernated
) {
853 /* Let the USB core know _both_ roothubs lost power. */
854 usb_root_hub_lost_power(xhci
->main_hcd
->self
.root_hub
);
855 usb_root_hub_lost_power(xhci
->shared_hcd
->self
.root_hub
);
857 xhci_dbg(xhci
, "Stop HCD\n");
860 spin_unlock_irq(&xhci
->lock
);
861 xhci_cleanup_msix(xhci
);
863 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
864 /* Tell the event ring poll function not to reschedule */
866 del_timer_sync(&xhci
->event_ring_timer
);
869 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
870 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
871 xhci_writel(xhci
, temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
872 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
873 xhci_writel(xhci
, ER_IRQ_DISABLE(temp
),
874 &xhci
->ir_set
->irq_pending
);
875 xhci_print_ir_set(xhci
, 0);
877 xhci_dbg(xhci
, "cleaning up memory\n");
878 xhci_mem_cleanup(xhci
);
879 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
880 xhci_readl(xhci
, &xhci
->op_regs
->status
));
882 /* USB core calls the PCI reinit and start functions twice:
883 * first with the primary HCD, and then with the secondary HCD.
884 * If we don't do the same, the host will never be started.
886 if (!usb_hcd_is_primary_hcd(hcd
))
889 secondary_hcd
= xhci
->shared_hcd
;
891 xhci_dbg(xhci
, "Initialize the xhci_hcd\n");
892 retval
= xhci_init(hcd
->primary_hcd
);
895 xhci_dbg(xhci
, "Start the primary HCD\n");
896 retval
= xhci_run(hcd
->primary_hcd
);
898 xhci_dbg(xhci
, "Start the secondary HCD\n");
899 retval
= xhci_run(secondary_hcd
);
901 hcd
->state
= HC_STATE_SUSPENDED
;
902 xhci
->shared_hcd
->state
= HC_STATE_SUSPENDED
;
906 /* step 4: set Run/Stop bit */
907 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
909 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
910 handshake(xhci
, &xhci
->op_regs
->status
, STS_HALT
,
913 /* step 5: walk topology and initialize portsc,
914 * portpmsc and portli
916 /* this is done in bus_resume */
918 /* step 6: restart each of the previously
919 * Running endpoints by ringing their doorbells
922 spin_unlock_irq(&xhci
->lock
);
926 usb_hcd_resume_root_hub(hcd
);
927 usb_hcd_resume_root_hub(xhci
->shared_hcd
);
931 #endif /* CONFIG_PM */
933 /*-------------------------------------------------------------------------*/
936 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
937 * HCDs. Find the index for an endpoint given its descriptor. Use the return
938 * value to right shift 1 for the bitmask.
940 * Index = (epnum * 2) + direction - 1,
941 * where direction = 0 for OUT, 1 for IN.
942 * For control endpoints, the IN index is used (OUT index is unused), so
943 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
945 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor
*desc
)
948 if (usb_endpoint_xfer_control(desc
))
949 index
= (unsigned int) (usb_endpoint_num(desc
)*2);
951 index
= (unsigned int) (usb_endpoint_num(desc
)*2) +
952 (usb_endpoint_dir_in(desc
) ? 1 : 0) - 1;
956 /* Find the flag for this endpoint (for use in the control context). Use the
957 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
960 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor
*desc
)
962 return 1 << (xhci_get_endpoint_index(desc
) + 1);
965 /* Find the flag for this endpoint (for use in the control context). Use the
966 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
969 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index
)
971 return 1 << (ep_index
+ 1);
974 /* Compute the last valid endpoint context index. Basically, this is the
975 * endpoint index plus one. For slot contexts with more than valid endpoint,
976 * we find the most significant bit set in the added contexts flags.
977 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
978 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
980 unsigned int xhci_last_valid_endpoint(u32 added_ctxs
)
982 return fls(added_ctxs
) - 1;
985 /* Returns 1 if the arguments are OK;
986 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
988 static int xhci_check_args(struct usb_hcd
*hcd
, struct usb_device
*udev
,
989 struct usb_host_endpoint
*ep
, int check_ep
, bool check_virt_dev
,
991 struct xhci_hcd
*xhci
;
992 struct xhci_virt_device
*virt_dev
;
994 if (!hcd
|| (check_ep
&& !ep
) || !udev
) {
995 printk(KERN_DEBUG
"xHCI %s called with invalid args\n",
1000 printk(KERN_DEBUG
"xHCI %s called for root hub\n",
1005 xhci
= hcd_to_xhci(hcd
);
1006 if (xhci
->xhc_state
& XHCI_STATE_HALTED
)
1009 if (check_virt_dev
) {
1010 if (!udev
->slot_id
|| !xhci
->devs
[udev
->slot_id
]) {
1011 printk(KERN_DEBUG
"xHCI %s called with unaddressed "
1016 virt_dev
= xhci
->devs
[udev
->slot_id
];
1017 if (virt_dev
->udev
!= udev
) {
1018 printk(KERN_DEBUG
"xHCI %s called with udev and "
1019 "virt_dev does not match\n", func
);
1027 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
1028 struct usb_device
*udev
, struct xhci_command
*command
,
1029 bool ctx_change
, bool must_succeed
);
1032 * Full speed devices may have a max packet size greater than 8 bytes, but the
1033 * USB core doesn't know that until it reads the first 8 bytes of the
1034 * descriptor. If the usb_device's max packet size changes after that point,
1035 * we need to issue an evaluate context command and wait on it.
1037 static int xhci_check_maxpacket(struct xhci_hcd
*xhci
, unsigned int slot_id
,
1038 unsigned int ep_index
, struct urb
*urb
)
1040 struct xhci_container_ctx
*in_ctx
;
1041 struct xhci_container_ctx
*out_ctx
;
1042 struct xhci_input_control_ctx
*ctrl_ctx
;
1043 struct xhci_ep_ctx
*ep_ctx
;
1044 int max_packet_size
;
1045 int hw_max_packet_size
;
1048 out_ctx
= xhci
->devs
[slot_id
]->out_ctx
;
1049 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1050 hw_max_packet_size
= MAX_PACKET_DECODED(le32_to_cpu(ep_ctx
->ep_info2
));
1051 max_packet_size
= usb_endpoint_maxp(&urb
->dev
->ep0
.desc
);
1052 if (hw_max_packet_size
!= max_packet_size
) {
1053 xhci_dbg(xhci
, "Max Packet Size for ep 0 changed.\n");
1054 xhci_dbg(xhci
, "Max packet size in usb_device = %d\n",
1056 xhci_dbg(xhci
, "Max packet size in xHCI HW = %d\n",
1057 hw_max_packet_size
);
1058 xhci_dbg(xhci
, "Issuing evaluate context command.\n");
1060 /* Set up the modified control endpoint 0 */
1061 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
1062 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
1063 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
1064 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
1065 ep_ctx
->ep_info2
&= cpu_to_le32(~MAX_PACKET_MASK
);
1066 ep_ctx
->ep_info2
|= cpu_to_le32(MAX_PACKET(max_packet_size
));
1068 /* Set up the input context flags for the command */
1069 /* FIXME: This won't work if a non-default control endpoint
1070 * changes max packet sizes.
1072 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1073 ctrl_ctx
->add_flags
= cpu_to_le32(EP0_FLAG
);
1074 ctrl_ctx
->drop_flags
= 0;
1076 xhci_dbg(xhci
, "Slot %d input context\n", slot_id
);
1077 xhci_dbg_ctx(xhci
, in_ctx
, ep_index
);
1078 xhci_dbg(xhci
, "Slot %d output context\n", slot_id
);
1079 xhci_dbg_ctx(xhci
, out_ctx
, ep_index
);
1081 ret
= xhci_configure_endpoint(xhci
, urb
->dev
, NULL
,
1084 /* Clean up the input context for later use by bandwidth
1087 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
);
1093 * non-error returns are a promise to giveback() the urb later
1094 * we drop ownership so next owner (or urb unlink) can get it
1096 int xhci_urb_enqueue(struct usb_hcd
*hcd
, struct urb
*urb
, gfp_t mem_flags
)
1098 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
1099 struct xhci_td
*buffer
;
1100 unsigned long flags
;
1102 unsigned int slot_id
, ep_index
;
1103 struct urb_priv
*urb_priv
;
1106 if (!urb
|| xhci_check_args(hcd
, urb
->dev
, urb
->ep
,
1107 true, true, __func__
) <= 0)
1110 slot_id
= urb
->dev
->slot_id
;
1111 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1113 if (!HCD_HW_ACCESSIBLE(hcd
)) {
1114 if (!in_interrupt())
1115 xhci_dbg(xhci
, "urb submitted during PCI suspend\n");
1120 if (usb_endpoint_xfer_isoc(&urb
->ep
->desc
))
1121 size
= urb
->number_of_packets
;
1125 urb_priv
= kzalloc(sizeof(struct urb_priv
) +
1126 size
* sizeof(struct xhci_td
*), mem_flags
);
1130 buffer
= kzalloc(size
* sizeof(struct xhci_td
), mem_flags
);
1136 for (i
= 0; i
< size
; i
++) {
1137 urb_priv
->td
[i
] = buffer
;
1141 urb_priv
->length
= size
;
1142 urb_priv
->td_cnt
= 0;
1143 urb
->hcpriv
= urb_priv
;
1145 if (usb_endpoint_xfer_control(&urb
->ep
->desc
)) {
1146 /* Check to see if the max packet size for the default control
1147 * endpoint changed during FS device enumeration
1149 if (urb
->dev
->speed
== USB_SPEED_FULL
) {
1150 ret
= xhci_check_maxpacket(xhci
, slot_id
,
1153 xhci_urb_free_priv(xhci
, urb_priv
);
1159 /* We have a spinlock and interrupts disabled, so we must pass
1160 * atomic context to this function, which may allocate memory.
1162 spin_lock_irqsave(&xhci
->lock
, flags
);
1163 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1165 ret
= xhci_queue_ctrl_tx(xhci
, GFP_ATOMIC
, urb
,
1169 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1170 } else if (usb_endpoint_xfer_bulk(&urb
->ep
->desc
)) {
1171 spin_lock_irqsave(&xhci
->lock
, flags
);
1172 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1174 if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
1175 EP_GETTING_STREAMS
) {
1176 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1177 "is transitioning to using streams.\n");
1179 } else if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
1180 EP_GETTING_NO_STREAMS
) {
1181 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1182 "is transitioning to "
1183 "not having streams.\n");
1186 ret
= xhci_queue_bulk_tx(xhci
, GFP_ATOMIC
, urb
,
1191 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1192 } else if (usb_endpoint_xfer_int(&urb
->ep
->desc
)) {
1193 spin_lock_irqsave(&xhci
->lock
, flags
);
1194 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1196 ret
= xhci_queue_intr_tx(xhci
, GFP_ATOMIC
, urb
,
1200 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1202 spin_lock_irqsave(&xhci
->lock
, flags
);
1203 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1205 ret
= xhci_queue_isoc_tx_prepare(xhci
, GFP_ATOMIC
, urb
,
1209 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1214 xhci_dbg(xhci
, "Ep 0x%x: URB %p submitted for "
1215 "non-responsive xHCI host.\n",
1216 urb
->ep
->desc
.bEndpointAddress
, urb
);
1219 xhci_urb_free_priv(xhci
, urb_priv
);
1221 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1225 /* Get the right ring for the given URB.
1226 * If the endpoint supports streams, boundary check the URB's stream ID.
1227 * If the endpoint doesn't support streams, return the singular endpoint ring.
1229 static struct xhci_ring
*xhci_urb_to_transfer_ring(struct xhci_hcd
*xhci
,
1232 unsigned int slot_id
;
1233 unsigned int ep_index
;
1234 unsigned int stream_id
;
1235 struct xhci_virt_ep
*ep
;
1237 slot_id
= urb
->dev
->slot_id
;
1238 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1239 stream_id
= urb
->stream_id
;
1240 ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
1241 /* Common case: no streams */
1242 if (!(ep
->ep_state
& EP_HAS_STREAMS
))
1245 if (stream_id
== 0) {
1247 "WARN: Slot ID %u, ep index %u has streams, "
1248 "but URB has no stream ID.\n",
1253 if (stream_id
< ep
->stream_info
->num_streams
)
1254 return ep
->stream_info
->stream_rings
[stream_id
];
1257 "WARN: Slot ID %u, ep index %u has "
1258 "stream IDs 1 to %u allocated, "
1259 "but stream ID %u is requested.\n",
1261 ep
->stream_info
->num_streams
- 1,
1267 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1268 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1269 * should pick up where it left off in the TD, unless a Set Transfer Ring
1270 * Dequeue Pointer is issued.
1272 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1273 * the ring. Since the ring is a contiguous structure, they can't be physically
1274 * removed. Instead, there are two options:
1276 * 1) If the HC is in the middle of processing the URB to be canceled, we
1277 * simply move the ring's dequeue pointer past those TRBs using the Set
1278 * Transfer Ring Dequeue Pointer command. This will be the common case,
1279 * when drivers timeout on the last submitted URB and attempt to cancel.
1281 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1282 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1283 * HC will need to invalidate the any TRBs it has cached after the stop
1284 * endpoint command, as noted in the xHCI 0.95 errata.
1286 * 3) The TD may have completed by the time the Stop Endpoint Command
1287 * completes, so software needs to handle that case too.
1289 * This function should protect against the TD enqueueing code ringing the
1290 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1291 * It also needs to account for multiple cancellations on happening at the same
1292 * time for the same endpoint.
1294 * Note that this function can be called in any context, or so says
1295 * usb_hcd_unlink_urb()
1297 int xhci_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
1299 unsigned long flags
;
1302 struct xhci_hcd
*xhci
;
1303 struct urb_priv
*urb_priv
;
1305 unsigned int ep_index
;
1306 struct xhci_ring
*ep_ring
;
1307 struct xhci_virt_ep
*ep
;
1309 xhci
= hcd_to_xhci(hcd
);
1310 spin_lock_irqsave(&xhci
->lock
, flags
);
1311 /* Make sure the URB hasn't completed or been unlinked already */
1312 ret
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
1313 if (ret
|| !urb
->hcpriv
)
1315 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
1316 if (temp
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
1317 xhci_dbg(xhci
, "HW died, freeing TD.\n");
1318 urb_priv
= urb
->hcpriv
;
1319 for (i
= urb_priv
->td_cnt
; i
< urb_priv
->length
; i
++) {
1320 td
= urb_priv
->td
[i
];
1321 if (!list_empty(&td
->td_list
))
1322 list_del_init(&td
->td_list
);
1323 if (!list_empty(&td
->cancelled_td_list
))
1324 list_del_init(&td
->cancelled_td_list
);
1327 usb_hcd_unlink_urb_from_ep(hcd
, urb
);
1328 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1329 usb_hcd_giveback_urb(hcd
, urb
, -ESHUTDOWN
);
1330 xhci_urb_free_priv(xhci
, urb_priv
);
1333 if ((xhci
->xhc_state
& XHCI_STATE_DYING
) ||
1334 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
1335 xhci_dbg(xhci
, "Ep 0x%x: URB %p to be canceled on "
1336 "non-responsive xHCI host.\n",
1337 urb
->ep
->desc
.bEndpointAddress
, urb
);
1338 /* Let the stop endpoint command watchdog timer (which set this
1339 * state) finish cleaning up the endpoint TD lists. We must
1340 * have caught it in the middle of dropping a lock and giving
1346 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1347 ep
= &xhci
->devs
[urb
->dev
->slot_id
]->eps
[ep_index
];
1348 ep_ring
= xhci_urb_to_transfer_ring(xhci
, urb
);
1354 urb_priv
= urb
->hcpriv
;
1355 i
= urb_priv
->td_cnt
;
1356 if (i
< urb_priv
->length
)
1357 xhci_dbg(xhci
, "Cancel URB %p, dev %s, ep 0x%x, "
1358 "starting at offset 0x%llx\n",
1359 urb
, urb
->dev
->devpath
,
1360 urb
->ep
->desc
.bEndpointAddress
,
1361 (unsigned long long) xhci_trb_virt_to_dma(
1362 urb_priv
->td
[i
]->start_seg
,
1363 urb_priv
->td
[i
]->first_trb
));
1365 for (; i
< urb_priv
->length
; i
++) {
1366 td
= urb_priv
->td
[i
];
1367 list_add_tail(&td
->cancelled_td_list
, &ep
->cancelled_td_list
);
1370 /* Queue a stop endpoint command, but only if this is
1371 * the first cancellation to be handled.
1373 if (!(ep
->ep_state
& EP_HALT_PENDING
)) {
1374 ep
->ep_state
|= EP_HALT_PENDING
;
1375 ep
->stop_cmds_pending
++;
1376 ep
->stop_cmd_timer
.expires
= jiffies
+
1377 XHCI_STOP_EP_CMD_TIMEOUT
* HZ
;
1378 add_timer(&ep
->stop_cmd_timer
);
1379 xhci_queue_stop_endpoint(xhci
, urb
->dev
->slot_id
, ep_index
, 0);
1380 xhci_ring_cmd_db(xhci
);
1383 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1387 /* Drop an endpoint from a new bandwidth configuration for this device.
1388 * Only one call to this function is allowed per endpoint before
1389 * check_bandwidth() or reset_bandwidth() must be called.
1390 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1391 * add the endpoint to the schedule with possibly new parameters denoted by a
1392 * different endpoint descriptor in usb_host_endpoint.
1393 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1396 * The USB core will not allow URBs to be queued to an endpoint that is being
1397 * disabled, so there's no need for mutual exclusion to protect
1398 * the xhci->devs[slot_id] structure.
1400 int xhci_drop_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1401 struct usb_host_endpoint
*ep
)
1403 struct xhci_hcd
*xhci
;
1404 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1405 struct xhci_input_control_ctx
*ctrl_ctx
;
1406 struct xhci_slot_ctx
*slot_ctx
;
1407 unsigned int last_ctx
;
1408 unsigned int ep_index
;
1409 struct xhci_ep_ctx
*ep_ctx
;
1411 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1414 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1417 xhci
= hcd_to_xhci(hcd
);
1418 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1421 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
1422 drop_flag
= xhci_get_endpoint_flag(&ep
->desc
);
1423 if (drop_flag
== SLOT_FLAG
|| drop_flag
== EP0_FLAG
) {
1424 xhci_dbg(xhci
, "xHCI %s - can't drop slot or ep 0 %#x\n",
1425 __func__
, drop_flag
);
1429 in_ctx
= xhci
->devs
[udev
->slot_id
]->in_ctx
;
1430 out_ctx
= xhci
->devs
[udev
->slot_id
]->out_ctx
;
1431 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1432 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1433 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1434 /* If the HC already knows the endpoint is disabled,
1435 * or the HCD has noted it is disabled, ignore this request
1437 if (((ep_ctx
->ep_info
& cpu_to_le32(EP_STATE_MASK
)) ==
1438 cpu_to_le32(EP_STATE_DISABLED
)) ||
1439 le32_to_cpu(ctrl_ctx
->drop_flags
) &
1440 xhci_get_endpoint_flag(&ep
->desc
)) {
1441 xhci_warn(xhci
, "xHCI %s called with disabled ep %p\n",
1446 ctrl_ctx
->drop_flags
|= cpu_to_le32(drop_flag
);
1447 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1449 ctrl_ctx
->add_flags
&= cpu_to_le32(~drop_flag
);
1450 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1452 last_ctx
= xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx
->add_flags
));
1453 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1454 /* Update the last valid endpoint context, if we deleted the last one */
1455 if ((le32_to_cpu(slot_ctx
->dev_info
) & LAST_CTX_MASK
) >
1456 LAST_CTX(last_ctx
)) {
1457 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1458 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(last_ctx
));
1460 new_slot_info
= le32_to_cpu(slot_ctx
->dev_info
);
1462 xhci_endpoint_zero(xhci
, xhci
->devs
[udev
->slot_id
], ep
);
1464 xhci_dbg(xhci
, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1465 (unsigned int) ep
->desc
.bEndpointAddress
,
1467 (unsigned int) new_drop_flags
,
1468 (unsigned int) new_add_flags
,
1469 (unsigned int) new_slot_info
);
1473 /* Add an endpoint to a new possible bandwidth configuration for this device.
1474 * Only one call to this function is allowed per endpoint before
1475 * check_bandwidth() or reset_bandwidth() must be called.
1476 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1477 * add the endpoint to the schedule with possibly new parameters denoted by a
1478 * different endpoint descriptor in usb_host_endpoint.
1479 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1482 * The USB core will not allow URBs to be queued to an endpoint until the
1483 * configuration or alt setting is installed in the device, so there's no need
1484 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1486 int xhci_add_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1487 struct usb_host_endpoint
*ep
)
1489 struct xhci_hcd
*xhci
;
1490 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1491 unsigned int ep_index
;
1492 struct xhci_ep_ctx
*ep_ctx
;
1493 struct xhci_slot_ctx
*slot_ctx
;
1494 struct xhci_input_control_ctx
*ctrl_ctx
;
1496 unsigned int last_ctx
;
1497 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1498 struct xhci_virt_device
*virt_dev
;
1501 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1503 /* So we won't queue a reset ep command for a root hub */
1507 xhci
= hcd_to_xhci(hcd
);
1508 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1511 added_ctxs
= xhci_get_endpoint_flag(&ep
->desc
);
1512 last_ctx
= xhci_last_valid_endpoint(added_ctxs
);
1513 if (added_ctxs
== SLOT_FLAG
|| added_ctxs
== EP0_FLAG
) {
1514 /* FIXME when we have to issue an evaluate endpoint command to
1515 * deal with ep0 max packet size changing once we get the
1518 xhci_dbg(xhci
, "xHCI %s - can't add slot or ep 0 %#x\n",
1519 __func__
, added_ctxs
);
1523 virt_dev
= xhci
->devs
[udev
->slot_id
];
1524 in_ctx
= virt_dev
->in_ctx
;
1525 out_ctx
= virt_dev
->out_ctx
;
1526 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1527 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1528 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1530 /* If this endpoint is already in use, and the upper layers are trying
1531 * to add it again without dropping it, reject the addition.
1533 if (virt_dev
->eps
[ep_index
].ring
&&
1534 !(le32_to_cpu(ctrl_ctx
->drop_flags
) &
1535 xhci_get_endpoint_flag(&ep
->desc
))) {
1536 xhci_warn(xhci
, "Trying to add endpoint 0x%x "
1537 "without dropping it.\n",
1538 (unsigned int) ep
->desc
.bEndpointAddress
);
1542 /* If the HCD has already noted the endpoint is enabled,
1543 * ignore this request.
1545 if (le32_to_cpu(ctrl_ctx
->add_flags
) &
1546 xhci_get_endpoint_flag(&ep
->desc
)) {
1547 xhci_warn(xhci
, "xHCI %s called with enabled ep %p\n",
1553 * Configuration and alternate setting changes must be done in
1554 * process context, not interrupt context (or so documenation
1555 * for usb_set_interface() and usb_set_configuration() claim).
1557 if (xhci_endpoint_init(xhci
, virt_dev
, udev
, ep
, GFP_NOIO
) < 0) {
1558 dev_dbg(&udev
->dev
, "%s - could not initialize ep %#x\n",
1559 __func__
, ep
->desc
.bEndpointAddress
);
1563 ctrl_ctx
->add_flags
|= cpu_to_le32(added_ctxs
);
1564 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1566 /* If xhci_endpoint_disable() was called for this endpoint, but the
1567 * xHC hasn't been notified yet through the check_bandwidth() call,
1568 * this re-adds a new state for the endpoint from the new endpoint
1569 * descriptors. We must drop and re-add this endpoint, so we leave the
1572 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1574 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1575 /* Update the last valid endpoint context, if we just added one past */
1576 if ((le32_to_cpu(slot_ctx
->dev_info
) & LAST_CTX_MASK
) <
1577 LAST_CTX(last_ctx
)) {
1578 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1579 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(last_ctx
));
1581 new_slot_info
= le32_to_cpu(slot_ctx
->dev_info
);
1583 /* Store the usb_device pointer for later use */
1586 xhci_dbg(xhci
, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1587 (unsigned int) ep
->desc
.bEndpointAddress
,
1589 (unsigned int) new_drop_flags
,
1590 (unsigned int) new_add_flags
,
1591 (unsigned int) new_slot_info
);
1595 static void xhci_zero_in_ctx(struct xhci_hcd
*xhci
, struct xhci_virt_device
*virt_dev
)
1597 struct xhci_input_control_ctx
*ctrl_ctx
;
1598 struct xhci_ep_ctx
*ep_ctx
;
1599 struct xhci_slot_ctx
*slot_ctx
;
1602 /* When a device's add flag and drop flag are zero, any subsequent
1603 * configure endpoint command will leave that endpoint's state
1604 * untouched. Make sure we don't leave any old state in the input
1605 * endpoint contexts.
1607 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
1608 ctrl_ctx
->drop_flags
= 0;
1609 ctrl_ctx
->add_flags
= 0;
1610 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
1611 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1612 /* Endpoint 0 is always valid */
1613 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(1));
1614 for (i
= 1; i
< 31; ++i
) {
1615 ep_ctx
= xhci_get_ep_ctx(xhci
, virt_dev
->in_ctx
, i
);
1616 ep_ctx
->ep_info
= 0;
1617 ep_ctx
->ep_info2
= 0;
1619 ep_ctx
->tx_info
= 0;
1623 static int xhci_configure_endpoint_result(struct xhci_hcd
*xhci
,
1624 struct usb_device
*udev
, u32
*cmd_status
)
1628 switch (*cmd_status
) {
1630 dev_warn(&udev
->dev
, "Not enough host controller resources "
1631 "for new device state.\n");
1633 /* FIXME: can we allocate more resources for the HC? */
1636 case COMP_2ND_BW_ERR
:
1637 dev_warn(&udev
->dev
, "Not enough bandwidth "
1638 "for new device state.\n");
1640 /* FIXME: can we go back to the old state? */
1643 /* the HCD set up something wrong */
1644 dev_warn(&udev
->dev
, "ERROR: Endpoint drop flag = 0, "
1646 "and endpoint is not disabled.\n");
1650 dev_warn(&udev
->dev
, "ERROR: Incompatible device for endpoint "
1651 "configure command.\n");
1655 dev_dbg(&udev
->dev
, "Successful Endpoint Configure command\n");
1659 xhci_err(xhci
, "ERROR: unexpected command completion "
1660 "code 0x%x.\n", *cmd_status
);
1667 static int xhci_evaluate_context_result(struct xhci_hcd
*xhci
,
1668 struct usb_device
*udev
, u32
*cmd_status
)
1671 struct xhci_virt_device
*virt_dev
= xhci
->devs
[udev
->slot_id
];
1673 switch (*cmd_status
) {
1675 dev_warn(&udev
->dev
, "WARN: xHCI driver setup invalid evaluate "
1676 "context command.\n");
1680 dev_warn(&udev
->dev
, "WARN: slot not enabled for"
1681 "evaluate context command.\n");
1682 case COMP_CTX_STATE
:
1683 dev_warn(&udev
->dev
, "WARN: invalid context state for "
1684 "evaluate context command.\n");
1685 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 1);
1689 dev_warn(&udev
->dev
, "ERROR: Incompatible device for evaluate "
1690 "context command.\n");
1694 /* Max Exit Latency too large error */
1695 dev_warn(&udev
->dev
, "WARN: Max Exit Latency too large\n");
1699 dev_dbg(&udev
->dev
, "Successful evaluate context command\n");
1703 xhci_err(xhci
, "ERROR: unexpected command completion "
1704 "code 0x%x.\n", *cmd_status
);
1711 static u32
xhci_count_num_new_endpoints(struct xhci_hcd
*xhci
,
1712 struct xhci_container_ctx
*in_ctx
)
1714 struct xhci_input_control_ctx
*ctrl_ctx
;
1715 u32 valid_add_flags
;
1716 u32 valid_drop_flags
;
1718 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1719 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1720 * (bit 1). The default control endpoint is added during the Address
1721 * Device command and is never removed until the slot is disabled.
1723 valid_add_flags
= ctrl_ctx
->add_flags
>> 2;
1724 valid_drop_flags
= ctrl_ctx
->drop_flags
>> 2;
1726 /* Use hweight32 to count the number of ones in the add flags, or
1727 * number of endpoints added. Don't count endpoints that are changed
1728 * (both added and dropped).
1730 return hweight32(valid_add_flags
) -
1731 hweight32(valid_add_flags
& valid_drop_flags
);
1734 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd
*xhci
,
1735 struct xhci_container_ctx
*in_ctx
)
1737 struct xhci_input_control_ctx
*ctrl_ctx
;
1738 u32 valid_add_flags
;
1739 u32 valid_drop_flags
;
1741 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1742 valid_add_flags
= ctrl_ctx
->add_flags
>> 2;
1743 valid_drop_flags
= ctrl_ctx
->drop_flags
>> 2;
1745 return hweight32(valid_drop_flags
) -
1746 hweight32(valid_add_flags
& valid_drop_flags
);
1750 * We need to reserve the new number of endpoints before the configure endpoint
1751 * command completes. We can't subtract the dropped endpoints from the number
1752 * of active endpoints until the command completes because we can oversubscribe
1753 * the host in this case:
1755 * - the first configure endpoint command drops more endpoints than it adds
1756 * - a second configure endpoint command that adds more endpoints is queued
1757 * - the first configure endpoint command fails, so the config is unchanged
1758 * - the second command may succeed, even though there isn't enough resources
1760 * Must be called with xhci->lock held.
1762 static int xhci_reserve_host_resources(struct xhci_hcd
*xhci
,
1763 struct xhci_container_ctx
*in_ctx
)
1767 added_eps
= xhci_count_num_new_endpoints(xhci
, in_ctx
);
1768 if (xhci
->num_active_eps
+ added_eps
> xhci
->limit_active_eps
) {
1769 xhci_dbg(xhci
, "Not enough ep ctxs: "
1770 "%u active, need to add %u, limit is %u.\n",
1771 xhci
->num_active_eps
, added_eps
,
1772 xhci
->limit_active_eps
);
1775 xhci
->num_active_eps
+= added_eps
;
1776 xhci_dbg(xhci
, "Adding %u ep ctxs, %u now active.\n", added_eps
,
1777 xhci
->num_active_eps
);
1782 * The configure endpoint was failed by the xHC for some other reason, so we
1783 * need to revert the resources that failed configuration would have used.
1785 * Must be called with xhci->lock held.
1787 static void xhci_free_host_resources(struct xhci_hcd
*xhci
,
1788 struct xhci_container_ctx
*in_ctx
)
1792 num_failed_eps
= xhci_count_num_new_endpoints(xhci
, in_ctx
);
1793 xhci
->num_active_eps
-= num_failed_eps
;
1794 xhci_dbg(xhci
, "Removing %u failed ep ctxs, %u now active.\n",
1796 xhci
->num_active_eps
);
1800 * Now that the command has completed, clean up the active endpoint count by
1801 * subtracting out the endpoints that were dropped (but not changed).
1803 * Must be called with xhci->lock held.
1805 static void xhci_finish_resource_reservation(struct xhci_hcd
*xhci
,
1806 struct xhci_container_ctx
*in_ctx
)
1808 u32 num_dropped_eps
;
1810 num_dropped_eps
= xhci_count_num_dropped_endpoints(xhci
, in_ctx
);
1811 xhci
->num_active_eps
-= num_dropped_eps
;
1812 if (num_dropped_eps
)
1813 xhci_dbg(xhci
, "Removing %u dropped ep ctxs, %u now active.\n",
1815 xhci
->num_active_eps
);
1818 unsigned int xhci_get_block_size(struct usb_device
*udev
)
1820 switch (udev
->speed
) {
1822 case USB_SPEED_FULL
:
1824 case USB_SPEED_HIGH
:
1826 case USB_SPEED_SUPER
:
1828 case USB_SPEED_UNKNOWN
:
1829 case USB_SPEED_WIRELESS
:
1831 /* Should never happen */
1836 unsigned int xhci_get_largest_overhead(struct xhci_interval_bw
*interval_bw
)
1838 if (interval_bw
->overhead
[LS_OVERHEAD_TYPE
])
1840 if (interval_bw
->overhead
[FS_OVERHEAD_TYPE
])
1845 /* If we are changing a LS/FS device under a HS hub,
1846 * make sure (if we are activating a new TT) that the HS bus has enough
1847 * bandwidth for this new TT.
1849 static int xhci_check_tt_bw_table(struct xhci_hcd
*xhci
,
1850 struct xhci_virt_device
*virt_dev
,
1853 struct xhci_interval_bw_table
*bw_table
;
1854 struct xhci_tt_bw_info
*tt_info
;
1856 /* Find the bandwidth table for the root port this TT is attached to. */
1857 bw_table
= &xhci
->rh_bw
[virt_dev
->real_port
- 1].bw_table
;
1858 tt_info
= virt_dev
->tt_info
;
1859 /* If this TT already had active endpoints, the bandwidth for this TT
1860 * has already been added. Removing all periodic endpoints (and thus
1861 * making the TT enactive) will only decrease the bandwidth used.
1865 if (old_active_eps
== 0 && tt_info
->active_eps
!= 0) {
1866 if (bw_table
->bw_used
+ TT_HS_OVERHEAD
> HS_BW_LIMIT
)
1870 /* Not sure why we would have no new active endpoints...
1872 * Maybe because of an Evaluate Context change for a hub update or a
1873 * control endpoint 0 max packet size change?
1874 * FIXME: skip the bandwidth calculation in that case.
1879 static int xhci_check_ss_bw(struct xhci_hcd
*xhci
,
1880 struct xhci_virt_device
*virt_dev
)
1882 unsigned int bw_reserved
;
1884 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_IN
, 100);
1885 if (virt_dev
->bw_table
->ss_bw_in
> (SS_BW_LIMIT_IN
- bw_reserved
))
1888 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_OUT
, 100);
1889 if (virt_dev
->bw_table
->ss_bw_out
> (SS_BW_LIMIT_OUT
- bw_reserved
))
1896 * This algorithm is a very conservative estimate of the worst-case scheduling
1897 * scenario for any one interval. The hardware dynamically schedules the
1898 * packets, so we can't tell which microframe could be the limiting factor in
1899 * the bandwidth scheduling. This only takes into account periodic endpoints.
1901 * Obviously, we can't solve an NP complete problem to find the minimum worst
1902 * case scenario. Instead, we come up with an estimate that is no less than
1903 * the worst case bandwidth used for any one microframe, but may be an
1906 * We walk the requirements for each endpoint by interval, starting with the
1907 * smallest interval, and place packets in the schedule where there is only one
1908 * possible way to schedule packets for that interval. In order to simplify
1909 * this algorithm, we record the largest max packet size for each interval, and
1910 * assume all packets will be that size.
1912 * For interval 0, we obviously must schedule all packets for each interval.
1913 * The bandwidth for interval 0 is just the amount of data to be transmitted
1914 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
1915 * the number of packets).
1917 * For interval 1, we have two possible microframes to schedule those packets
1918 * in. For this algorithm, if we can schedule the same number of packets for
1919 * each possible scheduling opportunity (each microframe), we will do so. The
1920 * remaining number of packets will be saved to be transmitted in the gaps in
1921 * the next interval's scheduling sequence.
1923 * As we move those remaining packets to be scheduled with interval 2 packets,
1924 * we have to double the number of remaining packets to transmit. This is
1925 * because the intervals are actually powers of 2, and we would be transmitting
1926 * the previous interval's packets twice in this interval. We also have to be
1927 * sure that when we look at the largest max packet size for this interval, we
1928 * also look at the largest max packet size for the remaining packets and take
1929 * the greater of the two.
1931 * The algorithm continues to evenly distribute packets in each scheduling
1932 * opportunity, and push the remaining packets out, until we get to the last
1933 * interval. Then those packets and their associated overhead are just added
1934 * to the bandwidth used.
1936 static int xhci_check_bw_table(struct xhci_hcd
*xhci
,
1937 struct xhci_virt_device
*virt_dev
,
1940 unsigned int bw_reserved
;
1941 unsigned int max_bandwidth
;
1942 unsigned int bw_used
;
1943 unsigned int block_size
;
1944 struct xhci_interval_bw_table
*bw_table
;
1945 unsigned int packet_size
= 0;
1946 unsigned int overhead
= 0;
1947 unsigned int packets_transmitted
= 0;
1948 unsigned int packets_remaining
= 0;
1951 if (virt_dev
->udev
->speed
== USB_SPEED_SUPER
)
1952 return xhci_check_ss_bw(xhci
, virt_dev
);
1954 if (virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
1955 max_bandwidth
= HS_BW_LIMIT
;
1956 /* Convert percent of bus BW reserved to blocks reserved */
1957 bw_reserved
= DIV_ROUND_UP(HS_BW_RESERVED
* max_bandwidth
, 100);
1959 max_bandwidth
= FS_BW_LIMIT
;
1960 bw_reserved
= DIV_ROUND_UP(FS_BW_RESERVED
* max_bandwidth
, 100);
1963 bw_table
= virt_dev
->bw_table
;
1964 /* We need to translate the max packet size and max ESIT payloads into
1965 * the units the hardware uses.
1967 block_size
= xhci_get_block_size(virt_dev
->udev
);
1969 /* If we are manipulating a LS/FS device under a HS hub, double check
1970 * that the HS bus has enough bandwidth if we are activing a new TT.
1972 if (virt_dev
->tt_info
) {
1973 xhci_dbg(xhci
, "Recalculating BW for rootport %u\n",
1974 virt_dev
->real_port
);
1975 if (xhci_check_tt_bw_table(xhci
, virt_dev
, old_active_eps
)) {
1976 xhci_warn(xhci
, "Not enough bandwidth on HS bus for "
1977 "newly activated TT.\n");
1980 xhci_dbg(xhci
, "Recalculating BW for TT slot %u port %u\n",
1981 virt_dev
->tt_info
->slot_id
,
1982 virt_dev
->tt_info
->ttport
);
1984 xhci_dbg(xhci
, "Recalculating BW for rootport %u\n",
1985 virt_dev
->real_port
);
1988 /* Add in how much bandwidth will be used for interval zero, or the
1989 * rounded max ESIT payload + number of packets * largest overhead.
1991 bw_used
= DIV_ROUND_UP(bw_table
->interval0_esit_payload
, block_size
) +
1992 bw_table
->interval_bw
[0].num_packets
*
1993 xhci_get_largest_overhead(&bw_table
->interval_bw
[0]);
1995 for (i
= 1; i
< XHCI_MAX_INTERVAL
; i
++) {
1996 unsigned int bw_added
;
1997 unsigned int largest_mps
;
1998 unsigned int interval_overhead
;
2001 * How many packets could we transmit in this interval?
2002 * If packets didn't fit in the previous interval, we will need
2003 * to transmit that many packets twice within this interval.
2005 packets_remaining
= 2 * packets_remaining
+
2006 bw_table
->interval_bw
[i
].num_packets
;
2008 /* Find the largest max packet size of this or the previous
2011 if (list_empty(&bw_table
->interval_bw
[i
].endpoints
))
2014 struct xhci_virt_ep
*virt_ep
;
2015 struct list_head
*ep_entry
;
2017 ep_entry
= bw_table
->interval_bw
[i
].endpoints
.next
;
2018 virt_ep
= list_entry(ep_entry
,
2019 struct xhci_virt_ep
, bw_endpoint_list
);
2020 /* Convert to blocks, rounding up */
2021 largest_mps
= DIV_ROUND_UP(
2022 virt_ep
->bw_info
.max_packet_size
,
2025 if (largest_mps
> packet_size
)
2026 packet_size
= largest_mps
;
2028 /* Use the larger overhead of this or the previous interval. */
2029 interval_overhead
= xhci_get_largest_overhead(
2030 &bw_table
->interval_bw
[i
]);
2031 if (interval_overhead
> overhead
)
2032 overhead
= interval_overhead
;
2034 /* How many packets can we evenly distribute across
2035 * (1 << (i + 1)) possible scheduling opportunities?
2037 packets_transmitted
= packets_remaining
>> (i
+ 1);
2039 /* Add in the bandwidth used for those scheduled packets */
2040 bw_added
= packets_transmitted
* (overhead
+ packet_size
);
2042 /* How many packets do we have remaining to transmit? */
2043 packets_remaining
= packets_remaining
% (1 << (i
+ 1));
2045 /* What largest max packet size should those packets have? */
2046 /* If we've transmitted all packets, don't carry over the
2047 * largest packet size.
2049 if (packets_remaining
== 0) {
2052 } else if (packets_transmitted
> 0) {
2053 /* Otherwise if we do have remaining packets, and we've
2054 * scheduled some packets in this interval, take the
2055 * largest max packet size from endpoints with this
2058 packet_size
= largest_mps
;
2059 overhead
= interval_overhead
;
2061 /* Otherwise carry over packet_size and overhead from the last
2062 * time we had a remainder.
2064 bw_used
+= bw_added
;
2065 if (bw_used
> max_bandwidth
) {
2066 xhci_warn(xhci
, "Not enough bandwidth. "
2067 "Proposed: %u, Max: %u\n",
2068 bw_used
, max_bandwidth
);
2073 * Ok, we know we have some packets left over after even-handedly
2074 * scheduling interval 15. We don't know which microframes they will
2075 * fit into, so we over-schedule and say they will be scheduled every
2078 if (packets_remaining
> 0)
2079 bw_used
+= overhead
+ packet_size
;
2081 if (!virt_dev
->tt_info
&& virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2082 unsigned int port_index
= virt_dev
->real_port
- 1;
2084 /* OK, we're manipulating a HS device attached to a
2085 * root port bandwidth domain. Include the number of active TTs
2086 * in the bandwidth used.
2088 bw_used
+= TT_HS_OVERHEAD
*
2089 xhci
->rh_bw
[port_index
].num_active_tts
;
2092 xhci_dbg(xhci
, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2093 "Available: %u " "percent\n",
2094 bw_used
, max_bandwidth
, bw_reserved
,
2095 (max_bandwidth
- bw_used
- bw_reserved
) * 100 /
2098 bw_used
+= bw_reserved
;
2099 if (bw_used
> max_bandwidth
) {
2100 xhci_warn(xhci
, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2101 bw_used
, max_bandwidth
);
2105 bw_table
->bw_used
= bw_used
;
2109 static bool xhci_is_async_ep(unsigned int ep_type
)
2111 return (ep_type
!= ISOC_OUT_EP
&& ep_type
!= INT_OUT_EP
&&
2112 ep_type
!= ISOC_IN_EP
&&
2113 ep_type
!= INT_IN_EP
);
2116 static bool xhci_is_sync_in_ep(unsigned int ep_type
)
2118 return (ep_type
== ISOC_IN_EP
|| ep_type
!= INT_IN_EP
);
2121 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info
*ep_bw
)
2123 unsigned int mps
= DIV_ROUND_UP(ep_bw
->max_packet_size
, SS_BLOCK
);
2125 if (ep_bw
->ep_interval
== 0)
2126 return SS_OVERHEAD_BURST
+
2127 (ep_bw
->mult
* ep_bw
->num_packets
*
2128 (SS_OVERHEAD
+ mps
));
2129 return DIV_ROUND_UP(ep_bw
->mult
* ep_bw
->num_packets
*
2130 (SS_OVERHEAD
+ mps
+ SS_OVERHEAD_BURST
),
2131 1 << ep_bw
->ep_interval
);
2135 void xhci_drop_ep_from_interval_table(struct xhci_hcd
*xhci
,
2136 struct xhci_bw_info
*ep_bw
,
2137 struct xhci_interval_bw_table
*bw_table
,
2138 struct usb_device
*udev
,
2139 struct xhci_virt_ep
*virt_ep
,
2140 struct xhci_tt_bw_info
*tt_info
)
2142 struct xhci_interval_bw
*interval_bw
;
2143 int normalized_interval
;
2145 if (xhci_is_async_ep(ep_bw
->type
))
2148 if (udev
->speed
== USB_SPEED_SUPER
) {
2149 if (xhci_is_sync_in_ep(ep_bw
->type
))
2150 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
-=
2151 xhci_get_ss_bw_consumed(ep_bw
);
2153 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
-=
2154 xhci_get_ss_bw_consumed(ep_bw
);
2158 /* SuperSpeed endpoints never get added to intervals in the table, so
2159 * this check is only valid for HS/FS/LS devices.
2161 if (list_empty(&virt_ep
->bw_endpoint_list
))
2163 /* For LS/FS devices, we need to translate the interval expressed in
2164 * microframes to frames.
2166 if (udev
->speed
== USB_SPEED_HIGH
)
2167 normalized_interval
= ep_bw
->ep_interval
;
2169 normalized_interval
= ep_bw
->ep_interval
- 3;
2171 if (normalized_interval
== 0)
2172 bw_table
->interval0_esit_payload
-= ep_bw
->max_esit_payload
;
2173 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2174 interval_bw
->num_packets
-= ep_bw
->num_packets
;
2175 switch (udev
->speed
) {
2177 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] -= 1;
2179 case USB_SPEED_FULL
:
2180 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] -= 1;
2182 case USB_SPEED_HIGH
:
2183 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] -= 1;
2185 case USB_SPEED_SUPER
:
2186 case USB_SPEED_UNKNOWN
:
2187 case USB_SPEED_WIRELESS
:
2188 /* Should never happen because only LS/FS/HS endpoints will get
2189 * added to the endpoint list.
2194 tt_info
->active_eps
-= 1;
2195 list_del_init(&virt_ep
->bw_endpoint_list
);
2198 static void xhci_add_ep_to_interval_table(struct xhci_hcd
*xhci
,
2199 struct xhci_bw_info
*ep_bw
,
2200 struct xhci_interval_bw_table
*bw_table
,
2201 struct usb_device
*udev
,
2202 struct xhci_virt_ep
*virt_ep
,
2203 struct xhci_tt_bw_info
*tt_info
)
2205 struct xhci_interval_bw
*interval_bw
;
2206 struct xhci_virt_ep
*smaller_ep
;
2207 int normalized_interval
;
2209 if (xhci_is_async_ep(ep_bw
->type
))
2212 if (udev
->speed
== USB_SPEED_SUPER
) {
2213 if (xhci_is_sync_in_ep(ep_bw
->type
))
2214 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
+=
2215 xhci_get_ss_bw_consumed(ep_bw
);
2217 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
+=
2218 xhci_get_ss_bw_consumed(ep_bw
);
2222 /* For LS/FS devices, we need to translate the interval expressed in
2223 * microframes to frames.
2225 if (udev
->speed
== USB_SPEED_HIGH
)
2226 normalized_interval
= ep_bw
->ep_interval
;
2228 normalized_interval
= ep_bw
->ep_interval
- 3;
2230 if (normalized_interval
== 0)
2231 bw_table
->interval0_esit_payload
+= ep_bw
->max_esit_payload
;
2232 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2233 interval_bw
->num_packets
+= ep_bw
->num_packets
;
2234 switch (udev
->speed
) {
2236 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] += 1;
2238 case USB_SPEED_FULL
:
2239 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] += 1;
2241 case USB_SPEED_HIGH
:
2242 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] += 1;
2244 case USB_SPEED_SUPER
:
2245 case USB_SPEED_UNKNOWN
:
2246 case USB_SPEED_WIRELESS
:
2247 /* Should never happen because only LS/FS/HS endpoints will get
2248 * added to the endpoint list.
2254 tt_info
->active_eps
+= 1;
2255 /* Insert the endpoint into the list, largest max packet size first. */
2256 list_for_each_entry(smaller_ep
, &interval_bw
->endpoints
,
2258 if (ep_bw
->max_packet_size
>=
2259 smaller_ep
->bw_info
.max_packet_size
) {
2260 /* Add the new ep before the smaller endpoint */
2261 list_add_tail(&virt_ep
->bw_endpoint_list
,
2262 &smaller_ep
->bw_endpoint_list
);
2266 /* Add the new endpoint at the end of the list. */
2267 list_add_tail(&virt_ep
->bw_endpoint_list
,
2268 &interval_bw
->endpoints
);
2271 void xhci_update_tt_active_eps(struct xhci_hcd
*xhci
,
2272 struct xhci_virt_device
*virt_dev
,
2275 struct xhci_root_port_bw_info
*rh_bw_info
;
2276 if (!virt_dev
->tt_info
)
2279 rh_bw_info
= &xhci
->rh_bw
[virt_dev
->real_port
- 1];
2280 if (old_active_eps
== 0 &&
2281 virt_dev
->tt_info
->active_eps
!= 0) {
2282 rh_bw_info
->num_active_tts
+= 1;
2283 rh_bw_info
->bw_table
.bw_used
+= TT_HS_OVERHEAD
;
2284 } else if (old_active_eps
!= 0 &&
2285 virt_dev
->tt_info
->active_eps
== 0) {
2286 rh_bw_info
->num_active_tts
-= 1;
2287 rh_bw_info
->bw_table
.bw_used
-= TT_HS_OVERHEAD
;
2291 static int xhci_reserve_bandwidth(struct xhci_hcd
*xhci
,
2292 struct xhci_virt_device
*virt_dev
,
2293 struct xhci_container_ctx
*in_ctx
)
2295 struct xhci_bw_info ep_bw_info
[31];
2297 struct xhci_input_control_ctx
*ctrl_ctx
;
2298 int old_active_eps
= 0;
2300 if (virt_dev
->tt_info
)
2301 old_active_eps
= virt_dev
->tt_info
->active_eps
;
2303 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2305 for (i
= 0; i
< 31; i
++) {
2306 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2309 /* Make a copy of the BW info in case we need to revert this */
2310 memcpy(&ep_bw_info
[i
], &virt_dev
->eps
[i
].bw_info
,
2311 sizeof(ep_bw_info
[i
]));
2312 /* Drop the endpoint from the interval table if the endpoint is
2313 * being dropped or changed.
2315 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2316 xhci_drop_ep_from_interval_table(xhci
,
2317 &virt_dev
->eps
[i
].bw_info
,
2323 /* Overwrite the information stored in the endpoints' bw_info */
2324 xhci_update_bw_info(xhci
, virt_dev
->in_ctx
, ctrl_ctx
, virt_dev
);
2325 for (i
= 0; i
< 31; i
++) {
2326 /* Add any changed or added endpoints to the interval table */
2327 if (EP_IS_ADDED(ctrl_ctx
, i
))
2328 xhci_add_ep_to_interval_table(xhci
,
2329 &virt_dev
->eps
[i
].bw_info
,
2336 if (!xhci_check_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2337 /* Ok, this fits in the bandwidth we have.
2338 * Update the number of active TTs.
2340 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
2344 /* We don't have enough bandwidth for this, revert the stored info. */
2345 for (i
= 0; i
< 31; i
++) {
2346 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2349 /* Drop the new copies of any added or changed endpoints from
2350 * the interval table.
2352 if (EP_IS_ADDED(ctrl_ctx
, i
)) {
2353 xhci_drop_ep_from_interval_table(xhci
,
2354 &virt_dev
->eps
[i
].bw_info
,
2360 /* Revert the endpoint back to its old information */
2361 memcpy(&virt_dev
->eps
[i
].bw_info
, &ep_bw_info
[i
],
2362 sizeof(ep_bw_info
[i
]));
2363 /* Add any changed or dropped endpoints back into the table */
2364 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2365 xhci_add_ep_to_interval_table(xhci
,
2366 &virt_dev
->eps
[i
].bw_info
,
2376 /* Issue a configure endpoint command or evaluate context command
2377 * and wait for it to finish.
2379 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
2380 struct usb_device
*udev
,
2381 struct xhci_command
*command
,
2382 bool ctx_change
, bool must_succeed
)
2386 unsigned long flags
;
2387 struct xhci_container_ctx
*in_ctx
;
2388 struct completion
*cmd_completion
;
2390 struct xhci_virt_device
*virt_dev
;
2392 spin_lock_irqsave(&xhci
->lock
, flags
);
2393 virt_dev
= xhci
->devs
[udev
->slot_id
];
2396 in_ctx
= command
->in_ctx
;
2398 in_ctx
= virt_dev
->in_ctx
;
2400 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
) &&
2401 xhci_reserve_host_resources(xhci
, in_ctx
)) {
2402 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2403 xhci_warn(xhci
, "Not enough host resources, "
2404 "active endpoint contexts = %u\n",
2405 xhci
->num_active_eps
);
2408 if ((xhci
->quirks
& XHCI_SW_BW_CHECKING
) &&
2409 xhci_reserve_bandwidth(xhci
, virt_dev
, in_ctx
)) {
2410 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2411 xhci_free_host_resources(xhci
, in_ctx
);
2412 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2413 xhci_warn(xhci
, "Not enough bandwidth\n");
2418 cmd_completion
= command
->completion
;
2419 cmd_status
= &command
->status
;
2420 command
->command_trb
= xhci
->cmd_ring
->enqueue
;
2422 /* Enqueue pointer can be left pointing to the link TRB,
2423 * we must handle that
2425 if (TRB_TYPE_LINK_LE32(command
->command_trb
->link
.control
))
2426 command
->command_trb
=
2427 xhci
->cmd_ring
->enq_seg
->next
->trbs
;
2429 list_add_tail(&command
->cmd_list
, &virt_dev
->cmd_list
);
2431 cmd_completion
= &virt_dev
->cmd_completion
;
2432 cmd_status
= &virt_dev
->cmd_status
;
2434 init_completion(cmd_completion
);
2437 ret
= xhci_queue_configure_endpoint(xhci
, in_ctx
->dma
,
2438 udev
->slot_id
, must_succeed
);
2440 ret
= xhci_queue_evaluate_context(xhci
, in_ctx
->dma
,
2444 list_del(&command
->cmd_list
);
2445 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2446 xhci_free_host_resources(xhci
, in_ctx
);
2447 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2448 xhci_dbg(xhci
, "FIXME allocate a new ring segment\n");
2451 xhci_ring_cmd_db(xhci
);
2452 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2454 /* Wait for the configure endpoint command to complete */
2455 timeleft
= wait_for_completion_interruptible_timeout(
2457 USB_CTRL_SET_TIMEOUT
);
2458 if (timeleft
<= 0) {
2459 xhci_warn(xhci
, "%s while waiting for %s command\n",
2460 timeleft
== 0 ? "Timeout" : "Signal",
2462 "configure endpoint" :
2463 "evaluate context");
2464 /* FIXME cancel the configure endpoint command */
2469 ret
= xhci_configure_endpoint_result(xhci
, udev
, cmd_status
);
2471 ret
= xhci_evaluate_context_result(xhci
, udev
, cmd_status
);
2473 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
2474 spin_lock_irqsave(&xhci
->lock
, flags
);
2475 /* If the command failed, remove the reserved resources.
2476 * Otherwise, clean up the estimate to include dropped eps.
2479 xhci_free_host_resources(xhci
, in_ctx
);
2481 xhci_finish_resource_reservation(xhci
, in_ctx
);
2482 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2487 /* Called after one or more calls to xhci_add_endpoint() or
2488 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2489 * to call xhci_reset_bandwidth().
2491 * Since we are in the middle of changing either configuration or
2492 * installing a new alt setting, the USB core won't allow URBs to be
2493 * enqueued for any endpoint on the old config or interface. Nothing
2494 * else should be touching the xhci->devs[slot_id] structure, so we
2495 * don't need to take the xhci->lock for manipulating that.
2497 int xhci_check_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2501 struct xhci_hcd
*xhci
;
2502 struct xhci_virt_device
*virt_dev
;
2503 struct xhci_input_control_ctx
*ctrl_ctx
;
2504 struct xhci_slot_ctx
*slot_ctx
;
2506 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2509 xhci
= hcd_to_xhci(hcd
);
2510 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
2513 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2514 virt_dev
= xhci
->devs
[udev
->slot_id
];
2516 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2517 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
2518 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2519 ctrl_ctx
->add_flags
&= cpu_to_le32(~EP0_FLAG
);
2520 ctrl_ctx
->drop_flags
&= cpu_to_le32(~(SLOT_FLAG
| EP0_FLAG
));
2522 /* Don't issue the command if there's no endpoints to update. */
2523 if (ctrl_ctx
->add_flags
== cpu_to_le32(SLOT_FLAG
) &&
2524 ctrl_ctx
->drop_flags
== 0)
2527 xhci_dbg(xhci
, "New Input Control Context:\n");
2528 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
2529 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
,
2530 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx
->dev_info
)));
2532 ret
= xhci_configure_endpoint(xhci
, udev
, NULL
,
2535 /* Callee should call reset_bandwidth() */
2539 xhci_dbg(xhci
, "Output context after successful config ep cmd:\n");
2540 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
,
2541 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx
->dev_info
)));
2543 /* Free any rings that were dropped, but not changed. */
2544 for (i
= 1; i
< 31; ++i
) {
2545 if ((le32_to_cpu(ctrl_ctx
->drop_flags
) & (1 << (i
+ 1))) &&
2546 !(le32_to_cpu(ctrl_ctx
->add_flags
) & (1 << (i
+ 1))))
2547 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
2549 xhci_zero_in_ctx(xhci
, virt_dev
);
2551 * Install any rings for completely new endpoints or changed endpoints,
2552 * and free or cache any old rings from changed endpoints.
2554 for (i
= 1; i
< 31; ++i
) {
2555 if (!virt_dev
->eps
[i
].new_ring
)
2557 /* Only cache or free the old ring if it exists.
2558 * It may not if this is the first add of an endpoint.
2560 if (virt_dev
->eps
[i
].ring
) {
2561 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
2563 virt_dev
->eps
[i
].ring
= virt_dev
->eps
[i
].new_ring
;
2564 virt_dev
->eps
[i
].new_ring
= NULL
;
2570 void xhci_reset_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2572 struct xhci_hcd
*xhci
;
2573 struct xhci_virt_device
*virt_dev
;
2576 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2579 xhci
= hcd_to_xhci(hcd
);
2581 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2582 virt_dev
= xhci
->devs
[udev
->slot_id
];
2583 /* Free any rings allocated for added endpoints */
2584 for (i
= 0; i
< 31; ++i
) {
2585 if (virt_dev
->eps
[i
].new_ring
) {
2586 xhci_ring_free(xhci
, virt_dev
->eps
[i
].new_ring
);
2587 virt_dev
->eps
[i
].new_ring
= NULL
;
2590 xhci_zero_in_ctx(xhci
, virt_dev
);
2593 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd
*xhci
,
2594 struct xhci_container_ctx
*in_ctx
,
2595 struct xhci_container_ctx
*out_ctx
,
2596 u32 add_flags
, u32 drop_flags
)
2598 struct xhci_input_control_ctx
*ctrl_ctx
;
2599 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2600 ctrl_ctx
->add_flags
= cpu_to_le32(add_flags
);
2601 ctrl_ctx
->drop_flags
= cpu_to_le32(drop_flags
);
2602 xhci_slot_copy(xhci
, in_ctx
, out_ctx
);
2603 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2605 xhci_dbg(xhci
, "Input Context:\n");
2606 xhci_dbg_ctx(xhci
, in_ctx
, xhci_last_valid_endpoint(add_flags
));
2609 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd
*xhci
,
2610 unsigned int slot_id
, unsigned int ep_index
,
2611 struct xhci_dequeue_state
*deq_state
)
2613 struct xhci_container_ctx
*in_ctx
;
2614 struct xhci_ep_ctx
*ep_ctx
;
2618 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2619 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
2620 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
2621 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
2622 addr
= xhci_trb_virt_to_dma(deq_state
->new_deq_seg
,
2623 deq_state
->new_deq_ptr
);
2625 xhci_warn(xhci
, "WARN Cannot submit config ep after "
2626 "reset ep command\n");
2627 xhci_warn(xhci
, "WARN deq seg = %p, deq ptr = %p\n",
2628 deq_state
->new_deq_seg
,
2629 deq_state
->new_deq_ptr
);
2632 ep_ctx
->deq
= cpu_to_le64(addr
| deq_state
->new_cycle_state
);
2634 added_ctxs
= xhci_get_endpoint_flag_from_index(ep_index
);
2635 xhci_setup_input_ctx_for_config_ep(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2636 xhci
->devs
[slot_id
]->out_ctx
, added_ctxs
, added_ctxs
);
2639 void xhci_cleanup_stalled_ring(struct xhci_hcd
*xhci
,
2640 struct usb_device
*udev
, unsigned int ep_index
)
2642 struct xhci_dequeue_state deq_state
;
2643 struct xhci_virt_ep
*ep
;
2645 xhci_dbg(xhci
, "Cleaning up stalled endpoint ring\n");
2646 ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
2647 /* We need to move the HW's dequeue pointer past this TD,
2648 * or it will attempt to resend it on the next doorbell ring.
2650 xhci_find_new_dequeue_state(xhci
, udev
->slot_id
,
2651 ep_index
, ep
->stopped_stream
, ep
->stopped_td
,
2654 /* HW with the reset endpoint quirk will use the saved dequeue state to
2655 * issue a configure endpoint command later.
2657 if (!(xhci
->quirks
& XHCI_RESET_EP_QUIRK
)) {
2658 xhci_dbg(xhci
, "Queueing new dequeue state\n");
2659 xhci_queue_new_dequeue_state(xhci
, udev
->slot_id
,
2660 ep_index
, ep
->stopped_stream
, &deq_state
);
2662 /* Better hope no one uses the input context between now and the
2663 * reset endpoint completion!
2664 * XXX: No idea how this hardware will react when stream rings
2667 xhci_dbg(xhci
, "Setting up input context for "
2668 "configure endpoint command\n");
2669 xhci_setup_input_ctx_for_quirk(xhci
, udev
->slot_id
,
2670 ep_index
, &deq_state
);
2674 /* Deal with stalled endpoints. The core should have sent the control message
2675 * to clear the halt condition. However, we need to make the xHCI hardware
2676 * reset its sequence number, since a device will expect a sequence number of
2677 * zero after the halt condition is cleared.
2678 * Context: in_interrupt
2680 void xhci_endpoint_reset(struct usb_hcd
*hcd
,
2681 struct usb_host_endpoint
*ep
)
2683 struct xhci_hcd
*xhci
;
2684 struct usb_device
*udev
;
2685 unsigned int ep_index
;
2686 unsigned long flags
;
2688 struct xhci_virt_ep
*virt_ep
;
2690 xhci
= hcd_to_xhci(hcd
);
2691 udev
= (struct usb_device
*) ep
->hcpriv
;
2692 /* Called with a root hub endpoint (or an endpoint that wasn't added
2693 * with xhci_add_endpoint()
2697 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
2698 virt_ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
2699 if (!virt_ep
->stopped_td
) {
2700 xhci_dbg(xhci
, "Endpoint 0x%x not halted, refusing to reset.\n",
2701 ep
->desc
.bEndpointAddress
);
2704 if (usb_endpoint_xfer_control(&ep
->desc
)) {
2705 xhci_dbg(xhci
, "Control endpoint stall already handled.\n");
2709 xhci_dbg(xhci
, "Queueing reset endpoint command\n");
2710 spin_lock_irqsave(&xhci
->lock
, flags
);
2711 ret
= xhci_queue_reset_ep(xhci
, udev
->slot_id
, ep_index
);
2713 * Can't change the ring dequeue pointer until it's transitioned to the
2714 * stopped state, which is only upon a successful reset endpoint
2715 * command. Better hope that last command worked!
2718 xhci_cleanup_stalled_ring(xhci
, udev
, ep_index
);
2719 kfree(virt_ep
->stopped_td
);
2720 xhci_ring_cmd_db(xhci
);
2722 virt_ep
->stopped_td
= NULL
;
2723 virt_ep
->stopped_trb
= NULL
;
2724 virt_ep
->stopped_stream
= 0;
2725 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2728 xhci_warn(xhci
, "FIXME allocate a new ring segment\n");
2731 static int xhci_check_streams_endpoint(struct xhci_hcd
*xhci
,
2732 struct usb_device
*udev
, struct usb_host_endpoint
*ep
,
2733 unsigned int slot_id
)
2736 unsigned int ep_index
;
2737 unsigned int ep_state
;
2741 ret
= xhci_check_args(xhci_to_hcd(xhci
), udev
, ep
, 1, true, __func__
);
2744 if (ep
->ss_ep_comp
.bmAttributes
== 0) {
2745 xhci_warn(xhci
, "WARN: SuperSpeed Endpoint Companion"
2746 " descriptor for ep 0x%x does not support streams\n",
2747 ep
->desc
.bEndpointAddress
);
2751 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
2752 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
2753 if (ep_state
& EP_HAS_STREAMS
||
2754 ep_state
& EP_GETTING_STREAMS
) {
2755 xhci_warn(xhci
, "WARN: SuperSpeed bulk endpoint 0x%x "
2756 "already has streams set up.\n",
2757 ep
->desc
.bEndpointAddress
);
2758 xhci_warn(xhci
, "Send email to xHCI maintainer and ask for "
2759 "dynamic stream context array reallocation.\n");
2762 if (!list_empty(&xhci
->devs
[slot_id
]->eps
[ep_index
].ring
->td_list
)) {
2763 xhci_warn(xhci
, "Cannot setup streams for SuperSpeed bulk "
2764 "endpoint 0x%x; URBs are pending.\n",
2765 ep
->desc
.bEndpointAddress
);
2771 static void xhci_calculate_streams_entries(struct xhci_hcd
*xhci
,
2772 unsigned int *num_streams
, unsigned int *num_stream_ctxs
)
2774 unsigned int max_streams
;
2776 /* The stream context array size must be a power of two */
2777 *num_stream_ctxs
= roundup_pow_of_two(*num_streams
);
2779 * Find out how many primary stream array entries the host controller
2780 * supports. Later we may use secondary stream arrays (similar to 2nd
2781 * level page entries), but that's an optional feature for xHCI host
2782 * controllers. xHCs must support at least 4 stream IDs.
2784 max_streams
= HCC_MAX_PSA(xhci
->hcc_params
);
2785 if (*num_stream_ctxs
> max_streams
) {
2786 xhci_dbg(xhci
, "xHCI HW only supports %u stream ctx entries.\n",
2788 *num_stream_ctxs
= max_streams
;
2789 *num_streams
= max_streams
;
2793 /* Returns an error code if one of the endpoint already has streams.
2794 * This does not change any data structures, it only checks and gathers
2797 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd
*xhci
,
2798 struct usb_device
*udev
,
2799 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
2800 unsigned int *num_streams
, u32
*changed_ep_bitmask
)
2802 unsigned int max_streams
;
2803 unsigned int endpoint_flag
;
2807 for (i
= 0; i
< num_eps
; i
++) {
2808 ret
= xhci_check_streams_endpoint(xhci
, udev
,
2809 eps
[i
], udev
->slot_id
);
2813 max_streams
= usb_ss_max_streams(&eps
[i
]->ss_ep_comp
);
2814 if (max_streams
< (*num_streams
- 1)) {
2815 xhci_dbg(xhci
, "Ep 0x%x only supports %u stream IDs.\n",
2816 eps
[i
]->desc
.bEndpointAddress
,
2818 *num_streams
= max_streams
+1;
2821 endpoint_flag
= xhci_get_endpoint_flag(&eps
[i
]->desc
);
2822 if (*changed_ep_bitmask
& endpoint_flag
)
2824 *changed_ep_bitmask
|= endpoint_flag
;
2829 static u32
xhci_calculate_no_streams_bitmask(struct xhci_hcd
*xhci
,
2830 struct usb_device
*udev
,
2831 struct usb_host_endpoint
**eps
, unsigned int num_eps
)
2833 u32 changed_ep_bitmask
= 0;
2834 unsigned int slot_id
;
2835 unsigned int ep_index
;
2836 unsigned int ep_state
;
2839 slot_id
= udev
->slot_id
;
2840 if (!xhci
->devs
[slot_id
])
2843 for (i
= 0; i
< num_eps
; i
++) {
2844 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
2845 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
2846 /* Are streams already being freed for the endpoint? */
2847 if (ep_state
& EP_GETTING_NO_STREAMS
) {
2848 xhci_warn(xhci
, "WARN Can't disable streams for "
2850 "streams are being disabled already.",
2851 eps
[i
]->desc
.bEndpointAddress
);
2854 /* Are there actually any streams to free? */
2855 if (!(ep_state
& EP_HAS_STREAMS
) &&
2856 !(ep_state
& EP_GETTING_STREAMS
)) {
2857 xhci_warn(xhci
, "WARN Can't disable streams for "
2859 "streams are already disabled!",
2860 eps
[i
]->desc
.bEndpointAddress
);
2861 xhci_warn(xhci
, "WARN xhci_free_streams() called "
2862 "with non-streams endpoint\n");
2865 changed_ep_bitmask
|= xhci_get_endpoint_flag(&eps
[i
]->desc
);
2867 return changed_ep_bitmask
;
2871 * The USB device drivers use this function (though the HCD interface in USB
2872 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
2873 * coordinate mass storage command queueing across multiple endpoints (basically
2874 * a stream ID == a task ID).
2876 * Setting up streams involves allocating the same size stream context array
2877 * for each endpoint and issuing a configure endpoint command for all endpoints.
2879 * Don't allow the call to succeed if one endpoint only supports one stream
2880 * (which means it doesn't support streams at all).
2882 * Drivers may get less stream IDs than they asked for, if the host controller
2883 * hardware or endpoints claim they can't support the number of requested
2886 int xhci_alloc_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
2887 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
2888 unsigned int num_streams
, gfp_t mem_flags
)
2891 struct xhci_hcd
*xhci
;
2892 struct xhci_virt_device
*vdev
;
2893 struct xhci_command
*config_cmd
;
2894 unsigned int ep_index
;
2895 unsigned int num_stream_ctxs
;
2896 unsigned long flags
;
2897 u32 changed_ep_bitmask
= 0;
2902 /* Add one to the number of streams requested to account for
2903 * stream 0 that is reserved for xHCI usage.
2906 xhci
= hcd_to_xhci(hcd
);
2907 xhci_dbg(xhci
, "Driver wants %u stream IDs (including stream 0).\n",
2910 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
2912 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
2916 /* Check to make sure all endpoints are not already configured for
2917 * streams. While we're at it, find the maximum number of streams that
2918 * all the endpoints will support and check for duplicate endpoints.
2920 spin_lock_irqsave(&xhci
->lock
, flags
);
2921 ret
= xhci_calculate_streams_and_bitmask(xhci
, udev
, eps
,
2922 num_eps
, &num_streams
, &changed_ep_bitmask
);
2924 xhci_free_command(xhci
, config_cmd
);
2925 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2928 if (num_streams
<= 1) {
2929 xhci_warn(xhci
, "WARN: endpoints can't handle "
2930 "more than one stream.\n");
2931 xhci_free_command(xhci
, config_cmd
);
2932 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2935 vdev
= xhci
->devs
[udev
->slot_id
];
2936 /* Mark each endpoint as being in transition, so
2937 * xhci_urb_enqueue() will reject all URBs.
2939 for (i
= 0; i
< num_eps
; i
++) {
2940 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
2941 vdev
->eps
[ep_index
].ep_state
|= EP_GETTING_STREAMS
;
2943 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2945 /* Setup internal data structures and allocate HW data structures for
2946 * streams (but don't install the HW structures in the input context
2947 * until we're sure all memory allocation succeeded).
2949 xhci_calculate_streams_entries(xhci
, &num_streams
, &num_stream_ctxs
);
2950 xhci_dbg(xhci
, "Need %u stream ctx entries for %u stream IDs.\n",
2951 num_stream_ctxs
, num_streams
);
2953 for (i
= 0; i
< num_eps
; i
++) {
2954 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
2955 vdev
->eps
[ep_index
].stream_info
= xhci_alloc_stream_info(xhci
,
2957 num_streams
, mem_flags
);
2958 if (!vdev
->eps
[ep_index
].stream_info
)
2960 /* Set maxPstreams in endpoint context and update deq ptr to
2961 * point to stream context array. FIXME
2965 /* Set up the input context for a configure endpoint command. */
2966 for (i
= 0; i
< num_eps
; i
++) {
2967 struct xhci_ep_ctx
*ep_ctx
;
2969 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
2970 ep_ctx
= xhci_get_ep_ctx(xhci
, config_cmd
->in_ctx
, ep_index
);
2972 xhci_endpoint_copy(xhci
, config_cmd
->in_ctx
,
2973 vdev
->out_ctx
, ep_index
);
2974 xhci_setup_streams_ep_input_ctx(xhci
, ep_ctx
,
2975 vdev
->eps
[ep_index
].stream_info
);
2977 /* Tell the HW to drop its old copy of the endpoint context info
2978 * and add the updated copy from the input context.
2980 xhci_setup_input_ctx_for_config_ep(xhci
, config_cmd
->in_ctx
,
2981 vdev
->out_ctx
, changed_ep_bitmask
, changed_ep_bitmask
);
2983 /* Issue and wait for the configure endpoint command */
2984 ret
= xhci_configure_endpoint(xhci
, udev
, config_cmd
,
2987 /* xHC rejected the configure endpoint command for some reason, so we
2988 * leave the old ring intact and free our internal streams data
2994 spin_lock_irqsave(&xhci
->lock
, flags
);
2995 for (i
= 0; i
< num_eps
; i
++) {
2996 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
2997 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
2998 xhci_dbg(xhci
, "Slot %u ep ctx %u now has streams.\n",
2999 udev
->slot_id
, ep_index
);
3000 vdev
->eps
[ep_index
].ep_state
|= EP_HAS_STREAMS
;
3002 xhci_free_command(xhci
, config_cmd
);
3003 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3005 /* Subtract 1 for stream 0, which drivers can't use */
3006 return num_streams
- 1;
3009 /* If it didn't work, free the streams! */
3010 for (i
= 0; i
< num_eps
; i
++) {
3011 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3012 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3013 vdev
->eps
[ep_index
].stream_info
= NULL
;
3014 /* FIXME Unset maxPstreams in endpoint context and
3015 * update deq ptr to point to normal string ring.
3017 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3018 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3019 xhci_endpoint_zero(xhci
, vdev
, eps
[i
]);
3021 xhci_free_command(xhci
, config_cmd
);
3025 /* Transition the endpoint from using streams to being a "normal" endpoint
3028 * Modify the endpoint context state, submit a configure endpoint command,
3029 * and free all endpoint rings for streams if that completes successfully.
3031 int xhci_free_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3032 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3036 struct xhci_hcd
*xhci
;
3037 struct xhci_virt_device
*vdev
;
3038 struct xhci_command
*command
;
3039 unsigned int ep_index
;
3040 unsigned long flags
;
3041 u32 changed_ep_bitmask
;
3043 xhci
= hcd_to_xhci(hcd
);
3044 vdev
= xhci
->devs
[udev
->slot_id
];
3046 /* Set up a configure endpoint command to remove the streams rings */
3047 spin_lock_irqsave(&xhci
->lock
, flags
);
3048 changed_ep_bitmask
= xhci_calculate_no_streams_bitmask(xhci
,
3049 udev
, eps
, num_eps
);
3050 if (changed_ep_bitmask
== 0) {
3051 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3055 /* Use the xhci_command structure from the first endpoint. We may have
3056 * allocated too many, but the driver may call xhci_free_streams() for
3057 * each endpoint it grouped into one call to xhci_alloc_streams().
3059 ep_index
= xhci_get_endpoint_index(&eps
[0]->desc
);
3060 command
= vdev
->eps
[ep_index
].stream_info
->free_streams_command
;
3061 for (i
= 0; i
< num_eps
; i
++) {
3062 struct xhci_ep_ctx
*ep_ctx
;
3064 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3065 ep_ctx
= xhci_get_ep_ctx(xhci
, command
->in_ctx
, ep_index
);
3066 xhci
->devs
[udev
->slot_id
]->eps
[ep_index
].ep_state
|=
3067 EP_GETTING_NO_STREAMS
;
3069 xhci_endpoint_copy(xhci
, command
->in_ctx
,
3070 vdev
->out_ctx
, ep_index
);
3071 xhci_setup_no_streams_ep_input_ctx(xhci
, ep_ctx
,
3072 &vdev
->eps
[ep_index
]);
3074 xhci_setup_input_ctx_for_config_ep(xhci
, command
->in_ctx
,
3075 vdev
->out_ctx
, changed_ep_bitmask
, changed_ep_bitmask
);
3076 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3078 /* Issue and wait for the configure endpoint command,
3079 * which must succeed.
3081 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
3084 /* xHC rejected the configure endpoint command for some reason, so we
3085 * leave the streams rings intact.
3090 spin_lock_irqsave(&xhci
->lock
, flags
);
3091 for (i
= 0; i
< num_eps
; i
++) {
3092 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3093 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3094 vdev
->eps
[ep_index
].stream_info
= NULL
;
3095 /* FIXME Unset maxPstreams in endpoint context and
3096 * update deq ptr to point to normal string ring.
3098 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_NO_STREAMS
;
3099 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3101 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3107 * Deletes endpoint resources for endpoints that were active before a Reset
3108 * Device command, or a Disable Slot command. The Reset Device command leaves
3109 * the control endpoint intact, whereas the Disable Slot command deletes it.
3111 * Must be called with xhci->lock held.
3113 void xhci_free_device_endpoint_resources(struct xhci_hcd
*xhci
,
3114 struct xhci_virt_device
*virt_dev
, bool drop_control_ep
)
3117 unsigned int num_dropped_eps
= 0;
3118 unsigned int drop_flags
= 0;
3120 for (i
= (drop_control_ep
? 0 : 1); i
< 31; i
++) {
3121 if (virt_dev
->eps
[i
].ring
) {
3122 drop_flags
|= 1 << i
;
3126 xhci
->num_active_eps
-= num_dropped_eps
;
3127 if (num_dropped_eps
)
3128 xhci_dbg(xhci
, "Dropped %u ep ctxs, flags = 0x%x, "
3130 num_dropped_eps
, drop_flags
,
3131 xhci
->num_active_eps
);
3135 * This submits a Reset Device Command, which will set the device state to 0,
3136 * set the device address to 0, and disable all the endpoints except the default
3137 * control endpoint. The USB core should come back and call
3138 * xhci_address_device(), and then re-set up the configuration. If this is
3139 * called because of a usb_reset_and_verify_device(), then the old alternate
3140 * settings will be re-installed through the normal bandwidth allocation
3143 * Wait for the Reset Device command to finish. Remove all structures
3144 * associated with the endpoints that were disabled. Clear the input device
3145 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3147 * If the virt_dev to be reset does not exist or does not match the udev,
3148 * it means the device is lost, possibly due to the xHC restore error and
3149 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3150 * re-allocate the device.
3152 int xhci_discover_or_reset_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3155 unsigned long flags
;
3156 struct xhci_hcd
*xhci
;
3157 unsigned int slot_id
;
3158 struct xhci_virt_device
*virt_dev
;
3159 struct xhci_command
*reset_device_cmd
;
3161 int last_freed_endpoint
;
3162 struct xhci_slot_ctx
*slot_ctx
;
3163 int old_active_eps
= 0;
3165 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, false, __func__
);
3168 xhci
= hcd_to_xhci(hcd
);
3169 slot_id
= udev
->slot_id
;
3170 virt_dev
= xhci
->devs
[slot_id
];
3172 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3173 "not exist. Re-allocate the device\n", slot_id
);
3174 ret
= xhci_alloc_dev(hcd
, udev
);
3181 if (virt_dev
->udev
!= udev
) {
3182 /* If the virt_dev and the udev does not match, this virt_dev
3183 * may belong to another udev.
3184 * Re-allocate the device.
3186 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3187 "not match the udev. Re-allocate the device\n",
3189 ret
= xhci_alloc_dev(hcd
, udev
);
3196 /* If device is not setup, there is no point in resetting it */
3197 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3198 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx
->dev_state
)) ==
3199 SLOT_STATE_DISABLED
)
3202 xhci_dbg(xhci
, "Resetting device with slot ID %u\n", slot_id
);
3203 /* Allocate the command structure that holds the struct completion.
3204 * Assume we're in process context, since the normal device reset
3205 * process has to wait for the device anyway. Storage devices are
3206 * reset as part of error handling, so use GFP_NOIO instead of
3209 reset_device_cmd
= xhci_alloc_command(xhci
, false, true, GFP_NOIO
);
3210 if (!reset_device_cmd
) {
3211 xhci_dbg(xhci
, "Couldn't allocate command structure.\n");
3215 /* Attempt to submit the Reset Device command to the command ring */
3216 spin_lock_irqsave(&xhci
->lock
, flags
);
3217 reset_device_cmd
->command_trb
= xhci
->cmd_ring
->enqueue
;
3219 /* Enqueue pointer can be left pointing to the link TRB,
3220 * we must handle that
3222 if (TRB_TYPE_LINK_LE32(reset_device_cmd
->command_trb
->link
.control
))
3223 reset_device_cmd
->command_trb
=
3224 xhci
->cmd_ring
->enq_seg
->next
->trbs
;
3226 list_add_tail(&reset_device_cmd
->cmd_list
, &virt_dev
->cmd_list
);
3227 ret
= xhci_queue_reset_device(xhci
, slot_id
);
3229 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3230 list_del(&reset_device_cmd
->cmd_list
);
3231 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3232 goto command_cleanup
;
3234 xhci_ring_cmd_db(xhci
);
3235 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3237 /* Wait for the Reset Device command to finish */
3238 timeleft
= wait_for_completion_interruptible_timeout(
3239 reset_device_cmd
->completion
,
3240 USB_CTRL_SET_TIMEOUT
);
3241 if (timeleft
<= 0) {
3242 xhci_warn(xhci
, "%s while waiting for reset device command\n",
3243 timeleft
== 0 ? "Timeout" : "Signal");
3244 spin_lock_irqsave(&xhci
->lock
, flags
);
3245 /* The timeout might have raced with the event ring handler, so
3246 * only delete from the list if the item isn't poisoned.
3248 if (reset_device_cmd
->cmd_list
.next
!= LIST_POISON1
)
3249 list_del(&reset_device_cmd
->cmd_list
);
3250 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3252 goto command_cleanup
;
3255 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3256 * unless we tried to reset a slot ID that wasn't enabled,
3257 * or the device wasn't in the addressed or configured state.
3259 ret
= reset_device_cmd
->status
;
3261 case COMP_EBADSLT
: /* 0.95 completion code for bad slot ID */
3262 case COMP_CTX_STATE
: /* 0.96 completion code for same thing */
3263 xhci_info(xhci
, "Can't reset device (slot ID %u) in %s state\n",
3265 xhci_get_slot_state(xhci
, virt_dev
->out_ctx
));
3266 xhci_info(xhci
, "Not freeing device rings.\n");
3267 /* Don't treat this as an error. May change my mind later. */
3269 goto command_cleanup
;
3271 xhci_dbg(xhci
, "Successful reset device command.\n");
3274 if (xhci_is_vendor_info_code(xhci
, ret
))
3276 xhci_warn(xhci
, "Unknown completion code %u for "
3277 "reset device command.\n", ret
);
3279 goto command_cleanup
;
3282 /* Free up host controller endpoint resources */
3283 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3284 spin_lock_irqsave(&xhci
->lock
, flags
);
3285 /* Don't delete the default control endpoint resources */
3286 xhci_free_device_endpoint_resources(xhci
, virt_dev
, false);
3287 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3290 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3291 last_freed_endpoint
= 1;
3292 for (i
= 1; i
< 31; ++i
) {
3293 struct xhci_virt_ep
*ep
= &virt_dev
->eps
[i
];
3295 if (ep
->ep_state
& EP_HAS_STREAMS
) {
3296 xhci_free_stream_info(xhci
, ep
->stream_info
);
3297 ep
->stream_info
= NULL
;
3298 ep
->ep_state
&= ~EP_HAS_STREAMS
;
3302 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
3303 last_freed_endpoint
= i
;
3305 if (!list_empty(&virt_dev
->eps
[i
].bw_endpoint_list
))
3306 xhci_drop_ep_from_interval_table(xhci
,
3307 &virt_dev
->eps
[i
].bw_info
,
3312 xhci_clear_endpoint_bw_info(&virt_dev
->eps
[i
].bw_info
);
3314 /* If necessary, update the number of active TTs on this root port */
3315 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
3317 xhci_dbg(xhci
, "Output context after successful reset device cmd:\n");
3318 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, last_freed_endpoint
);
3322 xhci_free_command(xhci
, reset_device_cmd
);
3327 * At this point, the struct usb_device is about to go away, the device has
3328 * disconnected, and all traffic has been stopped and the endpoints have been
3329 * disabled. Free any HC data structures associated with that device.
3331 void xhci_free_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3333 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3334 struct xhci_virt_device
*virt_dev
;
3335 unsigned long flags
;
3339 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
3340 /* If the host is halted due to driver unload, we still need to free the
3343 if (ret
<= 0 && ret
!= -ENODEV
)
3346 virt_dev
= xhci
->devs
[udev
->slot_id
];
3348 /* Stop any wayward timer functions (which may grab the lock) */
3349 for (i
= 0; i
< 31; ++i
) {
3350 virt_dev
->eps
[i
].ep_state
&= ~EP_HALT_PENDING
;
3351 del_timer_sync(&virt_dev
->eps
[i
].stop_cmd_timer
);
3354 if (udev
->usb2_hw_lpm_enabled
) {
3355 xhci_set_usb2_hardware_lpm(hcd
, udev
, 0);
3356 udev
->usb2_hw_lpm_enabled
= 0;
3359 spin_lock_irqsave(&xhci
->lock
, flags
);
3360 /* Don't disable the slot if the host controller is dead. */
3361 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
3362 if (state
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
) ||
3363 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
3364 xhci_free_virt_device(xhci
, udev
->slot_id
);
3365 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3369 if (xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
)) {
3370 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3371 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3374 xhci_ring_cmd_db(xhci
);
3375 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3377 * Event command completion handler will free any data structures
3378 * associated with the slot. XXX Can free sleep?
3383 * Checks if we have enough host controller resources for the default control
3386 * Must be called with xhci->lock held.
3388 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd
*xhci
)
3390 if (xhci
->num_active_eps
+ 1 > xhci
->limit_active_eps
) {
3391 xhci_dbg(xhci
, "Not enough ep ctxs: "
3392 "%u active, need to add 1, limit is %u.\n",
3393 xhci
->num_active_eps
, xhci
->limit_active_eps
);
3396 xhci
->num_active_eps
+= 1;
3397 xhci_dbg(xhci
, "Adding 1 ep ctx, %u now active.\n",
3398 xhci
->num_active_eps
);
3404 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3405 * timed out, or allocating memory failed. Returns 1 on success.
3407 int xhci_alloc_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3409 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3410 unsigned long flags
;
3414 spin_lock_irqsave(&xhci
->lock
, flags
);
3415 ret
= xhci_queue_slot_control(xhci
, TRB_ENABLE_SLOT
, 0);
3417 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3418 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3421 xhci_ring_cmd_db(xhci
);
3422 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3424 /* XXX: how much time for xHC slot assignment? */
3425 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
3426 USB_CTRL_SET_TIMEOUT
);
3427 if (timeleft
<= 0) {
3428 xhci_warn(xhci
, "%s while waiting for a slot\n",
3429 timeleft
== 0 ? "Timeout" : "Signal");
3430 /* FIXME cancel the enable slot request */
3434 if (!xhci
->slot_id
) {
3435 xhci_err(xhci
, "Error while assigning device slot ID\n");
3439 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3440 spin_lock_irqsave(&xhci
->lock
, flags
);
3441 ret
= xhci_reserve_host_control_ep_resources(xhci
);
3443 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3444 xhci_warn(xhci
, "Not enough host resources, "
3445 "active endpoint contexts = %u\n",
3446 xhci
->num_active_eps
);
3449 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3451 /* Use GFP_NOIO, since this function can be called from
3452 * xhci_discover_or_reset_device(), which may be called as part of
3453 * mass storage driver error handling.
3455 if (!xhci_alloc_virt_device(xhci
, xhci
->slot_id
, udev
, GFP_NOIO
)) {
3456 xhci_warn(xhci
, "Could not allocate xHCI USB device data structures\n");
3459 udev
->slot_id
= xhci
->slot_id
;
3460 /* Is this a LS or FS device under a HS hub? */
3461 /* Hub or peripherial? */
3465 /* Disable slot, if we can do it without mem alloc */
3466 spin_lock_irqsave(&xhci
->lock
, flags
);
3467 if (!xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
))
3468 xhci_ring_cmd_db(xhci
);
3469 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3474 * Issue an Address Device command (which will issue a SetAddress request to
3476 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3477 * we should only issue and wait on one address command at the same time.
3479 * We add one to the device address issued by the hardware because the USB core
3480 * uses address 1 for the root hubs (even though they're not really devices).
3482 int xhci_address_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3484 unsigned long flags
;
3486 struct xhci_virt_device
*virt_dev
;
3488 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3489 struct xhci_slot_ctx
*slot_ctx
;
3490 struct xhci_input_control_ctx
*ctrl_ctx
;
3493 if (!udev
->slot_id
) {
3494 xhci_dbg(xhci
, "Bad Slot ID %d\n", udev
->slot_id
);
3498 virt_dev
= xhci
->devs
[udev
->slot_id
];
3500 if (WARN_ON(!virt_dev
)) {
3502 * In plug/unplug torture test with an NEC controller,
3503 * a zero-dereference was observed once due to virt_dev = 0.
3504 * Print useful debug rather than crash if it is observed again!
3506 xhci_warn(xhci
, "Virt dev invalid for slot_id 0x%x!\n",
3511 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
3513 * If this is the first Set Address since device plug-in or
3514 * virt_device realloaction after a resume with an xHCI power loss,
3515 * then set up the slot context.
3517 if (!slot_ctx
->dev_info
)
3518 xhci_setup_addressable_virt_dev(xhci
, udev
);
3519 /* Otherwise, update the control endpoint ring enqueue pointer. */
3521 xhci_copy_ep0_dequeue_into_input_ctx(xhci
, udev
);
3522 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
3523 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
| EP0_FLAG
);
3524 ctrl_ctx
->drop_flags
= 0;
3526 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
3527 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
3529 spin_lock_irqsave(&xhci
->lock
, flags
);
3530 ret
= xhci_queue_address_device(xhci
, virt_dev
->in_ctx
->dma
,
3533 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3534 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3537 xhci_ring_cmd_db(xhci
);
3538 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3540 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3541 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
3542 USB_CTRL_SET_TIMEOUT
);
3543 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3544 * the SetAddress() "recovery interval" required by USB and aborting the
3545 * command on a timeout.
3547 if (timeleft
<= 0) {
3548 xhci_warn(xhci
, "%s while waiting for address device command\n",
3549 timeleft
== 0 ? "Timeout" : "Signal");
3550 /* FIXME cancel the address device command */
3554 switch (virt_dev
->cmd_status
) {
3555 case COMP_CTX_STATE
:
3557 xhci_err(xhci
, "Setup ERROR: address device command for slot %d.\n",
3562 dev_warn(&udev
->dev
, "Device not responding to set address.\n");
3566 dev_warn(&udev
->dev
, "ERROR: Incompatible device for address "
3567 "device command.\n");
3571 xhci_dbg(xhci
, "Successful Address Device command\n");
3574 xhci_err(xhci
, "ERROR: unexpected command completion "
3575 "code 0x%x.\n", virt_dev
->cmd_status
);
3576 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
3577 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
3584 temp_64
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
3585 xhci_dbg(xhci
, "Op regs DCBAA ptr = %#016llx\n", temp_64
);
3586 xhci_dbg(xhci
, "Slot ID %d dcbaa entry @%p = %#016llx\n",
3588 &xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
],
3589 (unsigned long long)
3590 le64_to_cpu(xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
]));
3591 xhci_dbg(xhci
, "Output Context DMA address = %#08llx\n",
3592 (unsigned long long)virt_dev
->out_ctx
->dma
);
3593 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
3594 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
3595 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
3596 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
3598 * USB core uses address 1 for the roothubs, so we add one to the
3599 * address given back to us by the HC.
3601 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3602 /* Use kernel assigned address for devices; store xHC assigned
3603 * address locally. */
3604 virt_dev
->address
= (le32_to_cpu(slot_ctx
->dev_state
) & DEV_ADDR_MASK
)
3606 /* Zero the input context control for later use */
3607 ctrl_ctx
->add_flags
= 0;
3608 ctrl_ctx
->drop_flags
= 0;
3610 xhci_dbg(xhci
, "Internal device address = %d\n", virt_dev
->address
);
3615 #ifdef CONFIG_USB_SUSPEND
3617 /* BESL to HIRD Encoding array for USB2 LPM */
3618 static int xhci_besl_encoding
[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3619 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3621 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3622 static int xhci_calculate_hird_besl(struct xhci_hcd
*xhci
,
3623 struct usb_device
*udev
)
3625 int u2del
, besl
, besl_host
;
3626 int besl_device
= 0;
3629 u2del
= HCS_U2_LATENCY(xhci
->hcs_params3
);
3630 field
= le32_to_cpu(udev
->bos
->ext_cap
->bmAttributes
);
3632 if (field
& USB_BESL_SUPPORT
) {
3633 for (besl_host
= 0; besl_host
< 16; besl_host
++) {
3634 if (xhci_besl_encoding
[besl_host
] >= u2del
)
3637 /* Use baseline BESL value as default */
3638 if (field
& USB_BESL_BASELINE_VALID
)
3639 besl_device
= USB_GET_BESL_BASELINE(field
);
3640 else if (field
& USB_BESL_DEEP_VALID
)
3641 besl_device
= USB_GET_BESL_DEEP(field
);
3646 besl_host
= (u2del
- 51) / 75 + 1;
3649 besl
= besl_host
+ besl_device
;
3656 static int xhci_usb2_software_lpm_test(struct usb_hcd
*hcd
,
3657 struct usb_device
*udev
)
3659 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3660 struct dev_info
*dev_info
;
3661 __le32 __iomem
**port_array
;
3662 __le32 __iomem
*addr
, *pm_addr
;
3664 unsigned int port_num
;
3665 unsigned long flags
;
3669 if (hcd
->speed
== HCD_USB3
|| !xhci
->sw_lpm_support
||
3673 /* we only support lpm for non-hub device connected to root hub yet */
3674 if (!udev
->parent
|| udev
->parent
->parent
||
3675 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
3678 spin_lock_irqsave(&xhci
->lock
, flags
);
3680 /* Look for devices in lpm_failed_devs list */
3681 dev_id
= le16_to_cpu(udev
->descriptor
.idVendor
) << 16 |
3682 le16_to_cpu(udev
->descriptor
.idProduct
);
3683 list_for_each_entry(dev_info
, &xhci
->lpm_failed_devs
, list
) {
3684 if (dev_info
->dev_id
== dev_id
) {
3690 port_array
= xhci
->usb2_ports
;
3691 port_num
= udev
->portnum
- 1;
3693 if (port_num
> HCS_MAX_PORTS(xhci
->hcs_params1
)) {
3694 xhci_dbg(xhci
, "invalid port number %d\n", udev
->portnum
);
3700 * Test USB 2.0 software LPM.
3701 * FIXME: some xHCI 1.0 hosts may implement a new register to set up
3702 * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
3703 * in the June 2011 errata release.
3705 xhci_dbg(xhci
, "test port %d software LPM\n", port_num
);
3707 * Set L1 Device Slot and HIRD/BESL.
3708 * Check device's USB 2.0 extension descriptor to determine whether
3709 * HIRD or BESL shoule be used. See USB2.0 LPM errata.
3711 pm_addr
= port_array
[port_num
] + 1;
3712 hird
= xhci_calculate_hird_besl(xhci
, udev
);
3713 temp
= PORT_L1DS(udev
->slot_id
) | PORT_HIRD(hird
);
3714 xhci_writel(xhci
, temp
, pm_addr
);
3716 /* Set port link state to U2(L1) */
3717 addr
= port_array
[port_num
];
3718 xhci_set_link_state(xhci
, port_array
, port_num
, XDEV_U2
);
3721 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3723 spin_lock_irqsave(&xhci
->lock
, flags
);
3725 /* Check L1 Status */
3726 ret
= handshake(xhci
, pm_addr
, PORT_L1S_MASK
, PORT_L1S_SUCCESS
, 125);
3727 if (ret
!= -ETIMEDOUT
) {
3728 /* enter L1 successfully */
3729 temp
= xhci_readl(xhci
, addr
);
3730 xhci_dbg(xhci
, "port %d entered L1 state, port status 0x%x\n",
3734 temp
= xhci_readl(xhci
, pm_addr
);
3735 xhci_dbg(xhci
, "port %d software lpm failed, L1 status %d\n",
3736 port_num
, temp
& PORT_L1S_MASK
);
3740 /* Resume the port */
3741 xhci_set_link_state(xhci
, port_array
, port_num
, XDEV_U0
);
3743 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3745 spin_lock_irqsave(&xhci
->lock
, flags
);
3748 xhci_test_and_clear_bit(xhci
, port_array
, port_num
, PORT_PLC
);
3750 /* Check PORTSC to make sure the device is in the right state */
3752 temp
= xhci_readl(xhci
, addr
);
3753 xhci_dbg(xhci
, "resumed port %d status 0x%x\n", port_num
, temp
);
3754 if (!(temp
& PORT_CONNECT
) || !(temp
& PORT_PE
) ||
3755 (temp
& PORT_PLS_MASK
) != XDEV_U0
) {
3756 xhci_dbg(xhci
, "port L1 resume fail\n");
3762 /* Insert dev to lpm_failed_devs list */
3763 xhci_warn(xhci
, "device LPM test failed, may disconnect and "
3765 dev_info
= kzalloc(sizeof(struct dev_info
), GFP_ATOMIC
);
3770 dev_info
->dev_id
= dev_id
;
3771 INIT_LIST_HEAD(&dev_info
->list
);
3772 list_add(&dev_info
->list
, &xhci
->lpm_failed_devs
);
3774 xhci_ring_device(xhci
, udev
->slot_id
);
3778 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3782 int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
3783 struct usb_device
*udev
, int enable
)
3785 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3786 __le32 __iomem
**port_array
;
3787 __le32 __iomem
*pm_addr
;
3789 unsigned int port_num
;
3790 unsigned long flags
;
3793 if (hcd
->speed
== HCD_USB3
|| !xhci
->hw_lpm_support
||
3797 if (!udev
->parent
|| udev
->parent
->parent
||
3798 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
3801 if (udev
->usb2_hw_lpm_capable
!= 1)
3804 spin_lock_irqsave(&xhci
->lock
, flags
);
3806 port_array
= xhci
->usb2_ports
;
3807 port_num
= udev
->portnum
- 1;
3808 pm_addr
= port_array
[port_num
] + 1;
3809 temp
= xhci_readl(xhci
, pm_addr
);
3811 xhci_dbg(xhci
, "%s port %d USB2 hardware LPM\n",
3812 enable
? "enable" : "disable", port_num
);
3814 hird
= xhci_calculate_hird_besl(xhci
, udev
);
3817 temp
&= ~PORT_HIRD_MASK
;
3818 temp
|= PORT_HIRD(hird
) | PORT_RWE
;
3819 xhci_writel(xhci
, temp
, pm_addr
);
3820 temp
= xhci_readl(xhci
, pm_addr
);
3822 xhci_writel(xhci
, temp
, pm_addr
);
3824 temp
&= ~(PORT_HLE
| PORT_RWE
| PORT_HIRD_MASK
);
3825 xhci_writel(xhci
, temp
, pm_addr
);
3828 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3832 int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3834 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3837 ret
= xhci_usb2_software_lpm_test(hcd
, udev
);
3839 xhci_dbg(xhci
, "software LPM test succeed\n");
3840 if (xhci
->hw_lpm_support
== 1) {
3841 udev
->usb2_hw_lpm_capable
= 1;
3842 ret
= xhci_set_usb2_hardware_lpm(hcd
, udev
, 1);
3844 udev
->usb2_hw_lpm_enabled
= 1;
3853 int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
3854 struct usb_device
*udev
, int enable
)
3859 int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3864 #endif /* CONFIG_USB_SUSPEND */
3866 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
3867 * internal data structures for the device.
3869 int xhci_update_hub_device(struct usb_hcd
*hcd
, struct usb_device
*hdev
,
3870 struct usb_tt
*tt
, gfp_t mem_flags
)
3872 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3873 struct xhci_virt_device
*vdev
;
3874 struct xhci_command
*config_cmd
;
3875 struct xhci_input_control_ctx
*ctrl_ctx
;
3876 struct xhci_slot_ctx
*slot_ctx
;
3877 unsigned long flags
;
3878 unsigned think_time
;
3881 /* Ignore root hubs */
3885 vdev
= xhci
->devs
[hdev
->slot_id
];
3887 xhci_warn(xhci
, "Cannot update hub desc for unknown device.\n");
3890 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
3892 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
3896 spin_lock_irqsave(&xhci
->lock
, flags
);
3897 if (hdev
->speed
== USB_SPEED_HIGH
&&
3898 xhci_alloc_tt_info(xhci
, vdev
, hdev
, tt
, GFP_ATOMIC
)) {
3899 xhci_dbg(xhci
, "Could not allocate xHCI TT structure.\n");
3900 xhci_free_command(xhci
, config_cmd
);
3901 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3905 xhci_slot_copy(xhci
, config_cmd
->in_ctx
, vdev
->out_ctx
);
3906 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, config_cmd
->in_ctx
);
3907 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
3908 slot_ctx
= xhci_get_slot_ctx(xhci
, config_cmd
->in_ctx
);
3909 slot_ctx
->dev_info
|= cpu_to_le32(DEV_HUB
);
3911 slot_ctx
->dev_info
|= cpu_to_le32(DEV_MTT
);
3912 if (xhci
->hci_version
> 0x95) {
3913 xhci_dbg(xhci
, "xHCI version %x needs hub "
3914 "TT think time and number of ports\n",
3915 (unsigned int) xhci
->hci_version
);
3916 slot_ctx
->dev_info2
|= cpu_to_le32(XHCI_MAX_PORTS(hdev
->maxchild
));
3917 /* Set TT think time - convert from ns to FS bit times.
3918 * 0 = 8 FS bit times, 1 = 16 FS bit times,
3919 * 2 = 24 FS bit times, 3 = 32 FS bit times.
3921 * xHCI 1.0: this field shall be 0 if the device is not a
3924 think_time
= tt
->think_time
;
3925 if (think_time
!= 0)
3926 think_time
= (think_time
/ 666) - 1;
3927 if (xhci
->hci_version
< 0x100 || hdev
->speed
== USB_SPEED_HIGH
)
3928 slot_ctx
->tt_info
|=
3929 cpu_to_le32(TT_THINK_TIME(think_time
));
3931 xhci_dbg(xhci
, "xHCI version %x doesn't need hub "
3932 "TT think time or number of ports\n",
3933 (unsigned int) xhci
->hci_version
);
3935 slot_ctx
->dev_state
= 0;
3936 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3938 xhci_dbg(xhci
, "Set up %s for hub device.\n",
3939 (xhci
->hci_version
> 0x95) ?
3940 "configure endpoint" : "evaluate context");
3941 xhci_dbg(xhci
, "Slot %u Input Context:\n", hdev
->slot_id
);
3942 xhci_dbg_ctx(xhci
, config_cmd
->in_ctx
, 0);
3944 /* Issue and wait for the configure endpoint or
3945 * evaluate context command.
3947 if (xhci
->hci_version
> 0x95)
3948 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
3951 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
3954 xhci_dbg(xhci
, "Slot %u Output Context:\n", hdev
->slot_id
);
3955 xhci_dbg_ctx(xhci
, vdev
->out_ctx
, 0);
3957 xhci_free_command(xhci
, config_cmd
);
3961 int xhci_get_frame(struct usb_hcd
*hcd
)
3963 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3964 /* EHCI mods by the periodic size. Why? */
3965 return xhci_readl(xhci
, &xhci
->run_regs
->microframe_index
) >> 3;
3968 int xhci_gen_setup(struct usb_hcd
*hcd
, xhci_get_quirks_t get_quirks
)
3970 struct xhci_hcd
*xhci
;
3971 struct device
*dev
= hcd
->self
.controller
;
3975 /* Accept arbitrarily long scatter-gather lists */
3976 hcd
->self
.sg_tablesize
= ~0;
3978 if (usb_hcd_is_primary_hcd(hcd
)) {
3979 xhci
= kzalloc(sizeof(struct xhci_hcd
), GFP_KERNEL
);
3982 *((struct xhci_hcd
**) hcd
->hcd_priv
) = xhci
;
3983 xhci
->main_hcd
= hcd
;
3984 /* Mark the first roothub as being USB 2.0.
3985 * The xHCI driver will register the USB 3.0 roothub.
3987 hcd
->speed
= HCD_USB2
;
3988 hcd
->self
.root_hub
->speed
= USB_SPEED_HIGH
;
3990 * USB 2.0 roothub under xHCI has an integrated TT,
3991 * (rate matching hub) as opposed to having an OHCI/UHCI
3992 * companion controller.
3996 /* xHCI private pointer was set in xhci_pci_probe for the second
3997 * registered roothub.
3999 xhci
= hcd_to_xhci(hcd
);
4000 temp
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4001 if (HCC_64BIT_ADDR(temp
)) {
4002 xhci_dbg(xhci
, "Enabling 64-bit DMA addresses.\n");
4003 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(64));
4005 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(32));
4010 xhci
->cap_regs
= hcd
->regs
;
4011 xhci
->op_regs
= hcd
->regs
+
4012 HC_LENGTH(xhci_readl(xhci
, &xhci
->cap_regs
->hc_capbase
));
4013 xhci
->run_regs
= hcd
->regs
+
4014 (xhci_readl(xhci
, &xhci
->cap_regs
->run_regs_off
) & RTSOFF_MASK
);
4015 /* Cache read-only capability registers */
4016 xhci
->hcs_params1
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params1
);
4017 xhci
->hcs_params2
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params2
);
4018 xhci
->hcs_params3
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params3
);
4019 xhci
->hcc_params
= xhci_readl(xhci
, &xhci
->cap_regs
->hc_capbase
);
4020 xhci
->hci_version
= HC_VERSION(xhci
->hcc_params
);
4021 xhci
->hcc_params
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4022 xhci_print_registers(xhci
);
4024 get_quirks(dev
, xhci
);
4026 /* Make sure the HC is halted. */
4027 retval
= xhci_halt(xhci
);
4031 xhci_dbg(xhci
, "Resetting HCD\n");
4032 /* Reset the internal HC memory state and registers. */
4033 retval
= xhci_reset(xhci
);
4036 xhci_dbg(xhci
, "Reset complete\n");
4038 temp
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4039 if (HCC_64BIT_ADDR(temp
)) {
4040 xhci_dbg(xhci
, "Enabling 64-bit DMA addresses.\n");
4041 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(64));
4043 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(32));
4046 xhci_dbg(xhci
, "Calling HCD init\n");
4047 /* Initialize HCD and host controller data structures. */
4048 retval
= xhci_init(hcd
);
4051 xhci_dbg(xhci
, "Called HCD init\n");
4058 MODULE_DESCRIPTION(DRIVER_DESC
);
4059 MODULE_AUTHOR(DRIVER_AUTHOR
);
4060 MODULE_LICENSE("GPL");
4062 static int __init
xhci_hcd_init(void)
4066 retval
= xhci_register_pci();
4068 printk(KERN_DEBUG
"Problem registering PCI driver.");
4071 retval
= xhci_register_plat();
4073 printk(KERN_DEBUG
"Problem registering platform driver.");
4077 * Check the compiler generated sizes of structures that must be laid
4078 * out in specific ways for hardware access.
4080 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array
) != 256*32/8);
4081 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx
) != 8*32/8);
4082 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx
) != 8*32/8);
4083 /* xhci_device_control has eight fields, and also
4084 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4086 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx
) != 4*32/8);
4087 BUILD_BUG_ON(sizeof(union xhci_trb
) != 4*32/8);
4088 BUILD_BUG_ON(sizeof(struct xhci_erst_entry
) != 4*32/8);
4089 BUILD_BUG_ON(sizeof(struct xhci_cap_regs
) != 7*32/8);
4090 BUILD_BUG_ON(sizeof(struct xhci_intr_reg
) != 8*32/8);
4091 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4092 BUILD_BUG_ON(sizeof(struct xhci_run_regs
) != (8+8*128)*32/8);
4093 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array
) != 256*32/8);
4096 xhci_unregister_pci();
4099 module_init(xhci_hcd_init
);
4101 static void __exit
xhci_hcd_cleanup(void)
4103 xhci_unregister_pci();
4104 xhci_unregister_plat();
4106 module_exit(xhci_hcd_cleanup
);