2 * Copyright (C) 2005-2006 by Texas Instruments
4 * This file is part of the Inventra Controller Driver for Linux.
6 * The Inventra Controller Driver for Linux is free software; you
7 * can redistribute it and/or modify it under the terms of the GNU
8 * General Public License version 2 as published by the Free Software
11 * The Inventra Controller Driver for Linux is distributed in
12 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
13 * without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 * License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with The Inventra Controller Driver for Linux ; if not,
19 * write to the Free Software Foundation, Inc., 59 Temple Place,
20 * Suite 330, Boston, MA 02111-1307 USA
24 #include <linux/module.h>
25 #include <linux/kernel.h>
26 #include <linux/sched.h>
27 #include <linux/init.h>
28 #include <linux/list.h>
29 #include <linux/delay.h>
30 #include <linux/clk.h>
32 #include <linux/gpio.h>
33 #include <linux/platform_device.h>
34 #include <linux/dma-mapping.h>
36 #include <mach/cputype.h>
38 #include <asm/mach-types.h>
40 #include "musb_core.h"
42 #ifdef CONFIG_MACH_DAVINCI_EVM
43 #define GPIO_nVBUS_DRV 160
50 #define USB_PHY_CTRL IO_ADDRESS(USBPHY_CTL_PADDR)
51 #define DM355_DEEPSLEEP IO_ADDRESS(DM355_DEEPSLEEP_PADDR)
55 struct platform_device
*musb
;
59 /* REVISIT (PM) we should be able to keep the PHY in low power mode most
60 * of the time (24 MHZ oscillator and PLL off, etc) by setting POWER.D0
61 * and, when in host mode, autosuspending idle root ports... PHYPLLON
62 * (overriding SUSPENDM?) then likely needs to stay off.
65 static inline void phy_on(void)
67 u32 phy_ctrl
= __raw_readl(USB_PHY_CTRL
);
69 /* power everything up; start the on-chip PHY and its PLL */
70 phy_ctrl
&= ~(USBPHY_OSCPDWN
| USBPHY_OTGPDWN
| USBPHY_PHYPDWN
);
71 phy_ctrl
|= USBPHY_SESNDEN
| USBPHY_VBDTCTEN
| USBPHY_PHYPLLON
;
72 __raw_writel(phy_ctrl
, USB_PHY_CTRL
);
74 /* wait for PLL to lock before proceeding */
75 while ((__raw_readl(USB_PHY_CTRL
) & USBPHY_PHYCLKGD
) == 0)
79 static inline void phy_off(void)
81 u32 phy_ctrl
= __raw_readl(USB_PHY_CTRL
);
83 /* powerdown the on-chip PHY, its PLL, and the OTG block */
84 phy_ctrl
&= ~(USBPHY_SESNDEN
| USBPHY_VBDTCTEN
| USBPHY_PHYPLLON
);
85 phy_ctrl
|= USBPHY_OSCPDWN
| USBPHY_OTGPDWN
| USBPHY_PHYPDWN
;
86 __raw_writel(phy_ctrl
, USB_PHY_CTRL
);
89 static int dma_off
= 1;
91 static void davinci_musb_enable(struct musb
*musb
)
95 /* workaround: setup irqs through both register sets */
96 tmp
= (musb
->epmask
& DAVINCI_USB_TX_ENDPTS_MASK
)
97 << DAVINCI_USB_TXINT_SHIFT
;
98 musb_writel(musb
->ctrl_base
, DAVINCI_USB_INT_MASK_SET_REG
, tmp
);
100 tmp
= (musb
->epmask
& (0xfffe & DAVINCI_USB_RX_ENDPTS_MASK
))
101 << DAVINCI_USB_RXINT_SHIFT
;
102 musb_writel(musb
->ctrl_base
, DAVINCI_USB_INT_MASK_SET_REG
, tmp
);
105 val
= ~MUSB_INTR_SOF
;
106 tmp
|= ((val
& 0x01ff) << DAVINCI_USB_USBINT_SHIFT
);
107 musb_writel(musb
->ctrl_base
, DAVINCI_USB_INT_MASK_SET_REG
, tmp
);
109 if (is_dma_capable() && !dma_off
)
110 printk(KERN_WARNING
"%s %s: dma not reactivated\n",
115 /* force a DRVVBUS irq so we can start polling for ID change */
116 if (is_otg_enabled(musb
))
117 musb_writel(musb
->ctrl_base
, DAVINCI_USB_INT_SET_REG
,
118 DAVINCI_INTR_DRVVBUS
<< DAVINCI_USB_USBINT_SHIFT
);
122 * Disable the HDRC and flush interrupts
124 static void davinci_musb_disable(struct musb
*musb
)
126 /* because we don't set CTRLR.UINT, "important" to:
127 * - not read/write INTRUSB/INTRUSBE
128 * - (except during initial setup, as workaround)
129 * - use INTSETR/INTCLRR instead
131 musb_writel(musb
->ctrl_base
, DAVINCI_USB_INT_MASK_CLR_REG
,
132 DAVINCI_USB_USBINT_MASK
133 | DAVINCI_USB_TXINT_MASK
134 | DAVINCI_USB_RXINT_MASK
);
135 musb_writeb(musb
->mregs
, MUSB_DEVCTL
, 0);
136 musb_writel(musb
->ctrl_base
, DAVINCI_USB_EOI_REG
, 0);
138 if (is_dma_capable() && !dma_off
)
139 WARNING("dma still active\n");
143 #define portstate(stmt) stmt
146 * VBUS SWITCHING IS BOARD-SPECIFIC ... at least for the DM6446 EVM,
147 * which doesn't wire DRVVBUS to the FET that switches it. Unclear
148 * if that's a problem with the DM6446 chip or just with that board.
150 * In either case, the DM355 EVM automates DRVVBUS the normal way,
151 * when J10 is out, and TI documents it as handling OTG.
154 #ifdef CONFIG_MACH_DAVINCI_EVM
156 static int vbus_state
= -1;
158 /* I2C operations are always synchronous, and require a task context.
159 * With unloaded systems, using the shared workqueue seems to suffice
160 * to satisfy the 100msec A_WAIT_VRISE timeout...
162 static void evm_deferred_drvvbus(struct work_struct
*ignored
)
164 gpio_set_value_cansleep(GPIO_nVBUS_DRV
, vbus_state
);
165 vbus_state
= !vbus_state
;
170 static void davinci_musb_source_power(struct musb
*musb
, int is_on
, int immediate
)
172 #ifdef CONFIG_MACH_DAVINCI_EVM
176 if (vbus_state
== is_on
)
178 vbus_state
= !is_on
; /* 0/1 vs "-1 == unknown/init" */
180 if (machine_is_davinci_evm()) {
181 static DECLARE_WORK(evm_vbus_work
, evm_deferred_drvvbus
);
184 gpio_set_value_cansleep(GPIO_nVBUS_DRV
, vbus_state
);
186 schedule_work(&evm_vbus_work
);
193 static void davinci_musb_set_vbus(struct musb
*musb
, int is_on
)
195 WARN_ON(is_on
&& is_peripheral_active(musb
));
196 davinci_musb_source_power(musb
, is_on
, 0);
200 #define POLL_SECONDS 2
202 static struct timer_list otg_workaround
;
204 static void otg_timer(unsigned long _musb
)
206 struct musb
*musb
= (void *)_musb
;
207 void __iomem
*mregs
= musb
->mregs
;
211 /* We poll because DaVinci's won't expose several OTG-critical
212 * status change events (from the transceiver) otherwise.
214 devctl
= musb_readb(mregs
, MUSB_DEVCTL
);
215 dev_dbg(musb
->controller
, "poll devctl %02x (%s)\n", devctl
,
216 otg_state_string(musb
->xceiv
->state
));
218 spin_lock_irqsave(&musb
->lock
, flags
);
219 switch (musb
->xceiv
->state
) {
220 case OTG_STATE_A_WAIT_VFALL
:
221 /* Wait till VBUS falls below SessionEnd (~0.2V); the 1.3 RTL
222 * seems to mis-handle session "start" otherwise (or in our
223 * case "recover"), in routine "VBUS was valid by the time
224 * VBUSERR got reported during enumeration" cases.
226 if (devctl
& MUSB_DEVCTL_VBUS
) {
227 mod_timer(&otg_workaround
, jiffies
+ POLL_SECONDS
* HZ
);
230 musb
->xceiv
->state
= OTG_STATE_A_WAIT_VRISE
;
231 musb_writel(musb
->ctrl_base
, DAVINCI_USB_INT_SET_REG
,
232 MUSB_INTR_VBUSERROR
<< DAVINCI_USB_USBINT_SHIFT
);
234 case OTG_STATE_B_IDLE
:
235 if (!is_peripheral_enabled(musb
))
238 /* There's no ID-changed IRQ, so we have no good way to tell
239 * when to switch to the A-Default state machine (by setting
240 * the DEVCTL.SESSION flag).
242 * Workaround: whenever we're in B_IDLE, try setting the
243 * session flag every few seconds. If it works, ID was
244 * grounded and we're now in the A-Default state machine.
246 * NOTE setting the session flag is _supposed_ to trigger
247 * SRP, but clearly it doesn't.
249 musb_writeb(mregs
, MUSB_DEVCTL
,
250 devctl
| MUSB_DEVCTL_SESSION
);
251 devctl
= musb_readb(mregs
, MUSB_DEVCTL
);
252 if (devctl
& MUSB_DEVCTL_BDEVICE
)
253 mod_timer(&otg_workaround
, jiffies
+ POLL_SECONDS
* HZ
);
255 musb
->xceiv
->state
= OTG_STATE_A_IDLE
;
260 spin_unlock_irqrestore(&musb
->lock
, flags
);
263 static irqreturn_t
davinci_musb_interrupt(int irq
, void *__hci
)
266 irqreturn_t retval
= IRQ_NONE
;
267 struct musb
*musb
= __hci
;
268 struct usb_otg
*otg
= musb
->xceiv
->otg
;
269 void __iomem
*tibase
= musb
->ctrl_base
;
273 spin_lock_irqsave(&musb
->lock
, flags
);
275 /* NOTE: DaVinci shadows the Mentor IRQs. Don't manage them through
276 * the Mentor registers (except for setup), use the TI ones and EOI.
278 * Docs describe irq "vector" registers associated with the CPPI and
279 * USB EOI registers. These hold a bitmask corresponding to the
280 * current IRQ, not an irq handler address. Would using those bits
281 * resolve some of the races observed in this dispatch code??
284 /* CPPI interrupts share the same IRQ line, but have their own
285 * mask, state, "vector", and EOI registers.
287 cppi
= container_of(musb
->dma_controller
, struct cppi
, controller
);
288 if (is_cppi_enabled() && musb
->dma_controller
&& !cppi
->irq
)
289 retval
= cppi_interrupt(irq
, __hci
);
291 /* ack and handle non-CPPI interrupts */
292 tmp
= musb_readl(tibase
, DAVINCI_USB_INT_SRC_MASKED_REG
);
293 musb_writel(tibase
, DAVINCI_USB_INT_SRC_CLR_REG
, tmp
);
294 dev_dbg(musb
->controller
, "IRQ %08x\n", tmp
);
296 musb
->int_rx
= (tmp
& DAVINCI_USB_RXINT_MASK
)
297 >> DAVINCI_USB_RXINT_SHIFT
;
298 musb
->int_tx
= (tmp
& DAVINCI_USB_TXINT_MASK
)
299 >> DAVINCI_USB_TXINT_SHIFT
;
300 musb
->int_usb
= (tmp
& DAVINCI_USB_USBINT_MASK
)
301 >> DAVINCI_USB_USBINT_SHIFT
;
303 /* DRVVBUS irqs are the only proxy we have (a very poor one!) for
304 * DaVinci's missing ID change IRQ. We need an ID change IRQ to
305 * switch appropriately between halves of the OTG state machine.
306 * Managing DEVCTL.SESSION per Mentor docs requires we know its
307 * value, but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
308 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
310 if (tmp
& (DAVINCI_INTR_DRVVBUS
<< DAVINCI_USB_USBINT_SHIFT
)) {
311 int drvvbus
= musb_readl(tibase
, DAVINCI_USB_STAT_REG
);
312 void __iomem
*mregs
= musb
->mregs
;
313 u8 devctl
= musb_readb(mregs
, MUSB_DEVCTL
);
314 int err
= musb
->int_usb
& MUSB_INTR_VBUSERROR
;
316 err
= is_host_enabled(musb
)
317 && (musb
->int_usb
& MUSB_INTR_VBUSERROR
);
319 /* The Mentor core doesn't debounce VBUS as needed
320 * to cope with device connect current spikes. This
321 * means it's not uncommon for bus-powered devices
322 * to get VBUS errors during enumeration.
324 * This is a workaround, but newer RTL from Mentor
325 * seems to allow a better one: "re"starting sessions
326 * without waiting (on EVM, a **long** time) for VBUS
327 * to stop registering in devctl.
329 musb
->int_usb
&= ~MUSB_INTR_VBUSERROR
;
330 musb
->xceiv
->state
= OTG_STATE_A_WAIT_VFALL
;
331 mod_timer(&otg_workaround
, jiffies
+ POLL_SECONDS
* HZ
);
332 WARNING("VBUS error workaround (delay coming)\n");
333 } else if (is_host_enabled(musb
) && drvvbus
) {
336 musb
->xceiv
->state
= OTG_STATE_A_WAIT_VRISE
;
337 portstate(musb
->port1_status
|= USB_PORT_STAT_POWER
);
338 del_timer(&otg_workaround
);
343 musb
->xceiv
->state
= OTG_STATE_B_IDLE
;
344 portstate(musb
->port1_status
&= ~USB_PORT_STAT_POWER
);
347 /* NOTE: this must complete poweron within 100 msec
348 * (OTG_TIME_A_WAIT_VRISE) but we don't check for that.
350 davinci_musb_source_power(musb
, drvvbus
, 0);
351 dev_dbg(musb
->controller
, "VBUS %s (%s)%s, devctl %02x\n",
352 drvvbus
? "on" : "off",
353 otg_state_string(musb
->xceiv
->state
),
356 retval
= IRQ_HANDLED
;
359 if (musb
->int_tx
|| musb
->int_rx
|| musb
->int_usb
)
360 retval
|= musb_interrupt(musb
);
362 /* irq stays asserted until EOI is written */
363 musb_writel(tibase
, DAVINCI_USB_EOI_REG
, 0);
365 /* poll for ID change */
366 if (is_otg_enabled(musb
)
367 && musb
->xceiv
->state
== OTG_STATE_B_IDLE
)
368 mod_timer(&otg_workaround
, jiffies
+ POLL_SECONDS
* HZ
);
370 spin_unlock_irqrestore(&musb
->lock
, flags
);
375 static int davinci_musb_set_mode(struct musb
*musb
, u8 mode
)
377 /* EVM can't do this (right?) */
381 static int davinci_musb_init(struct musb
*musb
)
383 void __iomem
*tibase
= musb
->ctrl_base
;
386 usb_nop_xceiv_register();
387 musb
->xceiv
= usb_get_transceiver();
391 musb
->mregs
+= DAVINCI_BASE_OFFSET
;
393 /* returns zero if e.g. not clocked */
394 revision
= musb_readl(tibase
, DAVINCI_USB_VERSION_REG
);
398 if (is_host_enabled(musb
))
399 setup_timer(&otg_workaround
, otg_timer
, (unsigned long) musb
);
401 davinci_musb_source_power(musb
, 0, 1);
403 /* dm355 EVM swaps D+/D- for signal integrity, and
404 * is clocked from the main 24 MHz crystal.
406 if (machine_is_davinci_dm355_evm()) {
407 u32 phy_ctrl
= __raw_readl(USB_PHY_CTRL
);
409 phy_ctrl
&= ~(3 << 9);
410 phy_ctrl
|= USBPHY_DATAPOL
;
411 __raw_writel(phy_ctrl
, USB_PHY_CTRL
);
414 /* On dm355, the default-A state machine needs DRVVBUS control.
415 * If we won't be a host, there's no need to turn it on.
417 if (cpu_is_davinci_dm355()) {
418 u32 deepsleep
= __raw_readl(DM355_DEEPSLEEP
);
420 if (is_host_enabled(musb
)) {
421 deepsleep
&= ~DRVVBUS_OVERRIDE
;
423 deepsleep
&= ~DRVVBUS_FORCE
;
424 deepsleep
|= DRVVBUS_OVERRIDE
;
426 __raw_writel(deepsleep
, DM355_DEEPSLEEP
);
429 /* reset the controller */
430 musb_writel(tibase
, DAVINCI_USB_CTRL_REG
, 0x1);
432 /* start the on-chip PHY and its PLL */
437 /* NOTE: irqs are in mixed mode, not bypass to pure-musb */
438 pr_debug("DaVinci OTG revision %08x phy %03x control %02x\n",
439 revision
, __raw_readl(USB_PHY_CTRL
),
440 musb_readb(tibase
, DAVINCI_USB_CTRL_REG
));
442 musb
->isr
= davinci_musb_interrupt
;
446 usb_put_transceiver(musb
->xceiv
);
447 usb_nop_xceiv_unregister();
451 static int davinci_musb_exit(struct musb
*musb
)
453 if (is_host_enabled(musb
))
454 del_timer_sync(&otg_workaround
);
457 if (cpu_is_davinci_dm355()) {
458 u32 deepsleep
= __raw_readl(DM355_DEEPSLEEP
);
460 deepsleep
&= ~DRVVBUS_FORCE
;
461 deepsleep
|= DRVVBUS_OVERRIDE
;
462 __raw_writel(deepsleep
, DM355_DEEPSLEEP
);
465 davinci_musb_source_power(musb
, 0 /*off*/, 1);
467 /* delay, to avoid problems with module reload */
468 if (is_host_enabled(musb
) && musb
->xceiv
->otg
->default_a
) {
472 /* if there's no peripheral connected, this can take a
473 * long time to fall, especially on EVM with huge C133.
476 devctl
= musb_readb(musb
->mregs
, MUSB_DEVCTL
);
477 if (!(devctl
& MUSB_DEVCTL_VBUS
))
479 if ((devctl
& MUSB_DEVCTL_VBUS
) != warn
) {
480 warn
= devctl
& MUSB_DEVCTL_VBUS
;
481 dev_dbg(musb
->controller
, "VBUS %d\n",
482 warn
>> MUSB_DEVCTL_VBUS_SHIFT
);
486 } while (maxdelay
> 0);
488 /* in OTG mode, another host might be connected */
489 if (devctl
& MUSB_DEVCTL_VBUS
)
490 dev_dbg(musb
->controller
, "VBUS off timeout (devctl %02x)\n", devctl
);
495 usb_put_transceiver(musb
->xceiv
);
496 usb_nop_xceiv_unregister();
501 static const struct musb_platform_ops davinci_ops
= {
502 .init
= davinci_musb_init
,
503 .exit
= davinci_musb_exit
,
505 .enable
= davinci_musb_enable
,
506 .disable
= davinci_musb_disable
,
508 .set_mode
= davinci_musb_set_mode
,
510 .set_vbus
= davinci_musb_set_vbus
,
513 static u64 davinci_dmamask
= DMA_BIT_MASK(32);
515 static int __devinit
davinci_probe(struct platform_device
*pdev
)
517 struct musb_hdrc_platform_data
*pdata
= pdev
->dev
.platform_data
;
518 struct platform_device
*musb
;
519 struct davinci_glue
*glue
;
524 glue
= kzalloc(sizeof(*glue
), GFP_KERNEL
);
526 dev_err(&pdev
->dev
, "failed to allocate glue context\n");
530 musb
= platform_device_alloc("musb-hdrc", -1);
532 dev_err(&pdev
->dev
, "failed to allocate musb device\n");
536 clk
= clk_get(&pdev
->dev
, "usb");
538 dev_err(&pdev
->dev
, "failed to get clock\n");
543 ret
= clk_enable(clk
);
545 dev_err(&pdev
->dev
, "failed to enable clock\n");
549 musb
->dev
.parent
= &pdev
->dev
;
550 musb
->dev
.dma_mask
= &davinci_dmamask
;
551 musb
->dev
.coherent_dma_mask
= davinci_dmamask
;
553 glue
->dev
= &pdev
->dev
;
557 pdata
->platform_ops
= &davinci_ops
;
559 platform_set_drvdata(pdev
, glue
);
561 ret
= platform_device_add_resources(musb
, pdev
->resource
,
562 pdev
->num_resources
);
564 dev_err(&pdev
->dev
, "failed to add resources\n");
568 ret
= platform_device_add_data(musb
, pdata
, sizeof(*pdata
));
570 dev_err(&pdev
->dev
, "failed to add platform_data\n");
574 ret
= platform_device_add(musb
);
576 dev_err(&pdev
->dev
, "failed to register musb device\n");
589 platform_device_put(musb
);
598 static int __devexit
davinci_remove(struct platform_device
*pdev
)
600 struct davinci_glue
*glue
= platform_get_drvdata(pdev
);
602 platform_device_del(glue
->musb
);
603 platform_device_put(glue
->musb
);
604 clk_disable(glue
->clk
);
611 static struct platform_driver davinci_driver
= {
612 .probe
= davinci_probe
,
613 .remove
= __devexit_p(davinci_remove
),
615 .name
= "musb-davinci",
619 MODULE_DESCRIPTION("DaVinci MUSB Glue Layer");
620 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
621 MODULE_LICENSE("GPL v2");
623 static int __init
davinci_init(void)
625 return platform_driver_register(&davinci_driver
);
627 module_init(davinci_init
);
629 static void __exit
davinci_exit(void)
631 platform_driver_unregister(&davinci_driver
);
633 module_exit(davinci_exit
);