drivers/usb/musb/davinci.c

   1 /*
   2  * Copyright (C) 2005-2006 by Texas Instruments
   3  *
   4  * This file is part of the Inventra Controller Driver for Linux.
   5  *
   6  * The Inventra Controller Driver for Linux is free software; you
   7  * can redistribute it and/or modify it under the terms of the GNU
   8  * General Public License version 2 as published by the Free Software
   9  * Foundation.
  10  *
  11  * The Inventra Controller Driver for Linux is distributed in
  12  * the hope that it will be useful, but WITHOUT ANY WARRANTY;
  13  * without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15  * License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with The Inventra Controller Driver for Linux ; if not,
  19  * write to the Free Software Foundation, Inc., 59 Temple Place,
  20  * Suite 330, Boston, MA  02111-1307  USA
  21  *
  22  */
  23
  24 #include <linux/module.h>
  25 #include <linux/kernel.h>
  26 #include <linux/sched.h>
  27 #include <linux/init.h>
  28 #include <linux/list.h>
  29 #include <linux/delay.h>
  30 #include <linux/clk.h>
  31 #include <linux/err.h>
  32 #include <linux/io.h>
  33 #include <linux/gpio.h>
  34 #include <linux/platform_device.h>
  35 #include <linux/dma-mapping.h>
  36
  37 #include <mach/cputype.h>
  38 #include <mach/hardware.h>
  39
  40 #include <asm/mach-types.h>
  41
  42 #include "musb_core.h"
  43
  44 #ifdef CONFIG_MACH_DAVINCI_EVM
  45 #define GPIO_nVBUS_DRV          160
  46 #endif
  47
  48 #include "davinci.h"
  49 #include "cppi_dma.h"
  50
  51
  52 #define USB_PHY_CTRL    IO_ADDRESS(USBPHY_CTL_PADDR)
  53 #define DM355_DEEPSLEEP IO_ADDRESS(DM355_DEEPSLEEP_PADDR)
  54
  55 struct davinci_glue {
  56         struct device           *dev;
  57         struct platform_device  *musb;
  58         struct clk              *clk;
  59 };
  60
  61 /* REVISIT (PM) we should be able to keep the PHY in low power mode most
  62  * of the time (24 MHZ oscillator and PLL off, etc) by setting POWER.D0
  63  * and, when in host mode, autosuspending idle root ports... PHYPLLON
  64  * (overriding SUSPENDM?) then likely needs to stay off.
  65  */
  66
  67 static inline void phy_on(void)
  68 {
  69         u32     phy_ctrl = __raw_readl(USB_PHY_CTRL);
  70
  71         /* power everything up; start the on-chip PHY and its PLL */
  72         phy_ctrl &= ~(USBPHY_OSCPDWN | USBPHY_OTGPDWN | USBPHY_PHYPDWN);
  73         phy_ctrl |= USBPHY_SESNDEN | USBPHY_VBDTCTEN | USBPHY_PHYPLLON;
  74         __raw_writel(phy_ctrl, USB_PHY_CTRL);
  75
  76         /* wait for PLL to lock before proceeding */
  77         while ((__raw_readl(USB_PHY_CTRL) & USBPHY_PHYCLKGD) == 0)
  78                 cpu_relax();
  79 }
  80
  81 static inline void phy_off(void)
  82 {
  83         u32     phy_ctrl = __raw_readl(USB_PHY_CTRL);
  84
  85         /* powerdown the on-chip PHY, its PLL, and the OTG block */
  86         phy_ctrl &= ~(USBPHY_SESNDEN | USBPHY_VBDTCTEN | USBPHY_PHYPLLON);
  87         phy_ctrl |= USBPHY_OSCPDWN | USBPHY_OTGPDWN | USBPHY_PHYPDWN;
  88         __raw_writel(phy_ctrl, USB_PHY_CTRL);
  89 }
  90
  91 static int dma_off = 1;
  92
  93 static void davinci_musb_enable(struct musb *musb)
  94 {
  95         u32     tmp, old, val;
  96
  97         /* workaround:  setup irqs through both register sets */
  98         tmp = (musb->epmask & DAVINCI_USB_TX_ENDPTS_MASK)
  99                         << DAVINCI_USB_TXINT_SHIFT;
 100         musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
 101         old = tmp;
 102         tmp = (musb->epmask & (0xfffe & DAVINCI_USB_RX_ENDPTS_MASK))
 103                         << DAVINCI_USB_RXINT_SHIFT;
 104         musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
 105         tmp |= old;
 106
 107         val = ~MUSB_INTR_SOF;
 108         tmp |= ((val & 0x01ff) << DAVINCI_USB_USBINT_SHIFT);
 109         musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
 110
 111         if (is_dma_capable() && !dma_off)
 112                 printk(KERN_WARNING "%s %s: dma not reactivated\n",
 113                                 __FILE__, __func__);
 114         else
 115                 dma_off = 0;
 116
 117         /* force a DRVVBUS irq so we can start polling for ID change */
 118         if (is_otg_enabled(musb))
 119                 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG,
 120                         DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT);
 121 }
 122
 123 /*
 124  * Disable the HDRC and flush interrupts
 125  */
 126 static void davinci_musb_disable(struct musb *musb)
 127 {
 128         /* because we don't set CTRLR.UINT, "important" to:
 129          *  - not read/write INTRUSB/INTRUSBE
 130          *  - (except during initial setup, as workaround)
 131          *  - use INTSETR/INTCLRR instead
 132          */
 133         musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_CLR_REG,
 134                           DAVINCI_USB_USBINT_MASK
 135                         | DAVINCI_USB_TXINT_MASK
 136                         | DAVINCI_USB_RXINT_MASK);
 137         musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
 138         musb_writel(musb->ctrl_base, DAVINCI_USB_EOI_REG, 0);
 139
 140         if (is_dma_capable() && !dma_off)
 141                 WARNING("dma still active\n");
 142 }
 143
 144
 145 #define portstate(stmt)         stmt
 146
 147 /*
 148  * VBUS SWITCHING IS BOARD-SPECIFIC ... at least for the DM6446 EVM,
 149  * which doesn't wire DRVVBUS to the FET that switches it.  Unclear
 150  * if that's a problem with the DM6446 chip or just with that board.
 151  *
 152  * In either case, the DM355 EVM automates DRVVBUS the normal way,
 153  * when J10 is out, and TI documents it as handling OTG.
 154  */
 155
 156 #ifdef CONFIG_MACH_DAVINCI_EVM
 157
 158 static int vbus_state = -1;
 159
 160 /* I2C operations are always synchronous, and require a task context.
 161  * With unloaded systems, using the shared workqueue seems to suffice
 162  * to satisfy the 100msec A_WAIT_VRISE timeout...
 163  */
 164 static void evm_deferred_drvvbus(struct work_struct *ignored)
 165 {
 166         gpio_set_value_cansleep(GPIO_nVBUS_DRV, vbus_state);
 167         vbus_state = !vbus_state;
 168 }
 169
 170 #endif  /* EVM */
 171
 172 static void davinci_musb_source_power(struct musb *musb, int is_on, int immediate)
 173 {
 174 #ifdef CONFIG_MACH_DAVINCI_EVM
 175         if (is_on)
 176                 is_on = 1;
 177
 178         if (vbus_state == is_on)
 179                 return;
 180         vbus_state = !is_on;            /* 0/1 vs "-1 == unknown/init" */
 181
 182         if (machine_is_davinci_evm()) {
 183                 static DECLARE_WORK(evm_vbus_work, evm_deferred_drvvbus);
 184
 185                 if (immediate)
 186                         gpio_set_value_cansleep(GPIO_nVBUS_DRV, vbus_state);
 187                 else
 188                         schedule_work(&evm_vbus_work);
 189         }
 190         if (immediate)
 191                 vbus_state = is_on;
 192 #endif
 193 }
 194
 195 static void davinci_musb_set_vbus(struct musb *musb, int is_on)
 196 {
 197         WARN_ON(is_on && is_peripheral_active(musb));
 198         davinci_musb_source_power(musb, is_on, 0);
 199 }
 200
 201
 202 #define POLL_SECONDS    2
 203
 204 static struct timer_list otg_workaround;
 205
 206 static void otg_timer(unsigned long _musb)
 207 {
 208         struct musb             *musb = (void *)_musb;
 209         void __iomem            *mregs = musb->mregs;
 210         u8                      devctl;
 211         unsigned long           flags;
 212
 213         /* We poll because DaVinci's won't expose several OTG-critical
 214         * status change events (from the transceiver) otherwise.
 215          */
 216         devctl = musb_readb(mregs, MUSB_DEVCTL);
 217         dev_dbg(musb->controller, "poll devctl %02x (%s)\n", devctl,
 218                 otg_state_string(musb->xceiv->state));
 219
 220         spin_lock_irqsave(&musb->lock, flags);
 221         switch (musb->xceiv->state) {
 222         case OTG_STATE_A_WAIT_VFALL:
 223                 /* Wait till VBUS falls below SessionEnd (~0.2V); the 1.3 RTL
 224                  * seems to mis-handle session "start" otherwise (or in our
 225                  * case "recover"), in routine "VBUS was valid by the time
 226                  * VBUSERR got reported during enumeration" cases.
 227                  */
 228                 if (devctl & MUSB_DEVCTL_VBUS) {
 229                         mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
 230                         break;
 231                 }
 232                 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
 233                 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG,
 234                         MUSB_INTR_VBUSERROR << DAVINCI_USB_USBINT_SHIFT);
 235                 break;
 236         case OTG_STATE_B_IDLE:
 237                 if (!is_peripheral_enabled(musb))
 238                         break;
 239
 240                 /* There's no ID-changed IRQ, so we have no good way to tell
 241                  * when to switch to the A-Default state machine (by setting
 242                  * the DEVCTL.SESSION flag).
 243                  *
 244                  * Workaround:  whenever we're in B_IDLE, try setting the
 245                  * session flag every few seconds.  If it works, ID was
 246                  * grounded and we're now in the A-Default state machine.
 247                  *
 248                  * NOTE setting the session flag is _supposed_ to trigger
 249                  * SRP, but clearly it doesn't.
 250                  */
 251                 musb_writeb(mregs, MUSB_DEVCTL,
 252                                 devctl | MUSB_DEVCTL_SESSION);
 253                 devctl = musb_readb(mregs, MUSB_DEVCTL);
 254                 if (devctl & MUSB_DEVCTL_BDEVICE)
 255                         mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
 256                 else
 257                         musb->xceiv->state = OTG_STATE_A_IDLE;
 258                 break;
 259         default:
 260                 break;
 261         }
 262         spin_unlock_irqrestore(&musb->lock, flags);
 263 }
 264
 265 static irqreturn_t davinci_musb_interrupt(int irq, void *__hci)
 266 {
 267         unsigned long   flags;
 268         irqreturn_t     retval = IRQ_NONE;
 269         struct musb     *musb = __hci;
 270         struct usb_otg  *otg = musb->xceiv->otg;
 271         void __iomem    *tibase = musb->ctrl_base;
 272         struct cppi     *cppi;
 273         u32             tmp;
 274
 275         spin_lock_irqsave(&musb->lock, flags);
 276
 277         /* NOTE: DaVinci shadows the Mentor IRQs.  Don't manage them through
 278          * the Mentor registers (except for setup), use the TI ones and EOI.
 279          *
 280          * Docs describe irq "vector" registers associated with the CPPI and
 281          * USB EOI registers.  These hold a bitmask corresponding to the
 282          * current IRQ, not an irq handler address.  Would using those bits
 283          * resolve some of the races observed in this dispatch code??
 284          */
 285
 286         /* CPPI interrupts share the same IRQ line, but have their own
 287          * mask, state, "vector", and EOI registers.
 288          */
 289         cppi = container_of(musb->dma_controller, struct cppi, controller);
 290         if (is_cppi_enabled() && musb->dma_controller && !cppi->irq)
 291                 retval = cppi_interrupt(irq, __hci);
 292
 293         /* ack and handle non-CPPI interrupts */
 294         tmp = musb_readl(tibase, DAVINCI_USB_INT_SRC_MASKED_REG);
 295         musb_writel(tibase, DAVINCI_USB_INT_SRC_CLR_REG, tmp);
 296         dev_dbg(musb->controller, "IRQ %08x\n", tmp);
 297
 298         musb->int_rx = (tmp & DAVINCI_USB_RXINT_MASK)
 299                         >> DAVINCI_USB_RXINT_SHIFT;
 300         musb->int_tx = (tmp & DAVINCI_USB_TXINT_MASK)
 301                         >> DAVINCI_USB_TXINT_SHIFT;
 302         musb->int_usb = (tmp & DAVINCI_USB_USBINT_MASK)
 303                         >> DAVINCI_USB_USBINT_SHIFT;
 304
 305         /* DRVVBUS irqs are the only proxy we have (a very poor one!) for
 306          * DaVinci's missing ID change IRQ.  We need an ID change IRQ to
 307          * switch appropriately between halves of the OTG state machine.
 308          * Managing DEVCTL.SESSION per Mentor docs requires we know its
 309          * value, but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
 310          * Also, DRVVBUS pulses for SRP (but not at 5V) ...
 311          */
 312         if (tmp & (DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT)) {
 313                 int     drvvbus = musb_readl(tibase, DAVINCI_USB_STAT_REG);
 314                 void __iomem *mregs = musb->mregs;
 315                 u8      devctl = musb_readb(mregs, MUSB_DEVCTL);
 316                 int     err = musb->int_usb & MUSB_INTR_VBUSERROR;
 317
 318                 err = is_host_enabled(musb)
 319                                 && (musb->int_usb & MUSB_INTR_VBUSERROR);
 320                 if (err) {
 321                         /* The Mentor core doesn't debounce VBUS as needed
 322                          * to cope with device connect current spikes. This
 323                          * means it's not uncommon for bus-powered devices
 324                          * to get VBUS errors during enumeration.
 325                          *
 326                          * This is a workaround, but newer RTL from Mentor
 327                          * seems to allow a better one: "re"starting sessions
 328                          * without waiting (on EVM, a **long** time) for VBUS
 329                          * to stop registering in devctl.
 330                          */
 331                         musb->int_usb &= ~MUSB_INTR_VBUSERROR;
 332                         musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
 333                         mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
 334                         WARNING("VBUS error workaround (delay coming)\n");
 335                 } else if (is_host_enabled(musb) && drvvbus) {
 336                         MUSB_HST_MODE(musb);
 337                         otg->default_a = 1;
 338                         musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
 339                         portstate(musb->port1_status |= USB_PORT_STAT_POWER);
 340                         del_timer(&otg_workaround);
 341                 } else {
 342                         musb->is_active = 0;
 343                         MUSB_DEV_MODE(musb);
 344                         otg->default_a = 0;
 345                         musb->xceiv->state = OTG_STATE_B_IDLE;
 346                         portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
 347                 }
 348
 349                 /* NOTE:  this must complete poweron within 100 msec
 350                  * (OTG_TIME_A_WAIT_VRISE) but we don't check for that.
 351                  */
 352                 davinci_musb_source_power(musb, drvvbus, 0);
 353                 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
 354                                 drvvbus ? "on" : "off",
 355                                 otg_state_string(musb->xceiv->state),
 356                                 err ? " ERROR" : "",
 357                                 devctl);
 358                 retval = IRQ_HANDLED;
 359         }
 360
 361         if (musb->int_tx || musb->int_rx || musb->int_usb)
 362                 retval |= musb_interrupt(musb);
 363
 364         /* irq stays asserted until EOI is written */
 365         musb_writel(tibase, DAVINCI_USB_EOI_REG, 0);
 366
 367         /* poll for ID change */
 368         if (is_otg_enabled(musb)
 369                         && musb->xceiv->state == OTG_STATE_B_IDLE)
 370                 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
 371
 372         spin_unlock_irqrestore(&musb->lock, flags);
 373
 374         return retval;
 375 }
 376
 377 static int davinci_musb_set_mode(struct musb *musb, u8 mode)
 378 {
 379         /* EVM can't do this (right?) */
 380         return -EIO;
 381 }
 382
 383 static int davinci_musb_init(struct musb *musb)
 384 {
 385         void __iomem    *tibase = musb->ctrl_base;
 386         u32             revision;
 387
 388         usb_nop_xceiv_register();
 389         musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
 390         if (IS_ERR_OR_NULL(musb->xceiv))
 391                 goto unregister;
 392
 393         musb->mregs += DAVINCI_BASE_OFFSET;
 394
 395         /* returns zero if e.g. not clocked */
 396         revision = musb_readl(tibase, DAVINCI_USB_VERSION_REG);
 397         if (revision == 0)
 398                 goto fail;
 399
 400         if (is_host_enabled(musb))
 401                 setup_timer(&otg_workaround, otg_timer, (unsigned long) musb);
 402
 403         davinci_musb_source_power(musb, 0, 1);
 404
 405         /* dm355 EVM swaps D+/D- for signal integrity, and
 406          * is clocked from the main 24 MHz crystal.
 407          */
 408         if (machine_is_davinci_dm355_evm()) {
 409                 u32     phy_ctrl = __raw_readl(USB_PHY_CTRL);
 410
 411                 phy_ctrl &= ~(3 << 9);
 412                 phy_ctrl |= USBPHY_DATAPOL;
 413                 __raw_writel(phy_ctrl, USB_PHY_CTRL);
 414         }
 415
 416         /* On dm355, the default-A state machine needs DRVVBUS control.
 417          * If we won't be a host, there's no need to turn it on.
 418          */
 419         if (cpu_is_davinci_dm355()) {
 420                 u32     deepsleep = __raw_readl(DM355_DEEPSLEEP);
 421
 422                 if (is_host_enabled(musb)) {
 423                         deepsleep &= ~DRVVBUS_OVERRIDE;
 424                 } else {
 425                         deepsleep &= ~DRVVBUS_FORCE;
 426                         deepsleep |= DRVVBUS_OVERRIDE;
 427                 }
 428                 __raw_writel(deepsleep, DM355_DEEPSLEEP);
 429         }
 430
 431         /* reset the controller */
 432         musb_writel(tibase, DAVINCI_USB_CTRL_REG, 0x1);
 433
 434         /* start the on-chip PHY and its PLL */
 435         phy_on();
 436
 437         msleep(5);
 438
 439         /* NOTE:  irqs are in mixed mode, not bypass to pure-musb */
 440         pr_debug("DaVinci OTG revision %08x phy %03x control %02x\n",
 441                 revision, __raw_readl(USB_PHY_CTRL),
 442                 musb_readb(tibase, DAVINCI_USB_CTRL_REG));
 443
 444         musb->isr = davinci_musb_interrupt;
 445         return 0;
 446
 447 fail:
 448         usb_put_phy(musb->xceiv);
 449 unregister:
 450         usb_nop_xceiv_unregister();
 451         return -ENODEV;
 452 }
 453
 454 static int davinci_musb_exit(struct musb *musb)
 455 {
 456         if (is_host_enabled(musb))
 457                 del_timer_sync(&otg_workaround);
 458
 459         /* force VBUS off */
 460         if (cpu_is_davinci_dm355()) {
 461                 u32     deepsleep = __raw_readl(DM355_DEEPSLEEP);
 462
 463                 deepsleep &= ~DRVVBUS_FORCE;
 464                 deepsleep |= DRVVBUS_OVERRIDE;
 465                 __raw_writel(deepsleep, DM355_DEEPSLEEP);
 466         }
 467
 468         davinci_musb_source_power(musb, 0 /*off*/, 1);
 469
 470         /* delay, to avoid problems with module reload */
 471         if (is_host_enabled(musb) && musb->xceiv->otg->default_a) {
 472                 int     maxdelay = 30;
 473                 u8      devctl, warn = 0;
 474
 475                 /* if there's no peripheral connected, this can take a
 476                  * long time to fall, especially on EVM with huge C133.
 477                  */
 478                 do {
 479                         devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
 480                         if (!(devctl & MUSB_DEVCTL_VBUS))
 481                                 break;
 482                         if ((devctl & MUSB_DEVCTL_VBUS) != warn) {
 483                                 warn = devctl & MUSB_DEVCTL_VBUS;
 484                                 dev_dbg(musb->controller, "VBUS %d\n",
 485                                         warn >> MUSB_DEVCTL_VBUS_SHIFT);
 486                         }
 487                         msleep(1000);
 488                         maxdelay--;
 489                 } while (maxdelay > 0);
 490
 491                 /* in OTG mode, another host might be connected */
 492                 if (devctl & MUSB_DEVCTL_VBUS)
 493                         dev_dbg(musb->controller, "VBUS off timeout (devctl %02x)\n", devctl);
 494         }
 495
 496         phy_off();
 497
 498         usb_put_phy(musb->xceiv);
 499         usb_nop_xceiv_unregister();
 500
 501         return 0;
 502 }
 503
 504 static const struct musb_platform_ops davinci_ops = {
 505         .init           = davinci_musb_init,
 506         .exit           = davinci_musb_exit,
 507
 508         .enable         = davinci_musb_enable,
 509         .disable        = davinci_musb_disable,
 510
 511         .set_mode       = davinci_musb_set_mode,
 512
 513         .set_vbus       = davinci_musb_set_vbus,
 514 };
 515
 516 static u64 davinci_dmamask = DMA_BIT_MASK(32);
 517
 518 static int __devinit davinci_probe(struct platform_device *pdev)
 519 {
 520         struct musb_hdrc_platform_data  *pdata = pdev->dev.platform_data;
 521         struct platform_device          *musb;
 522         struct davinci_glue             *glue;
 523         struct clk                      *clk;
 524
 525         int                             ret = -ENOMEM;
 526
 527         glue = kzalloc(sizeof(*glue), GFP_KERNEL);
 528         if (!glue) {
 529                 dev_err(&pdev->dev, "failed to allocate glue context\n");
 530                 goto err0;
 531         }
 532
 533         musb = platform_device_alloc("musb-hdrc", -1);
 534         if (!musb) {
 535                 dev_err(&pdev->dev, "failed to allocate musb device\n");
 536                 goto err1;
 537         }
 538
 539         clk = clk_get(&pdev->dev, "usb");
 540         if (IS_ERR(clk)) {
 541                 dev_err(&pdev->dev, "failed to get clock\n");
 542                 ret = PTR_ERR(clk);
 543                 goto err2;
 544         }
 545
 546         ret = clk_enable(clk);
 547         if (ret) {
 548                 dev_err(&pdev->dev, "failed to enable clock\n");
 549                 goto err3;
 550         }
 551
 552         musb->dev.parent                = &pdev->dev;
 553         musb->dev.dma_mask              = &davinci_dmamask;
 554         musb->dev.coherent_dma_mask     = davinci_dmamask;
 555
 556         glue->dev                       = &pdev->dev;
 557         glue->musb                      = musb;
 558         glue->clk                       = clk;
 559
 560         pdata->platform_ops             = &davinci_ops;
 561
 562         platform_set_drvdata(pdev, glue);
 563
 564         ret = platform_device_add_resources(musb, pdev->resource,
 565                         pdev->num_resources);
 566         if (ret) {
 567                 dev_err(&pdev->dev, "failed to add resources\n");
 568                 goto err4;
 569         }
 570
 571         ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
 572         if (ret) {
 573                 dev_err(&pdev->dev, "failed to add platform_data\n");
 574                 goto err4;
 575         }
 576
 577         ret = platform_device_add(musb);
 578         if (ret) {
 579                 dev_err(&pdev->dev, "failed to register musb device\n");
 580                 goto err4;
 581         }
 582
 583         return 0;
 584
 585 err4:
 586         clk_disable(clk);
 587
 588 err3:
 589         clk_put(clk);
 590
 591 err2:
 592         platform_device_put(musb);
 593
 594 err1:
 595         kfree(glue);
 596
 597 err0:
 598         return ret;
 599 }
 600
 601 static int __devexit davinci_remove(struct platform_device *pdev)
 602 {
 603         struct davinci_glue             *glue = platform_get_drvdata(pdev);
 604
 605         platform_device_del(glue->musb);
 606         platform_device_put(glue->musb);
 607         clk_disable(glue->clk);
 608         clk_put(glue->clk);
 609         kfree(glue);
 610
 611         return 0;
 612 }
 613
 614 static struct platform_driver davinci_driver = {
 615         .probe          = davinci_probe,
 616         .remove         = __devexit_p(davinci_remove),
 617         .driver         = {
 618                 .name   = "musb-davinci",
 619         },
 620 };
 621
 622 MODULE_DESCRIPTION("DaVinci MUSB Glue Layer");
 623 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
 624 MODULE_LICENSE("GPL v2");
 625
 626 static int __init davinci_init(void)
 627 {
 628         return platform_driver_register(&davinci_driver);
 629 }
 630 module_init(davinci_init);
 631
 632 static void __exit davinci_exit(void)
 633 {
 634         platform_driver_unregister(&davinci_driver);
 635 }
 636 module_exit(davinci_exit);