drivers/usb/musb/davinci.c

   1 /*
   2  * Copyright (C) 2005-2006 by Texas Instruments
   3  *
   4  * This file is part of the Inventra Controller Driver for Linux.
   5  *
   6  * The Inventra Controller Driver for Linux is free software; you
   7  * can redistribute it and/or modify it under the terms of the GNU
   8  * General Public License version 2 as published by the Free Software
   9  * Foundation.
  10  *
  11  * The Inventra Controller Driver for Linux is distributed in
  12  * the hope that it will be useful, but WITHOUT ANY WARRANTY;
  13  * without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15  * License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with The Inventra Controller Driver for Linux ; if not,
  19  * write to the Free Software Foundation, Inc., 59 Temple Place,
  20  * Suite 330, Boston, MA  02111-1307  USA
  21  *
  22  */
  23
  24 #include <linux/module.h>
  25 #include <linux/kernel.h>
  26 #include <linux/sched.h>
  27 #include <linux/init.h>
  28 #include <linux/list.h>
  29 #include <linux/delay.h>
  30 #include <linux/clk.h>
  31 #include <linux/err.h>
  32 #include <linux/io.h>
  33 #include <linux/gpio.h>
  34 #include <linux/platform_device.h>
  35 #include <linux/dma-mapping.h>
  36 #include <linux/usb/nop-usb-xceiv.h>
  37
  38 #include <mach/cputype.h>
  39 #include <mach/hardware.h>
  40
  41 #include <asm/mach-types.h>
  42
  43 #include "musb_core.h"
  44
  45 #ifdef CONFIG_MACH_DAVINCI_EVM
  46 #define GPIO_nVBUS_DRV          160
  47 #endif
  48
  49 #include "davinci.h"
  50 #include "cppi_dma.h"
  51
  52
  53 #define USB_PHY_CTRL    IO_ADDRESS(USBPHY_CTL_PADDR)
  54 #define DM355_DEEPSLEEP IO_ADDRESS(DM355_DEEPSLEEP_PADDR)
  55
  56 struct davinci_glue {
  57         struct device           *dev;
  58         struct platform_device  *musb;
  59         struct clk              *clk;
  60 };
  61
  62 /* REVISIT (PM) we should be able to keep the PHY in low power mode most
  63  * of the time (24 MHZ oscillator and PLL off, etc) by setting POWER.D0
  64  * and, when in host mode, autosuspending idle root ports... PHYPLLON
  65  * (overriding SUSPENDM?) then likely needs to stay off.
  66  */
  67
  68 static inline void phy_on(void)
  69 {
  70         u32     phy_ctrl = __raw_readl(USB_PHY_CTRL);
  71
  72         /* power everything up; start the on-chip PHY and its PLL */
  73         phy_ctrl &= ~(USBPHY_OSCPDWN | USBPHY_OTGPDWN | USBPHY_PHYPDWN);
  74         phy_ctrl |= USBPHY_SESNDEN | USBPHY_VBDTCTEN | USBPHY_PHYPLLON;
  75         __raw_writel(phy_ctrl, USB_PHY_CTRL);
  76
  77         /* wait for PLL to lock before proceeding */
  78         while ((__raw_readl(USB_PHY_CTRL) & USBPHY_PHYCLKGD) == 0)
  79                 cpu_relax();
  80 }
  81
  82 static inline void phy_off(void)
  83 {
  84         u32     phy_ctrl = __raw_readl(USB_PHY_CTRL);
  85
  86         /* powerdown the on-chip PHY, its PLL, and the OTG block */
  87         phy_ctrl &= ~(USBPHY_SESNDEN | USBPHY_VBDTCTEN | USBPHY_PHYPLLON);
  88         phy_ctrl |= USBPHY_OSCPDWN | USBPHY_OTGPDWN | USBPHY_PHYPDWN;
  89         __raw_writel(phy_ctrl, USB_PHY_CTRL);
  90 }
  91
  92 static int dma_off = 1;
  93
  94 static void davinci_musb_enable(struct musb *musb)
  95 {
  96         u32     tmp, old, val;
  97
  98         /* workaround:  setup irqs through both register sets */
  99         tmp = (musb->epmask & DAVINCI_USB_TX_ENDPTS_MASK)
 100                         << DAVINCI_USB_TXINT_SHIFT;
 101         musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
 102         old = tmp;
 103         tmp = (musb->epmask & (0xfffe & DAVINCI_USB_RX_ENDPTS_MASK))
 104                         << DAVINCI_USB_RXINT_SHIFT;
 105         musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
 106         tmp |= old;
 107
 108         val = ~MUSB_INTR_SOF;
 109         tmp |= ((val & 0x01ff) << DAVINCI_USB_USBINT_SHIFT);
 110         musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp);
 111
 112         if (is_dma_capable() && !dma_off)
 113                 printk(KERN_WARNING "%s %s: dma not reactivated\n",
 114                                 __FILE__, __func__);
 115         else
 116                 dma_off = 0;
 117
 118         /* force a DRVVBUS irq so we can start polling for ID change */
 119         if (is_otg_enabled(musb))
 120                 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG,
 121                         DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT);
 122 }
 123
 124 /*
 125  * Disable the HDRC and flush interrupts
 126  */
 127 static void davinci_musb_disable(struct musb *musb)
 128 {
 129         /* because we don't set CTRLR.UINT, "important" to:
 130          *  - not read/write INTRUSB/INTRUSBE
 131          *  - (except during initial setup, as workaround)
 132          *  - use INTSETR/INTCLRR instead
 133          */
 134         musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_CLR_REG,
 135                           DAVINCI_USB_USBINT_MASK
 136                         | DAVINCI_USB_TXINT_MASK
 137                         | DAVINCI_USB_RXINT_MASK);
 138         musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
 139         musb_writel(musb->ctrl_base, DAVINCI_USB_EOI_REG, 0);
 140
 141         if (is_dma_capable() && !dma_off)
 142                 WARNING("dma still active\n");
 143 }
 144
 145
 146 #define portstate(stmt)         stmt
 147
 148 /*
 149  * VBUS SWITCHING IS BOARD-SPECIFIC ... at least for the DM6446 EVM,
 150  * which doesn't wire DRVVBUS to the FET that switches it.  Unclear
 151  * if that's a problem with the DM6446 chip or just with that board.
 152  *
 153  * In either case, the DM355 EVM automates DRVVBUS the normal way,
 154  * when J10 is out, and TI documents it as handling OTG.
 155  */
 156
 157 #ifdef CONFIG_MACH_DAVINCI_EVM
 158
 159 static int vbus_state = -1;
 160
 161 /* I2C operations are always synchronous, and require a task context.
 162  * With unloaded systems, using the shared workqueue seems to suffice
 163  * to satisfy the 100msec A_WAIT_VRISE timeout...
 164  */
 165 static void evm_deferred_drvvbus(struct work_struct *ignored)
 166 {
 167         gpio_set_value_cansleep(GPIO_nVBUS_DRV, vbus_state);
 168         vbus_state = !vbus_state;
 169 }
 170
 171 #endif  /* EVM */
 172
 173 static void davinci_musb_source_power(struct musb *musb, int is_on, int immediate)
 174 {
 175 #ifdef CONFIG_MACH_DAVINCI_EVM
 176         if (is_on)
 177                 is_on = 1;
 178
 179         if (vbus_state == is_on)
 180                 return;
 181         vbus_state = !is_on;            /* 0/1 vs "-1 == unknown/init" */
 182
 183         if (machine_is_davinci_evm()) {
 184                 static DECLARE_WORK(evm_vbus_work, evm_deferred_drvvbus);
 185
 186                 if (immediate)
 187                         gpio_set_value_cansleep(GPIO_nVBUS_DRV, vbus_state);
 188                 else
 189                         schedule_work(&evm_vbus_work);
 190         }
 191         if (immediate)
 192                 vbus_state = is_on;
 193 #endif
 194 }
 195
 196 static void davinci_musb_set_vbus(struct musb *musb, int is_on)
 197 {
 198         WARN_ON(is_on && is_peripheral_active(musb));
 199         davinci_musb_source_power(musb, is_on, 0);
 200 }
 201
 202
 203 #define POLL_SECONDS    2
 204
 205 static struct timer_list otg_workaround;
 206
 207 static void otg_timer(unsigned long _musb)
 208 {
 209         struct musb             *musb = (void *)_musb;
 210         void __iomem            *mregs = musb->mregs;
 211         u8                      devctl;
 212         unsigned long           flags;
 213
 214         /* We poll because DaVinci's won't expose several OTG-critical
 215         * status change events (from the transceiver) otherwise.
 216          */
 217         devctl = musb_readb(mregs, MUSB_DEVCTL);
 218         dev_dbg(musb->controller, "poll devctl %02x (%s)\n", devctl,
 219                 otg_state_string(musb->xceiv->state));
 220
 221         spin_lock_irqsave(&musb->lock, flags);
 222         switch (musb->xceiv->state) {
 223         case OTG_STATE_A_WAIT_VFALL:
 224                 /* Wait till VBUS falls below SessionEnd (~0.2V); the 1.3 RTL
 225                  * seems to mis-handle session "start" otherwise (or in our
 226                  * case "recover"), in routine "VBUS was valid by the time
 227                  * VBUSERR got reported during enumeration" cases.
 228                  */
 229                 if (devctl & MUSB_DEVCTL_VBUS) {
 230                         mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
 231                         break;
 232                 }
 233                 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
 234                 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG,
 235                         MUSB_INTR_VBUSERROR << DAVINCI_USB_USBINT_SHIFT);
 236                 break;
 237         case OTG_STATE_B_IDLE:
 238                 if (!is_peripheral_enabled(musb))
 239                         break;
 240
 241                 /* There's no ID-changed IRQ, so we have no good way to tell
 242                  * when to switch to the A-Default state machine (by setting
 243                  * the DEVCTL.SESSION flag).
 244                  *
 245                  * Workaround:  whenever we're in B_IDLE, try setting the
 246                  * session flag every few seconds.  If it works, ID was
 247                  * grounded and we're now in the A-Default state machine.
 248                  *
 249                  * NOTE setting the session flag is _supposed_ to trigger
 250                  * SRP, but clearly it doesn't.
 251                  */
 252                 musb_writeb(mregs, MUSB_DEVCTL,
 253                                 devctl | MUSB_DEVCTL_SESSION);
 254                 devctl = musb_readb(mregs, MUSB_DEVCTL);
 255                 if (devctl & MUSB_DEVCTL_BDEVICE)
 256                         mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
 257                 else
 258                         musb->xceiv->state = OTG_STATE_A_IDLE;
 259                 break;
 260         default:
 261                 break;
 262         }
 263         spin_unlock_irqrestore(&musb->lock, flags);
 264 }
 265
 266 static irqreturn_t davinci_musb_interrupt(int irq, void *__hci)
 267 {
 268         unsigned long   flags;
 269         irqreturn_t     retval = IRQ_NONE;
 270         struct musb     *musb = __hci;
 271         struct usb_otg  *otg = musb->xceiv->otg;
 272         void __iomem    *tibase = musb->ctrl_base;
 273         struct cppi     *cppi;
 274         u32             tmp;
 275
 276         spin_lock_irqsave(&musb->lock, flags);
 277
 278         /* NOTE: DaVinci shadows the Mentor IRQs.  Don't manage them through
 279          * the Mentor registers (except for setup), use the TI ones and EOI.
 280          *
 281          * Docs describe irq "vector" registers associated with the CPPI and
 282          * USB EOI registers.  These hold a bitmask corresponding to the
 283          * current IRQ, not an irq handler address.  Would using those bits
 284          * resolve some of the races observed in this dispatch code??
 285          */
 286
 287         /* CPPI interrupts share the same IRQ line, but have their own
 288          * mask, state, "vector", and EOI registers.
 289          */
 290         cppi = container_of(musb->dma_controller, struct cppi, controller);
 291         if (is_cppi_enabled() && musb->dma_controller && !cppi->irq)
 292                 retval = cppi_interrupt(irq, __hci);
 293
 294         /* ack and handle non-CPPI interrupts */
 295         tmp = musb_readl(tibase, DAVINCI_USB_INT_SRC_MASKED_REG);
 296         musb_writel(tibase, DAVINCI_USB_INT_SRC_CLR_REG, tmp);
 297         dev_dbg(musb->controller, "IRQ %08x\n", tmp);
 298
 299         musb->int_rx = (tmp & DAVINCI_USB_RXINT_MASK)
 300                         >> DAVINCI_USB_RXINT_SHIFT;
 301         musb->int_tx = (tmp & DAVINCI_USB_TXINT_MASK)
 302                         >> DAVINCI_USB_TXINT_SHIFT;
 303         musb->int_usb = (tmp & DAVINCI_USB_USBINT_MASK)
 304                         >> DAVINCI_USB_USBINT_SHIFT;
 305
 306         /* DRVVBUS irqs are the only proxy we have (a very poor one!) for
 307          * DaVinci's missing ID change IRQ.  We need an ID change IRQ to
 308          * switch appropriately between halves of the OTG state machine.
 309          * Managing DEVCTL.SESSION per Mentor docs requires we know its
 310          * value, but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
 311          * Also, DRVVBUS pulses for SRP (but not at 5V) ...
 312          */
 313         if (tmp & (DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT)) {
 314                 int     drvvbus = musb_readl(tibase, DAVINCI_USB_STAT_REG);
 315                 void __iomem *mregs = musb->mregs;
 316                 u8      devctl = musb_readb(mregs, MUSB_DEVCTL);
 317                 int     err = musb->int_usb & MUSB_INTR_VBUSERROR;
 318
 319                 err = is_host_enabled(musb)
 320                                 && (musb->int_usb & MUSB_INTR_VBUSERROR);
 321                 if (err) {
 322                         /* The Mentor core doesn't debounce VBUS as needed
 323                          * to cope with device connect current spikes. This
 324                          * means it's not uncommon for bus-powered devices
 325                          * to get VBUS errors during enumeration.
 326                          *
 327                          * This is a workaround, but newer RTL from Mentor
 328                          * seems to allow a better one: "re"starting sessions
 329                          * without waiting (on EVM, a **long** time) for VBUS
 330                          * to stop registering in devctl.
 331                          */
 332                         musb->int_usb &= ~MUSB_INTR_VBUSERROR;
 333                         musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
 334                         mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
 335                         WARNING("VBUS error workaround (delay coming)\n");
 336                 } else if (is_host_enabled(musb) && drvvbus) {
 337                         MUSB_HST_MODE(musb);
 338                         otg->default_a = 1;
 339                         musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
 340                         portstate(musb->port1_status |= USB_PORT_STAT_POWER);
 341                         del_timer(&otg_workaround);
 342                 } else {
 343                         musb->is_active = 0;
 344                         MUSB_DEV_MODE(musb);
 345                         otg->default_a = 0;
 346                         musb->xceiv->state = OTG_STATE_B_IDLE;
 347                         portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
 348                 }
 349
 350                 /* NOTE:  this must complete poweron within 100 msec
 351                  * (OTG_TIME_A_WAIT_VRISE) but we don't check for that.
 352                  */
 353                 davinci_musb_source_power(musb, drvvbus, 0);
 354                 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
 355                                 drvvbus ? "on" : "off",
 356                                 otg_state_string(musb->xceiv->state),
 357                                 err ? " ERROR" : "",
 358                                 devctl);
 359                 retval = IRQ_HANDLED;
 360         }
 361
 362         if (musb->int_tx || musb->int_rx || musb->int_usb)
 363                 retval |= musb_interrupt(musb);
 364
 365         /* irq stays asserted until EOI is written */
 366         musb_writel(tibase, DAVINCI_USB_EOI_REG, 0);
 367
 368         /* poll for ID change */
 369         if (is_otg_enabled(musb)
 370                         && musb->xceiv->state == OTG_STATE_B_IDLE)
 371                 mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
 372
 373         spin_unlock_irqrestore(&musb->lock, flags);
 374
 375         return retval;
 376 }
 377
 378 static int davinci_musb_set_mode(struct musb *musb, u8 mode)
 379 {
 380         /* EVM can't do this (right?) */
 381         return -EIO;
 382 }
 383
 384 static int davinci_musb_init(struct musb *musb)
 385 {
 386         void __iomem    *tibase = musb->ctrl_base;
 387         u32             revision;
 388
 389         usb_nop_xceiv_register();
 390         musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
 391         if (IS_ERR_OR_NULL(musb->xceiv))
 392                 goto unregister;
 393
 394         musb->mregs += DAVINCI_BASE_OFFSET;
 395
 396         /* returns zero if e.g. not clocked */
 397         revision = musb_readl(tibase, DAVINCI_USB_VERSION_REG);
 398         if (revision == 0)
 399                 goto fail;
 400
 401         if (is_host_enabled(musb))
 402                 setup_timer(&otg_workaround, otg_timer, (unsigned long) musb);
 403
 404         davinci_musb_source_power(musb, 0, 1);
 405
 406         /* dm355 EVM swaps D+/D- for signal integrity, and
 407          * is clocked from the main 24 MHz crystal.
 408          */
 409         if (machine_is_davinci_dm355_evm()) {
 410                 u32     phy_ctrl = __raw_readl(USB_PHY_CTRL);
 411
 412                 phy_ctrl &= ~(3 << 9);
 413                 phy_ctrl |= USBPHY_DATAPOL;
 414                 __raw_writel(phy_ctrl, USB_PHY_CTRL);
 415         }
 416
 417         /* On dm355, the default-A state machine needs DRVVBUS control.
 418          * If we won't be a host, there's no need to turn it on.
 419          */
 420         if (cpu_is_davinci_dm355()) {
 421                 u32     deepsleep = __raw_readl(DM355_DEEPSLEEP);
 422
 423                 if (is_host_enabled(musb)) {
 424                         deepsleep &= ~DRVVBUS_OVERRIDE;
 425                 } else {
 426                         deepsleep &= ~DRVVBUS_FORCE;
 427                         deepsleep |= DRVVBUS_OVERRIDE;
 428                 }
 429                 __raw_writel(deepsleep, DM355_DEEPSLEEP);
 430         }
 431
 432         /* reset the controller */
 433         musb_writel(tibase, DAVINCI_USB_CTRL_REG, 0x1);
 434
 435         /* start the on-chip PHY and its PLL */
 436         phy_on();
 437
 438         msleep(5);
 439
 440         /* NOTE:  irqs are in mixed mode, not bypass to pure-musb */
 441         pr_debug("DaVinci OTG revision %08x phy %03x control %02x\n",
 442                 revision, __raw_readl(USB_PHY_CTRL),
 443                 musb_readb(tibase, DAVINCI_USB_CTRL_REG));
 444
 445         musb->isr = davinci_musb_interrupt;
 446         return 0;
 447
 448 fail:
 449         usb_put_phy(musb->xceiv);
 450 unregister:
 451         usb_nop_xceiv_unregister();
 452         return -ENODEV;
 453 }
 454
 455 static int davinci_musb_exit(struct musb *musb)
 456 {
 457         if (is_host_enabled(musb))
 458                 del_timer_sync(&otg_workaround);
 459
 460         /* force VBUS off */
 461         if (cpu_is_davinci_dm355()) {
 462                 u32     deepsleep = __raw_readl(DM355_DEEPSLEEP);
 463
 464                 deepsleep &= ~DRVVBUS_FORCE;
 465                 deepsleep |= DRVVBUS_OVERRIDE;
 466                 __raw_writel(deepsleep, DM355_DEEPSLEEP);
 467         }
 468
 469         davinci_musb_source_power(musb, 0 /*off*/, 1);
 470
 471         /* delay, to avoid problems with module reload */
 472         if (is_host_enabled(musb) && musb->xceiv->otg->default_a) {
 473                 int     maxdelay = 30;
 474                 u8      devctl, warn = 0;
 475
 476                 /* if there's no peripheral connected, this can take a
 477                  * long time to fall, especially on EVM with huge C133.
 478                  */
 479                 do {
 480                         devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
 481                         if (!(devctl & MUSB_DEVCTL_VBUS))
 482                                 break;
 483                         if ((devctl & MUSB_DEVCTL_VBUS) != warn) {
 484                                 warn = devctl & MUSB_DEVCTL_VBUS;
 485                                 dev_dbg(musb->controller, "VBUS %d\n",
 486                                         warn >> MUSB_DEVCTL_VBUS_SHIFT);
 487                         }
 488                         msleep(1000);
 489                         maxdelay--;
 490                 } while (maxdelay > 0);
 491
 492                 /* in OTG mode, another host might be connected */
 493                 if (devctl & MUSB_DEVCTL_VBUS)
 494                         dev_dbg(musb->controller, "VBUS off timeout (devctl %02x)\n", devctl);
 495         }
 496
 497         phy_off();
 498
 499         usb_put_phy(musb->xceiv);
 500         usb_nop_xceiv_unregister();
 501
 502         return 0;
 503 }
 504
 505 static const struct musb_platform_ops davinci_ops = {
 506         .init           = davinci_musb_init,
 507         .exit           = davinci_musb_exit,
 508
 509         .enable         = davinci_musb_enable,
 510         .disable        = davinci_musb_disable,
 511
 512         .set_mode       = davinci_musb_set_mode,
 513
 514         .set_vbus       = davinci_musb_set_vbus,
 515 };
 516
 517 static u64 davinci_dmamask = DMA_BIT_MASK(32);
 518
 519 static int __devinit davinci_probe(struct platform_device *pdev)
 520 {
 521         struct musb_hdrc_platform_data  *pdata = pdev->dev.platform_data;
 522         struct platform_device          *musb;
 523         struct davinci_glue             *glue;
 524         struct clk                      *clk;
 525
 526         int                             ret = -ENOMEM;
 527
 528         glue = kzalloc(sizeof(*glue), GFP_KERNEL);
 529         if (!glue) {
 530                 dev_err(&pdev->dev, "failed to allocate glue context\n");
 531                 goto err0;
 532         }
 533
 534         musb = platform_device_alloc("musb-hdrc", -1);
 535         if (!musb) {
 536                 dev_err(&pdev->dev, "failed to allocate musb device\n");
 537                 goto err1;
 538         }
 539
 540         clk = clk_get(&pdev->dev, "usb");
 541         if (IS_ERR(clk)) {
 542                 dev_err(&pdev->dev, "failed to get clock\n");
 543                 ret = PTR_ERR(clk);
 544                 goto err2;
 545         }
 546
 547         ret = clk_enable(clk);
 548         if (ret) {
 549                 dev_err(&pdev->dev, "failed to enable clock\n");
 550                 goto err3;
 551         }
 552
 553         musb->dev.parent                = &pdev->dev;
 554         musb->dev.dma_mask              = &davinci_dmamask;
 555         musb->dev.coherent_dma_mask     = davinci_dmamask;
 556
 557         glue->dev                       = &pdev->dev;
 558         glue->musb                      = musb;
 559         glue->clk                       = clk;
 560
 561         pdata->platform_ops             = &davinci_ops;
 562
 563         platform_set_drvdata(pdev, glue);
 564
 565         ret = platform_device_add_resources(musb, pdev->resource,
 566                         pdev->num_resources);
 567         if (ret) {
 568                 dev_err(&pdev->dev, "failed to add resources\n");
 569                 goto err4;
 570         }
 571
 572         ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
 573         if (ret) {
 574                 dev_err(&pdev->dev, "failed to add platform_data\n");
 575                 goto err4;
 576         }
 577
 578         ret = platform_device_add(musb);
 579         if (ret) {
 580                 dev_err(&pdev->dev, "failed to register musb device\n");
 581                 goto err4;
 582         }
 583
 584         return 0;
 585
 586 err4:
 587         clk_disable(clk);
 588
 589 err3:
 590         clk_put(clk);
 591
 592 err2:
 593         platform_device_put(musb);
 594
 595 err1:
 596         kfree(glue);
 597
 598 err0:
 599         return ret;
 600 }
 601
 602 static int __devexit davinci_remove(struct platform_device *pdev)
 603 {
 604         struct davinci_glue             *glue = platform_get_drvdata(pdev);
 605
 606         platform_device_del(glue->musb);
 607         platform_device_put(glue->musb);
 608         clk_disable(glue->clk);
 609         clk_put(glue->clk);
 610         kfree(glue);
 611
 612         return 0;
 613 }
 614
 615 static struct platform_driver davinci_driver = {
 616         .probe          = davinci_probe,
 617         .remove         = __devexit_p(davinci_remove),
 618         .driver         = {
 619                 .name   = "musb-davinci",
 620         },
 621 };
 622
 623 MODULE_DESCRIPTION("DaVinci MUSB Glue Layer");
 624 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
 625 MODULE_LICENSE("GPL v2");
 626
 627 static int __init davinci_init(void)
 628 {
 629         return platform_driver_register(&davinci_driver);
 630 }
 631 module_init(davinci_init);
 632
 633 static void __exit davinci_exit(void)
 634 {
 635         platform_driver_unregister(&davinci_driver);
 636 }
 637 module_exit(davinci_exit);