drivers/usb/musb/musb_core.h

   1 /*
   2  * MUSB OTG driver defines
   3  *
   4  * Copyright 2005 Mentor Graphics Corporation
   5  * Copyright (C) 2005-2006 by Texas Instruments
   6  * Copyright (C) 2006-2007 Nokia Corporation
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License
  10  * version 2 as published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but
  13  * WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20  * 02110-1301 USA
  21  *
  22  * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
  23  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  24  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  25  * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  28  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  29  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  *
  33  */
  34
  35 #ifndef __MUSB_CORE_H__
  36 #define __MUSB_CORE_H__
  37
  38 #include <linux/slab.h>
  39 #include <linux/list.h>
  40 #include <linux/interrupt.h>
  41 #include <linux/errno.h>
  42 #include <linux/timer.h>
  43 #include <linux/device.h>
  44 #include <linux/usb/ch9.h>
  45 #include <linux/usb/gadget.h>
  46 #include <linux/usb.h>
  47 #include <linux/usb/otg.h>
  48 #include <linux/usb/musb.h>
  49 #include <linux/phy/phy.h>
  50 #include <linux/workqueue.h>
  51
  52 struct musb;
  53 struct musb_hw_ep;
  54 struct musb_ep;
  55
  56 /* Helper defines for struct musb->hwvers */
  57 #define MUSB_HWVERS_MAJOR(x)    ((x >> 10) & 0x1f)
  58 #define MUSB_HWVERS_MINOR(x)    (x & 0x3ff)
  59 #define MUSB_HWVERS_RC          0x8000
  60 #define MUSB_HWVERS_1300        0x52C
  61 #define MUSB_HWVERS_1400        0x590
  62 #define MUSB_HWVERS_1800        0x720
  63 #define MUSB_HWVERS_1900        0x784
  64 #define MUSB_HWVERS_2000        0x800
  65
  66 #include "musb_debug.h"
  67 #include "musb_dma.h"
  68
  69 #include "musb_io.h"
  70 #include "musb_regs.h"
  71
  72 #include "musb_gadget.h"
  73 #include <linux/usb/hcd.h>
  74 #include "musb_host.h"
  75
  76 /* NOTE:  otg and peripheral-only state machines start at B_IDLE.
  77  * OTG or host-only go to A_IDLE when ID is sensed.
  78  */
  79 #define is_peripheral_active(m)         (!(m)->is_host)
  80 #define is_host_active(m)               ((m)->is_host)
  81
  82 enum {
  83         MUSB_PORT_MODE_HOST     = 1,
  84         MUSB_PORT_MODE_GADGET,
  85         MUSB_PORT_MODE_DUAL_ROLE,
  86 };
  87
  88 /****************************** CONSTANTS ********************************/
  89
  90 #ifndef MUSB_C_NUM_EPS
  91 #define MUSB_C_NUM_EPS ((u8)16)
  92 #endif
  93
  94 #ifndef MUSB_MAX_END0_PACKET
  95 #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
  96 #endif
  97
  98 /* host side ep0 states */
  99 enum musb_h_ep0_state {
 100         MUSB_EP0_IDLE,
 101         MUSB_EP0_START,                 /* expect ack of setup */
 102         MUSB_EP0_IN,                    /* expect IN DATA */
 103         MUSB_EP0_OUT,                   /* expect ack of OUT DATA */
 104         MUSB_EP0_STATUS,                /* expect ack of STATUS */
 105 } __attribute__ ((packed));
 106
 107 /* peripheral side ep0 states */
 108 enum musb_g_ep0_state {
 109         MUSB_EP0_STAGE_IDLE,            /* idle, waiting for SETUP */
 110         MUSB_EP0_STAGE_SETUP,           /* received SETUP */
 111         MUSB_EP0_STAGE_TX,              /* IN data */
 112         MUSB_EP0_STAGE_RX,              /* OUT data */
 113         MUSB_EP0_STAGE_STATUSIN,        /* (after OUT data) */
 114         MUSB_EP0_STAGE_STATUSOUT,       /* (after IN data) */
 115         MUSB_EP0_STAGE_ACKWAIT,         /* after zlp, before statusin */
 116 } __attribute__ ((packed));
 117
 118 /*
 119  * OTG protocol constants.  See USB OTG 1.3 spec,
 120  * sections 5.5 "Device Timings" and 6.6.5 "Timers".
 121  */
 122 #define OTG_TIME_A_WAIT_VRISE   100             /* msec (max) */
 123 #define OTG_TIME_A_WAIT_BCON    1100            /* min 1 second */
 124 #define OTG_TIME_A_AIDL_BDIS    200             /* min 200 msec */
 125 #define OTG_TIME_B_ASE0_BRST    100             /* min 3.125 ms */
 126
 127 /****************************** FUNCTIONS ********************************/
 128
 129 #define MUSB_HST_MODE(_musb)\
 130         { (_musb)->is_host = true; }
 131 #define MUSB_DEV_MODE(_musb) \
 132         { (_musb)->is_host = false; }
 133
 134 #define test_devctl_hst_mode(_x) \
 135         (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
 136
 137 #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
 138
 139 /******************************** TYPES *************************************/
 140
 141 struct musb_io;
 142
 143 /**
 144  * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
 145  * @quirks:     flags for platform specific quirks
 146  * @enable:     enable device
 147  * @disable:    disable device
 148  * @ep_offset:  returns the end point offset
 149  * @ep_select:  selects the specified end point
 150  * @fifo_mode:  sets the fifo mode
 151  * @fifo_offset: returns the fifo offset
 152  * @readb:      read 8 bits
 153  * @writeb:     write 8 bits
 154  * @readw:      read 16 bits
 155  * @writew:     write 16 bits
 156  * @readl:      read 32 bits
 157  * @writel:     write 32 bits
 158  * @read_fifo:  reads the fifo
 159  * @write_fifo: writes to fifo
 160  * @init:       turns on clocks, sets up platform-specific registers, etc
 161  * @exit:       undoes @init
 162  * @set_mode:   forcefully changes operating mode
 163  * @try_ilde:   tries to idle the IP
 164  * @vbus_status: returns vbus status if possible
 165  * @set_vbus:   forces vbus status
 166  * @adjust_channel_params: pre check for standard dma channel_program func
 167  */
 168 struct musb_platform_ops {
 169
 170 #define MUSB_DMA_UX500          BIT(6)
 171 #define MUSB_DMA_CPPI41         BIT(5)
 172 #define MUSB_DMA_CPPI           BIT(4)
 173 #define MUSB_DMA_TUSB_OMAP      BIT(3)
 174 #define MUSB_DMA_INVENTRA       BIT(2)
 175 #define MUSB_IN_TUSB            BIT(1)
 176 #define MUSB_INDEXED_EP         BIT(0)
 177         u32     quirks;
 178
 179         int     (*init)(struct musb *musb);
 180         int     (*exit)(struct musb *musb);
 181
 182         void    (*enable)(struct musb *musb);
 183         void    (*disable)(struct musb *musb);
 184
 185         u32     (*ep_offset)(u8 epnum, u16 offset);
 186         void    (*ep_select)(void __iomem *mbase, u8 epnum);
 187         u16     fifo_mode;
 188         u32     (*fifo_offset)(u8 epnum);
 189         u8      (*readb)(const void __iomem *addr, unsigned offset);
 190         void    (*writeb)(void __iomem *addr, unsigned offset, u8 data);
 191         u16     (*readw)(const void __iomem *addr, unsigned offset);
 192         void    (*writew)(void __iomem *addr, unsigned offset, u16 data);
 193         u32     (*readl)(const void __iomem *addr, unsigned offset);
 194         void    (*writel)(void __iomem *addr, unsigned offset, u32 data);
 195         void    (*read_fifo)(struct musb_hw_ep *hw_ep, u16 len, u8 *buf);
 196         void    (*write_fifo)(struct musb_hw_ep *hw_ep, u16 len, const u8 *buf);
 197         int     (*set_mode)(struct musb *musb, u8 mode);
 198         void    (*try_idle)(struct musb *musb, unsigned long timeout);
 199         int     (*reset)(struct musb *musb);
 200
 201         int     (*vbus_status)(struct musb *musb);
 202         void    (*set_vbus)(struct musb *musb, int on);
 203
 204         int     (*adjust_channel_params)(struct dma_channel *channel,
 205                                 u16 packet_sz, u8 *mode,
 206                                 dma_addr_t *dma_addr, u32 *len);
 207 };
 208
 209 /*
 210  * struct musb_hw_ep - endpoint hardware (bidirectional)
 211  *
 212  * Ordered slightly for better cacheline locality.
 213  */
 214 struct musb_hw_ep {
 215         struct musb             *musb;
 216         void __iomem            *fifo;
 217         void __iomem            *regs;
 218
 219 #if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
 220         void __iomem            *conf;
 221 #endif
 222
 223         /* index in musb->endpoints[]  */
 224         u8                      epnum;
 225
 226         /* hardware configuration, possibly dynamic */
 227         bool                    is_shared_fifo;
 228         bool                    tx_double_buffered;
 229         bool                    rx_double_buffered;
 230         u16                     max_packet_sz_tx;
 231         u16                     max_packet_sz_rx;
 232
 233         struct dma_channel      *tx_channel;
 234         struct dma_channel      *rx_channel;
 235
 236 #if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
 237         /* TUSB has "asynchronous" and "synchronous" dma modes */
 238         dma_addr_t              fifo_async;
 239         dma_addr_t              fifo_sync;
 240         void __iomem            *fifo_sync_va;
 241 #endif
 242
 243         void __iomem            *target_regs;
 244
 245         /* currently scheduled peripheral endpoint */
 246         struct musb_qh          *in_qh;
 247         struct musb_qh          *out_qh;
 248
 249         u8                      rx_reinit;
 250         u8                      tx_reinit;
 251
 252         /* peripheral side */
 253         struct musb_ep          ep_in;                  /* TX */
 254         struct musb_ep          ep_out;                 /* RX */
 255 };
 256
 257 static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
 258 {
 259         return next_request(&hw_ep->ep_in);
 260 }
 261
 262 static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
 263 {
 264         return next_request(&hw_ep->ep_out);
 265 }
 266
 267 struct musb_csr_regs {
 268         /* FIFO registers */
 269         u16 txmaxp, txcsr, rxmaxp, rxcsr;
 270         u16 rxfifoadd, txfifoadd;
 271         u8 txtype, txinterval, rxtype, rxinterval;
 272         u8 rxfifosz, txfifosz;
 273         u8 txfunaddr, txhubaddr, txhubport;
 274         u8 rxfunaddr, rxhubaddr, rxhubport;
 275 };
 276
 277 struct musb_context_registers {
 278
 279         u8 power;
 280         u8 intrusbe;
 281         u16 frame;
 282         u8 index, testmode;
 283
 284         u8 devctl, busctl, misc;
 285         u32 otg_interfsel;
 286
 287         struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
 288 };
 289
 290 /*
 291  * struct musb - Driver instance data.
 292  */
 293 struct musb {
 294         /* device lock */
 295         spinlock_t              lock;
 296
 297         struct musb_io          io;
 298         const struct musb_platform_ops *ops;
 299         struct musb_context_registers context;
 300
 301         irqreturn_t             (*isr)(int, void *);
 302         struct work_struct      irq_work;
 303         struct delayed_work     recover_work;
 304         struct delayed_work     deassert_reset_work;
 305         struct delayed_work     finish_resume_work;
 306         u16                     hwvers;
 307
 308         u16                     intrrxe;
 309         u16                     intrtxe;
 310 /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
 311 #define MUSB_PORT_STAT_RESUME   (1 << 31)
 312
 313         u32                     port1_status;
 314
 315         unsigned long           rh_timer;
 316
 317         enum musb_h_ep0_state   ep0_stage;
 318
 319         /* bulk traffic normally dedicates endpoint hardware, and each
 320          * direction has its own ring of host side endpoints.
 321          * we try to progress the transfer at the head of each endpoint's
 322          * queue until it completes or NAKs too much; then we try the next
 323          * endpoint.
 324          */
 325         struct musb_hw_ep       *bulk_ep;
 326
 327         struct list_head        control;        /* of musb_qh */
 328         struct list_head        in_bulk;        /* of musb_qh */
 329         struct list_head        out_bulk;       /* of musb_qh */
 330
 331         struct timer_list       otg_timer;
 332         struct notifier_block   nb;
 333
 334         struct dma_controller   *dma_controller;
 335
 336         struct device           *controller;
 337         void __iomem            *ctrl_base;
 338         void __iomem            *mregs;
 339
 340 #if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
 341         dma_addr_t              async;
 342         dma_addr_t              sync;
 343         void __iomem            *sync_va;
 344         u8                      tusb_revision;
 345 #endif
 346
 347         /* passed down from chip/board specific irq handlers */
 348         u8                      int_usb;
 349         u16                     int_rx;
 350         u16                     int_tx;
 351
 352         struct usb_phy          *xceiv;
 353         struct phy              *phy;
 354
 355         int nIrq;
 356         unsigned                irq_wake:1;
 357
 358         struct musb_hw_ep        endpoints[MUSB_C_NUM_EPS];
 359 #define control_ep              endpoints
 360
 361 #define VBUSERR_RETRY_COUNT     3
 362         u16                     vbuserr_retry;
 363         u16 epmask;
 364         u8 nr_endpoints;
 365
 366         int                     (*board_set_power)(int state);
 367
 368         u8                      min_power;      /* vbus for periph, in mA/2 */
 369
 370         int                     port_mode;      /* MUSB_PORT_MODE_* */
 371         bool                    is_host;
 372
 373         int                     a_wait_bcon;    /* VBUS timeout in msecs */
 374         unsigned long           idle_timeout;   /* Next timeout in jiffies */
 375
 376         /* active means connected and not suspended */
 377         unsigned                is_active:1;
 378
 379         unsigned is_multipoint:1;
 380
 381         unsigned                hb_iso_rx:1;    /* high bandwidth iso rx? */
 382         unsigned                hb_iso_tx:1;    /* high bandwidth iso tx? */
 383         unsigned                dyn_fifo:1;     /* dynamic FIFO supported? */
 384
 385         unsigned                bulk_split:1;
 386 #define can_bulk_split(musb,type) \
 387         (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
 388
 389         unsigned                bulk_combine:1;
 390 #define can_bulk_combine(musb,type) \
 391         (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
 392
 393         /* is_suspended means USB B_PERIPHERAL suspend */
 394         unsigned                is_suspended:1;
 395         unsigned                need_finish_resume :1;
 396
 397         /* may_wakeup means remote wakeup is enabled */
 398         unsigned                may_wakeup:1;
 399
 400         /* is_self_powered is reported in device status and the
 401          * config descriptor.  is_bus_powered means B_PERIPHERAL
 402          * draws some VBUS current; both can be true.
 403          */
 404         unsigned                is_self_powered:1;
 405         unsigned                is_bus_powered:1;
 406
 407         unsigned                set_address:1;
 408         unsigned                test_mode:1;
 409         unsigned                softconnect:1;
 410
 411         u8                      address;
 412         u8                      test_mode_nr;
 413         u16                     ackpend;                /* ep0 */
 414         enum musb_g_ep0_state   ep0_state;
 415         struct usb_gadget       g;                      /* the gadget */
 416         struct usb_gadget_driver *gadget_driver;        /* its driver */
 417         struct usb_hcd          *hcd;                   /* the usb hcd */
 418
 419         /*
 420          * FIXME: Remove this flag.
 421          *
 422          * This is only added to allow Blackfin to work
 423          * with current driver. For some unknown reason
 424          * Blackfin doesn't work with double buffering
 425          * and that's enabled by default.
 426          *
 427          * We added this flag to forcefully disable double
 428          * buffering until we get it working.
 429          */
 430         unsigned                double_buffer_not_ok:1;
 431
 432         struct musb_hdrc_config *config;
 433
 434         int                     xceiv_old_state;
 435 #ifdef CONFIG_DEBUG_FS
 436         struct dentry           *debugfs_root;
 437 #endif
 438 };
 439
 440 static inline struct musb *gadget_to_musb(struct usb_gadget *g)
 441 {
 442         return container_of(g, struct musb, g);
 443 }
 444
 445 #ifdef CONFIG_BLACKFIN
 446 static inline int musb_read_fifosize(struct musb *musb,
 447                 struct musb_hw_ep *hw_ep, u8 epnum)
 448 {
 449         musb->nr_endpoints++;
 450         musb->epmask |= (1 << epnum);
 451
 452         if (epnum < 5) {
 453                 hw_ep->max_packet_sz_tx = 128;
 454                 hw_ep->max_packet_sz_rx = 128;
 455         } else {
 456                 hw_ep->max_packet_sz_tx = 1024;
 457                 hw_ep->max_packet_sz_rx = 1024;
 458         }
 459         hw_ep->is_shared_fifo = false;
 460
 461         return 0;
 462 }
 463
 464 static inline void musb_configure_ep0(struct musb *musb)
 465 {
 466         musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
 467         musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
 468         musb->endpoints[0].is_shared_fifo = true;
 469 }
 470
 471 #else
 472
 473 static inline int musb_read_fifosize(struct musb *musb,
 474                 struct musb_hw_ep *hw_ep, u8 epnum)
 475 {
 476         void __iomem *mbase = musb->mregs;
 477         u8 reg = 0;
 478
 479         /* read from core using indexed model */
 480         reg = musb_readb(mbase, musb->io.ep_offset(epnum, MUSB_FIFOSIZE));
 481         /* 0's returned when no more endpoints */
 482         if (!reg)
 483                 return -ENODEV;
 484
 485         musb->nr_endpoints++;
 486         musb->epmask |= (1 << epnum);
 487
 488         hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
 489
 490         /* shared TX/RX FIFO? */
 491         if ((reg & 0xf0) == 0xf0) {
 492                 hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
 493                 hw_ep->is_shared_fifo = true;
 494                 return 0;
 495         } else {
 496                 hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
 497                 hw_ep->is_shared_fifo = false;
 498         }
 499
 500         return 0;
 501 }
 502
 503 static inline void musb_configure_ep0(struct musb *musb)
 504 {
 505         musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
 506         musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
 507         musb->endpoints[0].is_shared_fifo = true;
 508 }
 509 #endif /* CONFIG_BLACKFIN */
 510
 511
 512 /***************************** Glue it together *****************************/
 513
 514 extern const char musb_driver_name[];
 515
 516 extern void musb_stop(struct musb *musb);
 517 extern void musb_start(struct musb *musb);
 518
 519 extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
 520 extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
 521
 522 extern void musb_load_testpacket(struct musb *);
 523
 524 extern irqreturn_t musb_interrupt(struct musb *);
 525
 526 extern void musb_hnp_stop(struct musb *musb);
 527
 528 static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
 529 {
 530         if (musb->ops->set_vbus)
 531                 musb->ops->set_vbus(musb, is_on);
 532 }
 533
 534 static inline void musb_platform_enable(struct musb *musb)
 535 {
 536         if (musb->ops->enable)
 537                 musb->ops->enable(musb);
 538 }
 539
 540 static inline void musb_platform_disable(struct musb *musb)
 541 {
 542         if (musb->ops->disable)
 543                 musb->ops->disable(musb);
 544 }
 545
 546 static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
 547 {
 548         if (!musb->ops->set_mode)
 549                 return 0;
 550
 551         return musb->ops->set_mode(musb, mode);
 552 }
 553
 554 static inline void musb_platform_try_idle(struct musb *musb,
 555                 unsigned long timeout)
 556 {
 557         if (musb->ops->try_idle)
 558                 musb->ops->try_idle(musb, timeout);
 559 }
 560
 561 static inline int  musb_platform_reset(struct musb *musb)
 562 {
 563         if (!musb->ops->reset)
 564                 return -EINVAL;
 565
 566         return musb->ops->reset(musb);
 567 }
 568
 569 static inline int musb_platform_get_vbus_status(struct musb *musb)
 570 {
 571         if (!musb->ops->vbus_status)
 572                 return 0;
 573
 574         return musb->ops->vbus_status(musb);
 575 }
 576
 577 static inline int musb_platform_init(struct musb *musb)
 578 {
 579         if (!musb->ops->init)
 580                 return -EINVAL;
 581
 582         return musb->ops->init(musb);
 583 }
 584
 585 static inline int musb_platform_exit(struct musb *musb)
 586 {
 587         if (!musb->ops->exit)
 588                 return -EINVAL;
 589
 590         return musb->ops->exit(musb);
 591 }
 592
 593 #endif  /* __MUSB_CORE_H__ */