usb: musb: dsps: use proper child nodes
[deliverable/linux.git] / drivers / usb / musb / musb_dsps.c
1 /*
2 * Texas Instruments DSPS platforms "glue layer"
3 *
4 * Copyright (C) 2012, by Texas Instruments
5 *
6 * Based on the am35x "glue layer" code.
7 *
8 * This file is part of the Inventra Controller Driver for Linux.
9 *
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
13 * Foundation.
14 *
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
25 *
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
30 */
31
32 #include <linux/init.h>
33 #include <linux/io.h>
34 #include <linux/err.h>
35 #include <linux/platform_device.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/pm_runtime.h>
38 #include <linux/module.h>
39 #include <linux/usb/usb_phy_gen_xceiv.h>
40 #include <linux/platform_data/usb-omap.h>
41 #include <linux/sizes.h>
42
43 #include <linux/of.h>
44 #include <linux/of_device.h>
45 #include <linux/of_address.h>
46 #include <linux/of_irq.h>
47
48 #include "musb_core.h"
49
50 static const struct of_device_id musb_dsps_of_match[];
51
52 /**
53 * avoid using musb_readx()/musb_writex() as glue layer should not be
54 * dependent on musb core layer symbols.
55 */
56 static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
57 { return __raw_readb(addr + offset); }
58
59 static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
60 { return __raw_readl(addr + offset); }
61
62 static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
63 { __raw_writeb(data, addr + offset); }
64
65 static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
66 { __raw_writel(data, addr + offset); }
67
68 /**
69 * DSPS musb wrapper register offset.
70 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
71 * musb ips.
72 */
73 struct dsps_musb_wrapper {
74 u16 revision;
75 u16 control;
76 u16 status;
77 u16 epintr_set;
78 u16 epintr_clear;
79 u16 epintr_status;
80 u16 coreintr_set;
81 u16 coreintr_clear;
82 u16 coreintr_status;
83 u16 phy_utmi;
84 u16 mode;
85
86 /* bit positions for control */
87 unsigned reset:5;
88
89 /* bit positions for interrupt */
90 unsigned usb_shift:5;
91 u32 usb_mask;
92 u32 usb_bitmap;
93 unsigned drvvbus:5;
94
95 unsigned txep_shift:5;
96 u32 txep_mask;
97 u32 txep_bitmap;
98
99 unsigned rxep_shift:5;
100 u32 rxep_mask;
101 u32 rxep_bitmap;
102
103 /* bit positions for phy_utmi */
104 unsigned otg_disable:5;
105
106 /* bit positions for mode */
107 unsigned iddig:5;
108 /* miscellaneous stuff */
109 u8 poll_seconds;
110 };
111
112 /**
113 * DSPS glue structure.
114 */
115 struct dsps_glue {
116 struct device *dev;
117 struct platform_device *musb; /* child musb pdev */
118 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
119 struct timer_list timer; /* otg_workaround timer */
120 unsigned long last_timer; /* last timer data for each instance */
121 };
122
123 /**
124 * dsps_musb_enable - enable interrupts
125 */
126 static void dsps_musb_enable(struct musb *musb)
127 {
128 struct device *dev = musb->controller;
129 struct platform_device *pdev = to_platform_device(dev->parent);
130 struct dsps_glue *glue = platform_get_drvdata(pdev);
131 const struct dsps_musb_wrapper *wrp = glue->wrp;
132 void __iomem *reg_base = musb->ctrl_base;
133 u32 epmask, coremask;
134
135 /* Workaround: setup IRQs through both register sets. */
136 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
137 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
138 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
139
140 dsps_writel(reg_base, wrp->epintr_set, epmask);
141 dsps_writel(reg_base, wrp->coreintr_set, coremask);
142 /* Force the DRVVBUS IRQ so we can start polling for ID change. */
143 dsps_writel(reg_base, wrp->coreintr_set,
144 (1 << wrp->drvvbus) << wrp->usb_shift);
145 }
146
147 /**
148 * dsps_musb_disable - disable HDRC and flush interrupts
149 */
150 static void dsps_musb_disable(struct musb *musb)
151 {
152 struct device *dev = musb->controller;
153 struct platform_device *pdev = to_platform_device(dev->parent);
154 struct dsps_glue *glue = platform_get_drvdata(pdev);
155 const struct dsps_musb_wrapper *wrp = glue->wrp;
156 void __iomem *reg_base = musb->ctrl_base;
157
158 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
159 dsps_writel(reg_base, wrp->epintr_clear,
160 wrp->txep_bitmap | wrp->rxep_bitmap);
161 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
162 }
163
164 static void otg_timer(unsigned long _musb)
165 {
166 struct musb *musb = (void *)_musb;
167 void __iomem *mregs = musb->mregs;
168 struct device *dev = musb->controller;
169 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
170 const struct dsps_musb_wrapper *wrp = glue->wrp;
171 u8 devctl;
172 unsigned long flags;
173
174 /*
175 * We poll because DSPS IP's won't expose several OTG-critical
176 * status change events (from the transceiver) otherwise.
177 */
178 devctl = dsps_readb(mregs, MUSB_DEVCTL);
179 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
180 usb_otg_state_string(musb->xceiv->state));
181
182 spin_lock_irqsave(&musb->lock, flags);
183 switch (musb->xceiv->state) {
184 case OTG_STATE_A_WAIT_BCON:
185 devctl &= ~MUSB_DEVCTL_SESSION;
186 dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl);
187
188 devctl = dsps_readb(musb->mregs, MUSB_DEVCTL);
189 if (devctl & MUSB_DEVCTL_BDEVICE) {
190 musb->xceiv->state = OTG_STATE_B_IDLE;
191 MUSB_DEV_MODE(musb);
192 } else {
193 musb->xceiv->state = OTG_STATE_A_IDLE;
194 MUSB_HST_MODE(musb);
195 }
196 break;
197 case OTG_STATE_A_WAIT_VFALL:
198 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
199 dsps_writel(musb->ctrl_base, wrp->coreintr_set,
200 MUSB_INTR_VBUSERROR << wrp->usb_shift);
201 break;
202 case OTG_STATE_B_IDLE:
203 devctl = dsps_readb(mregs, MUSB_DEVCTL);
204 if (devctl & MUSB_DEVCTL_BDEVICE)
205 mod_timer(&glue->timer,
206 jiffies + wrp->poll_seconds * HZ);
207 else
208 musb->xceiv->state = OTG_STATE_A_IDLE;
209 break;
210 default:
211 break;
212 }
213 spin_unlock_irqrestore(&musb->lock, flags);
214 }
215
216 static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
217 {
218 struct device *dev = musb->controller;
219 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
220
221 if (timeout == 0)
222 timeout = jiffies + msecs_to_jiffies(3);
223
224 /* Never idle if active, or when VBUS timeout is not set as host */
225 if (musb->is_active || (musb->a_wait_bcon == 0 &&
226 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
227 dev_dbg(musb->controller, "%s active, deleting timer\n",
228 usb_otg_state_string(musb->xceiv->state));
229 del_timer(&glue->timer);
230 glue->last_timer = jiffies;
231 return;
232 }
233
234 if (time_after(glue->last_timer, timeout) &&
235 timer_pending(&glue->timer)) {
236 dev_dbg(musb->controller,
237 "Longer idle timer already pending, ignoring...\n");
238 return;
239 }
240 glue->last_timer = timeout;
241
242 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
243 usb_otg_state_string(musb->xceiv->state),
244 jiffies_to_msecs(timeout - jiffies));
245 mod_timer(&glue->timer, timeout);
246 }
247
248 static irqreturn_t dsps_interrupt(int irq, void *hci)
249 {
250 struct musb *musb = hci;
251 void __iomem *reg_base = musb->ctrl_base;
252 struct device *dev = musb->controller;
253 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
254 const struct dsps_musb_wrapper *wrp = glue->wrp;
255 unsigned long flags;
256 irqreturn_t ret = IRQ_NONE;
257 u32 epintr, usbintr;
258
259 spin_lock_irqsave(&musb->lock, flags);
260
261 /* Get endpoint interrupts */
262 epintr = dsps_readl(reg_base, wrp->epintr_status);
263 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
264 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
265
266 if (epintr)
267 dsps_writel(reg_base, wrp->epintr_status, epintr);
268
269 /* Get usb core interrupts */
270 usbintr = dsps_readl(reg_base, wrp->coreintr_status);
271 if (!usbintr && !epintr)
272 goto out;
273
274 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
275 if (usbintr)
276 dsps_writel(reg_base, wrp->coreintr_status, usbintr);
277
278 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
279 usbintr, epintr);
280 /*
281 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
282 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
283 * switch appropriately between halves of the OTG state machine.
284 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
285 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
286 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
287 */
288 if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE)
289 pr_info("CAUTION: musb: Babble Interrupt Occurred\n");
290
291 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
292 int drvvbus = dsps_readl(reg_base, wrp->status);
293 void __iomem *mregs = musb->mregs;
294 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
295 int err;
296
297 err = musb->int_usb & MUSB_INTR_VBUSERROR;
298 if (err) {
299 /*
300 * The Mentor core doesn't debounce VBUS as needed
301 * to cope with device connect current spikes. This
302 * means it's not uncommon for bus-powered devices
303 * to get VBUS errors during enumeration.
304 *
305 * This is a workaround, but newer RTL from Mentor
306 * seems to allow a better one: "re"-starting sessions
307 * without waiting for VBUS to stop registering in
308 * devctl.
309 */
310 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
311 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
312 mod_timer(&glue->timer,
313 jiffies + wrp->poll_seconds * HZ);
314 WARNING("VBUS error workaround (delay coming)\n");
315 } else if (drvvbus) {
316 musb->is_active = 1;
317 MUSB_HST_MODE(musb);
318 musb->xceiv->otg->default_a = 1;
319 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
320 del_timer(&glue->timer);
321 } else {
322 musb->is_active = 0;
323 MUSB_DEV_MODE(musb);
324 musb->xceiv->otg->default_a = 0;
325 musb->xceiv->state = OTG_STATE_B_IDLE;
326 }
327
328 /* NOTE: this must complete power-on within 100 ms. */
329 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
330 drvvbus ? "on" : "off",
331 usb_otg_state_string(musb->xceiv->state),
332 err ? " ERROR" : "",
333 devctl);
334 ret = IRQ_HANDLED;
335 }
336
337 if (musb->int_tx || musb->int_rx || musb->int_usb)
338 ret |= musb_interrupt(musb);
339
340 /* Poll for ID change */
341 if (musb->xceiv->state == OTG_STATE_B_IDLE)
342 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
343 out:
344 spin_unlock_irqrestore(&musb->lock, flags);
345
346 return ret;
347 }
348
349 static int dsps_musb_init(struct musb *musb)
350 {
351 struct device *dev = musb->controller;
352 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
353 struct platform_device *parent = to_platform_device(dev->parent);
354 const struct dsps_musb_wrapper *wrp = glue->wrp;
355 void __iomem *reg_base;
356 struct resource *r;
357 u32 rev, val;
358
359 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control");
360 if (!r)
361 return -EINVAL;
362
363 reg_base = devm_ioremap_resource(dev, r);
364 if (!musb->ctrl_base)
365 return -EINVAL;
366 musb->ctrl_base = reg_base;
367
368 /* NOP driver needs change if supporting dual instance */
369 musb->xceiv = devm_usb_get_phy_by_phandle(dev, "phys", 0);
370 if (IS_ERR(musb->xceiv))
371 return PTR_ERR(musb->xceiv);
372
373 /* Returns zero if e.g. not clocked */
374 rev = dsps_readl(reg_base, wrp->revision);
375 if (!rev)
376 return -ENODEV;
377
378 usb_phy_init(musb->xceiv);
379 setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
380
381 /* Reset the musb */
382 dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
383
384 musb->isr = dsps_interrupt;
385
386 /* reset the otgdisable bit, needed for host mode to work */
387 val = dsps_readl(reg_base, wrp->phy_utmi);
388 val &= ~(1 << wrp->otg_disable);
389 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
390
391 return 0;
392 }
393
394 static int dsps_musb_exit(struct musb *musb)
395 {
396 struct device *dev = musb->controller;
397 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
398
399 del_timer_sync(&glue->timer);
400
401 usb_phy_shutdown(musb->xceiv);
402 return 0;
403 }
404
405 static struct musb_platform_ops dsps_ops = {
406 .init = dsps_musb_init,
407 .exit = dsps_musb_exit,
408
409 .enable = dsps_musb_enable,
410 .disable = dsps_musb_disable,
411
412 .try_idle = dsps_musb_try_idle,
413 };
414
415 static u64 musb_dmamask = DMA_BIT_MASK(32);
416
417 static int get_int_prop(struct device_node *dn, const char *s)
418 {
419 int ret;
420 u32 val;
421
422 ret = of_property_read_u32(dn, s, &val);
423 if (ret)
424 return 0;
425 return val;
426 }
427
428 static int dsps_create_musb_pdev(struct dsps_glue *glue,
429 struct platform_device *parent)
430 {
431 struct musb_hdrc_platform_data pdata;
432 struct resource resources[2];
433 struct device *dev = &parent->dev;
434 struct musb_hdrc_config *config;
435 struct platform_device *musb;
436 struct device_node *dn = parent->dev.of_node;
437 struct device_node *child_node;
438 int ret;
439
440 child_node = of_get_child_by_name(dn, "usb");
441 if (!child_node)
442 return -EINVAL;
443
444 memset(resources, 0, sizeof(resources));
445 ret = of_address_to_resource(child_node, 0, &resources[0]);
446 if (ret) {
447 dev_err(dev, "failed to get memory.\n");
448 return ret;
449 }
450
451 ret = of_irq_to_resource(child_node, 0, &resources[1]);
452 if (ret == 0) {
453 dev_err(dev, "failed to get irq.\n");
454 ret = -EINVAL;
455 return ret;
456 }
457
458 /* allocate the child platform device */
459 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
460 if (!musb) {
461 dev_err(dev, "failed to allocate musb device\n");
462 return -ENOMEM;
463 }
464
465 musb->dev.parent = dev;
466 musb->dev.dma_mask = &musb_dmamask;
467 musb->dev.coherent_dma_mask = musb_dmamask;
468 musb->dev.of_node = of_node_get(child_node);
469
470 glue->musb = musb;
471
472 ret = platform_device_add_resources(musb, resources,
473 ARRAY_SIZE(resources));
474 if (ret) {
475 dev_err(dev, "failed to add resources\n");
476 goto err;
477 }
478
479 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL);
480 if (!config) {
481 dev_err(dev, "failed to allocate musb hdrc config\n");
482 ret = -ENOMEM;
483 goto err;
484 }
485 pdata.config = config;
486 pdata.platform_ops = &dsps_ops;
487
488 config->num_eps = get_int_prop(child_node, "num-eps");
489 config->ram_bits = get_int_prop(child_node, "ram-bits");
490 pdata.mode = get_int_prop(child_node, "port-mode");
491 pdata.power = get_int_prop(child_node, "power");
492 config->multipoint = of_property_read_bool(child_node, "multipoint");
493
494 ret = platform_device_add_data(musb, &pdata, sizeof(pdata));
495 if (ret) {
496 dev_err(dev, "failed to add platform_data\n");
497 goto err;
498 }
499
500 ret = platform_device_add(musb);
501 if (ret) {
502 dev_err(dev, "failed to register musb device\n");
503 goto err;
504 }
505 return 0;
506
507 err:
508 platform_device_put(musb);
509 return ret;
510 }
511
512 static int dsps_probe(struct platform_device *pdev)
513 {
514 const struct of_device_id *match;
515 const struct dsps_musb_wrapper *wrp;
516 struct dsps_glue *glue;
517 int ret;
518
519 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node);
520 if (!match) {
521 dev_err(&pdev->dev, "fail to get matching of_match struct\n");
522 return -EINVAL;
523 }
524 wrp = match->data;
525
526 /* allocate glue */
527 glue = kzalloc(sizeof(*glue), GFP_KERNEL);
528 if (!glue) {
529 dev_err(&pdev->dev, "unable to allocate glue memory\n");
530 return -ENOMEM;
531 }
532
533 glue->dev = &pdev->dev;
534 glue->wrp = wrp;
535
536 platform_set_drvdata(pdev, glue);
537 pm_runtime_enable(&pdev->dev);
538
539 ret = pm_runtime_get_sync(&pdev->dev);
540 if (ret < 0) {
541 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
542 goto err2;
543 }
544
545 ret = dsps_create_musb_pdev(glue, pdev);
546 if (ret)
547 goto err3;
548
549 return 0;
550
551 err3:
552 pm_runtime_put(&pdev->dev);
553 err2:
554 pm_runtime_disable(&pdev->dev);
555 kfree(glue);
556 return ret;
557 }
558
559 static int dsps_remove(struct platform_device *pdev)
560 {
561 struct dsps_glue *glue = platform_get_drvdata(pdev);
562
563 platform_device_unregister(glue->musb);
564
565 /* disable usbss clocks */
566 pm_runtime_put(&pdev->dev);
567 pm_runtime_disable(&pdev->dev);
568 kfree(glue);
569 return 0;
570 }
571
572 static const struct dsps_musb_wrapper am33xx_driver_data = {
573 .revision = 0x00,
574 .control = 0x14,
575 .status = 0x18,
576 .epintr_set = 0x38,
577 .epintr_clear = 0x40,
578 .epintr_status = 0x30,
579 .coreintr_set = 0x3c,
580 .coreintr_clear = 0x44,
581 .coreintr_status = 0x34,
582 .phy_utmi = 0xe0,
583 .mode = 0xe8,
584 .reset = 0,
585 .otg_disable = 21,
586 .iddig = 8,
587 .usb_shift = 0,
588 .usb_mask = 0x1ff,
589 .usb_bitmap = (0x1ff << 0),
590 .drvvbus = 8,
591 .txep_shift = 0,
592 .txep_mask = 0xffff,
593 .txep_bitmap = (0xffff << 0),
594 .rxep_shift = 16,
595 .rxep_mask = 0xfffe,
596 .rxep_bitmap = (0xfffe << 16),
597 .poll_seconds = 2,
598 };
599
600 static const struct of_device_id musb_dsps_of_match[] = {
601 { .compatible = "ti,musb-am33xx",
602 .data = (void *) &am33xx_driver_data, },
603 { },
604 };
605 MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
606
607 static struct platform_driver dsps_usbss_driver = {
608 .probe = dsps_probe,
609 .remove = dsps_remove,
610 .driver = {
611 .name = "musb-dsps",
612 .of_match_table = of_match_ptr(musb_dsps_of_match),
613 },
614 };
615
616 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
617 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
618 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
619 MODULE_LICENSE("GPL v2");
620
621 module_platform_driver(dsps_usbss_driver);
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