2 * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
4 * Copyright (C) 2004-2007 Texas Instruments
5 * Copyright (C) 2008 Nokia Corporation
6 * Contact: Felipe Balbi <felipe.balbi@nokia.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 * - HS USB ULPI mode works.
24 * - 3-pin mode support may be added in future.
27 #include <linux/module.h>
28 #include <linux/init.h>
29 #include <linux/interrupt.h>
30 #include <linux/platform_device.h>
31 #include <linux/spinlock.h>
32 #include <linux/workqueue.h>
34 #include <linux/delay.h>
35 #include <linux/usb/otg.h>
36 #include <linux/i2c/twl.h>
37 #include <linux/regulator/consumer.h>
38 #include <linux/err.h>
39 #include <linux/notifier.h>
41 /* Register defines */
43 #define VENDOR_ID_LO 0x00
44 #define VENDOR_ID_HI 0x01
45 #define PRODUCT_ID_LO 0x02
46 #define PRODUCT_ID_HI 0x03
48 #define FUNC_CTRL 0x04
49 #define FUNC_CTRL_SET 0x05
50 #define FUNC_CTRL_CLR 0x06
51 #define FUNC_CTRL_SUSPENDM (1 << 6)
52 #define FUNC_CTRL_RESET (1 << 5)
53 #define FUNC_CTRL_OPMODE_MASK (3 << 3) /* bits 3 and 4 */
54 #define FUNC_CTRL_OPMODE_NORMAL (0 << 3)
55 #define FUNC_CTRL_OPMODE_NONDRIVING (1 << 3)
56 #define FUNC_CTRL_OPMODE_DISABLE_BIT_NRZI (2 << 3)
57 #define FUNC_CTRL_TERMSELECT (1 << 2)
58 #define FUNC_CTRL_XCVRSELECT_MASK (3 << 0) /* bits 0 and 1 */
59 #define FUNC_CTRL_XCVRSELECT_HS (0 << 0)
60 #define FUNC_CTRL_XCVRSELECT_FS (1 << 0)
61 #define FUNC_CTRL_XCVRSELECT_LS (2 << 0)
62 #define FUNC_CTRL_XCVRSELECT_FS4LS (3 << 0)
65 #define IFC_CTRL_SET 0x08
66 #define IFC_CTRL_CLR 0x09
67 #define IFC_CTRL_INTERFACE_PROTECT_DISABLE (1 << 7)
68 #define IFC_CTRL_AUTORESUME (1 << 4)
69 #define IFC_CTRL_CLOCKSUSPENDM (1 << 3)
70 #define IFC_CTRL_CARKITMODE (1 << 2)
71 #define IFC_CTRL_FSLSSERIALMODE_3PIN (1 << 1)
73 #define TWL4030_OTG_CTRL 0x0A
74 #define TWL4030_OTG_CTRL_SET 0x0B
75 #define TWL4030_OTG_CTRL_CLR 0x0C
76 #define TWL4030_OTG_CTRL_DRVVBUS (1 << 5)
77 #define TWL4030_OTG_CTRL_CHRGVBUS (1 << 4)
78 #define TWL4030_OTG_CTRL_DISCHRGVBUS (1 << 3)
79 #define TWL4030_OTG_CTRL_DMPULLDOWN (1 << 2)
80 #define TWL4030_OTG_CTRL_DPPULLDOWN (1 << 1)
81 #define TWL4030_OTG_CTRL_IDPULLUP (1 << 0)
83 #define USB_INT_EN_RISE 0x0D
84 #define USB_INT_EN_RISE_SET 0x0E
85 #define USB_INT_EN_RISE_CLR 0x0F
86 #define USB_INT_EN_FALL 0x10
87 #define USB_INT_EN_FALL_SET 0x11
88 #define USB_INT_EN_FALL_CLR 0x12
89 #define USB_INT_STS 0x13
90 #define USB_INT_LATCH 0x14
91 #define USB_INT_IDGND (1 << 4)
92 #define USB_INT_SESSEND (1 << 3)
93 #define USB_INT_SESSVALID (1 << 2)
94 #define USB_INT_VBUSVALID (1 << 1)
95 #define USB_INT_HOSTDISCONNECT (1 << 0)
97 #define CARKIT_CTRL 0x19
98 #define CARKIT_CTRL_SET 0x1A
99 #define CARKIT_CTRL_CLR 0x1B
100 #define CARKIT_CTRL_MICEN (1 << 6)
101 #define CARKIT_CTRL_SPKRIGHTEN (1 << 5)
102 #define CARKIT_CTRL_SPKLEFTEN (1 << 4)
103 #define CARKIT_CTRL_RXDEN (1 << 3)
104 #define CARKIT_CTRL_TXDEN (1 << 2)
105 #define CARKIT_CTRL_IDGNDDRV (1 << 1)
106 #define CARKIT_CTRL_CARKITPWR (1 << 0)
107 #define CARKIT_PLS_CTRL 0x22
108 #define CARKIT_PLS_CTRL_SET 0x23
109 #define CARKIT_PLS_CTRL_CLR 0x24
110 #define CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN (1 << 3)
111 #define CARKIT_PLS_CTRL_SPKRLEFT_BIASEN (1 << 2)
112 #define CARKIT_PLS_CTRL_RXPLSEN (1 << 1)
113 #define CARKIT_PLS_CTRL_TXPLSEN (1 << 0)
115 #define MCPC_CTRL 0x30
116 #define MCPC_CTRL_SET 0x31
117 #define MCPC_CTRL_CLR 0x32
118 #define MCPC_CTRL_RTSOL (1 << 7)
119 #define MCPC_CTRL_EXTSWR (1 << 6)
120 #define MCPC_CTRL_EXTSWC (1 << 5)
121 #define MCPC_CTRL_VOICESW (1 << 4)
122 #define MCPC_CTRL_OUT64K (1 << 3)
123 #define MCPC_CTRL_RTSCTSSW (1 << 2)
124 #define MCPC_CTRL_HS_UART (1 << 0)
126 #define MCPC_IO_CTRL 0x33
127 #define MCPC_IO_CTRL_SET 0x34
128 #define MCPC_IO_CTRL_CLR 0x35
129 #define MCPC_IO_CTRL_MICBIASEN (1 << 5)
130 #define MCPC_IO_CTRL_CTS_NPU (1 << 4)
131 #define MCPC_IO_CTRL_RXD_PU (1 << 3)
132 #define MCPC_IO_CTRL_TXDTYP (1 << 2)
133 #define MCPC_IO_CTRL_CTSTYP (1 << 1)
134 #define MCPC_IO_CTRL_RTSTYP (1 << 0)
136 #define MCPC_CTRL2 0x36
137 #define MCPC_CTRL2_SET 0x37
138 #define MCPC_CTRL2_CLR 0x38
139 #define MCPC_CTRL2_MCPC_CK_EN (1 << 0)
141 #define OTHER_FUNC_CTRL 0x80
142 #define OTHER_FUNC_CTRL_SET 0x81
143 #define OTHER_FUNC_CTRL_CLR 0x82
144 #define OTHER_FUNC_CTRL_BDIS_ACON_EN (1 << 4)
145 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE (1 << 2)
147 #define OTHER_IFC_CTRL 0x83
148 #define OTHER_IFC_CTRL_SET 0x84
149 #define OTHER_IFC_CTRL_CLR 0x85
150 #define OTHER_IFC_CTRL_OE_INT_EN (1 << 6)
151 #define OTHER_IFC_CTRL_CEA2011_MODE (1 << 5)
152 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN (1 << 4)
153 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT (1 << 3)
154 #define OTHER_IFC_CTRL_HIZ_ULPI (1 << 2)
155 #define OTHER_IFC_CTRL_ALT_INT_REROUTE (1 << 0)
157 #define OTHER_INT_EN_RISE 0x86
158 #define OTHER_INT_EN_RISE_SET 0x87
159 #define OTHER_INT_EN_RISE_CLR 0x88
160 #define OTHER_INT_EN_FALL 0x89
161 #define OTHER_INT_EN_FALL_SET 0x8A
162 #define OTHER_INT_EN_FALL_CLR 0x8B
163 #define OTHER_INT_STS 0x8C
164 #define OTHER_INT_LATCH 0x8D
165 #define OTHER_INT_VB_SESS_VLD (1 << 7)
166 #define OTHER_INT_DM_HI (1 << 6) /* not valid for "latch" reg */
167 #define OTHER_INT_DP_HI (1 << 5) /* not valid for "latch" reg */
168 #define OTHER_INT_BDIS_ACON (1 << 3) /* not valid for "fall" regs */
169 #define OTHER_INT_MANU (1 << 1)
170 #define OTHER_INT_ABNORMAL_STRESS (1 << 0)
172 #define ID_STATUS 0x96
173 #define ID_RES_FLOAT (1 << 4)
174 #define ID_RES_440K (1 << 3)
175 #define ID_RES_200K (1 << 2)
176 #define ID_RES_102K (1 << 1)
177 #define ID_RES_GND (1 << 0)
179 #define POWER_CTRL 0xAC
180 #define POWER_CTRL_SET 0xAD
181 #define POWER_CTRL_CLR 0xAE
182 #define POWER_CTRL_OTG_ENAB (1 << 5)
184 #define OTHER_IFC_CTRL2 0xAF
185 #define OTHER_IFC_CTRL2_SET 0xB0
186 #define OTHER_IFC_CTRL2_CLR 0xB1
187 #define OTHER_IFC_CTRL2_ULPI_STP_LOW (1 << 4)
188 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL (1 << 3)
189 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430 (1 << 2)
190 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK (3 << 0) /* bits 0 and 1 */
191 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N (0 << 0)
192 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N (1 << 0)
194 #define REG_CTRL_EN 0xB2
195 #define REG_CTRL_EN_SET 0xB3
196 #define REG_CTRL_EN_CLR 0xB4
197 #define REG_CTRL_ERROR 0xB5
198 #define ULPI_I2C_CONFLICT_INTEN (1 << 0)
200 #define OTHER_FUNC_CTRL2 0xB8
201 #define OTHER_FUNC_CTRL2_SET 0xB9
202 #define OTHER_FUNC_CTRL2_CLR 0xBA
203 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN (1 << 0)
205 /* following registers do not have separate _clr and _set registers */
206 #define VBUS_DEBOUNCE 0xC0
207 #define ID_DEBOUNCE 0xC1
208 #define VBAT_TIMER 0xD3
209 #define PHY_PWR_CTRL 0xFD
210 #define PHY_PWR_PHYPWD (1 << 0)
211 #define PHY_CLK_CTRL 0xFE
212 #define PHY_CLK_CTRL_CLOCKGATING_EN (1 << 2)
213 #define PHY_CLK_CTRL_CLK32K_EN (1 << 1)
214 #define REQ_PHY_DPLL_CLK (1 << 0)
215 #define PHY_CLK_CTRL_STS 0xFF
216 #define PHY_DPLL_CLK (1 << 0)
218 /* In module TWL4030_MODULE_PM_MASTER */
219 #define PROTECT_KEY 0x0E
220 #define STS_HW_CONDITIONS 0x0F
222 /* In module TWL4030_MODULE_PM_RECEIVER */
223 #define VUSB_DEDICATED1 0x7D
224 #define VUSB_DEDICATED2 0x7E
225 #define VUSB1V5_DEV_GRP 0x71
226 #define VUSB1V5_TYPE 0x72
227 #define VUSB1V5_REMAP 0x73
228 #define VUSB1V8_DEV_GRP 0x74
229 #define VUSB1V8_TYPE 0x75
230 #define VUSB1V8_REMAP 0x76
231 #define VUSB3V1_DEV_GRP 0x77
232 #define VUSB3V1_TYPE 0x78
233 #define VUSB3V1_REMAP 0x79
235 /* In module TWL4030_MODULE_INTBR */
237 #define GPIO_USB_4PIN_ULPI_2430C (3 << 0)
240 struct otg_transceiver otg
;
243 /* TWL4030 internal USB regulator supplies */
244 struct regulator
*usb1v5
;
245 struct regulator
*usb1v8
;
246 struct regulator
*usb3v1
;
248 /* for vbus reporting with irqs disabled */
251 /* pin configuration */
252 enum twl4030_usb_mode usb_mode
;
260 /* internal define on top of container_of */
261 #define xceiv_to_twl(x) container_of((x), struct twl4030_usb, otg);
263 /*-------------------------------------------------------------------------*/
265 static int twl4030_i2c_write_u8_verify(struct twl4030_usb
*twl
,
266 u8 module
, u8 data
, u8 address
)
270 if ((twl_i2c_write_u8(module
, data
, address
) >= 0) &&
271 (twl_i2c_read_u8(module
, &check
, address
) >= 0) &&
274 dev_dbg(twl
->dev
, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
275 1, module
, address
, check
, data
);
277 /* Failed once: Try again */
278 if ((twl_i2c_write_u8(module
, data
, address
) >= 0) &&
279 (twl_i2c_read_u8(module
, &check
, address
) >= 0) &&
282 dev_dbg(twl
->dev
, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
283 2, module
, address
, check
, data
);
285 /* Failed again: Return error */
289 #define twl4030_usb_write_verify(twl, address, data) \
290 twl4030_i2c_write_u8_verify(twl, TWL4030_MODULE_USB, (data), (address))
292 static inline int twl4030_usb_write(struct twl4030_usb
*twl
,
297 ret
= twl_i2c_write_u8(TWL4030_MODULE_USB
, data
, address
);
300 "TWL4030:USB:Write[0x%x] Error %d\n", address
, ret
);
304 static inline int twl4030_readb(struct twl4030_usb
*twl
, u8 module
, u8 address
)
309 ret
= twl_i2c_read_u8(module
, &data
, address
);
314 "TWL4030:readb[0x%x,0x%x] Error %d\n",
315 module
, address
, ret
);
320 static inline int twl4030_usb_read(struct twl4030_usb
*twl
, u8 address
)
322 return twl4030_readb(twl
, TWL4030_MODULE_USB
, address
);
325 /*-------------------------------------------------------------------------*/
328 twl4030_usb_set_bits(struct twl4030_usb
*twl
, u8 reg
, u8 bits
)
330 return twl4030_usb_write(twl
, reg
+ 1, bits
);
334 twl4030_usb_clear_bits(struct twl4030_usb
*twl
, u8 reg
, u8 bits
)
336 return twl4030_usb_write(twl
, reg
+ 2, bits
);
339 /*-------------------------------------------------------------------------*/
341 static enum usb_xceiv_events
twl4030_usb_linkstat(struct twl4030_usb
*twl
)
344 int linkstat
= USB_EVENT_NONE
;
347 * For ID/VBUS sensing, see manual section 15.4.8 ...
348 * except when using only battery backup power, two
349 * comparators produce VBUS_PRES and ID_PRES signals,
350 * which don't match docs elsewhere. But ... BIT(7)
351 * and BIT(2) of STS_HW_CONDITIONS, respectively, do
352 * seem to match up. If either is true the USB_PRES
353 * signal is active, the OTG module is activated, and
354 * its interrupt may be raised (may wake the system).
356 status
= twl4030_readb(twl
, TWL4030_MODULE_PM_MASTER
,
359 dev_err(twl
->dev
, "USB link status err %d\n", status
);
360 else if (status
& (BIT(7) | BIT(2))) {
362 linkstat
= USB_EVENT_ID
;
364 linkstat
= USB_EVENT_VBUS
;
366 linkstat
= USB_EVENT_NONE
;
368 dev_dbg(twl
->dev
, "HW_CONDITIONS 0x%02x/%d; link %d\n",
369 status
, status
, linkstat
);
371 /* REVISIT this assumes host and peripheral controllers
372 * are registered, and that both are active...
375 spin_lock_irq(&twl
->lock
);
376 twl
->linkstat
= linkstat
;
377 if (linkstat
== USB_EVENT_ID
) {
378 twl
->otg
.default_a
= true;
379 twl
->otg
.state
= OTG_STATE_A_IDLE
;
381 twl
->otg
.default_a
= false;
382 twl
->otg
.state
= OTG_STATE_B_IDLE
;
384 spin_unlock_irq(&twl
->lock
);
389 static void twl4030_usb_set_mode(struct twl4030_usb
*twl
, int mode
)
391 twl
->usb_mode
= mode
;
394 case T2_USB_MODE_ULPI
:
395 twl4030_usb_clear_bits(twl
, IFC_CTRL
, IFC_CTRL_CARKITMODE
);
396 twl4030_usb_set_bits(twl
, POWER_CTRL
, POWER_CTRL_OTG_ENAB
);
397 twl4030_usb_clear_bits(twl
, FUNC_CTRL
,
398 FUNC_CTRL_XCVRSELECT_MASK
|
399 FUNC_CTRL_OPMODE_MASK
);
402 /* FIXME: power on defaults */
405 dev_err(twl
->dev
, "unsupported T2 transceiver mode %d\n",
411 static void twl4030_i2c_access(struct twl4030_usb
*twl
, int on
)
413 unsigned long timeout
;
414 int val
= twl4030_usb_read(twl
, PHY_CLK_CTRL
);
418 /* enable DPLL to access PHY registers over I2C */
419 val
|= REQ_PHY_DPLL_CLK
;
420 WARN_ON(twl4030_usb_write_verify(twl
, PHY_CLK_CTRL
,
423 timeout
= jiffies
+ HZ
;
424 while (!(twl4030_usb_read(twl
, PHY_CLK_CTRL_STS
) &
426 && time_before(jiffies
, timeout
))
428 if (!(twl4030_usb_read(twl
, PHY_CLK_CTRL_STS
) &
430 dev_err(twl
->dev
, "Timeout setting T2 HSUSB "
433 /* let ULPI control the DPLL clock */
434 val
&= ~REQ_PHY_DPLL_CLK
;
435 WARN_ON(twl4030_usb_write_verify(twl
, PHY_CLK_CTRL
,
441 static void twl4030_phy_power(struct twl4030_usb
*twl
, int on
)
445 pwr
= twl4030_usb_read(twl
, PHY_PWR_CTRL
);
447 regulator_enable(twl
->usb3v1
);
448 regulator_enable(twl
->usb1v8
);
450 * Disabling usb3v1 regulator (= writing 0 to VUSB3V1_DEV_GRP
451 * in twl4030) resets the VUSB_DEDICATED2 register. This reset
452 * enables VUSB3V1_SLEEP bit that remaps usb3v1 ACTIVE state to
453 * SLEEP. We work around this by clearing the bit after usv3v1
454 * is re-activated. This ensures that VUSB3V1 is really active.
456 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER
, 0,
458 regulator_enable(twl
->usb1v5
);
459 pwr
&= ~PHY_PWR_PHYPWD
;
460 WARN_ON(twl4030_usb_write_verify(twl
, PHY_PWR_CTRL
, pwr
) < 0);
461 twl4030_usb_write(twl
, PHY_CLK_CTRL
,
462 twl4030_usb_read(twl
, PHY_CLK_CTRL
) |
463 (PHY_CLK_CTRL_CLOCKGATING_EN
|
464 PHY_CLK_CTRL_CLK32K_EN
));
466 pwr
|= PHY_PWR_PHYPWD
;
467 WARN_ON(twl4030_usb_write_verify(twl
, PHY_PWR_CTRL
, pwr
) < 0);
468 regulator_disable(twl
->usb1v5
);
469 regulator_disable(twl
->usb1v8
);
470 regulator_disable(twl
->usb3v1
);
474 static void twl4030_phy_suspend(struct twl4030_usb
*twl
, int controller_off
)
479 twl4030_phy_power(twl
, 0);
483 static void twl4030_phy_resume(struct twl4030_usb
*twl
)
488 twl4030_phy_power(twl
, 1);
489 twl4030_i2c_access(twl
, 1);
490 twl4030_usb_set_mode(twl
, twl
->usb_mode
);
491 if (twl
->usb_mode
== T2_USB_MODE_ULPI
)
492 twl4030_i2c_access(twl
, 0);
496 static int twl4030_usb_ldo_init(struct twl4030_usb
*twl
)
498 /* Enable writing to power configuration registers */
499 twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER
, 0xC0, PROTECT_KEY
);
500 twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER
, 0x0C, PROTECT_KEY
);
502 /* put VUSB3V1 LDO in active state */
503 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER
, 0, VUSB_DEDICATED2
);
505 /* input to VUSB3V1 LDO is from VBAT, not VBUS */
506 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER
, 0x14, VUSB_DEDICATED1
);
508 /* Initialize 3.1V regulator */
509 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER
, 0, VUSB3V1_DEV_GRP
);
511 twl
->usb3v1
= regulator_get(twl
->dev
, "usb3v1");
512 if (IS_ERR(twl
->usb3v1
))
515 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER
, 0, VUSB3V1_TYPE
);
517 /* Initialize 1.5V regulator */
518 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER
, 0, VUSB1V5_DEV_GRP
);
520 twl
->usb1v5
= regulator_get(twl
->dev
, "usb1v5");
521 if (IS_ERR(twl
->usb1v5
))
524 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER
, 0, VUSB1V5_TYPE
);
526 /* Initialize 1.8V regulator */
527 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER
, 0, VUSB1V8_DEV_GRP
);
529 twl
->usb1v8
= regulator_get(twl
->dev
, "usb1v8");
530 if (IS_ERR(twl
->usb1v8
))
533 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER
, 0, VUSB1V8_TYPE
);
535 /* disable access to power configuration registers */
536 twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER
, 0, PROTECT_KEY
);
541 regulator_put(twl
->usb1v5
);
544 regulator_put(twl
->usb3v1
);
549 static ssize_t
twl4030_usb_vbus_show(struct device
*dev
,
550 struct device_attribute
*attr
, char *buf
)
552 struct twl4030_usb
*twl
= dev_get_drvdata(dev
);
556 spin_lock_irqsave(&twl
->lock
, flags
);
557 ret
= sprintf(buf
, "%s\n",
558 (twl
->linkstat
== USB_EVENT_VBUS
) ? "on" : "off");
559 spin_unlock_irqrestore(&twl
->lock
, flags
);
563 static DEVICE_ATTR(vbus
, 0444, twl4030_usb_vbus_show
, NULL
);
565 static irqreturn_t
twl4030_usb_irq(int irq
, void *_twl
)
567 struct twl4030_usb
*twl
= _twl
;
570 status
= twl4030_usb_linkstat(twl
);
572 /* FIXME add a set_power() method so that B-devices can
573 * configure the charger appropriately. It's not always
574 * correct to consume VBUS power, and how much current to
575 * consume is a function of the USB configuration chosen
578 * REVISIT usb_gadget_vbus_connect(...) as needed, ditto
579 * its disconnect() sibling, when changing to/from the
580 * USB_LINK_VBUS state. musb_hdrc won't care until it
581 * starts to handle softconnect right.
583 if (status
== USB_EVENT_NONE
)
584 twl4030_phy_suspend(twl
, 0);
586 twl4030_phy_resume(twl
);
588 blocking_notifier_call_chain(&twl
->otg
.notifier
, status
,
591 sysfs_notify(&twl
->dev
->kobj
, NULL
, "vbus");
596 static int twl4030_set_suspend(struct otg_transceiver
*x
, int suspend
)
598 struct twl4030_usb
*twl
= xceiv_to_twl(x
);
601 twl4030_phy_suspend(twl
, 1);
603 twl4030_phy_resume(twl
);
608 static int twl4030_set_peripheral(struct otg_transceiver
*x
,
609 struct usb_gadget
*gadget
)
611 struct twl4030_usb
*twl
;
616 twl
= xceiv_to_twl(x
);
617 twl
->otg
.gadget
= gadget
;
619 twl
->otg
.state
= OTG_STATE_UNDEFINED
;
624 static int twl4030_set_host(struct otg_transceiver
*x
, struct usb_bus
*host
)
626 struct twl4030_usb
*twl
;
631 twl
= xceiv_to_twl(x
);
632 twl
->otg
.host
= host
;
634 twl
->otg
.state
= OTG_STATE_UNDEFINED
;
639 static int __devinit
twl4030_usb_probe(struct platform_device
*pdev
)
641 struct twl4030_usb_data
*pdata
= pdev
->dev
.platform_data
;
642 struct twl4030_usb
*twl
;
646 dev_dbg(&pdev
->dev
, "platform_data not available\n");
650 twl
= kzalloc(sizeof *twl
, GFP_KERNEL
);
654 twl
->dev
= &pdev
->dev
;
655 twl
->irq
= platform_get_irq(pdev
, 0);
656 twl
->otg
.dev
= twl
->dev
;
657 twl
->otg
.label
= "twl4030";
658 twl
->otg
.set_host
= twl4030_set_host
;
659 twl
->otg
.set_peripheral
= twl4030_set_peripheral
;
660 twl
->otg
.set_suspend
= twl4030_set_suspend
;
661 twl
->usb_mode
= pdata
->usb_mode
;
664 /* init spinlock for workqueue */
665 spin_lock_init(&twl
->lock
);
667 err
= twl4030_usb_ldo_init(twl
);
669 dev_err(&pdev
->dev
, "ldo init failed\n");
673 otg_set_transceiver(&twl
->otg
);
675 platform_set_drvdata(pdev
, twl
);
676 if (device_create_file(&pdev
->dev
, &dev_attr_vbus
))
677 dev_warn(&pdev
->dev
, "could not create sysfs file\n");
679 BLOCKING_INIT_NOTIFIER_HEAD(&twl
->otg
.notifier
);
681 /* Our job is to use irqs and status from the power module
682 * to keep the transceiver disabled when nothing's connected.
684 * FIXME we actually shouldn't start enabling it until the
685 * USB controller drivers have said they're ready, by calling
686 * set_host() and/or set_peripheral() ... OTG_capable boards
687 * need both handles, otherwise just one suffices.
689 twl
->irq_enabled
= true;
690 status
= request_threaded_irq(twl
->irq
, NULL
, twl4030_usb_irq
,
691 IRQF_TRIGGER_FALLING
| IRQF_TRIGGER_RISING
,
694 dev_dbg(&pdev
->dev
, "can't get IRQ %d, err %d\n",
700 /* The IRQ handler just handles changes from the previous states
701 * of the ID and VBUS pins ... in probe() we must initialize that
702 * previous state. The easy way: fake an IRQ.
704 * REVISIT: a real IRQ might have happened already, if PREEMPT is
705 * enabled. Else the IRQ may not yet be configured or enabled,
706 * because of scheduling delays.
708 twl4030_usb_irq(twl
->irq
, twl
);
710 dev_info(&pdev
->dev
, "Initialized TWL4030 USB module\n");
714 static int __exit
twl4030_usb_remove(struct platform_device
*pdev
)
716 struct twl4030_usb
*twl
= platform_get_drvdata(pdev
);
719 free_irq(twl
->irq
, twl
);
720 device_remove_file(twl
->dev
, &dev_attr_vbus
);
722 /* set transceiver mode to power on defaults */
723 twl4030_usb_set_mode(twl
, -1);
725 /* autogate 60MHz ULPI clock,
726 * clear dpll clock request for i2c access,
729 val
= twl4030_usb_read(twl
, PHY_CLK_CTRL
);
731 val
|= PHY_CLK_CTRL_CLOCKGATING_EN
;
732 val
&= ~(PHY_CLK_CTRL_CLK32K_EN
| REQ_PHY_DPLL_CLK
);
733 twl4030_usb_write(twl
, PHY_CLK_CTRL
, (u8
)val
);
736 /* disable complete OTG block */
737 twl4030_usb_clear_bits(twl
, POWER_CTRL
, POWER_CTRL_OTG_ENAB
);
739 twl4030_phy_power(twl
, 0);
740 regulator_put(twl
->usb1v5
);
741 regulator_put(twl
->usb1v8
);
742 regulator_put(twl
->usb3v1
);
749 static struct platform_driver twl4030_usb_driver
= {
750 .probe
= twl4030_usb_probe
,
751 .remove
= __exit_p(twl4030_usb_remove
),
753 .name
= "twl4030_usb",
754 .owner
= THIS_MODULE
,
758 static int __init
twl4030_usb_init(void)
760 return platform_driver_register(&twl4030_usb_driver
);
762 subsys_initcall(twl4030_usb_init
);
764 static void __exit
twl4030_usb_exit(void)
766 platform_driver_unregister(&twl4030_usb_driver
);
768 module_exit(twl4030_usb_exit
);
770 MODULE_ALIAS("platform:twl4030_usb");
771 MODULE_AUTHOR("Texas Instruments, Inc, Nokia Corporation");
772 MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
773 MODULE_LICENSE("GPL");