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Merge branch 'master' of /home/davem/src/GIT/linux-2.6/
[deliverable/linux.git] / drivers / usb / otg / twl4030-usb.c
1 /*
2 * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
3 *
4 * Copyright (C) 2004-2007 Texas Instruments
5 * Copyright (C) 2008 Nokia Corporation
6 * Contact: Felipe Balbi <felipe.balbi@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 * Current status:
23 * - HS USB ULPI mode works.
24 * - 3-pin mode support may be added in future.
25 */
26
27 #include <linux/module.h>
28 #include <linux/init.h>
29 #include <linux/interrupt.h>
30 #include <linux/platform_device.h>
31 #include <linux/spinlock.h>
32 #include <linux/workqueue.h>
33 #include <linux/io.h>
34 #include <linux/delay.h>
35 #include <linux/usb/otg.h>
36 #include <linux/i2c/twl.h>
37 #include <linux/regulator/consumer.h>
38 #include <linux/err.h>
39 #include <linux/notifier.h>
40
41 /* Register defines */
42
43 #define VENDOR_ID_LO 0x00
44 #define VENDOR_ID_HI 0x01
45 #define PRODUCT_ID_LO 0x02
46 #define PRODUCT_ID_HI 0x03
47
48 #define FUNC_CTRL 0x04
49 #define FUNC_CTRL_SET 0x05
50 #define FUNC_CTRL_CLR 0x06
51 #define FUNC_CTRL_SUSPENDM (1 << 6)
52 #define FUNC_CTRL_RESET (1 << 5)
53 #define FUNC_CTRL_OPMODE_MASK (3 << 3) /* bits 3 and 4 */
54 #define FUNC_CTRL_OPMODE_NORMAL (0 << 3)
55 #define FUNC_CTRL_OPMODE_NONDRIVING (1 << 3)
56 #define FUNC_CTRL_OPMODE_DISABLE_BIT_NRZI (2 << 3)
57 #define FUNC_CTRL_TERMSELECT (1 << 2)
58 #define FUNC_CTRL_XCVRSELECT_MASK (3 << 0) /* bits 0 and 1 */
59 #define FUNC_CTRL_XCVRSELECT_HS (0 << 0)
60 #define FUNC_CTRL_XCVRSELECT_FS (1 << 0)
61 #define FUNC_CTRL_XCVRSELECT_LS (2 << 0)
62 #define FUNC_CTRL_XCVRSELECT_FS4LS (3 << 0)
63
64 #define IFC_CTRL 0x07
65 #define IFC_CTRL_SET 0x08
66 #define IFC_CTRL_CLR 0x09
67 #define IFC_CTRL_INTERFACE_PROTECT_DISABLE (1 << 7)
68 #define IFC_CTRL_AUTORESUME (1 << 4)
69 #define IFC_CTRL_CLOCKSUSPENDM (1 << 3)
70 #define IFC_CTRL_CARKITMODE (1 << 2)
71 #define IFC_CTRL_FSLSSERIALMODE_3PIN (1 << 1)
72
73 #define TWL4030_OTG_CTRL 0x0A
74 #define TWL4030_OTG_CTRL_SET 0x0B
75 #define TWL4030_OTG_CTRL_CLR 0x0C
76 #define TWL4030_OTG_CTRL_DRVVBUS (1 << 5)
77 #define TWL4030_OTG_CTRL_CHRGVBUS (1 << 4)
78 #define TWL4030_OTG_CTRL_DISCHRGVBUS (1 << 3)
79 #define TWL4030_OTG_CTRL_DMPULLDOWN (1 << 2)
80 #define TWL4030_OTG_CTRL_DPPULLDOWN (1 << 1)
81 #define TWL4030_OTG_CTRL_IDPULLUP (1 << 0)
82
83 #define USB_INT_EN_RISE 0x0D
84 #define USB_INT_EN_RISE_SET 0x0E
85 #define USB_INT_EN_RISE_CLR 0x0F
86 #define USB_INT_EN_FALL 0x10
87 #define USB_INT_EN_FALL_SET 0x11
88 #define USB_INT_EN_FALL_CLR 0x12
89 #define USB_INT_STS 0x13
90 #define USB_INT_LATCH 0x14
91 #define USB_INT_IDGND (1 << 4)
92 #define USB_INT_SESSEND (1 << 3)
93 #define USB_INT_SESSVALID (1 << 2)
94 #define USB_INT_VBUSVALID (1 << 1)
95 #define USB_INT_HOSTDISCONNECT (1 << 0)
96
97 #define CARKIT_CTRL 0x19
98 #define CARKIT_CTRL_SET 0x1A
99 #define CARKIT_CTRL_CLR 0x1B
100 #define CARKIT_CTRL_MICEN (1 << 6)
101 #define CARKIT_CTRL_SPKRIGHTEN (1 << 5)
102 #define CARKIT_CTRL_SPKLEFTEN (1 << 4)
103 #define CARKIT_CTRL_RXDEN (1 << 3)
104 #define CARKIT_CTRL_TXDEN (1 << 2)
105 #define CARKIT_CTRL_IDGNDDRV (1 << 1)
106 #define CARKIT_CTRL_CARKITPWR (1 << 0)
107 #define CARKIT_PLS_CTRL 0x22
108 #define CARKIT_PLS_CTRL_SET 0x23
109 #define CARKIT_PLS_CTRL_CLR 0x24
110 #define CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN (1 << 3)
111 #define CARKIT_PLS_CTRL_SPKRLEFT_BIASEN (1 << 2)
112 #define CARKIT_PLS_CTRL_RXPLSEN (1 << 1)
113 #define CARKIT_PLS_CTRL_TXPLSEN (1 << 0)
114
115 #define MCPC_CTRL 0x30
116 #define MCPC_CTRL_SET 0x31
117 #define MCPC_CTRL_CLR 0x32
118 #define MCPC_CTRL_RTSOL (1 << 7)
119 #define MCPC_CTRL_EXTSWR (1 << 6)
120 #define MCPC_CTRL_EXTSWC (1 << 5)
121 #define MCPC_CTRL_VOICESW (1 << 4)
122 #define MCPC_CTRL_OUT64K (1 << 3)
123 #define MCPC_CTRL_RTSCTSSW (1 << 2)
124 #define MCPC_CTRL_HS_UART (1 << 0)
125
126 #define MCPC_IO_CTRL 0x33
127 #define MCPC_IO_CTRL_SET 0x34
128 #define MCPC_IO_CTRL_CLR 0x35
129 #define MCPC_IO_CTRL_MICBIASEN (1 << 5)
130 #define MCPC_IO_CTRL_CTS_NPU (1 << 4)
131 #define MCPC_IO_CTRL_RXD_PU (1 << 3)
132 #define MCPC_IO_CTRL_TXDTYP (1 << 2)
133 #define MCPC_IO_CTRL_CTSTYP (1 << 1)
134 #define MCPC_IO_CTRL_RTSTYP (1 << 0)
135
136 #define MCPC_CTRL2 0x36
137 #define MCPC_CTRL2_SET 0x37
138 #define MCPC_CTRL2_CLR 0x38
139 #define MCPC_CTRL2_MCPC_CK_EN (1 << 0)
140
141 #define OTHER_FUNC_CTRL 0x80
142 #define OTHER_FUNC_CTRL_SET 0x81
143 #define OTHER_FUNC_CTRL_CLR 0x82
144 #define OTHER_FUNC_CTRL_BDIS_ACON_EN (1 << 4)
145 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE (1 << 2)
146
147 #define OTHER_IFC_CTRL 0x83
148 #define OTHER_IFC_CTRL_SET 0x84
149 #define OTHER_IFC_CTRL_CLR 0x85
150 #define OTHER_IFC_CTRL_OE_INT_EN (1 << 6)
151 #define OTHER_IFC_CTRL_CEA2011_MODE (1 << 5)
152 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN (1 << 4)
153 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT (1 << 3)
154 #define OTHER_IFC_CTRL_HIZ_ULPI (1 << 2)
155 #define OTHER_IFC_CTRL_ALT_INT_REROUTE (1 << 0)
156
157 #define OTHER_INT_EN_RISE 0x86
158 #define OTHER_INT_EN_RISE_SET 0x87
159 #define OTHER_INT_EN_RISE_CLR 0x88
160 #define OTHER_INT_EN_FALL 0x89
161 #define OTHER_INT_EN_FALL_SET 0x8A
162 #define OTHER_INT_EN_FALL_CLR 0x8B
163 #define OTHER_INT_STS 0x8C
164 #define OTHER_INT_LATCH 0x8D
165 #define OTHER_INT_VB_SESS_VLD (1 << 7)
166 #define OTHER_INT_DM_HI (1 << 6) /* not valid for "latch" reg */
167 #define OTHER_INT_DP_HI (1 << 5) /* not valid for "latch" reg */
168 #define OTHER_INT_BDIS_ACON (1 << 3) /* not valid for "fall" regs */
169 #define OTHER_INT_MANU (1 << 1)
170 #define OTHER_INT_ABNORMAL_STRESS (1 << 0)
171
172 #define ID_STATUS 0x96
173 #define ID_RES_FLOAT (1 << 4)
174 #define ID_RES_440K (1 << 3)
175 #define ID_RES_200K (1 << 2)
176 #define ID_RES_102K (1 << 1)
177 #define ID_RES_GND (1 << 0)
178
179 #define POWER_CTRL 0xAC
180 #define POWER_CTRL_SET 0xAD
181 #define POWER_CTRL_CLR 0xAE
182 #define POWER_CTRL_OTG_ENAB (1 << 5)
183
184 #define OTHER_IFC_CTRL2 0xAF
185 #define OTHER_IFC_CTRL2_SET 0xB0
186 #define OTHER_IFC_CTRL2_CLR 0xB1
187 #define OTHER_IFC_CTRL2_ULPI_STP_LOW (1 << 4)
188 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL (1 << 3)
189 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430 (1 << 2)
190 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK (3 << 0) /* bits 0 and 1 */
191 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N (0 << 0)
192 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N (1 << 0)
193
194 #define REG_CTRL_EN 0xB2
195 #define REG_CTRL_EN_SET 0xB3
196 #define REG_CTRL_EN_CLR 0xB4
197 #define REG_CTRL_ERROR 0xB5
198 #define ULPI_I2C_CONFLICT_INTEN (1 << 0)
199
200 #define OTHER_FUNC_CTRL2 0xB8
201 #define OTHER_FUNC_CTRL2_SET 0xB9
202 #define OTHER_FUNC_CTRL2_CLR 0xBA
203 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN (1 << 0)
204
205 /* following registers do not have separate _clr and _set registers */
206 #define VBUS_DEBOUNCE 0xC0
207 #define ID_DEBOUNCE 0xC1
208 #define VBAT_TIMER 0xD3
209 #define PHY_PWR_CTRL 0xFD
210 #define PHY_PWR_PHYPWD (1 << 0)
211 #define PHY_CLK_CTRL 0xFE
212 #define PHY_CLK_CTRL_CLOCKGATING_EN (1 << 2)
213 #define PHY_CLK_CTRL_CLK32K_EN (1 << 1)
214 #define REQ_PHY_DPLL_CLK (1 << 0)
215 #define PHY_CLK_CTRL_STS 0xFF
216 #define PHY_DPLL_CLK (1 << 0)
217
218 /* In module TWL4030_MODULE_PM_MASTER */
219 #define PROTECT_KEY 0x0E
220 #define STS_HW_CONDITIONS 0x0F
221
222 /* In module TWL4030_MODULE_PM_RECEIVER */
223 #define VUSB_DEDICATED1 0x7D
224 #define VUSB_DEDICATED2 0x7E
225 #define VUSB1V5_DEV_GRP 0x71
226 #define VUSB1V5_TYPE 0x72
227 #define VUSB1V5_REMAP 0x73
228 #define VUSB1V8_DEV_GRP 0x74
229 #define VUSB1V8_TYPE 0x75
230 #define VUSB1V8_REMAP 0x76
231 #define VUSB3V1_DEV_GRP 0x77
232 #define VUSB3V1_TYPE 0x78
233 #define VUSB3V1_REMAP 0x79
234
235 /* In module TWL4030_MODULE_INTBR */
236 #define PMBR1 0x0D
237 #define GPIO_USB_4PIN_ULPI_2430C (3 << 0)
238
239 struct twl4030_usb {
240 struct otg_transceiver otg;
241 struct device *dev;
242
243 /* TWL4030 internal USB regulator supplies */
244 struct regulator *usb1v5;
245 struct regulator *usb1v8;
246 struct regulator *usb3v1;
247
248 /* for vbus reporting with irqs disabled */
249 spinlock_t lock;
250
251 /* pin configuration */
252 enum twl4030_usb_mode usb_mode;
253
254 int irq;
255 u8 linkstat;
256 u8 asleep;
257 bool irq_enabled;
258 };
259
260 /* internal define on top of container_of */
261 #define xceiv_to_twl(x) container_of((x), struct twl4030_usb, otg);
262
263 /*-------------------------------------------------------------------------*/
264
265 static int twl4030_i2c_write_u8_verify(struct twl4030_usb *twl,
266 u8 module, u8 data, u8 address)
267 {
268 u8 check;
269
270 if ((twl_i2c_write_u8(module, data, address) >= 0) &&
271 (twl_i2c_read_u8(module, &check, address) >= 0) &&
272 (check == data))
273 return 0;
274 dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
275 1, module, address, check, data);
276
277 /* Failed once: Try again */
278 if ((twl_i2c_write_u8(module, data, address) >= 0) &&
279 (twl_i2c_read_u8(module, &check, address) >= 0) &&
280 (check == data))
281 return 0;
282 dev_dbg(twl->dev, "Write%d[%d,0x%x] wrote %02x but read %02x\n",
283 2, module, address, check, data);
284
285 /* Failed again: Return error */
286 return -EBUSY;
287 }
288
289 #define twl4030_usb_write_verify(twl, address, data) \
290 twl4030_i2c_write_u8_verify(twl, TWL4030_MODULE_USB, (data), (address))
291
292 static inline int twl4030_usb_write(struct twl4030_usb *twl,
293 u8 address, u8 data)
294 {
295 int ret = 0;
296
297 ret = twl_i2c_write_u8(TWL4030_MODULE_USB, data, address);
298 if (ret < 0)
299 dev_dbg(twl->dev,
300 "TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
301 return ret;
302 }
303
304 static inline int twl4030_readb(struct twl4030_usb *twl, u8 module, u8 address)
305 {
306 u8 data;
307 int ret = 0;
308
309 ret = twl_i2c_read_u8(module, &data, address);
310 if (ret >= 0)
311 ret = data;
312 else
313 dev_dbg(twl->dev,
314 "TWL4030:readb[0x%x,0x%x] Error %d\n",
315 module, address, ret);
316
317 return ret;
318 }
319
320 static inline int twl4030_usb_read(struct twl4030_usb *twl, u8 address)
321 {
322 return twl4030_readb(twl, TWL4030_MODULE_USB, address);
323 }
324
325 /*-------------------------------------------------------------------------*/
326
327 static inline int
328 twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
329 {
330 return twl4030_usb_write(twl, reg + 1, bits);
331 }
332
333 static inline int
334 twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
335 {
336 return twl4030_usb_write(twl, reg + 2, bits);
337 }
338
339 /*-------------------------------------------------------------------------*/
340
341 static enum usb_xceiv_events twl4030_usb_linkstat(struct twl4030_usb *twl)
342 {
343 int status;
344 int linkstat = USB_EVENT_NONE;
345
346 /*
347 * For ID/VBUS sensing, see manual section 15.4.8 ...
348 * except when using only battery backup power, two
349 * comparators produce VBUS_PRES and ID_PRES signals,
350 * which don't match docs elsewhere. But ... BIT(7)
351 * and BIT(2) of STS_HW_CONDITIONS, respectively, do
352 * seem to match up. If either is true the USB_PRES
353 * signal is active, the OTG module is activated, and
354 * its interrupt may be raised (may wake the system).
355 */
356 status = twl4030_readb(twl, TWL4030_MODULE_PM_MASTER,
357 STS_HW_CONDITIONS);
358 if (status < 0)
359 dev_err(twl->dev, "USB link status err %d\n", status);
360 else if (status & (BIT(7) | BIT(2))) {
361 if (status & BIT(2))
362 linkstat = USB_EVENT_ID;
363 else
364 linkstat = USB_EVENT_VBUS;
365 } else
366 linkstat = USB_EVENT_NONE;
367
368 dev_dbg(twl->dev, "HW_CONDITIONS 0x%02x/%d; link %d\n",
369 status, status, linkstat);
370
371 /* REVISIT this assumes host and peripheral controllers
372 * are registered, and that both are active...
373 */
374
375 spin_lock_irq(&twl->lock);
376 twl->linkstat = linkstat;
377 if (linkstat == USB_EVENT_ID) {
378 twl->otg.default_a = true;
379 twl->otg.state = OTG_STATE_A_IDLE;
380 } else {
381 twl->otg.default_a = false;
382 twl->otg.state = OTG_STATE_B_IDLE;
383 }
384 spin_unlock_irq(&twl->lock);
385
386 return linkstat;
387 }
388
389 static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode)
390 {
391 twl->usb_mode = mode;
392
393 switch (mode) {
394 case T2_USB_MODE_ULPI:
395 twl4030_usb_clear_bits(twl, IFC_CTRL, IFC_CTRL_CARKITMODE);
396 twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
397 twl4030_usb_clear_bits(twl, FUNC_CTRL,
398 FUNC_CTRL_XCVRSELECT_MASK |
399 FUNC_CTRL_OPMODE_MASK);
400 break;
401 case -1:
402 /* FIXME: power on defaults */
403 break;
404 default:
405 dev_err(twl->dev, "unsupported T2 transceiver mode %d\n",
406 mode);
407 break;
408 };
409 }
410
411 static void twl4030_i2c_access(struct twl4030_usb *twl, int on)
412 {
413 unsigned long timeout;
414 int val = twl4030_usb_read(twl, PHY_CLK_CTRL);
415
416 if (val >= 0) {
417 if (on) {
418 /* enable DPLL to access PHY registers over I2C */
419 val |= REQ_PHY_DPLL_CLK;
420 WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
421 (u8)val) < 0);
422
423 timeout = jiffies + HZ;
424 while (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
425 PHY_DPLL_CLK)
426 && time_before(jiffies, timeout))
427 udelay(10);
428 if (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
429 PHY_DPLL_CLK))
430 dev_err(twl->dev, "Timeout setting T2 HSUSB "
431 "PHY DPLL clock\n");
432 } else {
433 /* let ULPI control the DPLL clock */
434 val &= ~REQ_PHY_DPLL_CLK;
435 WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
436 (u8)val) < 0);
437 }
438 }
439 }
440
441 static void twl4030_phy_power(struct twl4030_usb *twl, int on)
442 {
443 u8 pwr;
444
445 pwr = twl4030_usb_read(twl, PHY_PWR_CTRL);
446 if (on) {
447 regulator_enable(twl->usb3v1);
448 regulator_enable(twl->usb1v8);
449 /*
450 * Disabling usb3v1 regulator (= writing 0 to VUSB3V1_DEV_GRP
451 * in twl4030) resets the VUSB_DEDICATED2 register. This reset
452 * enables VUSB3V1_SLEEP bit that remaps usb3v1 ACTIVE state to
453 * SLEEP. We work around this by clearing the bit after usv3v1
454 * is re-activated. This ensures that VUSB3V1 is really active.
455 */
456 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0,
457 VUSB_DEDICATED2);
458 regulator_enable(twl->usb1v5);
459 pwr &= ~PHY_PWR_PHYPWD;
460 WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
461 twl4030_usb_write(twl, PHY_CLK_CTRL,
462 twl4030_usb_read(twl, PHY_CLK_CTRL) |
463 (PHY_CLK_CTRL_CLOCKGATING_EN |
464 PHY_CLK_CTRL_CLK32K_EN));
465 } else {
466 pwr |= PHY_PWR_PHYPWD;
467 WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
468 regulator_disable(twl->usb1v5);
469 regulator_disable(twl->usb1v8);
470 regulator_disable(twl->usb3v1);
471 }
472 }
473
474 static void twl4030_phy_suspend(struct twl4030_usb *twl, int controller_off)
475 {
476 if (twl->asleep)
477 return;
478
479 twl4030_phy_power(twl, 0);
480 twl->asleep = 1;
481 }
482
483 static void twl4030_phy_resume(struct twl4030_usb *twl)
484 {
485 if (!twl->asleep)
486 return;
487
488 twl4030_phy_power(twl, 1);
489 twl4030_i2c_access(twl, 1);
490 twl4030_usb_set_mode(twl, twl->usb_mode);
491 if (twl->usb_mode == T2_USB_MODE_ULPI)
492 twl4030_i2c_access(twl, 0);
493 twl->asleep = 0;
494 }
495
496 static int twl4030_usb_ldo_init(struct twl4030_usb *twl)
497 {
498 /* Enable writing to power configuration registers */
499 twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0xC0, PROTECT_KEY);
500 twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0x0C, PROTECT_KEY);
501
502 /* put VUSB3V1 LDO in active state */
503 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);
504
505 /* input to VUSB3V1 LDO is from VBAT, not VBUS */
506 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1);
507
508 /* Initialize 3.1V regulator */
509 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB3V1_DEV_GRP);
510
511 twl->usb3v1 = regulator_get(twl->dev, "usb3v1");
512 if (IS_ERR(twl->usb3v1))
513 return -ENODEV;
514
515 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE);
516
517 /* Initialize 1.5V regulator */
518 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V5_DEV_GRP);
519
520 twl->usb1v5 = regulator_get(twl->dev, "usb1v5");
521 if (IS_ERR(twl->usb1v5))
522 goto fail1;
523
524 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE);
525
526 /* Initialize 1.8V regulator */
527 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_DEV_GRP);
528
529 twl->usb1v8 = regulator_get(twl->dev, "usb1v8");
530 if (IS_ERR(twl->usb1v8))
531 goto fail2;
532
533 twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE);
534
535 /* disable access to power configuration registers */
536 twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0, PROTECT_KEY);
537
538 return 0;
539
540 fail2:
541 regulator_put(twl->usb1v5);
542 twl->usb1v5 = NULL;
543 fail1:
544 regulator_put(twl->usb3v1);
545 twl->usb3v1 = NULL;
546 return -ENODEV;
547 }
548
549 static ssize_t twl4030_usb_vbus_show(struct device *dev,
550 struct device_attribute *attr, char *buf)
551 {
552 struct twl4030_usb *twl = dev_get_drvdata(dev);
553 unsigned long flags;
554 int ret = -EINVAL;
555
556 spin_lock_irqsave(&twl->lock, flags);
557 ret = sprintf(buf, "%s\n",
558 (twl->linkstat == USB_EVENT_VBUS) ? "on" : "off");
559 spin_unlock_irqrestore(&twl->lock, flags);
560
561 return ret;
562 }
563 static DEVICE_ATTR(vbus, 0444, twl4030_usb_vbus_show, NULL);
564
565 static irqreturn_t twl4030_usb_irq(int irq, void *_twl)
566 {
567 struct twl4030_usb *twl = _twl;
568 int status;
569
570 status = twl4030_usb_linkstat(twl);
571 if (status >= 0) {
572 /* FIXME add a set_power() method so that B-devices can
573 * configure the charger appropriately. It's not always
574 * correct to consume VBUS power, and how much current to
575 * consume is a function of the USB configuration chosen
576 * by the host.
577 *
578 * REVISIT usb_gadget_vbus_connect(...) as needed, ditto
579 * its disconnect() sibling, when changing to/from the
580 * USB_LINK_VBUS state. musb_hdrc won't care until it
581 * starts to handle softconnect right.
582 */
583 if (status == USB_EVENT_NONE)
584 twl4030_phy_suspend(twl, 0);
585 else
586 twl4030_phy_resume(twl);
587
588 blocking_notifier_call_chain(&twl->otg.notifier, status,
589 twl->otg.gadget);
590 }
591 sysfs_notify(&twl->dev->kobj, NULL, "vbus");
592
593 return IRQ_HANDLED;
594 }
595
596 static int twl4030_set_suspend(struct otg_transceiver *x, int suspend)
597 {
598 struct twl4030_usb *twl = xceiv_to_twl(x);
599
600 if (suspend)
601 twl4030_phy_suspend(twl, 1);
602 else
603 twl4030_phy_resume(twl);
604
605 return 0;
606 }
607
608 static int twl4030_set_peripheral(struct otg_transceiver *x,
609 struct usb_gadget *gadget)
610 {
611 struct twl4030_usb *twl;
612
613 if (!x)
614 return -ENODEV;
615
616 twl = xceiv_to_twl(x);
617 twl->otg.gadget = gadget;
618 if (!gadget)
619 twl->otg.state = OTG_STATE_UNDEFINED;
620
621 return 0;
622 }
623
624 static int twl4030_set_host(struct otg_transceiver *x, struct usb_bus *host)
625 {
626 struct twl4030_usb *twl;
627
628 if (!x)
629 return -ENODEV;
630
631 twl = xceiv_to_twl(x);
632 twl->otg.host = host;
633 if (!host)
634 twl->otg.state = OTG_STATE_UNDEFINED;
635
636 return 0;
637 }
638
639 static int __devinit twl4030_usb_probe(struct platform_device *pdev)
640 {
641 struct twl4030_usb_data *pdata = pdev->dev.platform_data;
642 struct twl4030_usb *twl;
643 int status, err;
644
645 if (!pdata) {
646 dev_dbg(&pdev->dev, "platform_data not available\n");
647 return -EINVAL;
648 }
649
650 twl = kzalloc(sizeof *twl, GFP_KERNEL);
651 if (!twl)
652 return -ENOMEM;
653
654 twl->dev = &pdev->dev;
655 twl->irq = platform_get_irq(pdev, 0);
656 twl->otg.dev = twl->dev;
657 twl->otg.label = "twl4030";
658 twl->otg.set_host = twl4030_set_host;
659 twl->otg.set_peripheral = twl4030_set_peripheral;
660 twl->otg.set_suspend = twl4030_set_suspend;
661 twl->usb_mode = pdata->usb_mode;
662 twl->asleep = 1;
663
664 /* init spinlock for workqueue */
665 spin_lock_init(&twl->lock);
666
667 err = twl4030_usb_ldo_init(twl);
668 if (err) {
669 dev_err(&pdev->dev, "ldo init failed\n");
670 kfree(twl);
671 return err;
672 }
673 otg_set_transceiver(&twl->otg);
674
675 platform_set_drvdata(pdev, twl);
676 if (device_create_file(&pdev->dev, &dev_attr_vbus))
677 dev_warn(&pdev->dev, "could not create sysfs file\n");
678
679 BLOCKING_INIT_NOTIFIER_HEAD(&twl->otg.notifier);
680
681 /* Our job is to use irqs and status from the power module
682 * to keep the transceiver disabled when nothing's connected.
683 *
684 * FIXME we actually shouldn't start enabling it until the
685 * USB controller drivers have said they're ready, by calling
686 * set_host() and/or set_peripheral() ... OTG_capable boards
687 * need both handles, otherwise just one suffices.
688 */
689 twl->irq_enabled = true;
690 status = request_threaded_irq(twl->irq, NULL, twl4030_usb_irq,
691 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
692 "twl4030_usb", twl);
693 if (status < 0) {
694 dev_dbg(&pdev->dev, "can't get IRQ %d, err %d\n",
695 twl->irq, status);
696 kfree(twl);
697 return status;
698 }
699
700 /* The IRQ handler just handles changes from the previous states
701 * of the ID and VBUS pins ... in probe() we must initialize that
702 * previous state. The easy way: fake an IRQ.
703 *
704 * REVISIT: a real IRQ might have happened already, if PREEMPT is
705 * enabled. Else the IRQ may not yet be configured or enabled,
706 * because of scheduling delays.
707 */
708 twl4030_usb_irq(twl->irq, twl);
709
710 dev_info(&pdev->dev, "Initialized TWL4030 USB module\n");
711 return 0;
712 }
713
714 static int __exit twl4030_usb_remove(struct platform_device *pdev)
715 {
716 struct twl4030_usb *twl = platform_get_drvdata(pdev);
717 int val;
718
719 free_irq(twl->irq, twl);
720 device_remove_file(twl->dev, &dev_attr_vbus);
721
722 /* set transceiver mode to power on defaults */
723 twl4030_usb_set_mode(twl, -1);
724
725 /* autogate 60MHz ULPI clock,
726 * clear dpll clock request for i2c access,
727 * disable 32KHz
728 */
729 val = twl4030_usb_read(twl, PHY_CLK_CTRL);
730 if (val >= 0) {
731 val |= PHY_CLK_CTRL_CLOCKGATING_EN;
732 val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK);
733 twl4030_usb_write(twl, PHY_CLK_CTRL, (u8)val);
734 }
735
736 /* disable complete OTG block */
737 twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
738
739 twl4030_phy_power(twl, 0);
740 regulator_put(twl->usb1v5);
741 regulator_put(twl->usb1v8);
742 regulator_put(twl->usb3v1);
743
744 kfree(twl);
745
746 return 0;
747 }
748
749 static struct platform_driver twl4030_usb_driver = {
750 .probe = twl4030_usb_probe,
751 .remove = __exit_p(twl4030_usb_remove),
752 .driver = {
753 .name = "twl4030_usb",
754 .owner = THIS_MODULE,
755 },
756 };
757
758 static int __init twl4030_usb_init(void)
759 {
760 return platform_driver_register(&twl4030_usb_driver);
761 }
762 subsys_initcall(twl4030_usb_init);
763
764 static void __exit twl4030_usb_exit(void)
765 {
766 platform_driver_unregister(&twl4030_usb_driver);
767 }
768 module_exit(twl4030_usb_exit);
769
770 MODULE_ALIAS("platform:twl4030_usb");
771 MODULE_AUTHOR("Texas Instruments, Inc, Nokia Corporation");
772 MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
773 MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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