2 * Driver for AT91/AT32 LCD Controller
4 * Copyright (C) 2007 Atmel Corporation
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
21 #include <asm/arch/board.h>
22 #include <asm/arch/cpu.h>
23 #include <asm/arch/gpio.h>
25 #include <video/atmel_lcdc.h>
27 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
28 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
30 /* configurable parameters */
31 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
32 #define ATMEL_LCDC_DMA_BURST_LEN 8
34 #if defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91CAP9)
35 #define ATMEL_LCDC_FIFO_SIZE 2048
37 #define ATMEL_LCDC_FIFO_SIZE 512
40 #if defined(CONFIG_ARCH_AT91)
41 #define ATMEL_LCDFB_FBINFO_DEFAULT FBINFO_DEFAULT
43 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info
*sinfo
,
44 struct fb_var_screeninfo
*var
)
48 #elif defined(CONFIG_AVR32)
49 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
50 | FBINFO_PARTIAL_PAN_OK \
51 | FBINFO_HWACCEL_XPAN \
52 | FBINFO_HWACCEL_YPAN)
54 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info
*sinfo
,
55 struct fb_var_screeninfo
*var
)
60 pixeloff
= (var
->xoffset
* var
->bits_per_pixel
) & 0x1f;
62 dma2dcfg
= ((var
->xres_virtual
- var
->xres
) * var
->bits_per_pixel
) / 8;
63 dma2dcfg
|= pixeloff
<< ATMEL_LCDC_PIXELOFF_OFFSET
;
64 lcdc_writel(sinfo
, ATMEL_LCDC_DMA2DCFG
, dma2dcfg
);
66 /* Update configuration */
67 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
,
68 lcdc_readl(sinfo
, ATMEL_LCDC_DMACON
)
69 | ATMEL_LCDC_DMAUPDT
);
73 static const u32 contrast_ctr
= ATMEL_LCDC_PS_DIV8
74 | ATMEL_LCDC_POL_POSITIVE
75 | ATMEL_LCDC_ENA_PWMENABLE
;
77 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
79 /* some bl->props field just changed */
80 static int atmel_bl_update_status(struct backlight_device
*bl
)
82 struct atmel_lcdfb_info
*sinfo
= bl_get_data(bl
);
83 int power
= sinfo
->bl_power
;
84 int brightness
= bl
->props
.brightness
;
86 /* REVISIT there may be a meaningful difference between
87 * fb_blank and power ... there seem to be some cases
88 * this doesn't handle correctly.
90 if (bl
->props
.fb_blank
!= sinfo
->bl_power
)
91 power
= bl
->props
.fb_blank
;
92 else if (bl
->props
.power
!= sinfo
->bl_power
)
93 power
= bl
->props
.power
;
95 if (brightness
< 0 && power
== FB_BLANK_UNBLANK
)
96 brightness
= lcdc_readl(sinfo
, ATMEL_LCDC_CONTRAST_VAL
);
97 else if (power
!= FB_BLANK_UNBLANK
)
100 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_VAL
, brightness
);
101 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
,
102 brightness
? contrast_ctr
: 0);
104 bl
->props
.fb_blank
= bl
->props
.power
= sinfo
->bl_power
= power
;
109 static int atmel_bl_get_brightness(struct backlight_device
*bl
)
111 struct atmel_lcdfb_info
*sinfo
= bl_get_data(bl
);
113 return lcdc_readl(sinfo
, ATMEL_LCDC_CONTRAST_VAL
);
116 static struct backlight_ops atmel_lcdc_bl_ops
= {
117 .update_status
= atmel_bl_update_status
,
118 .get_brightness
= atmel_bl_get_brightness
,
121 static void init_backlight(struct atmel_lcdfb_info
*sinfo
)
123 struct backlight_device
*bl
;
125 sinfo
->bl_power
= FB_BLANK_UNBLANK
;
127 if (sinfo
->backlight
)
130 bl
= backlight_device_register("backlight", &sinfo
->pdev
->dev
,
131 sinfo
, &atmel_lcdc_bl_ops
);
132 if (IS_ERR(sinfo
->backlight
)) {
133 dev_err(&sinfo
->pdev
->dev
, "error %ld on backlight register\n",
137 sinfo
->backlight
= bl
;
139 bl
->props
.power
= FB_BLANK_UNBLANK
;
140 bl
->props
.fb_blank
= FB_BLANK_UNBLANK
;
141 bl
->props
.max_brightness
= 0xff;
142 bl
->props
.brightness
= atmel_bl_get_brightness(bl
);
145 static void exit_backlight(struct atmel_lcdfb_info
*sinfo
)
147 if (sinfo
->backlight
)
148 backlight_device_unregister(sinfo
->backlight
);
153 static void init_backlight(struct atmel_lcdfb_info
*sinfo
)
155 dev_warn(&sinfo
->pdev
->dev
, "backlight control is not available\n");
158 static void exit_backlight(struct atmel_lcdfb_info
*sinfo
)
164 static void init_contrast(struct atmel_lcdfb_info
*sinfo
)
166 /* have some default contrast/backlight settings */
167 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_CTR
, contrast_ctr
);
168 lcdc_writel(sinfo
, ATMEL_LCDC_CONTRAST_VAL
, ATMEL_LCDC_CVAL_DEFAULT
);
170 if (sinfo
->lcdcon_is_backlight
)
171 init_backlight(sinfo
);
175 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata
= {
176 .type
= FB_TYPE_PACKED_PIXELS
,
177 .visual
= FB_VISUAL_TRUECOLOR
,
181 .accel
= FB_ACCEL_NONE
,
184 static unsigned long compute_hozval(unsigned long xres
, unsigned long lcdcon2
)
188 if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000()))
192 if ((lcdcon2
& ATMEL_LCDC_DISTYPE
) != ATMEL_LCDC_DISTYPE_TFT
) {
194 if ((lcdcon2
& ATMEL_LCDC_DISTYPE
) == ATMEL_LCDC_DISTYPE_STNCOLOR
) {
197 if ( (lcdcon2
& ATMEL_LCDC_IFWIDTH
) == ATMEL_LCDC_IFWIDTH_4
198 || ( (lcdcon2
& ATMEL_LCDC_IFWIDTH
) == ATMEL_LCDC_IFWIDTH_8
199 && (lcdcon2
& ATMEL_LCDC_SCANMOD
) == ATMEL_LCDC_SCANMOD_DUAL
))
200 value
= DIV_ROUND_UP(value
, 4);
202 value
= DIV_ROUND_UP(value
, 8);
208 static void atmel_lcdfb_update_dma(struct fb_info
*info
,
209 struct fb_var_screeninfo
*var
)
211 struct atmel_lcdfb_info
*sinfo
= info
->par
;
212 struct fb_fix_screeninfo
*fix
= &info
->fix
;
213 unsigned long dma_addr
;
215 dma_addr
= (fix
->smem_start
+ var
->yoffset
* fix
->line_length
216 + var
->xoffset
* var
->bits_per_pixel
/ 8);
220 /* Set framebuffer DMA base address and pixel offset */
221 lcdc_writel(sinfo
, ATMEL_LCDC_DMABADDR1
, dma_addr
);
223 atmel_lcdfb_update_dma2d(sinfo
, var
);
226 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info
*sinfo
)
228 struct fb_info
*info
= sinfo
->info
;
230 dma_free_writecombine(info
->device
, info
->fix
.smem_len
,
231 info
->screen_base
, info
->fix
.smem_start
);
235 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
236 * @sinfo: the frame buffer to allocate memory for
238 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info
*sinfo
)
240 struct fb_info
*info
= sinfo
->info
;
241 struct fb_var_screeninfo
*var
= &info
->var
;
243 info
->fix
.smem_len
= (var
->xres_virtual
* var
->yres_virtual
244 * ((var
->bits_per_pixel
+ 7) / 8));
246 info
->screen_base
= dma_alloc_writecombine(info
->device
, info
->fix
.smem_len
,
247 (dma_addr_t
*)&info
->fix
.smem_start
, GFP_KERNEL
);
249 if (!info
->screen_base
) {
253 memset(info
->screen_base
, 0, info
->fix
.smem_len
);
259 * atmel_lcdfb_check_var - Validates a var passed in.
260 * @var: frame buffer variable screen structure
261 * @info: frame buffer structure that represents a single frame buffer
263 * Checks to see if the hardware supports the state requested by
264 * var passed in. This function does not alter the hardware
265 * state!!! This means the data stored in struct fb_info and
266 * struct atmel_lcdfb_info do not change. This includes the var
267 * inside of struct fb_info. Do NOT change these. This function
268 * can be called on its own if we intent to only test a mode and
269 * not actually set it. The stuff in modedb.c is a example of
270 * this. If the var passed in is slightly off by what the
271 * hardware can support then we alter the var PASSED in to what
272 * we can do. If the hardware doesn't support mode change a
273 * -EINVAL will be returned by the upper layers. You don't need
274 * to implement this function then. If you hardware doesn't
275 * support changing the resolution then this function is not
276 * needed. In this case the driver would just provide a var that
277 * represents the static state the screen is in.
279 * Returns negative errno on error, or zero on success.
281 static int atmel_lcdfb_check_var(struct fb_var_screeninfo
*var
,
282 struct fb_info
*info
)
284 struct device
*dev
= info
->device
;
285 struct atmel_lcdfb_info
*sinfo
= info
->par
;
286 unsigned long clk_value_khz
;
288 clk_value_khz
= clk_get_rate(sinfo
->lcdc_clk
) / 1000;
290 dev_dbg(dev
, "%s:\n", __func__
);
291 dev_dbg(dev
, " resolution: %ux%u\n", var
->xres
, var
->yres
);
292 dev_dbg(dev
, " pixclk: %lu KHz\n", PICOS2KHZ(var
->pixclock
));
293 dev_dbg(dev
, " bpp: %u\n", var
->bits_per_pixel
);
294 dev_dbg(dev
, " clk: %lu KHz\n", clk_value_khz
);
296 if ((PICOS2KHZ(var
->pixclock
) * var
->bits_per_pixel
/ 8) > clk_value_khz
) {
297 dev_err(dev
, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var
->pixclock
));
301 /* Force same alignment for each line */
302 var
->xres
= (var
->xres
+ 3) & ~3UL;
303 var
->xres_virtual
= (var
->xres_virtual
+ 3) & ~3UL;
305 var
->red
.msb_right
= var
->green
.msb_right
= var
->blue
.msb_right
= 0;
306 var
->transp
.msb_right
= 0;
307 var
->transp
.offset
= var
->transp
.length
= 0;
308 var
->xoffset
= var
->yoffset
= 0;
310 /* Saturate vertical and horizontal timings at maximum values */
311 var
->vsync_len
= min_t(u32
, var
->vsync_len
,
312 (ATMEL_LCDC_VPW
>> ATMEL_LCDC_VPW_OFFSET
) + 1);
313 var
->upper_margin
= min_t(u32
, var
->upper_margin
,
314 ATMEL_LCDC_VBP
>> ATMEL_LCDC_VBP_OFFSET
);
315 var
->lower_margin
= min_t(u32
, var
->lower_margin
,
317 var
->right_margin
= min_t(u32
, var
->right_margin
,
318 (ATMEL_LCDC_HFP
>> ATMEL_LCDC_HFP_OFFSET
) + 1);
319 var
->hsync_len
= min_t(u32
, var
->hsync_len
,
320 (ATMEL_LCDC_HPW
>> ATMEL_LCDC_HPW_OFFSET
) + 1);
321 var
->left_margin
= min_t(u32
, var
->left_margin
,
324 /* Some parameters can't be zero */
325 var
->vsync_len
= max_t(u32
, var
->vsync_len
, 1);
326 var
->right_margin
= max_t(u32
, var
->right_margin
, 1);
327 var
->hsync_len
= max_t(u32
, var
->hsync_len
, 1);
328 var
->left_margin
= max_t(u32
, var
->left_margin
, 1);
330 switch (var
->bits_per_pixel
) {
335 var
->red
.offset
= var
->green
.offset
= var
->blue
.offset
= 0;
336 var
->red
.length
= var
->green
.length
= var
->blue
.length
337 = var
->bits_per_pixel
;
342 var
->green
.offset
= 5;
343 var
->blue
.offset
= 10;
344 var
->red
.length
= var
->green
.length
= var
->blue
.length
= 5;
347 var
->transp
.offset
= 24;
348 var
->transp
.length
= 8;
352 var
->green
.offset
= 8;
353 var
->blue
.offset
= 16;
354 var
->red
.length
= var
->green
.length
= var
->blue
.length
= 8;
357 dev_err(dev
, "color depth %d not supported\n",
358 var
->bits_per_pixel
);
366 * atmel_lcdfb_set_par - Alters the hardware state.
367 * @info: frame buffer structure that represents a single frame buffer
369 * Using the fb_var_screeninfo in fb_info we set the resolution
370 * of the this particular framebuffer. This function alters the
371 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
372 * not alter var in fb_info since we are using that data. This
373 * means we depend on the data in var inside fb_info to be
374 * supported by the hardware. atmel_lcdfb_check_var is always called
375 * before atmel_lcdfb_set_par to ensure this. Again if you can't
376 * change the resolution you don't need this function.
379 static int atmel_lcdfb_set_par(struct fb_info
*info
)
381 struct atmel_lcdfb_info
*sinfo
= info
->par
;
382 unsigned long hozval_linesz
;
384 unsigned long clk_value_khz
;
385 unsigned long bits_per_line
;
387 dev_dbg(info
->device
, "%s:\n", __func__
);
388 dev_dbg(info
->device
, " * resolution: %ux%u (%ux%u virtual)\n",
389 info
->var
.xres
, info
->var
.yres
,
390 info
->var
.xres_virtual
, info
->var
.yres_virtual
);
392 /* Turn off the LCD controller and the DMA controller */
393 lcdc_writel(sinfo
, ATMEL_LCDC_PWRCON
, sinfo
->guard_time
<< ATMEL_LCDC_GUARDT_OFFSET
);
395 /* Wait for the LCDC core to become idle */
396 while (lcdc_readl(sinfo
, ATMEL_LCDC_PWRCON
) & ATMEL_LCDC_BUSY
)
399 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
, 0);
401 if (info
->var
.bits_per_pixel
== 1)
402 info
->fix
.visual
= FB_VISUAL_MONO01
;
403 else if (info
->var
.bits_per_pixel
<= 8)
404 info
->fix
.visual
= FB_VISUAL_PSEUDOCOLOR
;
406 info
->fix
.visual
= FB_VISUAL_TRUECOLOR
;
408 bits_per_line
= info
->var
.xres_virtual
* info
->var
.bits_per_pixel
;
409 info
->fix
.line_length
= DIV_ROUND_UP(bits_per_line
, 8);
411 /* Re-initialize the DMA engine... */
412 dev_dbg(info
->device
, " * update DMA engine\n");
413 atmel_lcdfb_update_dma(info
, &info
->var
);
415 /* ...set frame size and burst length = 8 words (?) */
416 value
= (info
->var
.yres
* info
->var
.xres
* info
->var
.bits_per_pixel
) / 32;
417 value
|= ((ATMEL_LCDC_DMA_BURST_LEN
- 1) << ATMEL_LCDC_BLENGTH_OFFSET
);
418 lcdc_writel(sinfo
, ATMEL_LCDC_DMAFRMCFG
, value
);
420 /* Now, the LCDC core... */
422 /* Set pixel clock */
423 clk_value_khz
= clk_get_rate(sinfo
->lcdc_clk
) / 1000;
425 value
= DIV_ROUND_UP(clk_value_khz
, PICOS2KHZ(info
->var
.pixclock
));
427 value
= (value
/ 2) - 1;
428 dev_dbg(info
->device
, " * programming CLKVAL = 0x%08lx\n", value
);
431 dev_notice(info
->device
, "Bypassing pixel clock divider\n");
432 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON1
, ATMEL_LCDC_BYPASS
);
434 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON1
, value
<< ATMEL_LCDC_CLKVAL_OFFSET
);
435 info
->var
.pixclock
= KHZ2PICOS(clk_value_khz
/ (2 * (value
+ 1)));
436 dev_dbg(info
->device
, " updated pixclk: %lu KHz\n",
437 PICOS2KHZ(info
->var
.pixclock
));
441 /* Initialize control register 2 */
442 value
= sinfo
->default_lcdcon2
;
444 if (!(info
->var
.sync
& FB_SYNC_HOR_HIGH_ACT
))
445 value
|= ATMEL_LCDC_INVLINE_INVERTED
;
446 if (!(info
->var
.sync
& FB_SYNC_VERT_HIGH_ACT
))
447 value
|= ATMEL_LCDC_INVFRAME_INVERTED
;
449 switch (info
->var
.bits_per_pixel
) {
450 case 1: value
|= ATMEL_LCDC_PIXELSIZE_1
; break;
451 case 2: value
|= ATMEL_LCDC_PIXELSIZE_2
; break;
452 case 4: value
|= ATMEL_LCDC_PIXELSIZE_4
; break;
453 case 8: value
|= ATMEL_LCDC_PIXELSIZE_8
; break;
454 case 15: /* fall through */
455 case 16: value
|= ATMEL_LCDC_PIXELSIZE_16
; break;
456 case 24: value
|= ATMEL_LCDC_PIXELSIZE_24
; break;
457 case 32: value
|= ATMEL_LCDC_PIXELSIZE_32
; break;
458 default: BUG(); break;
460 dev_dbg(info
->device
, " * LCDCON2 = %08lx\n", value
);
461 lcdc_writel(sinfo
, ATMEL_LCDC_LCDCON2
, value
);
463 /* Vertical timing */
464 value
= (info
->var
.vsync_len
- 1) << ATMEL_LCDC_VPW_OFFSET
;
465 value
|= info
->var
.upper_margin
<< ATMEL_LCDC_VBP_OFFSET
;
466 value
|= info
->var
.lower_margin
;
467 dev_dbg(info
->device
, " * LCDTIM1 = %08lx\n", value
);
468 lcdc_writel(sinfo
, ATMEL_LCDC_TIM1
, value
);
470 /* Horizontal timing */
471 value
= (info
->var
.right_margin
- 1) << ATMEL_LCDC_HFP_OFFSET
;
472 value
|= (info
->var
.hsync_len
- 1) << ATMEL_LCDC_HPW_OFFSET
;
473 value
|= (info
->var
.left_margin
- 1);
474 dev_dbg(info
->device
, " * LCDTIM2 = %08lx\n", value
);
475 lcdc_writel(sinfo
, ATMEL_LCDC_TIM2
, value
);
477 /* Horizontal value (aka line size) */
478 hozval_linesz
= compute_hozval(info
->var
.xres
,
479 lcdc_readl(sinfo
, ATMEL_LCDC_LCDCON2
));
482 value
= (hozval_linesz
- 1) << ATMEL_LCDC_HOZVAL_OFFSET
;
483 value
|= info
->var
.yres
- 1;
484 dev_dbg(info
->device
, " * LCDFRMCFG = %08lx\n", value
);
485 lcdc_writel(sinfo
, ATMEL_LCDC_LCDFRMCFG
, value
);
487 /* FIFO Threshold: Use formula from data sheet */
488 value
= ATMEL_LCDC_FIFO_SIZE
- (2 * ATMEL_LCDC_DMA_BURST_LEN
+ 3);
489 lcdc_writel(sinfo
, ATMEL_LCDC_FIFO
, value
);
491 /* Toggle LCD_MODE every frame */
492 lcdc_writel(sinfo
, ATMEL_LCDC_MVAL
, 0);
494 /* Disable all interrupts */
495 lcdc_writel(sinfo
, ATMEL_LCDC_IDR
, ~0UL);
497 /* ...wait for DMA engine to become idle... */
498 while (lcdc_readl(sinfo
, ATMEL_LCDC_DMACON
) & ATMEL_LCDC_DMABUSY
)
501 dev_dbg(info
->device
, " * re-enable DMA engine\n");
502 /* ...and enable it with updated configuration */
503 lcdc_writel(sinfo
, ATMEL_LCDC_DMACON
, sinfo
->default_dmacon
);
505 dev_dbg(info
->device
, " * re-enable LCDC core\n");
506 lcdc_writel(sinfo
, ATMEL_LCDC_PWRCON
,
507 (sinfo
->guard_time
<< ATMEL_LCDC_GUARDT_OFFSET
) | ATMEL_LCDC_PWR
);
509 dev_dbg(info
->device
, " * DONE\n");
514 static inline unsigned int chan_to_field(unsigned int chan
, const struct fb_bitfield
*bf
)
517 chan
>>= 16 - bf
->length
;
518 return chan
<< bf
->offset
;
522 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
523 * @regno: Which register in the CLUT we are programming
524 * @red: The red value which can be up to 16 bits wide
525 * @green: The green value which can be up to 16 bits wide
526 * @blue: The blue value which can be up to 16 bits wide.
527 * @transp: If supported the alpha value which can be up to 16 bits wide.
528 * @info: frame buffer info structure
530 * Set a single color register. The values supplied have a 16 bit
531 * magnitude which needs to be scaled in this function for the hardware.
532 * Things to take into consideration are how many color registers, if
533 * any, are supported with the current color visual. With truecolor mode
534 * no color palettes are supported. Here a psuedo palette is created
535 * which we store the value in pseudo_palette in struct fb_info. For
536 * pseudocolor mode we have a limited color palette. To deal with this
537 * we can program what color is displayed for a particular pixel value.
538 * DirectColor is similar in that we can program each color field. If
539 * we have a static colormap we don't need to implement this function.
541 * Returns negative errno on error, or zero on success. In an
542 * ideal world, this would have been the case, but as it turns
543 * out, the other drivers return 1 on failure, so that's what
546 static int atmel_lcdfb_setcolreg(unsigned int regno
, unsigned int red
,
547 unsigned int green
, unsigned int blue
,
548 unsigned int transp
, struct fb_info
*info
)
550 struct atmel_lcdfb_info
*sinfo
= info
->par
;
555 if (info
->var
.grayscale
)
556 red
= green
= blue
= (19595 * red
+ 38470 * green
557 + 7471 * blue
) >> 16;
559 switch (info
->fix
.visual
) {
560 case FB_VISUAL_TRUECOLOR
:
562 pal
= info
->pseudo_palette
;
564 val
= chan_to_field(red
, &info
->var
.red
);
565 val
|= chan_to_field(green
, &info
->var
.green
);
566 val
|= chan_to_field(blue
, &info
->var
.blue
);
573 case FB_VISUAL_PSEUDOCOLOR
:
575 val
= ((red
>> 11) & 0x001f);
576 val
|= ((green
>> 6) & 0x03e0);
577 val
|= ((blue
>> 1) & 0x7c00);
580 * TODO: intensity bit. Maybe something like
581 * ~(red[10] ^ green[10] ^ blue[10]) & 1
584 lcdc_writel(sinfo
, ATMEL_LCDC_LUT(regno
), val
);
589 case FB_VISUAL_MONO01
:
591 val
= (regno
== 0) ? 0x00 : 0x1F;
592 lcdc_writel(sinfo
, ATMEL_LCDC_LUT(regno
), val
);
602 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo
*var
,
603 struct fb_info
*info
)
605 dev_dbg(info
->device
, "%s\n", __func__
);
607 atmel_lcdfb_update_dma(info
, var
);
612 static struct fb_ops atmel_lcdfb_ops
= {
613 .owner
= THIS_MODULE
,
614 .fb_check_var
= atmel_lcdfb_check_var
,
615 .fb_set_par
= atmel_lcdfb_set_par
,
616 .fb_setcolreg
= atmel_lcdfb_setcolreg
,
617 .fb_pan_display
= atmel_lcdfb_pan_display
,
618 .fb_fillrect
= cfb_fillrect
,
619 .fb_copyarea
= cfb_copyarea
,
620 .fb_imageblit
= cfb_imageblit
,
623 static irqreturn_t
atmel_lcdfb_interrupt(int irq
, void *dev_id
)
625 struct fb_info
*info
= dev_id
;
626 struct atmel_lcdfb_info
*sinfo
= info
->par
;
629 status
= lcdc_readl(sinfo
, ATMEL_LCDC_ISR
);
630 lcdc_writel(sinfo
, ATMEL_LCDC_IDR
, status
);
634 static int __init
atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info
*sinfo
)
636 struct fb_info
*info
= sinfo
->info
;
639 info
->var
.activate
|= FB_ACTIVATE_FORCE
| FB_ACTIVATE_NOW
;
641 dev_info(info
->device
,
642 "%luKiB frame buffer at %08lx (mapped at %p)\n",
643 (unsigned long)info
->fix
.smem_len
/ 1024,
644 (unsigned long)info
->fix
.smem_start
,
647 /* Allocate colormap */
648 ret
= fb_alloc_cmap(&info
->cmap
, 256, 0);
650 dev_err(info
->device
, "Alloc color map failed\n");
655 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info
*sinfo
)
658 clk_enable(sinfo
->bus_clk
);
659 clk_enable(sinfo
->lcdc_clk
);
662 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info
*sinfo
)
665 clk_disable(sinfo
->bus_clk
);
666 clk_disable(sinfo
->lcdc_clk
);
670 static int __init
atmel_lcdfb_probe(struct platform_device
*pdev
)
672 struct device
*dev
= &pdev
->dev
;
673 struct fb_info
*info
;
674 struct atmel_lcdfb_info
*sinfo
;
675 struct atmel_lcdfb_info
*pdata_sinfo
;
676 struct resource
*regs
= NULL
;
677 struct resource
*map
= NULL
;
680 dev_dbg(dev
, "%s BEGIN\n", __func__
);
683 info
= framebuffer_alloc(sizeof(struct atmel_lcdfb_info
), dev
);
685 dev_err(dev
, "cannot allocate memory\n");
691 if (dev
->platform_data
) {
692 pdata_sinfo
= (struct atmel_lcdfb_info
*)dev
->platform_data
;
693 sinfo
->default_bpp
= pdata_sinfo
->default_bpp
;
694 sinfo
->default_dmacon
= pdata_sinfo
->default_dmacon
;
695 sinfo
->default_lcdcon2
= pdata_sinfo
->default_lcdcon2
;
696 sinfo
->default_monspecs
= pdata_sinfo
->default_monspecs
;
697 sinfo
->atmel_lcdfb_power_control
= pdata_sinfo
->atmel_lcdfb_power_control
;
698 sinfo
->guard_time
= pdata_sinfo
->guard_time
;
699 sinfo
->lcdcon_is_backlight
= pdata_sinfo
->lcdcon_is_backlight
;
701 dev_err(dev
, "cannot get default configuration\n");
707 strcpy(info
->fix
.id
, sinfo
->pdev
->name
);
708 info
->flags
= ATMEL_LCDFB_FBINFO_DEFAULT
;
709 info
->pseudo_palette
= sinfo
->pseudo_palette
;
710 info
->fbops
= &atmel_lcdfb_ops
;
712 memcpy(&info
->monspecs
, sinfo
->default_monspecs
, sizeof(info
->monspecs
));
713 info
->fix
= atmel_lcdfb_fix
;
715 /* Enable LCDC Clocks */
716 if (cpu_is_at91sam9261() || cpu_is_at32ap7000()) {
717 sinfo
->bus_clk
= clk_get(dev
, "hck1");
718 if (IS_ERR(sinfo
->bus_clk
)) {
719 ret
= PTR_ERR(sinfo
->bus_clk
);
723 sinfo
->lcdc_clk
= clk_get(dev
, "lcdc_clk");
724 if (IS_ERR(sinfo
->lcdc_clk
)) {
725 ret
= PTR_ERR(sinfo
->lcdc_clk
);
728 atmel_lcdfb_start_clock(sinfo
);
730 ret
= fb_find_mode(&info
->var
, info
, NULL
, info
->monspecs
.modedb
,
731 info
->monspecs
.modedb_len
, info
->monspecs
.modedb
,
734 dev_err(dev
, "no suitable video mode found\n");
739 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
741 dev_err(dev
, "resources unusable\n");
746 sinfo
->irq_base
= platform_get_irq(pdev
, 0);
747 if (sinfo
->irq_base
< 0) {
748 dev_err(dev
, "unable to get irq\n");
749 ret
= sinfo
->irq_base
;
753 /* Initialize video memory */
754 map
= platform_get_resource(pdev
, IORESOURCE_MEM
, 1);
756 /* use a pre-allocated memory buffer */
757 info
->fix
.smem_start
= map
->start
;
758 info
->fix
.smem_len
= map
->end
- map
->start
+ 1;
759 if (!request_mem_region(info
->fix
.smem_start
,
760 info
->fix
.smem_len
, pdev
->name
)) {
765 info
->screen_base
= ioremap(info
->fix
.smem_start
, info
->fix
.smem_len
);
766 if (!info
->screen_base
)
770 * Don't clear the framebuffer -- someone may have set
774 /* alocate memory buffer */
775 ret
= atmel_lcdfb_alloc_video_memory(sinfo
);
777 dev_err(dev
, "cannot allocate framebuffer: %d\n", ret
);
783 info
->fix
.mmio_start
= regs
->start
;
784 info
->fix
.mmio_len
= regs
->end
- regs
->start
+ 1;
786 if (!request_mem_region(info
->fix
.mmio_start
,
787 info
->fix
.mmio_len
, pdev
->name
)) {
792 sinfo
->mmio
= ioremap(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
794 dev_err(dev
, "cannot map LCDC registers\n");
798 /* Initialize PWM for contrast or backlight ("off") */
799 init_contrast(sinfo
);
802 ret
= request_irq(sinfo
->irq_base
, atmel_lcdfb_interrupt
, 0, pdev
->name
, info
);
804 dev_err(dev
, "request_irq failed: %d\n", ret
);
808 ret
= atmel_lcdfb_init_fbinfo(sinfo
);
810 dev_err(dev
, "init fbinfo failed: %d\n", ret
);
811 goto unregister_irqs
;
815 * This makes sure that our colour bitfield
816 * descriptors are correctly initialised.
818 atmel_lcdfb_check_var(&info
->var
, info
);
820 ret
= fb_set_var(info
, &info
->var
);
822 dev_warn(dev
, "unable to set display parameters\n");
826 dev_set_drvdata(dev
, info
);
829 * Tell the world that we're ready to go
831 ret
= register_framebuffer(info
);
833 dev_err(dev
, "failed to register framebuffer device: %d\n", ret
);
837 /* Power up the LCDC screen */
838 if (sinfo
->atmel_lcdfb_power_control
)
839 sinfo
->atmel_lcdfb_power_control(1);
841 dev_info(dev
, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
842 info
->node
, info
->fix
.mmio_start
, sinfo
->mmio
, sinfo
->irq_base
);
848 fb_dealloc_cmap(&info
->cmap
);
850 free_irq(sinfo
->irq_base
, info
);
852 exit_backlight(sinfo
);
853 iounmap(sinfo
->mmio
);
855 release_mem_region(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
858 iounmap(info
->screen_base
);
860 atmel_lcdfb_free_video_memory(sinfo
);
864 release_mem_region(info
->fix
.smem_start
, info
->fix
.smem_len
);
866 atmel_lcdfb_stop_clock(sinfo
);
867 clk_put(sinfo
->lcdc_clk
);
870 clk_put(sinfo
->bus_clk
);
872 framebuffer_release(info
);
874 dev_dbg(dev
, "%s FAILED\n", __func__
);
878 static int __exit
atmel_lcdfb_remove(struct platform_device
*pdev
)
880 struct device
*dev
= &pdev
->dev
;
881 struct fb_info
*info
= dev_get_drvdata(dev
);
882 struct atmel_lcdfb_info
*sinfo
= info
->par
;
887 exit_backlight(sinfo
);
888 if (sinfo
->atmel_lcdfb_power_control
)
889 sinfo
->atmel_lcdfb_power_control(0);
890 unregister_framebuffer(info
);
891 atmel_lcdfb_stop_clock(sinfo
);
892 clk_put(sinfo
->lcdc_clk
);
894 clk_put(sinfo
->bus_clk
);
895 fb_dealloc_cmap(&info
->cmap
);
896 free_irq(sinfo
->irq_base
, info
);
897 iounmap(sinfo
->mmio
);
898 release_mem_region(info
->fix
.mmio_start
, info
->fix
.mmio_len
);
899 if (platform_get_resource(pdev
, IORESOURCE_MEM
, 1)) {
900 iounmap(info
->screen_base
);
901 release_mem_region(info
->fix
.smem_start
, info
->fix
.smem_len
);
903 atmel_lcdfb_free_video_memory(sinfo
);
906 dev_set_drvdata(dev
, NULL
);
907 framebuffer_release(info
);
912 static struct platform_driver atmel_lcdfb_driver
= {
913 .remove
= __exit_p(atmel_lcdfb_remove
),
915 // FIXME need suspend, resume
918 .name
= "atmel_lcdfb",
919 .owner
= THIS_MODULE
,
923 static int __init
atmel_lcdfb_init(void)
925 return platform_driver_probe(&atmel_lcdfb_driver
, atmel_lcdfb_probe
);
928 static void __exit
atmel_lcdfb_exit(void)
930 platform_driver_unregister(&atmel_lcdfb_driver
);
933 module_init(atmel_lcdfb_init
);
934 module_exit(atmel_lcdfb_exit
);
936 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
937 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
938 MODULE_LICENSE("GPL");