atmel_lcdfb: don't initialize a pre-allocated framebuffer
[deliverable/linux.git] / drivers / video / atmel_lcdfb.c
1 /*
2 * Driver for AT91/AT32 LCD Controller
3 *
4 * Copyright (C) 2007 Atmel Corporation
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive for
8 * more details.
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/interrupt.h>
15 #include <linux/clk.h>
16 #include <linux/fb.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/backlight.h>
20
21 #include <asm/arch/board.h>
22 #include <asm/arch/cpu.h>
23 #include <asm/arch/gpio.h>
24
25 #include <video/atmel_lcdc.h>
26
27 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
28 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
29
30 /* configurable parameters */
31 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
32 #define ATMEL_LCDC_DMA_BURST_LEN 8
33
34 #if defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91CAP9)
35 #define ATMEL_LCDC_FIFO_SIZE 2048
36 #else
37 #define ATMEL_LCDC_FIFO_SIZE 512
38 #endif
39
40 #if defined(CONFIG_ARCH_AT91)
41 #define ATMEL_LCDFB_FBINFO_DEFAULT FBINFO_DEFAULT
42
43 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
44 struct fb_var_screeninfo *var)
45 {
46
47 }
48 #elif defined(CONFIG_AVR32)
49 #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
50 | FBINFO_PARTIAL_PAN_OK \
51 | FBINFO_HWACCEL_XPAN \
52 | FBINFO_HWACCEL_YPAN)
53
54 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
55 struct fb_var_screeninfo *var)
56 {
57 u32 dma2dcfg;
58 u32 pixeloff;
59
60 pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
61
62 dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
63 dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
64 lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
65
66 /* Update configuration */
67 lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
68 lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
69 | ATMEL_LCDC_DMAUPDT);
70 }
71 #endif
72
73 static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
74 | ATMEL_LCDC_POL_POSITIVE
75 | ATMEL_LCDC_ENA_PWMENABLE;
76
77 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
78
79 /* some bl->props field just changed */
80 static int atmel_bl_update_status(struct backlight_device *bl)
81 {
82 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
83 int power = sinfo->bl_power;
84 int brightness = bl->props.brightness;
85
86 /* REVISIT there may be a meaningful difference between
87 * fb_blank and power ... there seem to be some cases
88 * this doesn't handle correctly.
89 */
90 if (bl->props.fb_blank != sinfo->bl_power)
91 power = bl->props.fb_blank;
92 else if (bl->props.power != sinfo->bl_power)
93 power = bl->props.power;
94
95 if (brightness < 0 && power == FB_BLANK_UNBLANK)
96 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
97 else if (power != FB_BLANK_UNBLANK)
98 brightness = 0;
99
100 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
101 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
102 brightness ? contrast_ctr : 0);
103
104 bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
105
106 return 0;
107 }
108
109 static int atmel_bl_get_brightness(struct backlight_device *bl)
110 {
111 struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
112
113 return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
114 }
115
116 static struct backlight_ops atmel_lcdc_bl_ops = {
117 .update_status = atmel_bl_update_status,
118 .get_brightness = atmel_bl_get_brightness,
119 };
120
121 static void init_backlight(struct atmel_lcdfb_info *sinfo)
122 {
123 struct backlight_device *bl;
124
125 sinfo->bl_power = FB_BLANK_UNBLANK;
126
127 if (sinfo->backlight)
128 return;
129
130 bl = backlight_device_register("backlight", &sinfo->pdev->dev,
131 sinfo, &atmel_lcdc_bl_ops);
132 if (IS_ERR(sinfo->backlight)) {
133 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
134 PTR_ERR(bl));
135 return;
136 }
137 sinfo->backlight = bl;
138
139 bl->props.power = FB_BLANK_UNBLANK;
140 bl->props.fb_blank = FB_BLANK_UNBLANK;
141 bl->props.max_brightness = 0xff;
142 bl->props.brightness = atmel_bl_get_brightness(bl);
143 }
144
145 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
146 {
147 if (sinfo->backlight)
148 backlight_device_unregister(sinfo->backlight);
149 }
150
151 #else
152
153 static void init_backlight(struct atmel_lcdfb_info *sinfo)
154 {
155 dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
156 }
157
158 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
159 {
160 }
161
162 #endif
163
164 static void init_contrast(struct atmel_lcdfb_info *sinfo)
165 {
166 /* have some default contrast/backlight settings */
167 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
168 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
169
170 if (sinfo->lcdcon_is_backlight)
171 init_backlight(sinfo);
172 }
173
174
175 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
176 .type = FB_TYPE_PACKED_PIXELS,
177 .visual = FB_VISUAL_TRUECOLOR,
178 .xpanstep = 0,
179 .ypanstep = 0,
180 .ywrapstep = 0,
181 .accel = FB_ACCEL_NONE,
182 };
183
184 static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
185 {
186 unsigned long value;
187
188 if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000()))
189 return xres;
190
191 value = xres;
192 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
193 /* STN display */
194 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
195 value *= 3;
196 }
197 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
198 || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
199 && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
200 value = DIV_ROUND_UP(value, 4);
201 else
202 value = DIV_ROUND_UP(value, 8);
203 }
204
205 return value;
206 }
207
208 static void atmel_lcdfb_update_dma(struct fb_info *info,
209 struct fb_var_screeninfo *var)
210 {
211 struct atmel_lcdfb_info *sinfo = info->par;
212 struct fb_fix_screeninfo *fix = &info->fix;
213 unsigned long dma_addr;
214
215 dma_addr = (fix->smem_start + var->yoffset * fix->line_length
216 + var->xoffset * var->bits_per_pixel / 8);
217
218 dma_addr &= ~3UL;
219
220 /* Set framebuffer DMA base address and pixel offset */
221 lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
222
223 atmel_lcdfb_update_dma2d(sinfo, var);
224 }
225
226 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
227 {
228 struct fb_info *info = sinfo->info;
229
230 dma_free_writecombine(info->device, info->fix.smem_len,
231 info->screen_base, info->fix.smem_start);
232 }
233
234 /**
235 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
236 * @sinfo: the frame buffer to allocate memory for
237 */
238 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
239 {
240 struct fb_info *info = sinfo->info;
241 struct fb_var_screeninfo *var = &info->var;
242
243 info->fix.smem_len = (var->xres_virtual * var->yres_virtual
244 * ((var->bits_per_pixel + 7) / 8));
245
246 info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
247 (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
248
249 if (!info->screen_base) {
250 return -ENOMEM;
251 }
252
253 memset(info->screen_base, 0, info->fix.smem_len);
254
255 return 0;
256 }
257
258 /**
259 * atmel_lcdfb_check_var - Validates a var passed in.
260 * @var: frame buffer variable screen structure
261 * @info: frame buffer structure that represents a single frame buffer
262 *
263 * Checks to see if the hardware supports the state requested by
264 * var passed in. This function does not alter the hardware
265 * state!!! This means the data stored in struct fb_info and
266 * struct atmel_lcdfb_info do not change. This includes the var
267 * inside of struct fb_info. Do NOT change these. This function
268 * can be called on its own if we intent to only test a mode and
269 * not actually set it. The stuff in modedb.c is a example of
270 * this. If the var passed in is slightly off by what the
271 * hardware can support then we alter the var PASSED in to what
272 * we can do. If the hardware doesn't support mode change a
273 * -EINVAL will be returned by the upper layers. You don't need
274 * to implement this function then. If you hardware doesn't
275 * support changing the resolution then this function is not
276 * needed. In this case the driver would just provide a var that
277 * represents the static state the screen is in.
278 *
279 * Returns negative errno on error, or zero on success.
280 */
281 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
282 struct fb_info *info)
283 {
284 struct device *dev = info->device;
285 struct atmel_lcdfb_info *sinfo = info->par;
286 unsigned long clk_value_khz;
287
288 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
289
290 dev_dbg(dev, "%s:\n", __func__);
291 dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
292 dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
293 dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
294 dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
295
296 if ((PICOS2KHZ(var->pixclock) * var->bits_per_pixel / 8) > clk_value_khz) {
297 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
298 return -EINVAL;
299 }
300
301 /* Force same alignment for each line */
302 var->xres = (var->xres + 3) & ~3UL;
303 var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
304
305 var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
306 var->transp.msb_right = 0;
307 var->transp.offset = var->transp.length = 0;
308 var->xoffset = var->yoffset = 0;
309
310 /* Saturate vertical and horizontal timings at maximum values */
311 var->vsync_len = min_t(u32, var->vsync_len,
312 (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
313 var->upper_margin = min_t(u32, var->upper_margin,
314 ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
315 var->lower_margin = min_t(u32, var->lower_margin,
316 ATMEL_LCDC_VFP);
317 var->right_margin = min_t(u32, var->right_margin,
318 (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
319 var->hsync_len = min_t(u32, var->hsync_len,
320 (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
321 var->left_margin = min_t(u32, var->left_margin,
322 ATMEL_LCDC_HBP + 1);
323
324 /* Some parameters can't be zero */
325 var->vsync_len = max_t(u32, var->vsync_len, 1);
326 var->right_margin = max_t(u32, var->right_margin, 1);
327 var->hsync_len = max_t(u32, var->hsync_len, 1);
328 var->left_margin = max_t(u32, var->left_margin, 1);
329
330 switch (var->bits_per_pixel) {
331 case 1:
332 case 2:
333 case 4:
334 case 8:
335 var->red.offset = var->green.offset = var->blue.offset = 0;
336 var->red.length = var->green.length = var->blue.length
337 = var->bits_per_pixel;
338 break;
339 case 15:
340 case 16:
341 var->red.offset = 0;
342 var->green.offset = 5;
343 var->blue.offset = 10;
344 var->red.length = var->green.length = var->blue.length = 5;
345 break;
346 case 32:
347 var->transp.offset = 24;
348 var->transp.length = 8;
349 /* fall through */
350 case 24:
351 var->red.offset = 0;
352 var->green.offset = 8;
353 var->blue.offset = 16;
354 var->red.length = var->green.length = var->blue.length = 8;
355 break;
356 default:
357 dev_err(dev, "color depth %d not supported\n",
358 var->bits_per_pixel);
359 return -EINVAL;
360 }
361
362 return 0;
363 }
364
365 /**
366 * atmel_lcdfb_set_par - Alters the hardware state.
367 * @info: frame buffer structure that represents a single frame buffer
368 *
369 * Using the fb_var_screeninfo in fb_info we set the resolution
370 * of the this particular framebuffer. This function alters the
371 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
372 * not alter var in fb_info since we are using that data. This
373 * means we depend on the data in var inside fb_info to be
374 * supported by the hardware. atmel_lcdfb_check_var is always called
375 * before atmel_lcdfb_set_par to ensure this. Again if you can't
376 * change the resolution you don't need this function.
377 *
378 */
379 static int atmel_lcdfb_set_par(struct fb_info *info)
380 {
381 struct atmel_lcdfb_info *sinfo = info->par;
382 unsigned long hozval_linesz;
383 unsigned long value;
384 unsigned long clk_value_khz;
385 unsigned long bits_per_line;
386
387 dev_dbg(info->device, "%s:\n", __func__);
388 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
389 info->var.xres, info->var.yres,
390 info->var.xres_virtual, info->var.yres_virtual);
391
392 /* Turn off the LCD controller and the DMA controller */
393 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
394
395 /* Wait for the LCDC core to become idle */
396 while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
397 msleep(10);
398
399 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
400
401 if (info->var.bits_per_pixel == 1)
402 info->fix.visual = FB_VISUAL_MONO01;
403 else if (info->var.bits_per_pixel <= 8)
404 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
405 else
406 info->fix.visual = FB_VISUAL_TRUECOLOR;
407
408 bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
409 info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
410
411 /* Re-initialize the DMA engine... */
412 dev_dbg(info->device, " * update DMA engine\n");
413 atmel_lcdfb_update_dma(info, &info->var);
414
415 /* ...set frame size and burst length = 8 words (?) */
416 value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
417 value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
418 lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
419
420 /* Now, the LCDC core... */
421
422 /* Set pixel clock */
423 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
424
425 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
426
427 value = (value / 2) - 1;
428 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", value);
429
430 if (value <= 0) {
431 dev_notice(info->device, "Bypassing pixel clock divider\n");
432 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
433 } else {
434 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET);
435 info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1)));
436 dev_dbg(info->device, " updated pixclk: %lu KHz\n",
437 PICOS2KHZ(info->var.pixclock));
438 }
439
440
441 /* Initialize control register 2 */
442 value = sinfo->default_lcdcon2;
443
444 if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
445 value |= ATMEL_LCDC_INVLINE_INVERTED;
446 if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
447 value |= ATMEL_LCDC_INVFRAME_INVERTED;
448
449 switch (info->var.bits_per_pixel) {
450 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
451 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
452 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
453 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
454 case 15: /* fall through */
455 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
456 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
457 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
458 default: BUG(); break;
459 }
460 dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
461 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
462
463 /* Vertical timing */
464 value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
465 value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
466 value |= info->var.lower_margin;
467 dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
468 lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
469
470 /* Horizontal timing */
471 value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
472 value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
473 value |= (info->var.left_margin - 1);
474 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
475 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
476
477 /* Horizontal value (aka line size) */
478 hozval_linesz = compute_hozval(info->var.xres,
479 lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
480
481 /* Display size */
482 value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
483 value |= info->var.yres - 1;
484 dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
485 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
486
487 /* FIFO Threshold: Use formula from data sheet */
488 value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
489 lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
490
491 /* Toggle LCD_MODE every frame */
492 lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
493
494 /* Disable all interrupts */
495 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
496
497 /* ...wait for DMA engine to become idle... */
498 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
499 msleep(10);
500
501 dev_dbg(info->device, " * re-enable DMA engine\n");
502 /* ...and enable it with updated configuration */
503 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
504
505 dev_dbg(info->device, " * re-enable LCDC core\n");
506 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
507 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
508
509 dev_dbg(info->device, " * DONE\n");
510
511 return 0;
512 }
513
514 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
515 {
516 chan &= 0xffff;
517 chan >>= 16 - bf->length;
518 return chan << bf->offset;
519 }
520
521 /**
522 * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
523 * @regno: Which register in the CLUT we are programming
524 * @red: The red value which can be up to 16 bits wide
525 * @green: The green value which can be up to 16 bits wide
526 * @blue: The blue value which can be up to 16 bits wide.
527 * @transp: If supported the alpha value which can be up to 16 bits wide.
528 * @info: frame buffer info structure
529 *
530 * Set a single color register. The values supplied have a 16 bit
531 * magnitude which needs to be scaled in this function for the hardware.
532 * Things to take into consideration are how many color registers, if
533 * any, are supported with the current color visual. With truecolor mode
534 * no color palettes are supported. Here a psuedo palette is created
535 * which we store the value in pseudo_palette in struct fb_info. For
536 * pseudocolor mode we have a limited color palette. To deal with this
537 * we can program what color is displayed for a particular pixel value.
538 * DirectColor is similar in that we can program each color field. If
539 * we have a static colormap we don't need to implement this function.
540 *
541 * Returns negative errno on error, or zero on success. In an
542 * ideal world, this would have been the case, but as it turns
543 * out, the other drivers return 1 on failure, so that's what
544 * we're going to do.
545 */
546 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
547 unsigned int green, unsigned int blue,
548 unsigned int transp, struct fb_info *info)
549 {
550 struct atmel_lcdfb_info *sinfo = info->par;
551 unsigned int val;
552 u32 *pal;
553 int ret = 1;
554
555 if (info->var.grayscale)
556 red = green = blue = (19595 * red + 38470 * green
557 + 7471 * blue) >> 16;
558
559 switch (info->fix.visual) {
560 case FB_VISUAL_TRUECOLOR:
561 if (regno < 16) {
562 pal = info->pseudo_palette;
563
564 val = chan_to_field(red, &info->var.red);
565 val |= chan_to_field(green, &info->var.green);
566 val |= chan_to_field(blue, &info->var.blue);
567
568 pal[regno] = val;
569 ret = 0;
570 }
571 break;
572
573 case FB_VISUAL_PSEUDOCOLOR:
574 if (regno < 256) {
575 val = ((red >> 11) & 0x001f);
576 val |= ((green >> 6) & 0x03e0);
577 val |= ((blue >> 1) & 0x7c00);
578
579 /*
580 * TODO: intensity bit. Maybe something like
581 * ~(red[10] ^ green[10] ^ blue[10]) & 1
582 */
583
584 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
585 ret = 0;
586 }
587 break;
588
589 case FB_VISUAL_MONO01:
590 if (regno < 2) {
591 val = (regno == 0) ? 0x00 : 0x1F;
592 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
593 ret = 0;
594 }
595 break;
596
597 }
598
599 return ret;
600 }
601
602 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
603 struct fb_info *info)
604 {
605 dev_dbg(info->device, "%s\n", __func__);
606
607 atmel_lcdfb_update_dma(info, var);
608
609 return 0;
610 }
611
612 static struct fb_ops atmel_lcdfb_ops = {
613 .owner = THIS_MODULE,
614 .fb_check_var = atmel_lcdfb_check_var,
615 .fb_set_par = atmel_lcdfb_set_par,
616 .fb_setcolreg = atmel_lcdfb_setcolreg,
617 .fb_pan_display = atmel_lcdfb_pan_display,
618 .fb_fillrect = cfb_fillrect,
619 .fb_copyarea = cfb_copyarea,
620 .fb_imageblit = cfb_imageblit,
621 };
622
623 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
624 {
625 struct fb_info *info = dev_id;
626 struct atmel_lcdfb_info *sinfo = info->par;
627 u32 status;
628
629 status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
630 lcdc_writel(sinfo, ATMEL_LCDC_IDR, status);
631 return IRQ_HANDLED;
632 }
633
634 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
635 {
636 struct fb_info *info = sinfo->info;
637 int ret = 0;
638
639 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
640
641 dev_info(info->device,
642 "%luKiB frame buffer at %08lx (mapped at %p)\n",
643 (unsigned long)info->fix.smem_len / 1024,
644 (unsigned long)info->fix.smem_start,
645 info->screen_base);
646
647 /* Allocate colormap */
648 ret = fb_alloc_cmap(&info->cmap, 256, 0);
649 if (ret < 0)
650 dev_err(info->device, "Alloc color map failed\n");
651
652 return ret;
653 }
654
655 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
656 {
657 if (sinfo->bus_clk)
658 clk_enable(sinfo->bus_clk);
659 clk_enable(sinfo->lcdc_clk);
660 }
661
662 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
663 {
664 if (sinfo->bus_clk)
665 clk_disable(sinfo->bus_clk);
666 clk_disable(sinfo->lcdc_clk);
667 }
668
669
670 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
671 {
672 struct device *dev = &pdev->dev;
673 struct fb_info *info;
674 struct atmel_lcdfb_info *sinfo;
675 struct atmel_lcdfb_info *pdata_sinfo;
676 struct resource *regs = NULL;
677 struct resource *map = NULL;
678 int ret;
679
680 dev_dbg(dev, "%s BEGIN\n", __func__);
681
682 ret = -ENOMEM;
683 info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
684 if (!info) {
685 dev_err(dev, "cannot allocate memory\n");
686 goto out;
687 }
688
689 sinfo = info->par;
690
691 if (dev->platform_data) {
692 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
693 sinfo->default_bpp = pdata_sinfo->default_bpp;
694 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
695 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
696 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
697 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
698 sinfo->guard_time = pdata_sinfo->guard_time;
699 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
700 } else {
701 dev_err(dev, "cannot get default configuration\n");
702 goto free_info;
703 }
704 sinfo->info = info;
705 sinfo->pdev = pdev;
706
707 strcpy(info->fix.id, sinfo->pdev->name);
708 info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
709 info->pseudo_palette = sinfo->pseudo_palette;
710 info->fbops = &atmel_lcdfb_ops;
711
712 memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
713 info->fix = atmel_lcdfb_fix;
714
715 /* Enable LCDC Clocks */
716 if (cpu_is_at91sam9261() || cpu_is_at32ap7000()) {
717 sinfo->bus_clk = clk_get(dev, "hck1");
718 if (IS_ERR(sinfo->bus_clk)) {
719 ret = PTR_ERR(sinfo->bus_clk);
720 goto free_info;
721 }
722 }
723 sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
724 if (IS_ERR(sinfo->lcdc_clk)) {
725 ret = PTR_ERR(sinfo->lcdc_clk);
726 goto put_bus_clk;
727 }
728 atmel_lcdfb_start_clock(sinfo);
729
730 ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
731 info->monspecs.modedb_len, info->monspecs.modedb,
732 sinfo->default_bpp);
733 if (!ret) {
734 dev_err(dev, "no suitable video mode found\n");
735 goto stop_clk;
736 }
737
738
739 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
740 if (!regs) {
741 dev_err(dev, "resources unusable\n");
742 ret = -ENXIO;
743 goto stop_clk;
744 }
745
746 sinfo->irq_base = platform_get_irq(pdev, 0);
747 if (sinfo->irq_base < 0) {
748 dev_err(dev, "unable to get irq\n");
749 ret = sinfo->irq_base;
750 goto stop_clk;
751 }
752
753 /* Initialize video memory */
754 map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
755 if (map) {
756 /* use a pre-allocated memory buffer */
757 info->fix.smem_start = map->start;
758 info->fix.smem_len = map->end - map->start + 1;
759 if (!request_mem_region(info->fix.smem_start,
760 info->fix.smem_len, pdev->name)) {
761 ret = -EBUSY;
762 goto stop_clk;
763 }
764
765 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
766 if (!info->screen_base)
767 goto release_intmem;
768
769 /*
770 * Don't clear the framebuffer -- someone may have set
771 * up a splash image.
772 */
773 } else {
774 /* alocate memory buffer */
775 ret = atmel_lcdfb_alloc_video_memory(sinfo);
776 if (ret < 0) {
777 dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
778 goto stop_clk;
779 }
780 }
781
782 /* LCDC registers */
783 info->fix.mmio_start = regs->start;
784 info->fix.mmio_len = regs->end - regs->start + 1;
785
786 if (!request_mem_region(info->fix.mmio_start,
787 info->fix.mmio_len, pdev->name)) {
788 ret = -EBUSY;
789 goto free_fb;
790 }
791
792 sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
793 if (!sinfo->mmio) {
794 dev_err(dev, "cannot map LCDC registers\n");
795 goto release_mem;
796 }
797
798 /* Initialize PWM for contrast or backlight ("off") */
799 init_contrast(sinfo);
800
801 /* interrupt */
802 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
803 if (ret) {
804 dev_err(dev, "request_irq failed: %d\n", ret);
805 goto unmap_mmio;
806 }
807
808 ret = atmel_lcdfb_init_fbinfo(sinfo);
809 if (ret < 0) {
810 dev_err(dev, "init fbinfo failed: %d\n", ret);
811 goto unregister_irqs;
812 }
813
814 /*
815 * This makes sure that our colour bitfield
816 * descriptors are correctly initialised.
817 */
818 atmel_lcdfb_check_var(&info->var, info);
819
820 ret = fb_set_var(info, &info->var);
821 if (ret) {
822 dev_warn(dev, "unable to set display parameters\n");
823 goto free_cmap;
824 }
825
826 dev_set_drvdata(dev, info);
827
828 /*
829 * Tell the world that we're ready to go
830 */
831 ret = register_framebuffer(info);
832 if (ret < 0) {
833 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
834 goto free_cmap;
835 }
836
837 /* Power up the LCDC screen */
838 if (sinfo->atmel_lcdfb_power_control)
839 sinfo->atmel_lcdfb_power_control(1);
840
841 dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
842 info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
843
844 return 0;
845
846
847 free_cmap:
848 fb_dealloc_cmap(&info->cmap);
849 unregister_irqs:
850 free_irq(sinfo->irq_base, info);
851 unmap_mmio:
852 exit_backlight(sinfo);
853 iounmap(sinfo->mmio);
854 release_mem:
855 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
856 free_fb:
857 if (map)
858 iounmap(info->screen_base);
859 else
860 atmel_lcdfb_free_video_memory(sinfo);
861
862 release_intmem:
863 if (map)
864 release_mem_region(info->fix.smem_start, info->fix.smem_len);
865 stop_clk:
866 atmel_lcdfb_stop_clock(sinfo);
867 clk_put(sinfo->lcdc_clk);
868 put_bus_clk:
869 if (sinfo->bus_clk)
870 clk_put(sinfo->bus_clk);
871 free_info:
872 framebuffer_release(info);
873 out:
874 dev_dbg(dev, "%s FAILED\n", __func__);
875 return ret;
876 }
877
878 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
879 {
880 struct device *dev = &pdev->dev;
881 struct fb_info *info = dev_get_drvdata(dev);
882 struct atmel_lcdfb_info *sinfo = info->par;
883
884 if (!sinfo)
885 return 0;
886
887 exit_backlight(sinfo);
888 if (sinfo->atmel_lcdfb_power_control)
889 sinfo->atmel_lcdfb_power_control(0);
890 unregister_framebuffer(info);
891 atmel_lcdfb_stop_clock(sinfo);
892 clk_put(sinfo->lcdc_clk);
893 if (sinfo->bus_clk)
894 clk_put(sinfo->bus_clk);
895 fb_dealloc_cmap(&info->cmap);
896 free_irq(sinfo->irq_base, info);
897 iounmap(sinfo->mmio);
898 release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
899 if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
900 iounmap(info->screen_base);
901 release_mem_region(info->fix.smem_start, info->fix.smem_len);
902 } else {
903 atmel_lcdfb_free_video_memory(sinfo);
904 }
905
906 dev_set_drvdata(dev, NULL);
907 framebuffer_release(info);
908
909 return 0;
910 }
911
912 static struct platform_driver atmel_lcdfb_driver = {
913 .remove = __exit_p(atmel_lcdfb_remove),
914
915 // FIXME need suspend, resume
916
917 .driver = {
918 .name = "atmel_lcdfb",
919 .owner = THIS_MODULE,
920 },
921 };
922
923 static int __init atmel_lcdfb_init(void)
924 {
925 return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
926 }
927
928 static void __exit atmel_lcdfb_exit(void)
929 {
930 platform_driver_unregister(&atmel_lcdfb_driver);
931 }
932
933 module_init(atmel_lcdfb_init);
934 module_exit(atmel_lcdfb_exit);
935
936 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
937 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
938 MODULE_LICENSE("GPL");
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