2 * linux/drivers/video/omap2/dss/dpi.c
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
23 #define DSS_SUBSYS_NAME "DPI"
25 #include <linux/kernel.h>
26 #include <linux/delay.h>
27 #include <linux/export.h>
28 #include <linux/err.h>
29 #include <linux/errno.h>
30 #include <linux/platform_device.h>
31 #include <linux/regulator/consumer.h>
32 #include <linux/string.h>
34 #include <linux/clk.h>
36 #include <video/omapdss.h>
39 #include "dss_features.h"
44 struct platform_device
*pdev
;
46 struct regulator
*vdds_dsi_reg
;
51 struct omap_video_timings timings
;
52 struct dss_lcd_mgr_config mgr_config
;
55 struct omap_dss_device output
;
57 bool port_initialized
;
60 static struct dpi_data
*dpi_get_data_from_dssdev(struct omap_dss_device
*dssdev
)
62 return container_of(dssdev
, struct dpi_data
, output
);
65 /* only used in non-DT mode */
66 static struct dpi_data
*dpi_get_data_from_pdev(struct platform_device
*pdev
)
68 return dev_get_drvdata(&pdev
->dev
);
71 static struct dss_pll
*dpi_get_pll(enum omap_channel channel
)
74 * XXX we can't currently use DSI PLL for DPI with OMAP3, as the DSI PLL
75 * would also be used for DISPC fclk. Meaning, when the DPI output is
76 * disabled, DISPC clock will be disabled, and TV out will stop.
78 switch (omapdss_get_version()) {
79 case OMAPDSS_VER_OMAP24xx
:
80 case OMAPDSS_VER_OMAP34xx_ES1
:
81 case OMAPDSS_VER_OMAP34xx_ES3
:
82 case OMAPDSS_VER_OMAP3630
:
83 case OMAPDSS_VER_AM35xx
:
84 case OMAPDSS_VER_AM43xx
:
87 case OMAPDSS_VER_OMAP4430_ES1
:
88 case OMAPDSS_VER_OMAP4430_ES2
:
89 case OMAPDSS_VER_OMAP4
:
91 case OMAP_DSS_CHANNEL_LCD
:
92 return dss_pll_find("dsi0");
93 case OMAP_DSS_CHANNEL_LCD2
:
94 return dss_pll_find("dsi1");
99 case OMAPDSS_VER_OMAP5
:
101 case OMAP_DSS_CHANNEL_LCD
:
102 return dss_pll_find("dsi0");
103 case OMAP_DSS_CHANNEL_LCD3
:
104 return dss_pll_find("dsi1");
109 case OMAPDSS_VER_DRA7xx
:
111 case OMAP_DSS_CHANNEL_LCD
:
112 case OMAP_DSS_CHANNEL_LCD2
:
113 return dss_pll_find("video0");
114 case OMAP_DSS_CHANNEL_LCD3
:
115 return dss_pll_find("video1");
125 static enum omap_dss_clk_source
dpi_get_alt_clk_src(enum omap_channel channel
)
128 case OMAP_DSS_CHANNEL_LCD
:
129 return OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC
;
130 case OMAP_DSS_CHANNEL_LCD2
:
131 return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC
;
132 case OMAP_DSS_CHANNEL_LCD3
:
133 return OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC
;
135 /* this shouldn't happen */
137 return OMAP_DSS_CLK_SRC_FCK
;
141 struct dpi_clk_calc_ctx
{
146 unsigned long pck_min
, pck_max
;
150 struct dss_pll_clock_info dsi_cinfo
;
152 struct dispc_clock_info dispc_cinfo
;
155 static bool dpi_calc_dispc_cb(int lckd
, int pckd
, unsigned long lck
,
156 unsigned long pck
, void *data
)
158 struct dpi_clk_calc_ctx
*ctx
= data
;
161 * Odd dividers give us uneven duty cycle, causing problem when level
162 * shifted. So skip all odd dividers when the pixel clock is on the
165 if (ctx
->pck_min
>= 100000000) {
166 if (lckd
> 1 && lckd
% 2 != 0)
169 if (pckd
> 1 && pckd
% 2 != 0)
173 ctx
->dispc_cinfo
.lck_div
= lckd
;
174 ctx
->dispc_cinfo
.pck_div
= pckd
;
175 ctx
->dispc_cinfo
.lck
= lck
;
176 ctx
->dispc_cinfo
.pck
= pck
;
182 static bool dpi_calc_hsdiv_cb(int m_dispc
, unsigned long dispc
,
185 struct dpi_clk_calc_ctx
*ctx
= data
;
188 * Odd dividers give us uneven duty cycle, causing problem when level
189 * shifted. So skip all odd dividers when the pixel clock is on the
192 if (m_dispc
> 1 && m_dispc
% 2 != 0 && ctx
->pck_min
>= 100000000)
195 ctx
->dsi_cinfo
.mX
[HSDIV_DISPC
] = m_dispc
;
196 ctx
->dsi_cinfo
.clkout
[HSDIV_DISPC
] = dispc
;
198 return dispc_div_calc(dispc
, ctx
->pck_min
, ctx
->pck_max
,
199 dpi_calc_dispc_cb
, ctx
);
203 static bool dpi_calc_pll_cb(int n
, int m
, unsigned long fint
,
204 unsigned long clkdco
,
207 struct dpi_clk_calc_ctx
*ctx
= data
;
209 ctx
->dsi_cinfo
.n
= n
;
210 ctx
->dsi_cinfo
.m
= m
;
211 ctx
->dsi_cinfo
.fint
= fint
;
212 ctx
->dsi_cinfo
.clkdco
= clkdco
;
214 return dss_pll_hsdiv_calc(ctx
->pll
, clkdco
,
215 ctx
->pck_min
, dss_feat_get_param_max(FEAT_PARAM_DSS_FCK
),
216 dpi_calc_hsdiv_cb
, ctx
);
219 static bool dpi_calc_dss_cb(unsigned long fck
, void *data
)
221 struct dpi_clk_calc_ctx
*ctx
= data
;
225 return dispc_div_calc(fck
, ctx
->pck_min
, ctx
->pck_max
,
226 dpi_calc_dispc_cb
, ctx
);
229 static bool dpi_dsi_clk_calc(struct dpi_data
*dpi
, unsigned long pck
,
230 struct dpi_clk_calc_ctx
*ctx
)
233 unsigned long pll_min
, pll_max
;
235 memset(ctx
, 0, sizeof(*ctx
));
237 ctx
->pck_min
= pck
- 1000;
238 ctx
->pck_max
= pck
+ 1000;
243 clkin
= clk_get_rate(ctx
->pll
->clkin
);
245 return dss_pll_calc(ctx
->pll
, clkin
,
247 dpi_calc_pll_cb
, ctx
);
250 static bool dpi_dss_clk_calc(unsigned long pck
, struct dpi_clk_calc_ctx
*ctx
)
255 * DSS fck gives us very few possibilities, so finding a good pixel
256 * clock may not be possible. We try multiple times to find the clock,
257 * each time widening the pixel clock range we look for, up to
261 for (i
= 0; i
< 25; ++i
) {
264 memset(ctx
, 0, sizeof(*ctx
));
265 if (pck
> 1000 * i
* i
* i
)
266 ctx
->pck_min
= max(pck
- 1000 * i
* i
* i
, 0lu);
269 ctx
->pck_max
= pck
+ 1000 * i
* i
* i
;
271 ok
= dss_div_calc(pck
, ctx
->pck_min
, dpi_calc_dss_cb
, ctx
);
281 static int dpi_set_dsi_clk(struct dpi_data
*dpi
, enum omap_channel channel
,
282 unsigned long pck_req
, unsigned long *fck
, int *lck_div
,
285 struct dpi_clk_calc_ctx ctx
;
289 ok
= dpi_dsi_clk_calc(dpi
, pck_req
, &ctx
);
293 r
= dss_pll_set_config(dpi
->pll
, &ctx
.dsi_cinfo
);
297 dss_select_lcd_clk_source(channel
,
298 dpi_get_alt_clk_src(channel
));
300 dpi
->mgr_config
.clock_info
= ctx
.dispc_cinfo
;
302 *fck
= ctx
.dsi_cinfo
.clkout
[HSDIV_DISPC
];
303 *lck_div
= ctx
.dispc_cinfo
.lck_div
;
304 *pck_div
= ctx
.dispc_cinfo
.pck_div
;
309 static int dpi_set_dispc_clk(struct dpi_data
*dpi
, unsigned long pck_req
,
310 unsigned long *fck
, int *lck_div
, int *pck_div
)
312 struct dpi_clk_calc_ctx ctx
;
316 ok
= dpi_dss_clk_calc(pck_req
, &ctx
);
320 r
= dss_set_fck_rate(ctx
.fck
);
324 dpi
->mgr_config
.clock_info
= ctx
.dispc_cinfo
;
327 *lck_div
= ctx
.dispc_cinfo
.lck_div
;
328 *pck_div
= ctx
.dispc_cinfo
.pck_div
;
333 static int dpi_set_mode(struct dpi_data
*dpi
)
335 struct omap_dss_device
*out
= &dpi
->output
;
336 struct omap_overlay_manager
*mgr
= out
->manager
;
337 struct omap_video_timings
*t
= &dpi
->timings
;
338 int lck_div
= 0, pck_div
= 0;
339 unsigned long fck
= 0;
344 r
= dpi_set_dsi_clk(dpi
, mgr
->id
, t
->pixelclock
, &fck
,
347 r
= dpi_set_dispc_clk(dpi
, t
->pixelclock
, &fck
,
352 pck
= fck
/ lck_div
/ pck_div
;
354 if (pck
!= t
->pixelclock
) {
355 DSSWARN("Could not find exact pixel clock. Requested %d Hz, got %lu Hz\n",
361 dss_mgr_set_timings(mgr
, t
);
366 static void dpi_config_lcd_manager(struct dpi_data
*dpi
)
368 struct omap_dss_device
*out
= &dpi
->output
;
369 struct omap_overlay_manager
*mgr
= out
->manager
;
371 dpi
->mgr_config
.io_pad_mode
= DSS_IO_PAD_MODE_BYPASS
;
373 dpi
->mgr_config
.stallmode
= false;
374 dpi
->mgr_config
.fifohandcheck
= false;
376 dpi
->mgr_config
.video_port_width
= dpi
->data_lines
;
378 dpi
->mgr_config
.lcden_sig_polarity
= 0;
380 dss_mgr_set_lcd_config(mgr
, &dpi
->mgr_config
);
383 static int dpi_display_enable(struct omap_dss_device
*dssdev
)
385 struct dpi_data
*dpi
= dpi_get_data_from_dssdev(dssdev
);
386 struct omap_dss_device
*out
= &dpi
->output
;
389 mutex_lock(&dpi
->lock
);
391 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI
) && !dpi
->vdds_dsi_reg
) {
392 DSSERR("no VDSS_DSI regulator\n");
397 if (out
== NULL
|| out
->manager
== NULL
) {
398 DSSERR("failed to enable display: no output/manager\n");
403 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI
)) {
404 r
= regulator_enable(dpi
->vdds_dsi_reg
);
409 r
= dispc_runtime_get();
413 r
= dss_dpi_select_source(out
->port_num
, out
->manager
->id
);
418 r
= dss_pll_enable(dpi
->pll
);
420 goto err_dsi_pll_init
;
423 r
= dpi_set_mode(dpi
);
427 dpi_config_lcd_manager(dpi
);
431 r
= dss_mgr_enable(out
->manager
);
435 mutex_unlock(&dpi
->lock
);
442 dss_pll_disable(dpi
->pll
);
447 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI
))
448 regulator_disable(dpi
->vdds_dsi_reg
);
452 mutex_unlock(&dpi
->lock
);
456 static void dpi_display_disable(struct omap_dss_device
*dssdev
)
458 struct dpi_data
*dpi
= dpi_get_data_from_dssdev(dssdev
);
459 struct omap_overlay_manager
*mgr
= dpi
->output
.manager
;
461 mutex_lock(&dpi
->lock
);
463 dss_mgr_disable(mgr
);
466 dss_select_lcd_clk_source(mgr
->id
, OMAP_DSS_CLK_SRC_FCK
);
467 dss_pll_disable(dpi
->pll
);
472 if (dss_has_feature(FEAT_DPI_USES_VDDS_DSI
))
473 regulator_disable(dpi
->vdds_dsi_reg
);
475 mutex_unlock(&dpi
->lock
);
478 static void dpi_set_timings(struct omap_dss_device
*dssdev
,
479 struct omap_video_timings
*timings
)
481 struct dpi_data
*dpi
= dpi_get_data_from_dssdev(dssdev
);
483 DSSDBG("dpi_set_timings\n");
485 mutex_lock(&dpi
->lock
);
487 dpi
->timings
= *timings
;
489 mutex_unlock(&dpi
->lock
);
492 static void dpi_get_timings(struct omap_dss_device
*dssdev
,
493 struct omap_video_timings
*timings
)
495 struct dpi_data
*dpi
= dpi_get_data_from_dssdev(dssdev
);
497 mutex_lock(&dpi
->lock
);
499 *timings
= dpi
->timings
;
501 mutex_unlock(&dpi
->lock
);
504 static int dpi_check_timings(struct omap_dss_device
*dssdev
,
505 struct omap_video_timings
*timings
)
507 struct dpi_data
*dpi
= dpi_get_data_from_dssdev(dssdev
);
508 struct omap_overlay_manager
*mgr
= dpi
->output
.manager
;
509 int lck_div
, pck_div
;
512 struct dpi_clk_calc_ctx ctx
;
515 if (mgr
&& !dispc_mgr_timings_ok(mgr
->id
, timings
))
518 if (timings
->pixelclock
== 0)
522 ok
= dpi_dsi_clk_calc(dpi
, timings
->pixelclock
, &ctx
);
526 fck
= ctx
.dsi_cinfo
.clkout
[HSDIV_DISPC
];
528 ok
= dpi_dss_clk_calc(timings
->pixelclock
, &ctx
);
535 lck_div
= ctx
.dispc_cinfo
.lck_div
;
536 pck_div
= ctx
.dispc_cinfo
.pck_div
;
538 pck
= fck
/ lck_div
/ pck_div
;
540 timings
->pixelclock
= pck
;
545 static void dpi_set_data_lines(struct omap_dss_device
*dssdev
, int data_lines
)
547 struct dpi_data
*dpi
= dpi_get_data_from_dssdev(dssdev
);
549 mutex_lock(&dpi
->lock
);
551 dpi
->data_lines
= data_lines
;
553 mutex_unlock(&dpi
->lock
);
556 static int dpi_verify_dsi_pll(struct dss_pll
*pll
)
560 /* do initial setup with the PLL to see if it is operational */
562 r
= dss_pll_enable(pll
);
566 dss_pll_disable(pll
);
571 static int dpi_init_regulator(struct dpi_data
*dpi
)
573 struct regulator
*vdds_dsi
;
575 if (!dss_has_feature(FEAT_DPI_USES_VDDS_DSI
))
578 if (dpi
->vdds_dsi_reg
)
581 vdds_dsi
= devm_regulator_get(&dpi
->pdev
->dev
, "vdds_dsi");
582 if (IS_ERR(vdds_dsi
)) {
583 if (PTR_ERR(vdds_dsi
) != -EPROBE_DEFER
)
584 DSSERR("can't get VDDS_DSI regulator\n");
585 return PTR_ERR(vdds_dsi
);
588 dpi
->vdds_dsi_reg
= vdds_dsi
;
593 static void dpi_init_pll(struct dpi_data
*dpi
)
600 pll
= dpi_get_pll(dpi
->output
.dispc_channel
);
604 /* On DRA7 we need to set a mux to use the PLL */
605 if (omapdss_get_version() == OMAPDSS_VER_DRA7xx
)
606 dss_ctrl_pll_set_control_mux(pll
->id
, dpi
->output
.dispc_channel
);
608 if (dpi_verify_dsi_pll(pll
)) {
609 DSSWARN("DSI PLL not operational\n");
617 * Return a hardcoded channel for the DPI output. This should work for
618 * current use cases, but this can be later expanded to either resolve
619 * the channel in some more dynamic manner, or get the channel as a user
622 static enum omap_channel
dpi_get_channel(int port_num
)
624 switch (omapdss_get_version()) {
625 case OMAPDSS_VER_OMAP24xx
:
626 case OMAPDSS_VER_OMAP34xx_ES1
:
627 case OMAPDSS_VER_OMAP34xx_ES3
:
628 case OMAPDSS_VER_OMAP3630
:
629 case OMAPDSS_VER_AM35xx
:
630 case OMAPDSS_VER_AM43xx
:
631 return OMAP_DSS_CHANNEL_LCD
;
633 case OMAPDSS_VER_DRA7xx
:
636 return OMAP_DSS_CHANNEL_LCD3
;
638 return OMAP_DSS_CHANNEL_LCD2
;
641 return OMAP_DSS_CHANNEL_LCD
;
644 case OMAPDSS_VER_OMAP4430_ES1
:
645 case OMAPDSS_VER_OMAP4430_ES2
:
646 case OMAPDSS_VER_OMAP4
:
647 return OMAP_DSS_CHANNEL_LCD2
;
649 case OMAPDSS_VER_OMAP5
:
650 return OMAP_DSS_CHANNEL_LCD3
;
653 DSSWARN("unsupported DSS version\n");
654 return OMAP_DSS_CHANNEL_LCD
;
658 static int dpi_connect(struct omap_dss_device
*dssdev
,
659 struct omap_dss_device
*dst
)
661 struct dpi_data
*dpi
= dpi_get_data_from_dssdev(dssdev
);
662 struct omap_overlay_manager
*mgr
;
665 r
= dpi_init_regulator(dpi
);
671 mgr
= omap_dss_get_overlay_manager(dssdev
->dispc_channel
);
675 r
= dss_mgr_connect(mgr
, dssdev
);
679 r
= omapdss_output_set_device(dssdev
, dst
);
681 DSSERR("failed to connect output to new device: %s\n",
683 dss_mgr_disconnect(mgr
, dssdev
);
690 static void dpi_disconnect(struct omap_dss_device
*dssdev
,
691 struct omap_dss_device
*dst
)
693 WARN_ON(dst
!= dssdev
->dst
);
695 if (dst
!= dssdev
->dst
)
698 omapdss_output_unset_device(dssdev
);
701 dss_mgr_disconnect(dssdev
->manager
, dssdev
);
704 static const struct omapdss_dpi_ops dpi_ops
= {
705 .connect
= dpi_connect
,
706 .disconnect
= dpi_disconnect
,
708 .enable
= dpi_display_enable
,
709 .disable
= dpi_display_disable
,
711 .check_timings
= dpi_check_timings
,
712 .set_timings
= dpi_set_timings
,
713 .get_timings
= dpi_get_timings
,
715 .set_data_lines
= dpi_set_data_lines
,
718 static void dpi_init_output(struct platform_device
*pdev
)
720 struct dpi_data
*dpi
= dpi_get_data_from_pdev(pdev
);
721 struct omap_dss_device
*out
= &dpi
->output
;
723 out
->dev
= &pdev
->dev
;
724 out
->id
= OMAP_DSS_OUTPUT_DPI
;
725 out
->output_type
= OMAP_DISPLAY_TYPE_DPI
;
727 out
->dispc_channel
= dpi_get_channel(0);
728 out
->ops
.dpi
= &dpi_ops
;
729 out
->owner
= THIS_MODULE
;
731 omapdss_register_output(out
);
734 static void __exit
dpi_uninit_output(struct platform_device
*pdev
)
736 struct dpi_data
*dpi
= dpi_get_data_from_pdev(pdev
);
737 struct omap_dss_device
*out
= &dpi
->output
;
739 omapdss_unregister_output(out
);
742 static void dpi_init_output_port(struct platform_device
*pdev
,
743 struct device_node
*port
)
745 struct dpi_data
*dpi
= port
->data
;
746 struct omap_dss_device
*out
= &dpi
->output
;
750 r
= of_property_read_u32(port
, "reg", &port_num
);
767 out
->dev
= &pdev
->dev
;
768 out
->id
= OMAP_DSS_OUTPUT_DPI
;
769 out
->output_type
= OMAP_DISPLAY_TYPE_DPI
;
770 out
->dispc_channel
= dpi_get_channel(port_num
);
771 out
->port_num
= port_num
;
772 out
->ops
.dpi
= &dpi_ops
;
773 out
->owner
= THIS_MODULE
;
775 omapdss_register_output(out
);
778 static void __exit
dpi_uninit_output_port(struct device_node
*port
)
780 struct dpi_data
*dpi
= port
->data
;
781 struct omap_dss_device
*out
= &dpi
->output
;
783 omapdss_unregister_output(out
);
786 static int omap_dpi_probe(struct platform_device
*pdev
)
788 struct dpi_data
*dpi
;
790 dpi
= devm_kzalloc(&pdev
->dev
, sizeof(*dpi
), GFP_KERNEL
);
796 dev_set_drvdata(&pdev
->dev
, dpi
);
798 mutex_init(&dpi
->lock
);
800 dpi_init_output(pdev
);
805 static int __exit
omap_dpi_remove(struct platform_device
*pdev
)
807 dpi_uninit_output(pdev
);
812 static struct platform_driver omap_dpi_driver
= {
813 .probe
= omap_dpi_probe
,
814 .remove
= __exit_p(omap_dpi_remove
),
816 .name
= "omapdss_dpi",
817 .suppress_bind_attrs
= true,
821 int __init
dpi_init_platform_driver(void)
823 return platform_driver_register(&omap_dpi_driver
);
826 void __exit
dpi_uninit_platform_driver(void)
828 platform_driver_unregister(&omap_dpi_driver
);
831 int __init
dpi_init_port(struct platform_device
*pdev
, struct device_node
*port
)
833 struct dpi_data
*dpi
;
834 struct device_node
*ep
;
838 dpi
= devm_kzalloc(&pdev
->dev
, sizeof(*dpi
), GFP_KERNEL
);
842 ep
= omapdss_of_get_next_endpoint(port
, NULL
);
846 r
= of_property_read_u32(ep
, "data-lines", &datalines
);
848 DSSERR("failed to parse datalines\n");
852 dpi
->data_lines
= datalines
;
859 mutex_init(&dpi
->lock
);
861 dpi_init_output_port(pdev
, port
);
863 dpi
->port_initialized
= true;
873 void __exit
dpi_uninit_port(struct device_node
*port
)
875 struct dpi_data
*dpi
= port
->data
;
877 if (!dpi
->port_initialized
)
880 dpi_uninit_output_port(port
);