OMAPDSS: AnalogTV: Add ops
[deliverable/linux.git] / drivers / video / omap2 / dss / apply.c
1 /*
2 * Copyright (C) 2011 Texas Instruments
3 * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18 #define DSS_SUBSYS_NAME "APPLY"
19
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/slab.h>
23 #include <linux/spinlock.h>
24 #include <linux/jiffies.h>
25
26 #include <video/omapdss.h>
27
28 #include "dss.h"
29 #include "dss_features.h"
30 #include "dispc-compat.h"
31
32 /*
33 * We have 4 levels of cache for the dispc settings. First two are in SW and
34 * the latter two in HW.
35 *
36 * set_info()
37 * v
38 * +--------------------+
39 * | user_info |
40 * +--------------------+
41 * v
42 * apply()
43 * v
44 * +--------------------+
45 * | info |
46 * +--------------------+
47 * v
48 * write_regs()
49 * v
50 * +--------------------+
51 * | shadow registers |
52 * +--------------------+
53 * v
54 * VFP or lcd/digit_enable
55 * v
56 * +--------------------+
57 * | registers |
58 * +--------------------+
59 */
60
61 struct ovl_priv_data {
62
63 bool user_info_dirty;
64 struct omap_overlay_info user_info;
65
66 bool info_dirty;
67 struct omap_overlay_info info;
68
69 bool shadow_info_dirty;
70
71 bool extra_info_dirty;
72 bool shadow_extra_info_dirty;
73
74 bool enabled;
75 u32 fifo_low, fifo_high;
76
77 /*
78 * True if overlay is to be enabled. Used to check and calculate configs
79 * for the overlay before it is enabled in the HW.
80 */
81 bool enabling;
82 };
83
84 struct mgr_priv_data {
85
86 bool user_info_dirty;
87 struct omap_overlay_manager_info user_info;
88
89 bool info_dirty;
90 struct omap_overlay_manager_info info;
91
92 bool shadow_info_dirty;
93
94 /* If true, GO bit is up and shadow registers cannot be written.
95 * Never true for manual update displays */
96 bool busy;
97
98 /* If true, dispc output is enabled */
99 bool updating;
100
101 /* If true, a display is enabled using this manager */
102 bool enabled;
103
104 bool extra_info_dirty;
105 bool shadow_extra_info_dirty;
106
107 struct omap_video_timings timings;
108 struct dss_lcd_mgr_config lcd_config;
109
110 void (*framedone_handler)(void *);
111 void *framedone_handler_data;
112 };
113
114 static struct {
115 struct ovl_priv_data ovl_priv_data_array[MAX_DSS_OVERLAYS];
116 struct mgr_priv_data mgr_priv_data_array[MAX_DSS_MANAGERS];
117
118 bool irq_enabled;
119 } dss_data;
120
121 /* protects dss_data */
122 static spinlock_t data_lock;
123 /* lock for blocking functions */
124 static DEFINE_MUTEX(apply_lock);
125 static DECLARE_COMPLETION(extra_updated_completion);
126
127 static void dss_register_vsync_isr(void);
128
129 static struct ovl_priv_data *get_ovl_priv(struct omap_overlay *ovl)
130 {
131 return &dss_data.ovl_priv_data_array[ovl->id];
132 }
133
134 static struct mgr_priv_data *get_mgr_priv(struct omap_overlay_manager *mgr)
135 {
136 return &dss_data.mgr_priv_data_array[mgr->id];
137 }
138
139 static void apply_init_priv(void)
140 {
141 const int num_ovls = dss_feat_get_num_ovls();
142 struct mgr_priv_data *mp;
143 int i;
144
145 spin_lock_init(&data_lock);
146
147 for (i = 0; i < num_ovls; ++i) {
148 struct ovl_priv_data *op;
149
150 op = &dss_data.ovl_priv_data_array[i];
151
152 op->info.global_alpha = 255;
153
154 switch (i) {
155 case 0:
156 op->info.zorder = 0;
157 break;
158 case 1:
159 op->info.zorder =
160 dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 3 : 0;
161 break;
162 case 2:
163 op->info.zorder =
164 dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 2 : 0;
165 break;
166 case 3:
167 op->info.zorder =
168 dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 1 : 0;
169 break;
170 }
171
172 op->user_info = op->info;
173 }
174
175 /*
176 * Initialize some of the lcd_config fields for TV manager, this lets
177 * us prevent checking if the manager is LCD or TV at some places
178 */
179 mp = &dss_data.mgr_priv_data_array[OMAP_DSS_CHANNEL_DIGIT];
180
181 mp->lcd_config.video_port_width = 24;
182 mp->lcd_config.clock_info.lck_div = 1;
183 mp->lcd_config.clock_info.pck_div = 1;
184 }
185
186 /*
187 * A LCD manager's stallmode decides whether it is in manual or auto update. TV
188 * manager is always auto update, stallmode field for TV manager is false by
189 * default
190 */
191 static bool ovl_manual_update(struct omap_overlay *ovl)
192 {
193 struct mgr_priv_data *mp = get_mgr_priv(ovl->manager);
194
195 return mp->lcd_config.stallmode;
196 }
197
198 static bool mgr_manual_update(struct omap_overlay_manager *mgr)
199 {
200 struct mgr_priv_data *mp = get_mgr_priv(mgr);
201
202 return mp->lcd_config.stallmode;
203 }
204
205 static int dss_check_settings_low(struct omap_overlay_manager *mgr,
206 bool applying)
207 {
208 struct omap_overlay_info *oi;
209 struct omap_overlay_manager_info *mi;
210 struct omap_overlay *ovl;
211 struct omap_overlay_info *ois[MAX_DSS_OVERLAYS];
212 struct ovl_priv_data *op;
213 struct mgr_priv_data *mp;
214
215 mp = get_mgr_priv(mgr);
216
217 if (!mp->enabled)
218 return 0;
219
220 if (applying && mp->user_info_dirty)
221 mi = &mp->user_info;
222 else
223 mi = &mp->info;
224
225 /* collect the infos to be tested into the array */
226 list_for_each_entry(ovl, &mgr->overlays, list) {
227 op = get_ovl_priv(ovl);
228
229 if (!op->enabled && !op->enabling)
230 oi = NULL;
231 else if (applying && op->user_info_dirty)
232 oi = &op->user_info;
233 else
234 oi = &op->info;
235
236 ois[ovl->id] = oi;
237 }
238
239 return dss_mgr_check(mgr, mi, &mp->timings, &mp->lcd_config, ois);
240 }
241
242 /*
243 * check manager and overlay settings using overlay_info from data->info
244 */
245 static int dss_check_settings(struct omap_overlay_manager *mgr)
246 {
247 return dss_check_settings_low(mgr, false);
248 }
249
250 /*
251 * check manager and overlay settings using overlay_info from ovl->info if
252 * dirty and from data->info otherwise
253 */
254 static int dss_check_settings_apply(struct omap_overlay_manager *mgr)
255 {
256 return dss_check_settings_low(mgr, true);
257 }
258
259 static bool need_isr(void)
260 {
261 const int num_mgrs = dss_feat_get_num_mgrs();
262 int i;
263
264 for (i = 0; i < num_mgrs; ++i) {
265 struct omap_overlay_manager *mgr;
266 struct mgr_priv_data *mp;
267 struct omap_overlay *ovl;
268
269 mgr = omap_dss_get_overlay_manager(i);
270 mp = get_mgr_priv(mgr);
271
272 if (!mp->enabled)
273 continue;
274
275 if (mgr_manual_update(mgr)) {
276 /* to catch FRAMEDONE */
277 if (mp->updating)
278 return true;
279 } else {
280 /* to catch GO bit going down */
281 if (mp->busy)
282 return true;
283
284 /* to write new values to registers */
285 if (mp->info_dirty)
286 return true;
287
288 /* to set GO bit */
289 if (mp->shadow_info_dirty)
290 return true;
291
292 /*
293 * NOTE: we don't check extra_info flags for disabled
294 * managers, once the manager is enabled, the extra_info
295 * related manager changes will be taken in by HW.
296 */
297
298 /* to write new values to registers */
299 if (mp->extra_info_dirty)
300 return true;
301
302 /* to set GO bit */
303 if (mp->shadow_extra_info_dirty)
304 return true;
305
306 list_for_each_entry(ovl, &mgr->overlays, list) {
307 struct ovl_priv_data *op;
308
309 op = get_ovl_priv(ovl);
310
311 /*
312 * NOTE: we check extra_info flags even for
313 * disabled overlays, as extra_infos need to be
314 * always written.
315 */
316
317 /* to write new values to registers */
318 if (op->extra_info_dirty)
319 return true;
320
321 /* to set GO bit */
322 if (op->shadow_extra_info_dirty)
323 return true;
324
325 if (!op->enabled)
326 continue;
327
328 /* to write new values to registers */
329 if (op->info_dirty)
330 return true;
331
332 /* to set GO bit */
333 if (op->shadow_info_dirty)
334 return true;
335 }
336 }
337 }
338
339 return false;
340 }
341
342 static bool need_go(struct omap_overlay_manager *mgr)
343 {
344 struct omap_overlay *ovl;
345 struct mgr_priv_data *mp;
346 struct ovl_priv_data *op;
347
348 mp = get_mgr_priv(mgr);
349
350 if (mp->shadow_info_dirty || mp->shadow_extra_info_dirty)
351 return true;
352
353 list_for_each_entry(ovl, &mgr->overlays, list) {
354 op = get_ovl_priv(ovl);
355 if (op->shadow_info_dirty || op->shadow_extra_info_dirty)
356 return true;
357 }
358
359 return false;
360 }
361
362 /* returns true if an extra_info field is currently being updated */
363 static bool extra_info_update_ongoing(void)
364 {
365 const int num_mgrs = dss_feat_get_num_mgrs();
366 int i;
367
368 for (i = 0; i < num_mgrs; ++i) {
369 struct omap_overlay_manager *mgr;
370 struct omap_overlay *ovl;
371 struct mgr_priv_data *mp;
372
373 mgr = omap_dss_get_overlay_manager(i);
374 mp = get_mgr_priv(mgr);
375
376 if (!mp->enabled)
377 continue;
378
379 if (!mp->updating)
380 continue;
381
382 if (mp->extra_info_dirty || mp->shadow_extra_info_dirty)
383 return true;
384
385 list_for_each_entry(ovl, &mgr->overlays, list) {
386 struct ovl_priv_data *op = get_ovl_priv(ovl);
387
388 if (op->extra_info_dirty || op->shadow_extra_info_dirty)
389 return true;
390 }
391 }
392
393 return false;
394 }
395
396 /* wait until no extra_info updates are pending */
397 static void wait_pending_extra_info_updates(void)
398 {
399 bool updating;
400 unsigned long flags;
401 unsigned long t;
402 int r;
403
404 spin_lock_irqsave(&data_lock, flags);
405
406 updating = extra_info_update_ongoing();
407
408 if (!updating) {
409 spin_unlock_irqrestore(&data_lock, flags);
410 return;
411 }
412
413 init_completion(&extra_updated_completion);
414
415 spin_unlock_irqrestore(&data_lock, flags);
416
417 t = msecs_to_jiffies(500);
418 r = wait_for_completion_timeout(&extra_updated_completion, t);
419 if (r == 0)
420 DSSWARN("timeout in wait_pending_extra_info_updates\n");
421 }
422
423 static struct omap_dss_device *dss_mgr_get_device(struct omap_overlay_manager *mgr)
424 {
425 struct omap_dss_device *dssdev;
426
427 dssdev = mgr->output;
428 if (dssdev == NULL)
429 return NULL;
430
431 while (dssdev->device)
432 dssdev = dssdev->device;
433
434 if (dssdev->driver)
435 return dssdev;
436 else
437 return NULL;
438 }
439
440 static struct omap_dss_device *dss_ovl_get_device(struct omap_overlay *ovl)
441 {
442 return ovl->manager ? dss_mgr_get_device(ovl->manager) : NULL;
443 }
444
445 static int dss_mgr_wait_for_vsync(struct omap_overlay_manager *mgr)
446 {
447 unsigned long timeout = msecs_to_jiffies(500);
448 u32 irq;
449 int r;
450
451 if (mgr->output == NULL)
452 return -ENODEV;
453
454 r = dispc_runtime_get();
455 if (r)
456 return r;
457
458 switch (mgr->output->id) {
459 case OMAP_DSS_OUTPUT_VENC:
460 irq = DISPC_IRQ_EVSYNC_ODD;
461 break;
462 case OMAP_DSS_OUTPUT_HDMI:
463 irq = DISPC_IRQ_EVSYNC_EVEN;
464 break;
465 default:
466 irq = dispc_mgr_get_vsync_irq(mgr->id);
467 break;
468 }
469
470 r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
471
472 dispc_runtime_put();
473
474 return r;
475 }
476
477 static int dss_mgr_wait_for_go(struct omap_overlay_manager *mgr)
478 {
479 unsigned long timeout = msecs_to_jiffies(500);
480 struct mgr_priv_data *mp = get_mgr_priv(mgr);
481 u32 irq;
482 unsigned long flags;
483 int r;
484 int i;
485
486 spin_lock_irqsave(&data_lock, flags);
487
488 if (mgr_manual_update(mgr)) {
489 spin_unlock_irqrestore(&data_lock, flags);
490 return 0;
491 }
492
493 if (!mp->enabled) {
494 spin_unlock_irqrestore(&data_lock, flags);
495 return 0;
496 }
497
498 spin_unlock_irqrestore(&data_lock, flags);
499
500 r = dispc_runtime_get();
501 if (r)
502 return r;
503
504 irq = dispc_mgr_get_vsync_irq(mgr->id);
505
506 i = 0;
507 while (1) {
508 bool shadow_dirty, dirty;
509
510 spin_lock_irqsave(&data_lock, flags);
511 dirty = mp->info_dirty;
512 shadow_dirty = mp->shadow_info_dirty;
513 spin_unlock_irqrestore(&data_lock, flags);
514
515 if (!dirty && !shadow_dirty) {
516 r = 0;
517 break;
518 }
519
520 /* 4 iterations is the worst case:
521 * 1 - initial iteration, dirty = true (between VFP and VSYNC)
522 * 2 - first VSYNC, dirty = true
523 * 3 - dirty = false, shadow_dirty = true
524 * 4 - shadow_dirty = false */
525 if (i++ == 3) {
526 DSSERR("mgr(%d)->wait_for_go() not finishing\n",
527 mgr->id);
528 r = 0;
529 break;
530 }
531
532 r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
533 if (r == -ERESTARTSYS)
534 break;
535
536 if (r) {
537 DSSERR("mgr(%d)->wait_for_go() timeout\n", mgr->id);
538 break;
539 }
540 }
541
542 dispc_runtime_put();
543
544 return r;
545 }
546
547 static int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl)
548 {
549 unsigned long timeout = msecs_to_jiffies(500);
550 struct ovl_priv_data *op;
551 struct mgr_priv_data *mp;
552 u32 irq;
553 unsigned long flags;
554 int r;
555 int i;
556
557 if (!ovl->manager)
558 return 0;
559
560 mp = get_mgr_priv(ovl->manager);
561
562 spin_lock_irqsave(&data_lock, flags);
563
564 if (ovl_manual_update(ovl)) {
565 spin_unlock_irqrestore(&data_lock, flags);
566 return 0;
567 }
568
569 if (!mp->enabled) {
570 spin_unlock_irqrestore(&data_lock, flags);
571 return 0;
572 }
573
574 spin_unlock_irqrestore(&data_lock, flags);
575
576 r = dispc_runtime_get();
577 if (r)
578 return r;
579
580 irq = dispc_mgr_get_vsync_irq(ovl->manager->id);
581
582 op = get_ovl_priv(ovl);
583 i = 0;
584 while (1) {
585 bool shadow_dirty, dirty;
586
587 spin_lock_irqsave(&data_lock, flags);
588 dirty = op->info_dirty;
589 shadow_dirty = op->shadow_info_dirty;
590 spin_unlock_irqrestore(&data_lock, flags);
591
592 if (!dirty && !shadow_dirty) {
593 r = 0;
594 break;
595 }
596
597 /* 4 iterations is the worst case:
598 * 1 - initial iteration, dirty = true (between VFP and VSYNC)
599 * 2 - first VSYNC, dirty = true
600 * 3 - dirty = false, shadow_dirty = true
601 * 4 - shadow_dirty = false */
602 if (i++ == 3) {
603 DSSERR("ovl(%d)->wait_for_go() not finishing\n",
604 ovl->id);
605 r = 0;
606 break;
607 }
608
609 r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
610 if (r == -ERESTARTSYS)
611 break;
612
613 if (r) {
614 DSSERR("ovl(%d)->wait_for_go() timeout\n", ovl->id);
615 break;
616 }
617 }
618
619 dispc_runtime_put();
620
621 return r;
622 }
623
624 static void dss_ovl_write_regs(struct omap_overlay *ovl)
625 {
626 struct ovl_priv_data *op = get_ovl_priv(ovl);
627 struct omap_overlay_info *oi;
628 bool replication;
629 struct mgr_priv_data *mp;
630 int r;
631
632 DSSDBG("writing ovl %d regs", ovl->id);
633
634 if (!op->enabled || !op->info_dirty)
635 return;
636
637 oi = &op->info;
638
639 mp = get_mgr_priv(ovl->manager);
640
641 replication = dss_ovl_use_replication(mp->lcd_config, oi->color_mode);
642
643 r = dispc_ovl_setup(ovl->id, oi, replication, &mp->timings, false);
644 if (r) {
645 /*
646 * We can't do much here, as this function can be called from
647 * vsync interrupt.
648 */
649 DSSERR("dispc_ovl_setup failed for ovl %d\n", ovl->id);
650
651 /* This will leave fifo configurations in a nonoptimal state */
652 op->enabled = false;
653 dispc_ovl_enable(ovl->id, false);
654 return;
655 }
656
657 op->info_dirty = false;
658 if (mp->updating)
659 op->shadow_info_dirty = true;
660 }
661
662 static void dss_ovl_write_regs_extra(struct omap_overlay *ovl)
663 {
664 struct ovl_priv_data *op = get_ovl_priv(ovl);
665 struct mgr_priv_data *mp;
666
667 DSSDBG("writing ovl %d regs extra", ovl->id);
668
669 if (!op->extra_info_dirty)
670 return;
671
672 /* note: write also when op->enabled == false, so that the ovl gets
673 * disabled */
674
675 dispc_ovl_enable(ovl->id, op->enabled);
676 dispc_ovl_set_fifo_threshold(ovl->id, op->fifo_low, op->fifo_high);
677
678 mp = get_mgr_priv(ovl->manager);
679
680 op->extra_info_dirty = false;
681 if (mp->updating)
682 op->shadow_extra_info_dirty = true;
683 }
684
685 static void dss_mgr_write_regs(struct omap_overlay_manager *mgr)
686 {
687 struct mgr_priv_data *mp = get_mgr_priv(mgr);
688 struct omap_overlay *ovl;
689
690 DSSDBG("writing mgr %d regs", mgr->id);
691
692 if (!mp->enabled)
693 return;
694
695 WARN_ON(mp->busy);
696
697 /* Commit overlay settings */
698 list_for_each_entry(ovl, &mgr->overlays, list) {
699 dss_ovl_write_regs(ovl);
700 dss_ovl_write_regs_extra(ovl);
701 }
702
703 if (mp->info_dirty) {
704 dispc_mgr_setup(mgr->id, &mp->info);
705
706 mp->info_dirty = false;
707 if (mp->updating)
708 mp->shadow_info_dirty = true;
709 }
710 }
711
712 static void dss_mgr_write_regs_extra(struct omap_overlay_manager *mgr)
713 {
714 struct mgr_priv_data *mp = get_mgr_priv(mgr);
715
716 DSSDBG("writing mgr %d regs extra", mgr->id);
717
718 if (!mp->extra_info_dirty)
719 return;
720
721 dispc_mgr_set_timings(mgr->id, &mp->timings);
722
723 /* lcd_config parameters */
724 if (dss_mgr_is_lcd(mgr->id))
725 dispc_mgr_set_lcd_config(mgr->id, &mp->lcd_config);
726
727 mp->extra_info_dirty = false;
728 if (mp->updating)
729 mp->shadow_extra_info_dirty = true;
730 }
731
732 static void dss_write_regs(void)
733 {
734 const int num_mgrs = omap_dss_get_num_overlay_managers();
735 int i;
736
737 for (i = 0; i < num_mgrs; ++i) {
738 struct omap_overlay_manager *mgr;
739 struct mgr_priv_data *mp;
740 int r;
741
742 mgr = omap_dss_get_overlay_manager(i);
743 mp = get_mgr_priv(mgr);
744
745 if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
746 continue;
747
748 r = dss_check_settings(mgr);
749 if (r) {
750 DSSERR("cannot write registers for manager %s: "
751 "illegal configuration\n", mgr->name);
752 continue;
753 }
754
755 dss_mgr_write_regs(mgr);
756 dss_mgr_write_regs_extra(mgr);
757 }
758 }
759
760 static void dss_set_go_bits(void)
761 {
762 const int num_mgrs = omap_dss_get_num_overlay_managers();
763 int i;
764
765 for (i = 0; i < num_mgrs; ++i) {
766 struct omap_overlay_manager *mgr;
767 struct mgr_priv_data *mp;
768
769 mgr = omap_dss_get_overlay_manager(i);
770 mp = get_mgr_priv(mgr);
771
772 if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
773 continue;
774
775 if (!need_go(mgr))
776 continue;
777
778 mp->busy = true;
779
780 if (!dss_data.irq_enabled && need_isr())
781 dss_register_vsync_isr();
782
783 dispc_mgr_go(mgr->id);
784 }
785
786 }
787
788 static void mgr_clear_shadow_dirty(struct omap_overlay_manager *mgr)
789 {
790 struct omap_overlay *ovl;
791 struct mgr_priv_data *mp;
792 struct ovl_priv_data *op;
793
794 mp = get_mgr_priv(mgr);
795 mp->shadow_info_dirty = false;
796 mp->shadow_extra_info_dirty = false;
797
798 list_for_each_entry(ovl, &mgr->overlays, list) {
799 op = get_ovl_priv(ovl);
800 op->shadow_info_dirty = false;
801 op->shadow_extra_info_dirty = false;
802 }
803 }
804
805 static int dss_mgr_connect_compat(struct omap_overlay_manager *mgr,
806 struct omap_dss_device *dst)
807 {
808 return mgr->set_output(mgr, dst);
809 }
810
811 static void dss_mgr_disconnect_compat(struct omap_overlay_manager *mgr,
812 struct omap_dss_device *dst)
813 {
814 mgr->unset_output(mgr);
815 }
816
817 static void dss_mgr_start_update_compat(struct omap_overlay_manager *mgr)
818 {
819 struct mgr_priv_data *mp = get_mgr_priv(mgr);
820 unsigned long flags;
821 int r;
822
823 spin_lock_irqsave(&data_lock, flags);
824
825 WARN_ON(mp->updating);
826
827 r = dss_check_settings(mgr);
828 if (r) {
829 DSSERR("cannot start manual update: illegal configuration\n");
830 spin_unlock_irqrestore(&data_lock, flags);
831 return;
832 }
833
834 dss_mgr_write_regs(mgr);
835 dss_mgr_write_regs_extra(mgr);
836
837 mp->updating = true;
838
839 if (!dss_data.irq_enabled && need_isr())
840 dss_register_vsync_isr();
841
842 dispc_mgr_enable_sync(mgr->id);
843
844 spin_unlock_irqrestore(&data_lock, flags);
845 }
846
847 static void dss_apply_irq_handler(void *data, u32 mask);
848
849 static void dss_register_vsync_isr(void)
850 {
851 const int num_mgrs = dss_feat_get_num_mgrs();
852 u32 mask;
853 int r, i;
854
855 mask = 0;
856 for (i = 0; i < num_mgrs; ++i)
857 mask |= dispc_mgr_get_vsync_irq(i);
858
859 for (i = 0; i < num_mgrs; ++i)
860 mask |= dispc_mgr_get_framedone_irq(i);
861
862 r = omap_dispc_register_isr(dss_apply_irq_handler, NULL, mask);
863 WARN_ON(r);
864
865 dss_data.irq_enabled = true;
866 }
867
868 static void dss_unregister_vsync_isr(void)
869 {
870 const int num_mgrs = dss_feat_get_num_mgrs();
871 u32 mask;
872 int r, i;
873
874 mask = 0;
875 for (i = 0; i < num_mgrs; ++i)
876 mask |= dispc_mgr_get_vsync_irq(i);
877
878 for (i = 0; i < num_mgrs; ++i)
879 mask |= dispc_mgr_get_framedone_irq(i);
880
881 r = omap_dispc_unregister_isr(dss_apply_irq_handler, NULL, mask);
882 WARN_ON(r);
883
884 dss_data.irq_enabled = false;
885 }
886
887 static void dss_apply_irq_handler(void *data, u32 mask)
888 {
889 const int num_mgrs = dss_feat_get_num_mgrs();
890 int i;
891 bool extra_updating;
892
893 spin_lock(&data_lock);
894
895 /* clear busy, updating flags, shadow_dirty flags */
896 for (i = 0; i < num_mgrs; i++) {
897 struct omap_overlay_manager *mgr;
898 struct mgr_priv_data *mp;
899
900 mgr = omap_dss_get_overlay_manager(i);
901 mp = get_mgr_priv(mgr);
902
903 if (!mp->enabled)
904 continue;
905
906 mp->updating = dispc_mgr_is_enabled(i);
907
908 if (!mgr_manual_update(mgr)) {
909 bool was_busy = mp->busy;
910 mp->busy = dispc_mgr_go_busy(i);
911
912 if (was_busy && !mp->busy)
913 mgr_clear_shadow_dirty(mgr);
914 }
915 }
916
917 dss_write_regs();
918 dss_set_go_bits();
919
920 extra_updating = extra_info_update_ongoing();
921 if (!extra_updating)
922 complete_all(&extra_updated_completion);
923
924 /* call framedone handlers for manual update displays */
925 for (i = 0; i < num_mgrs; i++) {
926 struct omap_overlay_manager *mgr;
927 struct mgr_priv_data *mp;
928
929 mgr = omap_dss_get_overlay_manager(i);
930 mp = get_mgr_priv(mgr);
931
932 if (!mgr_manual_update(mgr) || !mp->framedone_handler)
933 continue;
934
935 if (mask & dispc_mgr_get_framedone_irq(i))
936 mp->framedone_handler(mp->framedone_handler_data);
937 }
938
939 if (!need_isr())
940 dss_unregister_vsync_isr();
941
942 spin_unlock(&data_lock);
943 }
944
945 static void omap_dss_mgr_apply_ovl(struct omap_overlay *ovl)
946 {
947 struct ovl_priv_data *op;
948
949 op = get_ovl_priv(ovl);
950
951 if (!op->user_info_dirty)
952 return;
953
954 op->user_info_dirty = false;
955 op->info_dirty = true;
956 op->info = op->user_info;
957 }
958
959 static void omap_dss_mgr_apply_mgr(struct omap_overlay_manager *mgr)
960 {
961 struct mgr_priv_data *mp;
962
963 mp = get_mgr_priv(mgr);
964
965 if (!mp->user_info_dirty)
966 return;
967
968 mp->user_info_dirty = false;
969 mp->info_dirty = true;
970 mp->info = mp->user_info;
971 }
972
973 static int omap_dss_mgr_apply(struct omap_overlay_manager *mgr)
974 {
975 unsigned long flags;
976 struct omap_overlay *ovl;
977 int r;
978
979 DSSDBG("omap_dss_mgr_apply(%s)\n", mgr->name);
980
981 spin_lock_irqsave(&data_lock, flags);
982
983 r = dss_check_settings_apply(mgr);
984 if (r) {
985 spin_unlock_irqrestore(&data_lock, flags);
986 DSSERR("failed to apply settings: illegal configuration.\n");
987 return r;
988 }
989
990 /* Configure overlays */
991 list_for_each_entry(ovl, &mgr->overlays, list)
992 omap_dss_mgr_apply_ovl(ovl);
993
994 /* Configure manager */
995 omap_dss_mgr_apply_mgr(mgr);
996
997 dss_write_regs();
998 dss_set_go_bits();
999
1000 spin_unlock_irqrestore(&data_lock, flags);
1001
1002 return 0;
1003 }
1004
1005 static void dss_apply_ovl_enable(struct omap_overlay *ovl, bool enable)
1006 {
1007 struct ovl_priv_data *op;
1008
1009 op = get_ovl_priv(ovl);
1010
1011 if (op->enabled == enable)
1012 return;
1013
1014 op->enabled = enable;
1015 op->extra_info_dirty = true;
1016 }
1017
1018 static void dss_apply_ovl_fifo_thresholds(struct omap_overlay *ovl,
1019 u32 fifo_low, u32 fifo_high)
1020 {
1021 struct ovl_priv_data *op = get_ovl_priv(ovl);
1022
1023 if (op->fifo_low == fifo_low && op->fifo_high == fifo_high)
1024 return;
1025
1026 op->fifo_low = fifo_low;
1027 op->fifo_high = fifo_high;
1028 op->extra_info_dirty = true;
1029 }
1030
1031 static void dss_ovl_setup_fifo(struct omap_overlay *ovl)
1032 {
1033 struct ovl_priv_data *op = get_ovl_priv(ovl);
1034 u32 fifo_low, fifo_high;
1035 bool use_fifo_merge = false;
1036
1037 if (!op->enabled && !op->enabling)
1038 return;
1039
1040 dispc_ovl_compute_fifo_thresholds(ovl->id, &fifo_low, &fifo_high,
1041 use_fifo_merge, ovl_manual_update(ovl));
1042
1043 dss_apply_ovl_fifo_thresholds(ovl, fifo_low, fifo_high);
1044 }
1045
1046 static void dss_mgr_setup_fifos(struct omap_overlay_manager *mgr)
1047 {
1048 struct omap_overlay *ovl;
1049 struct mgr_priv_data *mp;
1050
1051 mp = get_mgr_priv(mgr);
1052
1053 if (!mp->enabled)
1054 return;
1055
1056 list_for_each_entry(ovl, &mgr->overlays, list)
1057 dss_ovl_setup_fifo(ovl);
1058 }
1059
1060 static void dss_setup_fifos(void)
1061 {
1062 const int num_mgrs = omap_dss_get_num_overlay_managers();
1063 struct omap_overlay_manager *mgr;
1064 int i;
1065
1066 for (i = 0; i < num_mgrs; ++i) {
1067 mgr = omap_dss_get_overlay_manager(i);
1068 dss_mgr_setup_fifos(mgr);
1069 }
1070 }
1071
1072 static int dss_mgr_enable_compat(struct omap_overlay_manager *mgr)
1073 {
1074 struct mgr_priv_data *mp = get_mgr_priv(mgr);
1075 unsigned long flags;
1076 int r;
1077
1078 mutex_lock(&apply_lock);
1079
1080 if (mp->enabled)
1081 goto out;
1082
1083 spin_lock_irqsave(&data_lock, flags);
1084
1085 mp->enabled = true;
1086
1087 r = dss_check_settings(mgr);
1088 if (r) {
1089 DSSERR("failed to enable manager %d: check_settings failed\n",
1090 mgr->id);
1091 goto err;
1092 }
1093
1094 dss_setup_fifos();
1095
1096 dss_write_regs();
1097 dss_set_go_bits();
1098
1099 if (!mgr_manual_update(mgr))
1100 mp->updating = true;
1101
1102 if (!dss_data.irq_enabled && need_isr())
1103 dss_register_vsync_isr();
1104
1105 spin_unlock_irqrestore(&data_lock, flags);
1106
1107 if (!mgr_manual_update(mgr))
1108 dispc_mgr_enable_sync(mgr->id);
1109
1110 out:
1111 mutex_unlock(&apply_lock);
1112
1113 return 0;
1114
1115 err:
1116 mp->enabled = false;
1117 spin_unlock_irqrestore(&data_lock, flags);
1118 mutex_unlock(&apply_lock);
1119 return r;
1120 }
1121
1122 static void dss_mgr_disable_compat(struct omap_overlay_manager *mgr)
1123 {
1124 struct mgr_priv_data *mp = get_mgr_priv(mgr);
1125 unsigned long flags;
1126
1127 mutex_lock(&apply_lock);
1128
1129 if (!mp->enabled)
1130 goto out;
1131
1132 if (!mgr_manual_update(mgr))
1133 dispc_mgr_disable_sync(mgr->id);
1134
1135 spin_lock_irqsave(&data_lock, flags);
1136
1137 mp->updating = false;
1138 mp->enabled = false;
1139
1140 spin_unlock_irqrestore(&data_lock, flags);
1141
1142 out:
1143 mutex_unlock(&apply_lock);
1144 }
1145
1146 static int dss_mgr_set_info(struct omap_overlay_manager *mgr,
1147 struct omap_overlay_manager_info *info)
1148 {
1149 struct mgr_priv_data *mp = get_mgr_priv(mgr);
1150 unsigned long flags;
1151 int r;
1152
1153 r = dss_mgr_simple_check(mgr, info);
1154 if (r)
1155 return r;
1156
1157 spin_lock_irqsave(&data_lock, flags);
1158
1159 mp->user_info = *info;
1160 mp->user_info_dirty = true;
1161
1162 spin_unlock_irqrestore(&data_lock, flags);
1163
1164 return 0;
1165 }
1166
1167 static void dss_mgr_get_info(struct omap_overlay_manager *mgr,
1168 struct omap_overlay_manager_info *info)
1169 {
1170 struct mgr_priv_data *mp = get_mgr_priv(mgr);
1171 unsigned long flags;
1172
1173 spin_lock_irqsave(&data_lock, flags);
1174
1175 *info = mp->user_info;
1176
1177 spin_unlock_irqrestore(&data_lock, flags);
1178 }
1179
1180 static int dss_mgr_set_output(struct omap_overlay_manager *mgr,
1181 struct omap_dss_device *output)
1182 {
1183 int r;
1184
1185 mutex_lock(&apply_lock);
1186
1187 if (mgr->output) {
1188 DSSERR("manager %s is already connected to an output\n",
1189 mgr->name);
1190 r = -EINVAL;
1191 goto err;
1192 }
1193
1194 if ((mgr->supported_outputs & output->id) == 0) {
1195 DSSERR("output does not support manager %s\n",
1196 mgr->name);
1197 r = -EINVAL;
1198 goto err;
1199 }
1200
1201 output->manager = mgr;
1202 mgr->output = output;
1203
1204 mutex_unlock(&apply_lock);
1205
1206 return 0;
1207 err:
1208 mutex_unlock(&apply_lock);
1209 return r;
1210 }
1211
1212 static int dss_mgr_unset_output(struct omap_overlay_manager *mgr)
1213 {
1214 int r;
1215 struct mgr_priv_data *mp = get_mgr_priv(mgr);
1216 unsigned long flags;
1217
1218 mutex_lock(&apply_lock);
1219
1220 if (!mgr->output) {
1221 DSSERR("failed to unset output, output not set\n");
1222 r = -EINVAL;
1223 goto err;
1224 }
1225
1226 spin_lock_irqsave(&data_lock, flags);
1227
1228 if (mp->enabled) {
1229 DSSERR("output can't be unset when manager is enabled\n");
1230 r = -EINVAL;
1231 goto err1;
1232 }
1233
1234 spin_unlock_irqrestore(&data_lock, flags);
1235
1236 mgr->output->manager = NULL;
1237 mgr->output = NULL;
1238
1239 mutex_unlock(&apply_lock);
1240
1241 return 0;
1242 err1:
1243 spin_unlock_irqrestore(&data_lock, flags);
1244 err:
1245 mutex_unlock(&apply_lock);
1246
1247 return r;
1248 }
1249
1250 static void dss_apply_mgr_timings(struct omap_overlay_manager *mgr,
1251 const struct omap_video_timings *timings)
1252 {
1253 struct mgr_priv_data *mp = get_mgr_priv(mgr);
1254
1255 mp->timings = *timings;
1256 mp->extra_info_dirty = true;
1257 }
1258
1259 static void dss_mgr_set_timings_compat(struct omap_overlay_manager *mgr,
1260 const struct omap_video_timings *timings)
1261 {
1262 unsigned long flags;
1263 struct mgr_priv_data *mp = get_mgr_priv(mgr);
1264
1265 spin_lock_irqsave(&data_lock, flags);
1266
1267 if (mp->updating) {
1268 DSSERR("cannot set timings for %s: manager needs to be disabled\n",
1269 mgr->name);
1270 goto out;
1271 }
1272
1273 dss_apply_mgr_timings(mgr, timings);
1274 out:
1275 spin_unlock_irqrestore(&data_lock, flags);
1276 }
1277
1278 static void dss_apply_mgr_lcd_config(struct omap_overlay_manager *mgr,
1279 const struct dss_lcd_mgr_config *config)
1280 {
1281 struct mgr_priv_data *mp = get_mgr_priv(mgr);
1282
1283 mp->lcd_config = *config;
1284 mp->extra_info_dirty = true;
1285 }
1286
1287 static void dss_mgr_set_lcd_config_compat(struct omap_overlay_manager *mgr,
1288 const struct dss_lcd_mgr_config *config)
1289 {
1290 unsigned long flags;
1291 struct mgr_priv_data *mp = get_mgr_priv(mgr);
1292
1293 spin_lock_irqsave(&data_lock, flags);
1294
1295 if (mp->enabled) {
1296 DSSERR("cannot apply lcd config for %s: manager needs to be disabled\n",
1297 mgr->name);
1298 goto out;
1299 }
1300
1301 dss_apply_mgr_lcd_config(mgr, config);
1302 out:
1303 spin_unlock_irqrestore(&data_lock, flags);
1304 }
1305
1306 static int dss_ovl_set_info(struct omap_overlay *ovl,
1307 struct omap_overlay_info *info)
1308 {
1309 struct ovl_priv_data *op = get_ovl_priv(ovl);
1310 unsigned long flags;
1311 int r;
1312
1313 r = dss_ovl_simple_check(ovl, info);
1314 if (r)
1315 return r;
1316
1317 spin_lock_irqsave(&data_lock, flags);
1318
1319 op->user_info = *info;
1320 op->user_info_dirty = true;
1321
1322 spin_unlock_irqrestore(&data_lock, flags);
1323
1324 return 0;
1325 }
1326
1327 static void dss_ovl_get_info(struct omap_overlay *ovl,
1328 struct omap_overlay_info *info)
1329 {
1330 struct ovl_priv_data *op = get_ovl_priv(ovl);
1331 unsigned long flags;
1332
1333 spin_lock_irqsave(&data_lock, flags);
1334
1335 *info = op->user_info;
1336
1337 spin_unlock_irqrestore(&data_lock, flags);
1338 }
1339
1340 static int dss_ovl_set_manager(struct omap_overlay *ovl,
1341 struct omap_overlay_manager *mgr)
1342 {
1343 struct ovl_priv_data *op = get_ovl_priv(ovl);
1344 unsigned long flags;
1345 int r;
1346
1347 if (!mgr)
1348 return -EINVAL;
1349
1350 mutex_lock(&apply_lock);
1351
1352 if (ovl->manager) {
1353 DSSERR("overlay '%s' already has a manager '%s'\n",
1354 ovl->name, ovl->manager->name);
1355 r = -EINVAL;
1356 goto err;
1357 }
1358
1359 r = dispc_runtime_get();
1360 if (r)
1361 goto err;
1362
1363 spin_lock_irqsave(&data_lock, flags);
1364
1365 if (op->enabled) {
1366 spin_unlock_irqrestore(&data_lock, flags);
1367 DSSERR("overlay has to be disabled to change the manager\n");
1368 r = -EINVAL;
1369 goto err1;
1370 }
1371
1372 dispc_ovl_set_channel_out(ovl->id, mgr->id);
1373
1374 ovl->manager = mgr;
1375 list_add_tail(&ovl->list, &mgr->overlays);
1376
1377 spin_unlock_irqrestore(&data_lock, flags);
1378
1379 dispc_runtime_put();
1380
1381 mutex_unlock(&apply_lock);
1382
1383 return 0;
1384
1385 err1:
1386 dispc_runtime_put();
1387 err:
1388 mutex_unlock(&apply_lock);
1389 return r;
1390 }
1391
1392 static int dss_ovl_unset_manager(struct omap_overlay *ovl)
1393 {
1394 struct ovl_priv_data *op = get_ovl_priv(ovl);
1395 unsigned long flags;
1396 int r;
1397
1398 mutex_lock(&apply_lock);
1399
1400 if (!ovl->manager) {
1401 DSSERR("failed to detach overlay: manager not set\n");
1402 r = -EINVAL;
1403 goto err;
1404 }
1405
1406 spin_lock_irqsave(&data_lock, flags);
1407
1408 if (op->enabled) {
1409 spin_unlock_irqrestore(&data_lock, flags);
1410 DSSERR("overlay has to be disabled to unset the manager\n");
1411 r = -EINVAL;
1412 goto err;
1413 }
1414
1415 spin_unlock_irqrestore(&data_lock, flags);
1416
1417 /* wait for pending extra_info updates to ensure the ovl is disabled */
1418 wait_pending_extra_info_updates();
1419
1420 /*
1421 * For a manual update display, there is no guarantee that the overlay
1422 * is really disabled in HW, we may need an extra update from this
1423 * manager before the configurations can go in. Return an error if the
1424 * overlay needed an update from the manager.
1425 *
1426 * TODO: Instead of returning an error, try to do a dummy manager update
1427 * here to disable the overlay in hardware. Use the *GATED fields in
1428 * the DISPC_CONFIG registers to do a dummy update.
1429 */
1430 spin_lock_irqsave(&data_lock, flags);
1431
1432 if (ovl_manual_update(ovl) && op->extra_info_dirty) {
1433 spin_unlock_irqrestore(&data_lock, flags);
1434 DSSERR("need an update to change the manager\n");
1435 r = -EINVAL;
1436 goto err;
1437 }
1438
1439 ovl->manager = NULL;
1440 list_del(&ovl->list);
1441
1442 spin_unlock_irqrestore(&data_lock, flags);
1443
1444 mutex_unlock(&apply_lock);
1445
1446 return 0;
1447 err:
1448 mutex_unlock(&apply_lock);
1449 return r;
1450 }
1451
1452 static bool dss_ovl_is_enabled(struct omap_overlay *ovl)
1453 {
1454 struct ovl_priv_data *op = get_ovl_priv(ovl);
1455 unsigned long flags;
1456 bool e;
1457
1458 spin_lock_irqsave(&data_lock, flags);
1459
1460 e = op->enabled;
1461
1462 spin_unlock_irqrestore(&data_lock, flags);
1463
1464 return e;
1465 }
1466
1467 static int dss_ovl_enable(struct omap_overlay *ovl)
1468 {
1469 struct ovl_priv_data *op = get_ovl_priv(ovl);
1470 unsigned long flags;
1471 int r;
1472
1473 mutex_lock(&apply_lock);
1474
1475 if (op->enabled) {
1476 r = 0;
1477 goto err1;
1478 }
1479
1480 if (ovl->manager == NULL || ovl->manager->output == NULL) {
1481 r = -EINVAL;
1482 goto err1;
1483 }
1484
1485 spin_lock_irqsave(&data_lock, flags);
1486
1487 op->enabling = true;
1488
1489 r = dss_check_settings(ovl->manager);
1490 if (r) {
1491 DSSERR("failed to enable overlay %d: check_settings failed\n",
1492 ovl->id);
1493 goto err2;
1494 }
1495
1496 dss_setup_fifos();
1497
1498 op->enabling = false;
1499 dss_apply_ovl_enable(ovl, true);
1500
1501 dss_write_regs();
1502 dss_set_go_bits();
1503
1504 spin_unlock_irqrestore(&data_lock, flags);
1505
1506 mutex_unlock(&apply_lock);
1507
1508 return 0;
1509 err2:
1510 op->enabling = false;
1511 spin_unlock_irqrestore(&data_lock, flags);
1512 err1:
1513 mutex_unlock(&apply_lock);
1514 return r;
1515 }
1516
1517 static int dss_ovl_disable(struct omap_overlay *ovl)
1518 {
1519 struct ovl_priv_data *op = get_ovl_priv(ovl);
1520 unsigned long flags;
1521 int r;
1522
1523 mutex_lock(&apply_lock);
1524
1525 if (!op->enabled) {
1526 r = 0;
1527 goto err;
1528 }
1529
1530 if (ovl->manager == NULL || ovl->manager->output == NULL) {
1531 r = -EINVAL;
1532 goto err;
1533 }
1534
1535 spin_lock_irqsave(&data_lock, flags);
1536
1537 dss_apply_ovl_enable(ovl, false);
1538 dss_write_regs();
1539 dss_set_go_bits();
1540
1541 spin_unlock_irqrestore(&data_lock, flags);
1542
1543 mutex_unlock(&apply_lock);
1544
1545 return 0;
1546
1547 err:
1548 mutex_unlock(&apply_lock);
1549 return r;
1550 }
1551
1552 static int dss_mgr_register_framedone_handler_compat(struct omap_overlay_manager *mgr,
1553 void (*handler)(void *), void *data)
1554 {
1555 struct mgr_priv_data *mp = get_mgr_priv(mgr);
1556
1557 if (mp->framedone_handler)
1558 return -EBUSY;
1559
1560 mp->framedone_handler = handler;
1561 mp->framedone_handler_data = data;
1562
1563 return 0;
1564 }
1565
1566 static void dss_mgr_unregister_framedone_handler_compat(struct omap_overlay_manager *mgr,
1567 void (*handler)(void *), void *data)
1568 {
1569 struct mgr_priv_data *mp = get_mgr_priv(mgr);
1570
1571 WARN_ON(mp->framedone_handler != handler ||
1572 mp->framedone_handler_data != data);
1573
1574 mp->framedone_handler = NULL;
1575 mp->framedone_handler_data = NULL;
1576 }
1577
1578 static const struct dss_mgr_ops apply_mgr_ops = {
1579 .connect = dss_mgr_connect_compat,
1580 .disconnect = dss_mgr_disconnect_compat,
1581 .start_update = dss_mgr_start_update_compat,
1582 .enable = dss_mgr_enable_compat,
1583 .disable = dss_mgr_disable_compat,
1584 .set_timings = dss_mgr_set_timings_compat,
1585 .set_lcd_config = dss_mgr_set_lcd_config_compat,
1586 .register_framedone_handler = dss_mgr_register_framedone_handler_compat,
1587 .unregister_framedone_handler = dss_mgr_unregister_framedone_handler_compat,
1588 };
1589
1590 static int compat_refcnt;
1591 static DEFINE_MUTEX(compat_init_lock);
1592
1593 int omapdss_compat_init(void)
1594 {
1595 struct platform_device *pdev = dss_get_core_pdev();
1596 int i, r;
1597
1598 mutex_lock(&compat_init_lock);
1599
1600 if (compat_refcnt++ > 0)
1601 goto out;
1602
1603 apply_init_priv();
1604
1605 dss_init_overlay_managers_sysfs(pdev);
1606 dss_init_overlays(pdev);
1607
1608 for (i = 0; i < omap_dss_get_num_overlay_managers(); i++) {
1609 struct omap_overlay_manager *mgr;
1610
1611 mgr = omap_dss_get_overlay_manager(i);
1612
1613 mgr->set_output = &dss_mgr_set_output;
1614 mgr->unset_output = &dss_mgr_unset_output;
1615 mgr->apply = &omap_dss_mgr_apply;
1616 mgr->set_manager_info = &dss_mgr_set_info;
1617 mgr->get_manager_info = &dss_mgr_get_info;
1618 mgr->wait_for_go = &dss_mgr_wait_for_go;
1619 mgr->wait_for_vsync = &dss_mgr_wait_for_vsync;
1620 mgr->get_device = &dss_mgr_get_device;
1621 }
1622
1623 for (i = 0; i < omap_dss_get_num_overlays(); i++) {
1624 struct omap_overlay *ovl = omap_dss_get_overlay(i);
1625
1626 ovl->is_enabled = &dss_ovl_is_enabled;
1627 ovl->enable = &dss_ovl_enable;
1628 ovl->disable = &dss_ovl_disable;
1629 ovl->set_manager = &dss_ovl_set_manager;
1630 ovl->unset_manager = &dss_ovl_unset_manager;
1631 ovl->set_overlay_info = &dss_ovl_set_info;
1632 ovl->get_overlay_info = &dss_ovl_get_info;
1633 ovl->wait_for_go = &dss_mgr_wait_for_go_ovl;
1634 ovl->get_device = &dss_ovl_get_device;
1635 }
1636
1637 r = dss_install_mgr_ops(&apply_mgr_ops);
1638 if (r)
1639 goto err_mgr_ops;
1640
1641 r = display_init_sysfs(pdev);
1642 if (r)
1643 goto err_disp_sysfs;
1644
1645 dispc_runtime_get();
1646
1647 r = dss_dispc_initialize_irq();
1648 if (r)
1649 goto err_init_irq;
1650
1651 dispc_runtime_put();
1652
1653 out:
1654 mutex_unlock(&compat_init_lock);
1655
1656 return 0;
1657
1658 err_init_irq:
1659 dispc_runtime_put();
1660 display_uninit_sysfs(pdev);
1661
1662 err_disp_sysfs:
1663 dss_uninstall_mgr_ops();
1664
1665 err_mgr_ops:
1666 dss_uninit_overlay_managers_sysfs(pdev);
1667 dss_uninit_overlays(pdev);
1668
1669 compat_refcnt--;
1670
1671 mutex_unlock(&compat_init_lock);
1672
1673 return r;
1674 }
1675 EXPORT_SYMBOL(omapdss_compat_init);
1676
1677 void omapdss_compat_uninit(void)
1678 {
1679 struct platform_device *pdev = dss_get_core_pdev();
1680
1681 mutex_lock(&compat_init_lock);
1682
1683 if (--compat_refcnt > 0)
1684 goto out;
1685
1686 dss_dispc_uninitialize_irq();
1687
1688 display_uninit_sysfs(pdev);
1689
1690 dss_uninstall_mgr_ops();
1691
1692 dss_uninit_overlay_managers_sysfs(pdev);
1693 dss_uninit_overlays(pdev);
1694 out:
1695 mutex_unlock(&compat_init_lock);
1696 }
1697 EXPORT_SYMBOL(omapdss_compat_uninit);
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