2 * HDMI interface DSS driver for TI's OMAP4 family of SoCs.
3 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
5 * Mythri pk <mythripk@ti.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
20 #define DSS_SUBSYS_NAME "HDMI"
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/err.h>
26 #include <linux/interrupt.h>
27 #include <linux/mutex.h>
28 #include <linux/delay.h>
29 #include <linux/string.h>
30 #include <linux/platform_device.h>
31 #include <linux/pm_runtime.h>
32 #include <linux/clk.h>
33 #include <linux/gpio.h>
34 #include <linux/regulator/consumer.h>
35 #include <video/omapdss.h>
37 #include "hdmi4_core.h"
39 #include "dss_features.h"
43 struct platform_device
*pdev
;
45 struct hdmi_wp_data wp
;
46 struct hdmi_pll_data pll
;
47 struct hdmi_phy_data phy
;
48 struct hdmi_core_data core
;
50 struct hdmi_config cfg
;
53 struct regulator
*vdda_hdmi_dac_reg
;
57 struct omap_dss_device output
;
60 static int hdmi_runtime_get(void)
64 DSSDBG("hdmi_runtime_get\n");
66 r
= pm_runtime_get_sync(&hdmi
.pdev
->dev
);
74 static void hdmi_runtime_put(void)
78 DSSDBG("hdmi_runtime_put\n");
80 r
= pm_runtime_put_sync(&hdmi
.pdev
->dev
);
81 WARN_ON(r
< 0 && r
!= -ENOSYS
);
84 static int hdmi_init_regulator(void)
86 struct regulator
*reg
;
88 if (hdmi
.vdda_hdmi_dac_reg
!= NULL
)
91 reg
= devm_regulator_get(&hdmi
.pdev
->dev
, "vdda");
94 if (PTR_ERR(reg
) != -EPROBE_DEFER
)
95 DSSERR("can't get VDDA regulator\n");
99 hdmi
.vdda_hdmi_dac_reg
= reg
;
104 static int hdmi_power_on_core(struct omap_dss_device
*dssdev
)
108 r
= regulator_enable(hdmi
.vdda_hdmi_dac_reg
);
112 r
= hdmi_runtime_get();
114 goto err_runtime_get
;
116 /* Make selection of HDMI in DSS */
117 dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK
);
119 hdmi
.core_enabled
= true;
124 regulator_disable(hdmi
.vdda_hdmi_dac_reg
);
129 static void hdmi_power_off_core(struct omap_dss_device
*dssdev
)
131 hdmi
.core_enabled
= false;
134 regulator_disable(hdmi
.vdda_hdmi_dac_reg
);
137 static int hdmi_power_on_full(struct omap_dss_device
*dssdev
)
140 struct omap_video_timings
*p
;
141 struct omap_overlay_manager
*mgr
= hdmi
.output
.manager
;
144 r
= hdmi_power_on_core(dssdev
);
148 p
= &hdmi
.cfg
.timings
;
150 DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p
->x_res
, p
->y_res
);
152 /* the functions below use kHz pixel clock. TODO: change to Hz */
153 phy
= p
->pixelclock
/ 1000;
155 hdmi_pll_compute(&hdmi
.pll
, clk_get_rate(hdmi
.sys_clk
), phy
);
157 /* config the PLL and PHY hdmi_set_pll_pwrfirst */
158 r
= hdmi_pll_enable(&hdmi
.pll
, &hdmi
.wp
);
160 DSSDBG("Failed to lock PLL\n");
164 r
= hdmi_phy_enable(&hdmi
.phy
, &hdmi
.wp
, &hdmi
.cfg
);
166 DSSDBG("Failed to start PHY\n");
170 hdmi4_configure(&hdmi
.core
, &hdmi
.wp
, &hdmi
.cfg
);
172 /* bypass TV gamma table */
173 dispc_enable_gamma_table(0);
176 dss_mgr_set_timings(mgr
, p
);
178 r
= hdmi_wp_video_start(&hdmi
.wp
);
182 r
= dss_mgr_enable(mgr
);
189 hdmi_wp_video_stop(&hdmi
.wp
);
191 hdmi_phy_disable(&hdmi
.phy
, &hdmi
.wp
);
193 hdmi_pll_disable(&hdmi
.pll
, &hdmi
.wp
);
195 hdmi_power_off_core(dssdev
);
199 static void hdmi_power_off_full(struct omap_dss_device
*dssdev
)
201 struct omap_overlay_manager
*mgr
= hdmi
.output
.manager
;
203 dss_mgr_disable(mgr
);
205 hdmi_wp_video_stop(&hdmi
.wp
);
206 hdmi_phy_disable(&hdmi
.phy
, &hdmi
.wp
);
207 hdmi_pll_disable(&hdmi
.pll
, &hdmi
.wp
);
209 hdmi_power_off_core(dssdev
);
212 static int hdmi_display_check_timing(struct omap_dss_device
*dssdev
,
213 struct omap_video_timings
*timings
)
215 struct omap_dss_device
*out
= &hdmi
.output
;
217 if (!dispc_mgr_timings_ok(out
->dispc_channel
, timings
))
223 static void hdmi_display_set_timing(struct omap_dss_device
*dssdev
,
224 struct omap_video_timings
*timings
)
227 const struct hdmi_config
*t
;
229 mutex_lock(&hdmi
.lock
);
231 cm
= hdmi_get_code(timings
);
234 t
= hdmi_get_timings(cm
.mode
, cm
.code
);
238 dispc_set_tv_pclk(t
->timings
.pixelclock
);
240 hdmi
.cfg
.timings
= *timings
;
241 hdmi
.cfg
.cm
.code
= 0;
242 hdmi
.cfg
.cm
.mode
= HDMI_DVI
;
244 dispc_set_tv_pclk(timings
->pixelclock
);
247 DSSDBG("using mode: %s, code %d\n", hdmi
.cfg
.cm
.mode
== HDMI_DVI
?
248 "DVI" : "HDMI", hdmi
.cfg
.cm
.code
);
250 mutex_unlock(&hdmi
.lock
);
253 static void hdmi_display_get_timings(struct omap_dss_device
*dssdev
,
254 struct omap_video_timings
*timings
)
256 const struct hdmi_config
*cfg
;
257 struct hdmi_cm cm
= hdmi
.cfg
.cm
;
259 cfg
= hdmi_get_timings(cm
.mode
, cm
.code
);
261 cfg
= hdmi_default_timing();
263 memcpy(timings
, &cfg
->timings
, sizeof(cfg
->timings
));
266 static void hdmi_dump_regs(struct seq_file
*s
)
268 mutex_lock(&hdmi
.lock
);
270 if (hdmi_runtime_get()) {
271 mutex_unlock(&hdmi
.lock
);
275 hdmi_wp_dump(&hdmi
.wp
, s
);
276 hdmi_pll_dump(&hdmi
.pll
, s
);
277 hdmi_phy_dump(&hdmi
.phy
, s
);
278 hdmi4_core_dump(&hdmi
.core
, s
);
281 mutex_unlock(&hdmi
.lock
);
284 static int read_edid(u8
*buf
, int len
)
288 mutex_lock(&hdmi
.lock
);
290 r
= hdmi_runtime_get();
293 r
= hdmi4_read_edid(&hdmi
.core
, buf
, len
);
296 mutex_unlock(&hdmi
.lock
);
301 static int hdmi_display_enable(struct omap_dss_device
*dssdev
)
303 struct omap_dss_device
*out
= &hdmi
.output
;
306 DSSDBG("ENTER hdmi_display_enable\n");
308 mutex_lock(&hdmi
.lock
);
310 if (out
== NULL
|| out
->manager
== NULL
) {
311 DSSERR("failed to enable display: no output/manager\n");
316 r
= hdmi_power_on_full(dssdev
);
318 DSSERR("failed to power on device\n");
322 mutex_unlock(&hdmi
.lock
);
326 mutex_unlock(&hdmi
.lock
);
330 static void hdmi_display_disable(struct omap_dss_device
*dssdev
)
332 DSSDBG("Enter hdmi_display_disable\n");
334 mutex_lock(&hdmi
.lock
);
336 hdmi_power_off_full(dssdev
);
338 mutex_unlock(&hdmi
.lock
);
341 static int hdmi_core_enable(struct omap_dss_device
*dssdev
)
345 DSSDBG("ENTER omapdss_hdmi_core_enable\n");
347 mutex_lock(&hdmi
.lock
);
349 r
= hdmi_power_on_core(dssdev
);
351 DSSERR("failed to power on device\n");
355 mutex_unlock(&hdmi
.lock
);
359 mutex_unlock(&hdmi
.lock
);
363 static void hdmi_core_disable(struct omap_dss_device
*dssdev
)
365 DSSDBG("Enter omapdss_hdmi_core_disable\n");
367 mutex_lock(&hdmi
.lock
);
369 hdmi_power_off_core(dssdev
);
371 mutex_unlock(&hdmi
.lock
);
374 static int hdmi_get_clocks(struct platform_device
*pdev
)
378 clk
= devm_clk_get(&pdev
->dev
, "sys_clk");
380 DSSERR("can't get sys_clk\n");
389 static int hdmi_connect(struct omap_dss_device
*dssdev
,
390 struct omap_dss_device
*dst
)
392 struct omap_overlay_manager
*mgr
;
395 r
= hdmi_init_regulator();
399 mgr
= omap_dss_get_overlay_manager(dssdev
->dispc_channel
);
403 r
= dss_mgr_connect(mgr
, dssdev
);
407 r
= omapdss_output_set_device(dssdev
, dst
);
409 DSSERR("failed to connect output to new device: %s\n",
411 dss_mgr_disconnect(mgr
, dssdev
);
418 static void hdmi_disconnect(struct omap_dss_device
*dssdev
,
419 struct omap_dss_device
*dst
)
421 WARN_ON(dst
!= dssdev
->dst
);
423 if (dst
!= dssdev
->dst
)
426 omapdss_output_unset_device(dssdev
);
429 dss_mgr_disconnect(dssdev
->manager
, dssdev
);
432 static int hdmi_read_edid(struct omap_dss_device
*dssdev
,
438 need_enable
= hdmi
.core_enabled
== false;
441 r
= hdmi_core_enable(dssdev
);
446 r
= read_edid(edid
, len
);
449 hdmi_core_disable(dssdev
);
454 #if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO)
455 static int hdmi_audio_enable(struct omap_dss_device
*dssdev
)
459 mutex_lock(&hdmi
.lock
);
461 if (!hdmi_mode_has_audio(hdmi
.cfg
.cm
.mode
)) {
466 r
= hdmi_wp_audio_enable(&hdmi
.wp
, true);
470 mutex_unlock(&hdmi
.lock
);
474 mutex_unlock(&hdmi
.lock
);
478 static void hdmi_audio_disable(struct omap_dss_device
*dssdev
)
480 hdmi_wp_audio_enable(&hdmi
.wp
, false);
483 static int hdmi_audio_start(struct omap_dss_device
*dssdev
)
485 return hdmi4_audio_start(&hdmi
.core
, &hdmi
.wp
);
488 static void hdmi_audio_stop(struct omap_dss_device
*dssdev
)
490 hdmi4_audio_stop(&hdmi
.core
, &hdmi
.wp
);
493 static bool hdmi_audio_supported(struct omap_dss_device
*dssdev
)
497 mutex_lock(&hdmi
.lock
);
499 r
= hdmi_mode_has_audio(hdmi
.cfg
.cm
.mode
);
501 mutex_unlock(&hdmi
.lock
);
505 static int hdmi_audio_config(struct omap_dss_device
*dssdev
,
506 struct omap_dss_audio
*audio
)
509 u32 pclk
= hdmi
.cfg
.timings
.pixelclock
;
511 mutex_lock(&hdmi
.lock
);
513 if (!hdmi_mode_has_audio(hdmi
.cfg
.cm
.mode
)) {
518 r
= hdmi4_audio_config(&hdmi
.core
, &hdmi
.wp
, audio
, pclk
);
522 mutex_unlock(&hdmi
.lock
);
526 mutex_unlock(&hdmi
.lock
);
530 static int hdmi_audio_enable(struct omap_dss_device
*dssdev
)
535 static void hdmi_audio_disable(struct omap_dss_device
*dssdev
)
539 static int hdmi_audio_start(struct omap_dss_device
*dssdev
)
544 static void hdmi_audio_stop(struct omap_dss_device
*dssdev
)
548 static bool hdmi_audio_supported(struct omap_dss_device
*dssdev
)
553 static int hdmi_audio_config(struct omap_dss_device
*dssdev
,
554 struct omap_dss_audio
*audio
)
560 static const struct omapdss_hdmi_ops hdmi_ops
= {
561 .connect
= hdmi_connect
,
562 .disconnect
= hdmi_disconnect
,
564 .enable
= hdmi_display_enable
,
565 .disable
= hdmi_display_disable
,
567 .check_timings
= hdmi_display_check_timing
,
568 .set_timings
= hdmi_display_set_timing
,
569 .get_timings
= hdmi_display_get_timings
,
571 .read_edid
= hdmi_read_edid
,
573 .audio_enable
= hdmi_audio_enable
,
574 .audio_disable
= hdmi_audio_disable
,
575 .audio_start
= hdmi_audio_start
,
576 .audio_stop
= hdmi_audio_stop
,
577 .audio_supported
= hdmi_audio_supported
,
578 .audio_config
= hdmi_audio_config
,
581 static void hdmi_init_output(struct platform_device
*pdev
)
583 struct omap_dss_device
*out
= &hdmi
.output
;
585 out
->dev
= &pdev
->dev
;
586 out
->id
= OMAP_DSS_OUTPUT_HDMI
;
587 out
->output_type
= OMAP_DISPLAY_TYPE_HDMI
;
588 out
->name
= "hdmi.0";
589 out
->dispc_channel
= OMAP_DSS_CHANNEL_DIGIT
;
590 out
->ops
.hdmi
= &hdmi_ops
;
591 out
->owner
= THIS_MODULE
;
593 omapdss_register_output(out
);
596 static void __exit
hdmi_uninit_output(struct platform_device
*pdev
)
598 struct omap_dss_device
*out
= &hdmi
.output
;
600 omapdss_unregister_output(out
);
603 /* HDMI HW IP initialisation */
604 static int omapdss_hdmihw_probe(struct platform_device
*pdev
)
610 mutex_init(&hdmi
.lock
);
612 r
= hdmi_wp_init(pdev
, &hdmi
.wp
);
616 r
= hdmi_pll_init(pdev
, &hdmi
.pll
);
620 r
= hdmi_phy_init(pdev
, &hdmi
.phy
);
624 r
= hdmi4_core_init(pdev
, &hdmi
.core
);
628 r
= hdmi_get_clocks(pdev
);
630 DSSERR("can't get clocks\n");
634 pm_runtime_enable(&pdev
->dev
);
636 hdmi_init_output(pdev
);
638 dss_debugfs_create_file("hdmi", hdmi_dump_regs
);
643 static int __exit
omapdss_hdmihw_remove(struct platform_device
*pdev
)
645 hdmi_uninit_output(pdev
);
647 pm_runtime_disable(&pdev
->dev
);
652 static int hdmi_runtime_suspend(struct device
*dev
)
654 clk_disable_unprepare(hdmi
.sys_clk
);
661 static int hdmi_runtime_resume(struct device
*dev
)
665 r
= dispc_runtime_get();
669 clk_prepare_enable(hdmi
.sys_clk
);
674 static const struct dev_pm_ops hdmi_pm_ops
= {
675 .runtime_suspend
= hdmi_runtime_suspend
,
676 .runtime_resume
= hdmi_runtime_resume
,
679 static const struct of_device_id hdmi_of_match
[] = {
680 { .compatible
= "ti,omap4-hdmi", },
684 static struct platform_driver omapdss_hdmihw_driver
= {
685 .probe
= omapdss_hdmihw_probe
,
686 .remove
= __exit_p(omapdss_hdmihw_remove
),
688 .name
= "omapdss_hdmi",
689 .owner
= THIS_MODULE
,
691 .of_match_table
= hdmi_of_match
,
695 int __init
hdmi4_init_platform_driver(void)
697 return platform_driver_register(&omapdss_hdmihw_driver
);
700 void __exit
hdmi4_uninit_platform_driver(void)
702 platform_driver_unregister(&omapdss_hdmihw_driver
);