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OMAP: DSS2: remove extra includes from include/video/omapdss.h
[deliverable/linux.git] / drivers / video / omap2 / dss / rfbi.c
1 /*
2 * linux/drivers/video/omap2/dss/rfbi.c
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
6 *
7 * Some code and ideas taken from drivers/video/omap/ driver
8 * by Imre Deak.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * more details.
18 *
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
21 */
22
23 #define DSS_SUBSYS_NAME "RFBI"
24
25 #include <linux/kernel.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/vmalloc.h>
28 #include <linux/clk.h>
29 #include <linux/io.h>
30 #include <linux/delay.h>
31 #include <linux/kfifo.h>
32 #include <linux/ktime.h>
33 #include <linux/hrtimer.h>
34 #include <linux/seq_file.h>
35 #include <linux/semaphore.h>
36 #include <linux/platform_device.h>
37
38 #include <video/omapdss.h>
39 #include "dss.h"
40
41 struct rfbi_reg { u16 idx; };
42
43 #define RFBI_REG(idx) ((const struct rfbi_reg) { idx })
44
45 #define RFBI_REVISION RFBI_REG(0x0000)
46 #define RFBI_SYSCONFIG RFBI_REG(0x0010)
47 #define RFBI_SYSSTATUS RFBI_REG(0x0014)
48 #define RFBI_CONTROL RFBI_REG(0x0040)
49 #define RFBI_PIXEL_CNT RFBI_REG(0x0044)
50 #define RFBI_LINE_NUMBER RFBI_REG(0x0048)
51 #define RFBI_CMD RFBI_REG(0x004c)
52 #define RFBI_PARAM RFBI_REG(0x0050)
53 #define RFBI_DATA RFBI_REG(0x0054)
54 #define RFBI_READ RFBI_REG(0x0058)
55 #define RFBI_STATUS RFBI_REG(0x005c)
56
57 #define RFBI_CONFIG(n) RFBI_REG(0x0060 + (n)*0x18)
58 #define RFBI_ONOFF_TIME(n) RFBI_REG(0x0064 + (n)*0x18)
59 #define RFBI_CYCLE_TIME(n) RFBI_REG(0x0068 + (n)*0x18)
60 #define RFBI_DATA_CYCLE1(n) RFBI_REG(0x006c + (n)*0x18)
61 #define RFBI_DATA_CYCLE2(n) RFBI_REG(0x0070 + (n)*0x18)
62 #define RFBI_DATA_CYCLE3(n) RFBI_REG(0x0074 + (n)*0x18)
63
64 #define RFBI_VSYNC_WIDTH RFBI_REG(0x0090)
65 #define RFBI_HSYNC_WIDTH RFBI_REG(0x0094)
66
67 #define REG_FLD_MOD(idx, val, start, end) \
68 rfbi_write_reg(idx, FLD_MOD(rfbi_read_reg(idx), val, start, end))
69
70 enum omap_rfbi_cycleformat {
71 OMAP_DSS_RFBI_CYCLEFORMAT_1_1 = 0,
72 OMAP_DSS_RFBI_CYCLEFORMAT_2_1 = 1,
73 OMAP_DSS_RFBI_CYCLEFORMAT_3_1 = 2,
74 OMAP_DSS_RFBI_CYCLEFORMAT_3_2 = 3,
75 };
76
77 enum omap_rfbi_datatype {
78 OMAP_DSS_RFBI_DATATYPE_12 = 0,
79 OMAP_DSS_RFBI_DATATYPE_16 = 1,
80 OMAP_DSS_RFBI_DATATYPE_18 = 2,
81 OMAP_DSS_RFBI_DATATYPE_24 = 3,
82 };
83
84 enum omap_rfbi_parallelmode {
85 OMAP_DSS_RFBI_PARALLELMODE_8 = 0,
86 OMAP_DSS_RFBI_PARALLELMODE_9 = 1,
87 OMAP_DSS_RFBI_PARALLELMODE_12 = 2,
88 OMAP_DSS_RFBI_PARALLELMODE_16 = 3,
89 };
90
91 static int rfbi_convert_timings(struct rfbi_timings *t);
92 static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div);
93
94 static struct {
95 struct platform_device *pdev;
96 void __iomem *base;
97
98 unsigned long l4_khz;
99
100 enum omap_rfbi_datatype datatype;
101 enum omap_rfbi_parallelmode parallelmode;
102
103 enum omap_rfbi_te_mode te_mode;
104 int te_enabled;
105
106 void (*framedone_callback)(void *data);
107 void *framedone_callback_data;
108
109 struct omap_dss_device *dssdev[2];
110
111 struct semaphore bus_lock;
112 } rfbi;
113
114 static inline void rfbi_write_reg(const struct rfbi_reg idx, u32 val)
115 {
116 __raw_writel(val, rfbi.base + idx.idx);
117 }
118
119 static inline u32 rfbi_read_reg(const struct rfbi_reg idx)
120 {
121 return __raw_readl(rfbi.base + idx.idx);
122 }
123
124 static void rfbi_enable_clocks(bool enable)
125 {
126 if (enable)
127 dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
128 else
129 dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
130 }
131
132 void rfbi_bus_lock(void)
133 {
134 down(&rfbi.bus_lock);
135 }
136 EXPORT_SYMBOL(rfbi_bus_lock);
137
138 void rfbi_bus_unlock(void)
139 {
140 up(&rfbi.bus_lock);
141 }
142 EXPORT_SYMBOL(rfbi_bus_unlock);
143
144 void omap_rfbi_write_command(const void *buf, u32 len)
145 {
146 switch (rfbi.parallelmode) {
147 case OMAP_DSS_RFBI_PARALLELMODE_8:
148 {
149 const u8 *b = buf;
150 for (; len; len--)
151 rfbi_write_reg(RFBI_CMD, *b++);
152 break;
153 }
154
155 case OMAP_DSS_RFBI_PARALLELMODE_16:
156 {
157 const u16 *w = buf;
158 BUG_ON(len & 1);
159 for (; len; len -= 2)
160 rfbi_write_reg(RFBI_CMD, *w++);
161 break;
162 }
163
164 case OMAP_DSS_RFBI_PARALLELMODE_9:
165 case OMAP_DSS_RFBI_PARALLELMODE_12:
166 default:
167 BUG();
168 }
169 }
170 EXPORT_SYMBOL(omap_rfbi_write_command);
171
172 void omap_rfbi_read_data(void *buf, u32 len)
173 {
174 switch (rfbi.parallelmode) {
175 case OMAP_DSS_RFBI_PARALLELMODE_8:
176 {
177 u8 *b = buf;
178 for (; len; len--) {
179 rfbi_write_reg(RFBI_READ, 0);
180 *b++ = rfbi_read_reg(RFBI_READ);
181 }
182 break;
183 }
184
185 case OMAP_DSS_RFBI_PARALLELMODE_16:
186 {
187 u16 *w = buf;
188 BUG_ON(len & ~1);
189 for (; len; len -= 2) {
190 rfbi_write_reg(RFBI_READ, 0);
191 *w++ = rfbi_read_reg(RFBI_READ);
192 }
193 break;
194 }
195
196 case OMAP_DSS_RFBI_PARALLELMODE_9:
197 case OMAP_DSS_RFBI_PARALLELMODE_12:
198 default:
199 BUG();
200 }
201 }
202 EXPORT_SYMBOL(omap_rfbi_read_data);
203
204 void omap_rfbi_write_data(const void *buf, u32 len)
205 {
206 switch (rfbi.parallelmode) {
207 case OMAP_DSS_RFBI_PARALLELMODE_8:
208 {
209 const u8 *b = buf;
210 for (; len; len--)
211 rfbi_write_reg(RFBI_PARAM, *b++);
212 break;
213 }
214
215 case OMAP_DSS_RFBI_PARALLELMODE_16:
216 {
217 const u16 *w = buf;
218 BUG_ON(len & 1);
219 for (; len; len -= 2)
220 rfbi_write_reg(RFBI_PARAM, *w++);
221 break;
222 }
223
224 case OMAP_DSS_RFBI_PARALLELMODE_9:
225 case OMAP_DSS_RFBI_PARALLELMODE_12:
226 default:
227 BUG();
228
229 }
230 }
231 EXPORT_SYMBOL(omap_rfbi_write_data);
232
233 void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
234 u16 x, u16 y,
235 u16 w, u16 h)
236 {
237 int start_offset = scr_width * y + x;
238 int horiz_offset = scr_width - w;
239 int i;
240
241 if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 &&
242 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) {
243 const u16 __iomem *pd = buf;
244 pd += start_offset;
245
246 for (; h; --h) {
247 for (i = 0; i < w; ++i) {
248 const u8 __iomem *b = (const u8 __iomem *)pd;
249 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
250 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
251 ++pd;
252 }
253 pd += horiz_offset;
254 }
255 } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_24 &&
256 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) {
257 const u32 __iomem *pd = buf;
258 pd += start_offset;
259
260 for (; h; --h) {
261 for (i = 0; i < w; ++i) {
262 const u8 __iomem *b = (const u8 __iomem *)pd;
263 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+2));
264 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
265 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
266 ++pd;
267 }
268 pd += horiz_offset;
269 }
270 } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 &&
271 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_16) {
272 const u16 __iomem *pd = buf;
273 pd += start_offset;
274
275 for (; h; --h) {
276 for (i = 0; i < w; ++i) {
277 rfbi_write_reg(RFBI_PARAM, __raw_readw(pd));
278 ++pd;
279 }
280 pd += horiz_offset;
281 }
282 } else {
283 BUG();
284 }
285 }
286 EXPORT_SYMBOL(omap_rfbi_write_pixels);
287
288 static void rfbi_transfer_area(struct omap_dss_device *dssdev, u16 width,
289 u16 height, void (*callback)(void *data), void *data)
290 {
291 u32 l;
292
293 /*BUG_ON(callback == 0);*/
294 BUG_ON(rfbi.framedone_callback != NULL);
295
296 DSSDBG("rfbi_transfer_area %dx%d\n", width, height);
297
298 dispc_set_lcd_size(dssdev->manager->id, width, height);
299
300 dispc_enable_channel(dssdev->manager->id, true);
301
302 rfbi.framedone_callback = callback;
303 rfbi.framedone_callback_data = data;
304
305 rfbi_write_reg(RFBI_PIXEL_CNT, width * height);
306
307 l = rfbi_read_reg(RFBI_CONTROL);
308 l = FLD_MOD(l, 1, 0, 0); /* enable */
309 if (!rfbi.te_enabled)
310 l = FLD_MOD(l, 1, 4, 4); /* ITE */
311
312 rfbi_write_reg(RFBI_CONTROL, l);
313 }
314
315 static void framedone_callback(void *data, u32 mask)
316 {
317 void (*callback)(void *data);
318
319 DSSDBG("FRAMEDONE\n");
320
321 REG_FLD_MOD(RFBI_CONTROL, 0, 0, 0);
322
323 callback = rfbi.framedone_callback;
324 rfbi.framedone_callback = NULL;
325
326 if (callback != NULL)
327 callback(rfbi.framedone_callback_data);
328 }
329
330 #if 1 /* VERBOSE */
331 static void rfbi_print_timings(void)
332 {
333 u32 l;
334 u32 time;
335
336 l = rfbi_read_reg(RFBI_CONFIG(0));
337 time = 1000000000 / rfbi.l4_khz;
338 if (l & (1 << 4))
339 time *= 2;
340
341 DSSDBG("Tick time %u ps\n", time);
342 l = rfbi_read_reg(RFBI_ONOFF_TIME(0));
343 DSSDBG("CSONTIME %d, CSOFFTIME %d, WEONTIME %d, WEOFFTIME %d, "
344 "REONTIME %d, REOFFTIME %d\n",
345 l & 0x0f, (l >> 4) & 0x3f, (l >> 10) & 0x0f, (l >> 14) & 0x3f,
346 (l >> 20) & 0x0f, (l >> 24) & 0x3f);
347
348 l = rfbi_read_reg(RFBI_CYCLE_TIME(0));
349 DSSDBG("WECYCLETIME %d, RECYCLETIME %d, CSPULSEWIDTH %d, "
350 "ACCESSTIME %d\n",
351 (l & 0x3f), (l >> 6) & 0x3f, (l >> 12) & 0x3f,
352 (l >> 22) & 0x3f);
353 }
354 #else
355 static void rfbi_print_timings(void) {}
356 #endif
357
358
359
360
361 static u32 extif_clk_period;
362
363 static inline unsigned long round_to_extif_ticks(unsigned long ps, int div)
364 {
365 int bus_tick = extif_clk_period * div;
366 return (ps + bus_tick - 1) / bus_tick * bus_tick;
367 }
368
369 static int calc_reg_timing(struct rfbi_timings *t, int div)
370 {
371 t->clk_div = div;
372
373 t->cs_on_time = round_to_extif_ticks(t->cs_on_time, div);
374
375 t->we_on_time = round_to_extif_ticks(t->we_on_time, div);
376 t->we_off_time = round_to_extif_ticks(t->we_off_time, div);
377 t->we_cycle_time = round_to_extif_ticks(t->we_cycle_time, div);
378
379 t->re_on_time = round_to_extif_ticks(t->re_on_time, div);
380 t->re_off_time = round_to_extif_ticks(t->re_off_time, div);
381 t->re_cycle_time = round_to_extif_ticks(t->re_cycle_time, div);
382
383 t->access_time = round_to_extif_ticks(t->access_time, div);
384 t->cs_off_time = round_to_extif_ticks(t->cs_off_time, div);
385 t->cs_pulse_width = round_to_extif_ticks(t->cs_pulse_width, div);
386
387 DSSDBG("[reg]cson %d csoff %d reon %d reoff %d\n",
388 t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time);
389 DSSDBG("[reg]weon %d weoff %d recyc %d wecyc %d\n",
390 t->we_on_time, t->we_off_time, t->re_cycle_time,
391 t->we_cycle_time);
392 DSSDBG("[reg]rdaccess %d cspulse %d\n",
393 t->access_time, t->cs_pulse_width);
394
395 return rfbi_convert_timings(t);
396 }
397
398 static int calc_extif_timings(struct rfbi_timings *t)
399 {
400 u32 max_clk_div;
401 int div;
402
403 rfbi_get_clk_info(&extif_clk_period, &max_clk_div);
404 for (div = 1; div <= max_clk_div; div++) {
405 if (calc_reg_timing(t, div) == 0)
406 break;
407 }
408
409 if (div <= max_clk_div)
410 return 0;
411
412 DSSERR("can't setup timings\n");
413 return -1;
414 }
415
416
417 static void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t)
418 {
419 int r;
420
421 if (!t->converted) {
422 r = calc_extif_timings(t);
423 if (r < 0)
424 DSSERR("Failed to calc timings\n");
425 }
426
427 BUG_ON(!t->converted);
428
429 rfbi_write_reg(RFBI_ONOFF_TIME(rfbi_module), t->tim[0]);
430 rfbi_write_reg(RFBI_CYCLE_TIME(rfbi_module), t->tim[1]);
431
432 /* TIMEGRANULARITY */
433 REG_FLD_MOD(RFBI_CONFIG(rfbi_module),
434 (t->tim[2] ? 1 : 0), 4, 4);
435
436 rfbi_print_timings();
437 }
438
439 static int ps_to_rfbi_ticks(int time, int div)
440 {
441 unsigned long tick_ps;
442 int ret;
443
444 /* Calculate in picosecs to yield more exact results */
445 tick_ps = 1000000000 / (rfbi.l4_khz) * div;
446
447 ret = (time + tick_ps - 1) / tick_ps;
448
449 return ret;
450 }
451
452 static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div)
453 {
454 *clk_period = 1000000000 / rfbi.l4_khz;
455 *max_clk_div = 2;
456 }
457
458 static int rfbi_convert_timings(struct rfbi_timings *t)
459 {
460 u32 l;
461 int reon, reoff, weon, weoff, cson, csoff, cs_pulse;
462 int actim, recyc, wecyc;
463 int div = t->clk_div;
464
465 if (div <= 0 || div > 2)
466 return -1;
467
468 /* Make sure that after conversion it still holds that:
469 * weoff > weon, reoff > reon, recyc >= reoff, wecyc >= weoff,
470 * csoff > cson, csoff >= max(weoff, reoff), actim > reon
471 */
472 weon = ps_to_rfbi_ticks(t->we_on_time, div);
473 weoff = ps_to_rfbi_ticks(t->we_off_time, div);
474 if (weoff <= weon)
475 weoff = weon + 1;
476 if (weon > 0x0f)
477 return -1;
478 if (weoff > 0x3f)
479 return -1;
480
481 reon = ps_to_rfbi_ticks(t->re_on_time, div);
482 reoff = ps_to_rfbi_ticks(t->re_off_time, div);
483 if (reoff <= reon)
484 reoff = reon + 1;
485 if (reon > 0x0f)
486 return -1;
487 if (reoff > 0x3f)
488 return -1;
489
490 cson = ps_to_rfbi_ticks(t->cs_on_time, div);
491 csoff = ps_to_rfbi_ticks(t->cs_off_time, div);
492 if (csoff <= cson)
493 csoff = cson + 1;
494 if (csoff < max(weoff, reoff))
495 csoff = max(weoff, reoff);
496 if (cson > 0x0f)
497 return -1;
498 if (csoff > 0x3f)
499 return -1;
500
501 l = cson;
502 l |= csoff << 4;
503 l |= weon << 10;
504 l |= weoff << 14;
505 l |= reon << 20;
506 l |= reoff << 24;
507
508 t->tim[0] = l;
509
510 actim = ps_to_rfbi_ticks(t->access_time, div);
511 if (actim <= reon)
512 actim = reon + 1;
513 if (actim > 0x3f)
514 return -1;
515
516 wecyc = ps_to_rfbi_ticks(t->we_cycle_time, div);
517 if (wecyc < weoff)
518 wecyc = weoff;
519 if (wecyc > 0x3f)
520 return -1;
521
522 recyc = ps_to_rfbi_ticks(t->re_cycle_time, div);
523 if (recyc < reoff)
524 recyc = reoff;
525 if (recyc > 0x3f)
526 return -1;
527
528 cs_pulse = ps_to_rfbi_ticks(t->cs_pulse_width, div);
529 if (cs_pulse > 0x3f)
530 return -1;
531
532 l = wecyc;
533 l |= recyc << 6;
534 l |= cs_pulse << 12;
535 l |= actim << 22;
536
537 t->tim[1] = l;
538
539 t->tim[2] = div - 1;
540
541 t->converted = 1;
542
543 return 0;
544 }
545
546 /* xxx FIX module selection missing */
547 int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
548 unsigned hs_pulse_time, unsigned vs_pulse_time,
549 int hs_pol_inv, int vs_pol_inv, int extif_div)
550 {
551 int hs, vs;
552 int min;
553 u32 l;
554
555 hs = ps_to_rfbi_ticks(hs_pulse_time, 1);
556 vs = ps_to_rfbi_ticks(vs_pulse_time, 1);
557 if (hs < 2)
558 return -EDOM;
559 if (mode == OMAP_DSS_RFBI_TE_MODE_2)
560 min = 2;
561 else /* OMAP_DSS_RFBI_TE_MODE_1 */
562 min = 4;
563 if (vs < min)
564 return -EDOM;
565 if (vs == hs)
566 return -EINVAL;
567 rfbi.te_mode = mode;
568 DSSDBG("setup_te: mode %d hs %d vs %d hs_inv %d vs_inv %d\n",
569 mode, hs, vs, hs_pol_inv, vs_pol_inv);
570
571 rfbi_write_reg(RFBI_HSYNC_WIDTH, hs);
572 rfbi_write_reg(RFBI_VSYNC_WIDTH, vs);
573
574 l = rfbi_read_reg(RFBI_CONFIG(0));
575 if (hs_pol_inv)
576 l &= ~(1 << 21);
577 else
578 l |= 1 << 21;
579 if (vs_pol_inv)
580 l &= ~(1 << 20);
581 else
582 l |= 1 << 20;
583
584 return 0;
585 }
586 EXPORT_SYMBOL(omap_rfbi_setup_te);
587
588 /* xxx FIX module selection missing */
589 int omap_rfbi_enable_te(bool enable, unsigned line)
590 {
591 u32 l;
592
593 DSSDBG("te %d line %d mode %d\n", enable, line, rfbi.te_mode);
594 if (line > (1 << 11) - 1)
595 return -EINVAL;
596
597 l = rfbi_read_reg(RFBI_CONFIG(0));
598 l &= ~(0x3 << 2);
599 if (enable) {
600 rfbi.te_enabled = 1;
601 l |= rfbi.te_mode << 2;
602 } else
603 rfbi.te_enabled = 0;
604 rfbi_write_reg(RFBI_CONFIG(0), l);
605 rfbi_write_reg(RFBI_LINE_NUMBER, line);
606
607 return 0;
608 }
609 EXPORT_SYMBOL(omap_rfbi_enable_te);
610
611 static int rfbi_configure(int rfbi_module, int bpp, int lines)
612 {
613 u32 l;
614 int cycle1 = 0, cycle2 = 0, cycle3 = 0;
615 enum omap_rfbi_cycleformat cycleformat;
616 enum omap_rfbi_datatype datatype;
617 enum omap_rfbi_parallelmode parallelmode;
618
619 switch (bpp) {
620 case 12:
621 datatype = OMAP_DSS_RFBI_DATATYPE_12;
622 break;
623 case 16:
624 datatype = OMAP_DSS_RFBI_DATATYPE_16;
625 break;
626 case 18:
627 datatype = OMAP_DSS_RFBI_DATATYPE_18;
628 break;
629 case 24:
630 datatype = OMAP_DSS_RFBI_DATATYPE_24;
631 break;
632 default:
633 BUG();
634 return 1;
635 }
636 rfbi.datatype = datatype;
637
638 switch (lines) {
639 case 8:
640 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_8;
641 break;
642 case 9:
643 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_9;
644 break;
645 case 12:
646 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_12;
647 break;
648 case 16:
649 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_16;
650 break;
651 default:
652 BUG();
653 return 1;
654 }
655 rfbi.parallelmode = parallelmode;
656
657 if ((bpp % lines) == 0) {
658 switch (bpp / lines) {
659 case 1:
660 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_1_1;
661 break;
662 case 2:
663 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_2_1;
664 break;
665 case 3:
666 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_1;
667 break;
668 default:
669 BUG();
670 return 1;
671 }
672 } else if ((2 * bpp % lines) == 0) {
673 if ((2 * bpp / lines) == 3)
674 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_2;
675 else {
676 BUG();
677 return 1;
678 }
679 } else {
680 BUG();
681 return 1;
682 }
683
684 switch (cycleformat) {
685 case OMAP_DSS_RFBI_CYCLEFORMAT_1_1:
686 cycle1 = lines;
687 break;
688
689 case OMAP_DSS_RFBI_CYCLEFORMAT_2_1:
690 cycle1 = lines;
691 cycle2 = lines;
692 break;
693
694 case OMAP_DSS_RFBI_CYCLEFORMAT_3_1:
695 cycle1 = lines;
696 cycle2 = lines;
697 cycle3 = lines;
698 break;
699
700 case OMAP_DSS_RFBI_CYCLEFORMAT_3_2:
701 cycle1 = lines;
702 cycle2 = (lines / 2) | ((lines / 2) << 16);
703 cycle3 = (lines << 16);
704 break;
705 }
706
707 REG_FLD_MOD(RFBI_CONTROL, 0, 3, 2); /* clear CS */
708
709 l = 0;
710 l |= FLD_VAL(parallelmode, 1, 0);
711 l |= FLD_VAL(0, 3, 2); /* TRIGGERMODE: ITE */
712 l |= FLD_VAL(0, 4, 4); /* TIMEGRANULARITY */
713 l |= FLD_VAL(datatype, 6, 5);
714 /* l |= FLD_VAL(2, 8, 7); */ /* L4FORMAT, 2pix/L4 */
715 l |= FLD_VAL(0, 8, 7); /* L4FORMAT, 1pix/L4 */
716 l |= FLD_VAL(cycleformat, 10, 9);
717 l |= FLD_VAL(0, 12, 11); /* UNUSEDBITS */
718 l |= FLD_VAL(0, 16, 16); /* A0POLARITY */
719 l |= FLD_VAL(0, 17, 17); /* REPOLARITY */
720 l |= FLD_VAL(0, 18, 18); /* WEPOLARITY */
721 l |= FLD_VAL(0, 19, 19); /* CSPOLARITY */
722 l |= FLD_VAL(1, 20, 20); /* TE_VSYNC_POLARITY */
723 l |= FLD_VAL(1, 21, 21); /* HSYNCPOLARITY */
724 rfbi_write_reg(RFBI_CONFIG(rfbi_module), l);
725
726 rfbi_write_reg(RFBI_DATA_CYCLE1(rfbi_module), cycle1);
727 rfbi_write_reg(RFBI_DATA_CYCLE2(rfbi_module), cycle2);
728 rfbi_write_reg(RFBI_DATA_CYCLE3(rfbi_module), cycle3);
729
730
731 l = rfbi_read_reg(RFBI_CONTROL);
732 l = FLD_MOD(l, rfbi_module+1, 3, 2); /* Select CSx */
733 l = FLD_MOD(l, 0, 1, 1); /* clear bypass */
734 rfbi_write_reg(RFBI_CONTROL, l);
735
736
737 DSSDBG("RFBI config: bpp %d, lines %d, cycles: 0x%x 0x%x 0x%x\n",
738 bpp, lines, cycle1, cycle2, cycle3);
739
740 return 0;
741 }
742
743 int omap_rfbi_configure(struct omap_dss_device *dssdev, int pixel_size,
744 int data_lines)
745 {
746 return rfbi_configure(dssdev->phy.rfbi.channel, pixel_size, data_lines);
747 }
748 EXPORT_SYMBOL(omap_rfbi_configure);
749
750 int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
751 u16 *x, u16 *y, u16 *w, u16 *h)
752 {
753 u16 dw, dh;
754
755 dssdev->driver->get_resolution(dssdev, &dw, &dh);
756
757 if (*x > dw || *y > dh)
758 return -EINVAL;
759
760 if (*x + *w > dw)
761 return -EINVAL;
762
763 if (*y + *h > dh)
764 return -EINVAL;
765
766 if (*w == 1)
767 return -EINVAL;
768
769 if (*w == 0 || *h == 0)
770 return -EINVAL;
771
772 if (dssdev->manager->caps & OMAP_DSS_OVL_MGR_CAP_DISPC) {
773 dss_setup_partial_planes(dssdev, x, y, w, h, true);
774 dispc_set_lcd_size(dssdev->manager->id, *w, *h);
775 }
776
777 return 0;
778 }
779 EXPORT_SYMBOL(omap_rfbi_prepare_update);
780
781 int omap_rfbi_update(struct omap_dss_device *dssdev,
782 u16 x, u16 y, u16 w, u16 h,
783 void (*callback)(void *), void *data)
784 {
785 if (dssdev->manager->caps & OMAP_DSS_OVL_MGR_CAP_DISPC) {
786 rfbi_transfer_area(dssdev, w, h, callback, data);
787 } else {
788 struct omap_overlay *ovl;
789 void __iomem *addr;
790 int scr_width;
791
792 ovl = dssdev->manager->overlays[0];
793 scr_width = ovl->info.screen_width;
794 addr = ovl->info.vaddr;
795
796 omap_rfbi_write_pixels(addr, scr_width, x, y, w, h);
797
798 callback(data);
799 }
800
801 return 0;
802 }
803 EXPORT_SYMBOL(omap_rfbi_update);
804
805 void rfbi_dump_regs(struct seq_file *s)
806 {
807 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, rfbi_read_reg(r))
808
809 dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
810
811 DUMPREG(RFBI_REVISION);
812 DUMPREG(RFBI_SYSCONFIG);
813 DUMPREG(RFBI_SYSSTATUS);
814 DUMPREG(RFBI_CONTROL);
815 DUMPREG(RFBI_PIXEL_CNT);
816 DUMPREG(RFBI_LINE_NUMBER);
817 DUMPREG(RFBI_CMD);
818 DUMPREG(RFBI_PARAM);
819 DUMPREG(RFBI_DATA);
820 DUMPREG(RFBI_READ);
821 DUMPREG(RFBI_STATUS);
822
823 DUMPREG(RFBI_CONFIG(0));
824 DUMPREG(RFBI_ONOFF_TIME(0));
825 DUMPREG(RFBI_CYCLE_TIME(0));
826 DUMPREG(RFBI_DATA_CYCLE1(0));
827 DUMPREG(RFBI_DATA_CYCLE2(0));
828 DUMPREG(RFBI_DATA_CYCLE3(0));
829
830 DUMPREG(RFBI_CONFIG(1));
831 DUMPREG(RFBI_ONOFF_TIME(1));
832 DUMPREG(RFBI_CYCLE_TIME(1));
833 DUMPREG(RFBI_DATA_CYCLE1(1));
834 DUMPREG(RFBI_DATA_CYCLE2(1));
835 DUMPREG(RFBI_DATA_CYCLE3(1));
836
837 DUMPREG(RFBI_VSYNC_WIDTH);
838 DUMPREG(RFBI_HSYNC_WIDTH);
839
840 dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
841 #undef DUMPREG
842 }
843
844 int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev)
845 {
846 int r;
847
848 rfbi_enable_clocks(1);
849
850 r = omap_dss_start_device(dssdev);
851 if (r) {
852 DSSERR("failed to start device\n");
853 goto err0;
854 }
855
856 r = omap_dispc_register_isr(framedone_callback, NULL,
857 DISPC_IRQ_FRAMEDONE);
858 if (r) {
859 DSSERR("can't get FRAMEDONE irq\n");
860 goto err1;
861 }
862
863 dispc_set_lcd_display_type(dssdev->manager->id,
864 OMAP_DSS_LCD_DISPLAY_TFT);
865
866 dispc_set_parallel_interface_mode(dssdev->manager->id,
867 OMAP_DSS_PARALLELMODE_RFBI);
868
869 dispc_set_tft_data_lines(dssdev->manager->id, dssdev->ctrl.pixel_size);
870
871 rfbi_configure(dssdev->phy.rfbi.channel,
872 dssdev->ctrl.pixel_size,
873 dssdev->phy.rfbi.data_lines);
874
875 rfbi_set_timings(dssdev->phy.rfbi.channel,
876 &dssdev->ctrl.rfbi_timings);
877
878
879 return 0;
880 err1:
881 omap_dss_stop_device(dssdev);
882 err0:
883 return r;
884 }
885 EXPORT_SYMBOL(omapdss_rfbi_display_enable);
886
887 void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev)
888 {
889 omap_dispc_unregister_isr(framedone_callback, NULL,
890 DISPC_IRQ_FRAMEDONE);
891 omap_dss_stop_device(dssdev);
892
893 rfbi_enable_clocks(0);
894 }
895 EXPORT_SYMBOL(omapdss_rfbi_display_disable);
896
897 int rfbi_init_display(struct omap_dss_device *dssdev)
898 {
899 rfbi.dssdev[dssdev->phy.rfbi.channel] = dssdev;
900 dssdev->caps = OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
901 return 0;
902 }
903
904 /* RFBI HW IP initialisation */
905 static int omap_rfbihw_probe(struct platform_device *pdev)
906 {
907 u32 rev;
908 u32 l;
909 struct resource *rfbi_mem;
910
911 rfbi.pdev = pdev;
912
913 sema_init(&rfbi.bus_lock, 1);
914
915 rfbi_mem = platform_get_resource(rfbi.pdev, IORESOURCE_MEM, 0);
916 if (!rfbi_mem) {
917 DSSERR("can't get IORESOURCE_MEM RFBI\n");
918 return -EINVAL;
919 }
920 rfbi.base = ioremap(rfbi_mem->start, resource_size(rfbi_mem));
921 if (!rfbi.base) {
922 DSSERR("can't ioremap RFBI\n");
923 return -ENOMEM;
924 }
925
926 rfbi_enable_clocks(1);
927
928 msleep(10);
929
930 rfbi.l4_khz = dss_clk_get_rate(DSS_CLK_ICK) / 1000;
931
932 /* Enable autoidle and smart-idle */
933 l = rfbi_read_reg(RFBI_SYSCONFIG);
934 l |= (1 << 0) | (2 << 3);
935 rfbi_write_reg(RFBI_SYSCONFIG, l);
936
937 rev = rfbi_read_reg(RFBI_REVISION);
938 dev_dbg(&pdev->dev, "OMAP RFBI rev %d.%d\n",
939 FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0));
940
941 rfbi_enable_clocks(0);
942
943 return 0;
944 }
945
946 static int omap_rfbihw_remove(struct platform_device *pdev)
947 {
948 iounmap(rfbi.base);
949 return 0;
950 }
951
952 static struct platform_driver omap_rfbihw_driver = {
953 .probe = omap_rfbihw_probe,
954 .remove = omap_rfbihw_remove,
955 .driver = {
956 .name = "omapdss_rfbi",
957 .owner = THIS_MODULE,
958 },
959 };
960
961 int rfbi_init_platform_driver(void)
962 {
963 return platform_driver_register(&omap_rfbihw_driver);
964 }
965
966 void rfbi_uninit_platform_driver(void)
967 {
968 return platform_driver_unregister(&omap_rfbihw_driver);
969 }
Linux kernel - Deliverables
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