drivers/video/tridentfb.c

   1 /*
   2  * Frame buffer driver for Trident TGUI, Blade and Image series
   3  *
   4  * Copyright 2001, 2002 - Jani Monoses   <jani@iv.ro>
   5  *
   6  *
   7  * CREDITS:(in order of appearance)
   8  *      skeletonfb.c by Geert Uytterhoeven and other fb code in drivers/video
   9  *      Special thanks ;) to Mattia Crivellini <tia@mclink.it>
  10  *      much inspired by the XFree86 4.x Trident driver sources
  11  *      by Alan Hourihane the FreeVGA project
  12  *      Francesco Salvestrini <salvestrini@users.sf.net> XP support,
  13  *      code, suggestions
  14  * TODO:
  15  *      timing value tweaking so it looks good on every monitor in every mode
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/fb.h>
  20 #include <linux/init.h>
  21 #include <linux/pci.h>
  22
  23 #include <linux/delay.h>
  24 #include <video/vga.h>
  25 #include <video/trident.h>
  26
  27 #define VERSION         "0.7.9-NEWAPI"
  28
  29 struct tridentfb_par {
  30         void __iomem *io_virt;  /* iospace virtual memory address */
  31         u32 pseudo_pal[16];
  32         int chip_id;
  33         int flatpanel;
  34         void (*init_accel) (struct tridentfb_par *, int, int);
  35         void (*wait_engine) (struct tridentfb_par *);
  36         void (*fill_rect)
  37                 (struct tridentfb_par *par, u32, u32, u32, u32, u32, u32);
  38         void (*copy_rect)
  39                 (struct tridentfb_par *par, u32, u32, u32, u32, u32, u32);
  40 };
  41
  42 static unsigned char eng_oper;  /* engine operation... */
  43 static struct fb_ops tridentfb_ops;
  44
  45 static struct fb_fix_screeninfo tridentfb_fix = {
  46         .id = "Trident",
  47         .type = FB_TYPE_PACKED_PIXELS,
  48         .ypanstep = 1,
  49         .visual = FB_VISUAL_PSEUDOCOLOR,
  50         .accel = FB_ACCEL_NONE,
  51 };
  52
  53 /* defaults which are normally overriden by user values */
  54
  55 /* video mode */
  56 static char *mode_option __devinitdata = "640x480";
  57 static int bpp __devinitdata = 8;
  58
  59 static int noaccel __devinitdata;
  60
  61 static int center;
  62 static int stretch;
  63
  64 static int fp __devinitdata;
  65 static int crt __devinitdata;
  66
  67 static int memsize __devinitdata;
  68 static int memdiff __devinitdata;
  69 static int nativex;
  70
  71 module_param(mode_option, charp, 0);
  72 MODULE_PARM_DESC(mode_option, "Initial video mode e.g. '648x480-8@60'");
  73 module_param_named(mode, mode_option, charp, 0);
  74 MODULE_PARM_DESC(mode, "Initial video mode e.g. '648x480-8@60' (deprecated)");
  75 module_param(bpp, int, 0);
  76 module_param(center, int, 0);
  77 module_param(stretch, int, 0);
  78 module_param(noaccel, int, 0);
  79 module_param(memsize, int, 0);
  80 module_param(memdiff, int, 0);
  81 module_param(nativex, int, 0);
  82 module_param(fp, int, 0);
  83 MODULE_PARM_DESC(fp, "Define if flatpanel is connected");
  84 module_param(crt, int, 0);
  85 MODULE_PARM_DESC(crt, "Define if CRT is connected");
  86
  87 static int is_oldclock(int id)
  88 {
  89         return  (id == TGUI9440) ||
  90                 (id == TGUI9660) ||
  91                 (id == CYBER9320);
  92 }
  93
  94 static int is_oldprotect(int id)
  95 {
  96         return  (id == TGUI9440) ||
  97                 (id == TGUI9660) ||
  98                 (id == PROVIDIA9685) ||
  99                 (id == CYBER9320) ||
 100                 (id == CYBER9382) ||
 101                 (id == CYBER9385);
 102 }
 103
 104 static int is_blade(int id)
 105 {
 106         return  (id == BLADE3D) ||
 107                 (id == CYBERBLADEE4) ||
 108                 (id == CYBERBLADEi7) ||
 109                 (id == CYBERBLADEi7D) ||
 110                 (id == CYBERBLADEi1) ||
 111                 (id == CYBERBLADEi1D) ||
 112                 (id == CYBERBLADEAi1) ||
 113                 (id == CYBERBLADEAi1D);
 114 }
 115
 116 static int is_xp(int id)
 117 {
 118         return  (id == CYBERBLADEXPAi1) ||
 119                 (id == CYBERBLADEXPm8) ||
 120                 (id == CYBERBLADEXPm16);
 121 }
 122
 123 static int is3Dchip(int id)
 124 {
 125         return ((id == BLADE3D) || (id == CYBERBLADEE4) ||
 126                 (id == CYBERBLADEi7) || (id == CYBERBLADEi7D) ||
 127                 (id == CYBER9397) || (id == CYBER9397DVD) ||
 128                 (id == CYBER9520) || (id == CYBER9525DVD) ||
 129                 (id == IMAGE975) || (id == IMAGE985) ||
 130                 (id == CYBERBLADEi1) || (id == CYBERBLADEi1D) ||
 131                 (id == CYBERBLADEAi1) || (id == CYBERBLADEAi1D) ||
 132                 (id == CYBERBLADEXPm8) || (id == CYBERBLADEXPm16) ||
 133                 (id == CYBERBLADEXPAi1));
 134 }
 135
 136 static int iscyber(int id)
 137 {
 138         switch (id) {
 139         case CYBER9388:
 140         case CYBER9382:
 141         case CYBER9385:
 142         case CYBER9397:
 143         case CYBER9397DVD:
 144         case CYBER9520:
 145         case CYBER9525DVD:
 146         case CYBERBLADEE4:
 147         case CYBERBLADEi7D:
 148         case CYBERBLADEi1:
 149         case CYBERBLADEi1D:
 150         case CYBERBLADEAi1:
 151         case CYBERBLADEAi1D:
 152         case CYBERBLADEXPAi1:
 153                 return 1;
 154
 155         case CYBER9320:
 156         case TGUI9660:
 157         case PROVIDIA9685:
 158         case IMAGE975:
 159         case IMAGE985:
 160         case BLADE3D:
 161         case CYBERBLADEi7:      /* VIA MPV4 integrated version */
 162
 163         default:
 164                 /* case CYBERBLDAEXPm8:  Strange */
 165                 /* case CYBERBLDAEXPm16: Strange */
 166                 return 0;
 167         }
 168 }
 169
 170 static inline void t_outb(struct tridentfb_par *p, u8 val, u16 reg)
 171 {
 172         fb_writeb(val, p->io_virt + reg);
 173 }
 174
 175 static inline u8 t_inb(struct tridentfb_par *p, u16 reg)
 176 {
 177         return fb_readb(p->io_virt + reg);
 178 }
 179
 180 static inline void writemmr(struct tridentfb_par *par, u16 r, u32 v)
 181 {
 182         fb_writel(v, par->io_virt + r);
 183 }
 184
 185 static inline u32 readmmr(struct tridentfb_par *par, u16 r)
 186 {
 187         return fb_readl(par->io_virt + r);
 188 }
 189
 190 /*
 191  * Blade specific acceleration.
 192  */
 193
 194 #define point(x, y) ((y) << 16 | (x))
 195
 196 static void blade_init_accel(struct tridentfb_par *par, int pitch, int bpp)
 197 {
 198         int v1 = (pitch >> 3) << 20;
 199         int tmp = bpp == 24 ? 2 : (bpp >> 4);
 200         int v2 = v1 | (tmp << 29);
 201
 202         writemmr(par, 0x21C0, v2);
 203         writemmr(par, 0x21C4, v2);
 204         writemmr(par, 0x21B8, v2);
 205         writemmr(par, 0x21BC, v2);
 206         writemmr(par, 0x21D0, v1);
 207         writemmr(par, 0x21D4, v1);
 208         writemmr(par, 0x21C8, v1);
 209         writemmr(par, 0x21CC, v1);
 210         writemmr(par, 0x216C, 0);
 211 }
 212
 213 static void blade_wait_engine(struct tridentfb_par *par)
 214 {
 215         while (readmmr(par, STATUS) & 0xFA800000)
 216                 cpu_relax();
 217 }
 218
 219 static void blade_fill_rect(struct tridentfb_par *par,
 220                             u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
 221 {
 222         writemmr(par, COLOR, c);
 223         writemmr(par, ROP, rop ? ROP_X : ROP_S);
 224         writemmr(par, CMD, 0x20000000 | 1 << 19 | 1 << 4 | 2 << 2);
 225
 226         writemmr(par, DST1, point(x, y));
 227         writemmr(par, DST2, point(x + w - 1, y + h - 1));
 228 }
 229
 230 static void blade_copy_rect(struct tridentfb_par *par,
 231                             u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
 232 {
 233         int direction = 2;
 234         u32 s1 = point(x1, y1);
 235         u32 s2 = point(x1 + w - 1, y1 + h - 1);
 236         u32 d1 = point(x2, y2);
 237         u32 d2 = point(x2 + w - 1, y2 + h - 1);
 238
 239         if ((y1 > y2) || ((y1 == y2) && (x1 > x2)))
 240                 direction = 0;
 241
 242         writemmr(par, ROP, ROP_S);
 243         writemmr(par, CMD, 0xE0000000 | 1 << 19 | 1 << 4 | 1 << 2 | direction);
 244
 245         writemmr(par, SRC1, direction ? s2 : s1);
 246         writemmr(par, SRC2, direction ? s1 : s2);
 247         writemmr(par, DST1, direction ? d2 : d1);
 248         writemmr(par, DST2, direction ? d1 : d2);
 249 }
 250
 251 /*
 252  * BladeXP specific acceleration functions
 253  */
 254
 255 static void xp_init_accel(struct tridentfb_par *par, int pitch, int bpp)
 256 {
 257         unsigned char x = bpp == 24 ? 3 : (bpp >> 4);
 258         int v1 = pitch << (bpp == 24 ? 20 : (18 + x));
 259
 260         switch (pitch << (bpp >> 3)) {
 261         case 8192:
 262         case 512:
 263                 x |= 0x00;
 264                 break;
 265         case 1024:
 266                 x |= 0x04;
 267                 break;
 268         case 2048:
 269                 x |= 0x08;
 270                 break;
 271         case 4096:
 272                 x |= 0x0C;
 273                 break;
 274         }
 275
 276         t_outb(par, x, 0x2125);
 277
 278         eng_oper = x | 0x40;
 279
 280         writemmr(par, 0x2154, v1);
 281         writemmr(par, 0x2150, v1);
 282         t_outb(par, 3, 0x2126);
 283 }
 284
 285 static void xp_wait_engine(struct tridentfb_par *par)
 286 {
 287         int count, timeout;
 288
 289         count = 0;
 290         timeout = 0;
 291         while (t_inb(par, STATUS) & 0x80) {
 292                 count++;
 293                 if (count == 10000000) {
 294                         /* Timeout */
 295                         count = 9990000;
 296                         timeout++;
 297                         if (timeout == 8) {
 298                                 /* Reset engine */
 299                                 t_outb(par, 0x00, STATUS);
 300                                 return;
 301                         }
 302                 }
 303                 cpu_relax();
 304         }
 305 }
 306
 307 static void xp_fill_rect(struct tridentfb_par *par,
 308                          u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
 309 {
 310         writemmr(par, 0x2127, ROP_P);
 311         writemmr(par, 0x2158, c);
 312         writemmr(par, DRAWFL, 0x4000);
 313         writemmr(par, OLDDIM, point(h, w));
 314         writemmr(par, OLDDST, point(y, x));
 315         t_outb(par, 0x01, OLDCMD);
 316         t_outb(par, eng_oper, 0x2125);
 317 }
 318
 319 static void xp_copy_rect(struct tridentfb_par *par,
 320                          u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
 321 {
 322         int direction;
 323         u32 x1_tmp, x2_tmp, y1_tmp, y2_tmp;
 324
 325         direction = 0x0004;
 326
 327         if ((x1 < x2) && (y1 == y2)) {
 328                 direction |= 0x0200;
 329                 x1_tmp = x1 + w - 1;
 330                 x2_tmp = x2 + w - 1;
 331         } else {
 332                 x1_tmp = x1;
 333                 x2_tmp = x2;
 334         }
 335
 336         if (y1 < y2) {
 337                 direction |= 0x0100;
 338                 y1_tmp = y1 + h - 1;
 339                 y2_tmp = y2 + h - 1;
 340         } else {
 341                 y1_tmp = y1;
 342                 y2_tmp = y2;
 343         }
 344
 345         writemmr(par, DRAWFL, direction);
 346         t_outb(par, ROP_S, 0x2127);
 347         writemmr(par, OLDSRC, point(y1_tmp, x1_tmp));
 348         writemmr(par, OLDDST, point(y2_tmp, x2_tmp));
 349         writemmr(par, OLDDIM, point(h, w));
 350         t_outb(par, 0x01, OLDCMD);
 351 }
 352
 353 /*
 354  * Image specific acceleration functions
 355  */
 356 static void image_init_accel(struct tridentfb_par *par, int pitch, int bpp)
 357 {
 358         int tmp = bpp == 24 ? 2: (bpp >> 4);
 359
 360         writemmr(par, 0x2120, 0xF0000000);
 361         writemmr(par, 0x2120, 0x40000000 | tmp);
 362         writemmr(par, 0x2120, 0x80000000);
 363         writemmr(par, 0x2144, 0x00000000);
 364         writemmr(par, 0x2148, 0x00000000);
 365         writemmr(par, 0x2150, 0x00000000);
 366         writemmr(par, 0x2154, 0x00000000);
 367         writemmr(par, 0x2120, 0x60000000 | (pitch << 16) | pitch);
 368         writemmr(par, 0x216C, 0x00000000);
 369         writemmr(par, 0x2170, 0x00000000);
 370         writemmr(par, 0x217C, 0x00000000);
 371         writemmr(par, 0x2120, 0x10000000);
 372         writemmr(par, 0x2130, (2047 << 16) | 2047);
 373 }
 374
 375 static void image_wait_engine(struct tridentfb_par *par)
 376 {
 377         while (readmmr(par, 0x2164) & 0xF0000000)
 378                 cpu_relax();
 379 }
 380
 381 static void image_fill_rect(struct tridentfb_par *par,
 382                             u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
 383 {
 384         writemmr(par, 0x2120, 0x80000000);
 385         writemmr(par, 0x2120, 0x90000000 | ROP_S);
 386
 387         writemmr(par, 0x2144, c);
 388
 389         writemmr(par, DST1, point(x, y));
 390         writemmr(par, DST2, point(x + w - 1, y + h - 1));
 391
 392         writemmr(par, 0x2124, 0x80000000 | 3 << 22 | 1 << 10 | 1 << 9);
 393 }
 394
 395 static void image_copy_rect(struct tridentfb_par *par,
 396                             u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
 397 {
 398         int direction = 2;
 399         u32 s1 = point(x1, y1);
 400         u32 s2 = point(x1 + w - 1, y1 + h - 1);
 401         u32 d1 = point(x2, y2);
 402         u32 d2 = point(x2 + w - 1, y2 + h - 1);
 403
 404         if ((y1 > y2) || ((y1 == y2) && (x1 > x2)))
 405                 direction = 0;
 406
 407         writemmr(par, 0x2120, 0x80000000);
 408         writemmr(par, 0x2120, 0x90000000 | ROP_S);
 409
 410         writemmr(par, SRC1, direction ? s2 : s1);
 411         writemmr(par, SRC2, direction ? s1 : s2);
 412         writemmr(par, DST1, direction ? d2 : d1);
 413         writemmr(par, DST2, direction ? d1 : d2);
 414         writemmr(par, 0x2124,
 415                  0x80000000 | 1 << 22 | 1 << 10 | 1 << 7 | direction);
 416 }
 417
 418 /*
 419  * TGUI 9440/96XX acceleration
 420  */
 421
 422 static void tgui_init_accel(struct tridentfb_par *par, int pitch, int bpp)
 423 {
 424         unsigned char x = bpp == 24 ? 3 : (bpp >> 4);
 425
 426         /* disable clipping */
 427         writemmr(par, 0x2148, 0);
 428         writemmr(par, 0x214C, point(4095, 2047));
 429
 430         switch ((pitch * bpp) / 8) {
 431         case 8192:
 432         case 512:
 433                 x |= 0x00;
 434                 break;
 435         case 1024:
 436                 x |= 0x04;
 437                 break;
 438         case 2048:
 439                 x |= 0x08;
 440                 break;
 441         case 4096:
 442                 x |= 0x0C;
 443                 break;
 444         }
 445
 446         fb_writew(x, par->io_virt + 0x2122);
 447 }
 448
 449 static void tgui_fill_rect(struct tridentfb_par *par,
 450                            u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop)
 451 {
 452         t_outb(par, ROP_P, 0x2127);
 453         writemmr(par, OLDCLR, c);
 454         writemmr(par, DRAWFL, 0x4020);
 455         writemmr(par, OLDDIM, point(w - 1, h - 1));
 456         writemmr(par, OLDDST, point(x, y));
 457         t_outb(par, 1, OLDCMD);
 458 }
 459
 460 static void tgui_copy_rect(struct tridentfb_par *par,
 461                            u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h)
 462 {
 463         int flags = 0;
 464         u16 x1_tmp, x2_tmp, y1_tmp, y2_tmp;
 465
 466         if ((x1 < x2) && (y1 == y2)) {
 467                 flags |= 0x0200;
 468                 x1_tmp = x1 + w - 1;
 469                 x2_tmp = x2 + w - 1;
 470         } else {
 471                 x1_tmp = x1;
 472                 x2_tmp = x2;
 473         }
 474
 475         if (y1 < y2) {
 476                 flags |= 0x0100;
 477                 y1_tmp = y1 + h - 1;
 478                 y2_tmp = y2 + h - 1;
 479         } else {
 480                 y1_tmp = y1;
 481                 y2_tmp = y2;
 482         }
 483
 484         writemmr(par, DRAWFL, 0x4 | flags);
 485         t_outb(par, ROP_S, 0x2127);
 486         writemmr(par, OLDSRC, point(x1_tmp, y1_tmp));
 487         writemmr(par, OLDDST, point(x2_tmp, y2_tmp));
 488         writemmr(par, OLDDIM, point(w - 1, h - 1));
 489         t_outb(par, 1, OLDCMD);
 490 }
 491
 492 /*
 493  * Accel functions called by the upper layers
 494  */
 495 #ifdef CONFIG_FB_TRIDENT_ACCEL
 496 static void tridentfb_fillrect(struct fb_info *info,
 497                                const struct fb_fillrect *fr)
 498 {
 499         struct tridentfb_par *par = info->par;
 500         int col;
 501
 502         if (info->var.bits_per_pixel == 8) {
 503                 col = fr->color;
 504                 col |= col << 8;
 505                 col |= col << 16;
 506         } else
 507                 col = ((u32 *)(info->pseudo_palette))[fr->color];
 508
 509         par->wait_engine(par);
 510         par->fill_rect(par, fr->dx, fr->dy, fr->width,
 511                        fr->height, col, fr->rop);
 512 }
 513
 514 static void tridentfb_copyarea(struct fb_info *info,
 515                                const struct fb_copyarea *ca)
 516 {
 517         struct tridentfb_par *par = info->par;
 518
 519         par->wait_engine(par);
 520         par->copy_rect(par, ca->sx, ca->sy, ca->dx, ca->dy,
 521                        ca->width, ca->height);
 522 }
 523
 524 static int tridentfb_sync(struct fb_info *info)
 525 {
 526         struct tridentfb_par *par = info->par;
 527
 528         par->wait_engine(par);
 529         return 0;
 530 }
 531 #else
 532 #define tridentfb_fillrect cfb_fillrect
 533 #define tridentfb_copyarea cfb_copyarea
 534 #endif /* CONFIG_FB_TRIDENT_ACCEL */
 535
 536 /*
 537  * Hardware access functions
 538  */
 539
 540 static inline unsigned char read3X4(struct tridentfb_par *par, int reg)
 541 {
 542         return vga_mm_rcrt(par->io_virt, reg);
 543 }
 544
 545 static inline void write3X4(struct tridentfb_par *par, int reg,
 546                             unsigned char val)
 547 {
 548         vga_mm_wcrt(par->io_virt, reg, val);
 549 }
 550
 551 static inline unsigned char read3CE(struct tridentfb_par *par,
 552                                     unsigned char reg)
 553 {
 554         return vga_mm_rgfx(par->io_virt, reg);
 555 }
 556
 557 static inline void writeAttr(struct tridentfb_par *par, int reg,
 558                              unsigned char val)
 559 {
 560         fb_readb(par->io_virt + VGA_IS1_RC);    /* flip-flop to index */
 561         vga_mm_wattr(par->io_virt, reg, val);
 562 }
 563
 564 static inline void write3CE(struct tridentfb_par *par, int reg,
 565                             unsigned char val)
 566 {
 567         vga_mm_wgfx(par->io_virt, reg, val);
 568 }
 569
 570 static void enable_mmio(void)
 571 {
 572         /* Goto New Mode */
 573         vga_io_rseq(0x0B);
 574
 575         /* Unprotect registers */
 576         vga_io_wseq(NewMode1, 0x80);
 577
 578         /* Enable MMIO */
 579         outb(PCIReg, 0x3D4);
 580         outb(inb(0x3D5) | 0x01, 0x3D5);
 581 }
 582
 583 static void disable_mmio(struct tridentfb_par *par)
 584 {
 585         /* Goto New Mode */
 586         vga_mm_rseq(par->io_virt, 0x0B);
 587
 588         /* Unprotect registers */
 589         vga_mm_wseq(par->io_virt, NewMode1, 0x80);
 590
 591         /* Disable MMIO */
 592         t_outb(par, PCIReg, 0x3D4);
 593         t_outb(par, t_inb(par, 0x3D5) & ~0x01, 0x3D5);
 594 }
 595
 596 static void crtc_unlock(struct tridentfb_par *par)
 597 {
 598         write3X4(par, VGA_CRTC_V_SYNC_END,
 599                  read3X4(par, VGA_CRTC_V_SYNC_END) & 0x7F);
 600 }
 601
 602 /*  Return flat panel's maximum x resolution */
 603 static int __devinit get_nativex(struct tridentfb_par *par)
 604 {
 605         int x, y, tmp;
 606
 607         if (nativex)
 608                 return nativex;
 609
 610         tmp = (read3CE(par, VertStretch) >> 4) & 3;
 611
 612         switch (tmp) {
 613         case 0:
 614                 x = 1280; y = 1024;
 615                 break;
 616         case 2:
 617                 x = 1024; y = 768;
 618                 break;
 619         case 3:
 620                 x = 800; y = 600;
 621                 break;
 622         case 4:
 623                 x = 1400; y = 1050;
 624                 break;
 625         case 1:
 626         default:
 627                 x = 640;  y = 480;
 628                 break;
 629         }
 630
 631         output("%dx%d flat panel found\n", x, y);
 632         return x;
 633 }
 634
 635 /* Set pitch */
 636 static void set_lwidth(struct tridentfb_par *par, int width)
 637 {
 638         write3X4(par, VGA_CRTC_OFFSET, width & 0xFF);
 639         write3X4(par, AddColReg,
 640                  (read3X4(par, AddColReg) & 0xCF) | ((width & 0x300) >> 4));
 641 }
 642
 643 /* For resolutions smaller than FP resolution stretch */
 644 static void screen_stretch(struct tridentfb_par *par)
 645 {
 646         if (par->chip_id != CYBERBLADEXPAi1)
 647                 write3CE(par, BiosReg, 0);
 648         else
 649                 write3CE(par, BiosReg, 8);
 650         write3CE(par, VertStretch, (read3CE(par, VertStretch) & 0x7C) | 1);
 651         write3CE(par, HorStretch, (read3CE(par, HorStretch) & 0x7C) | 1);
 652 }
 653
 654 /* For resolutions smaller than FP resolution center */
 655 static void screen_center(struct tridentfb_par *par)
 656 {
 657         write3CE(par, VertStretch, (read3CE(par, VertStretch) & 0x7C) | 0x80);
 658         write3CE(par, HorStretch, (read3CE(par, HorStretch) & 0x7C) | 0x80);
 659 }
 660
 661 /* Address of first shown pixel in display memory */
 662 static void set_screen_start(struct tridentfb_par *par, int base)
 663 {
 664         u8 tmp;
 665         write3X4(par, VGA_CRTC_START_LO, base & 0xFF);
 666         write3X4(par, VGA_CRTC_START_HI, (base & 0xFF00) >> 8);
 667         tmp = read3X4(par, CRTCModuleTest) & 0xDF;
 668         write3X4(par, CRTCModuleTest, tmp | ((base & 0x10000) >> 11));
 669         tmp = read3X4(par, CRTHiOrd) & 0xF8;
 670         write3X4(par, CRTHiOrd, tmp | ((base & 0xE0000) >> 17));
 671 }
 672
 673 /* Set dotclock frequency */
 674 static void set_vclk(struct tridentfb_par *par, unsigned long freq)
 675 {
 676         int m, n, k;
 677         unsigned long fi, d, di;
 678         unsigned char best_m = 0, best_n = 0, best_k = 0;
 679         unsigned char hi, lo;
 680
 681         d = 20000;
 682         for (k = 1; k >= 0; k--)
 683                 for (m = 0; m < 32; m++)
 684                         for (n = 0; n < 122; n++) {
 685                                 fi = ((14318l * (n + 8)) / (m + 2)) >> k;
 686                                 if ((di = abs(fi - freq)) < d) {
 687                                         d = di;
 688                                         best_n = n;
 689                                         best_m = m;
 690                                         best_k = k;
 691                                 }
 692                                 if (fi > freq)
 693                                         break;
 694                         }
 695
 696         if (is_oldclock(par->chip_id)) {
 697                 lo = best_n | (best_m << 7);
 698                 hi = (best_m >> 1) | (best_k << 4);
 699         } else {
 700                 lo = best_n;
 701                 hi = best_m | (best_k << 6);
 702         }
 703
 704         if (is3Dchip(par->chip_id)) {
 705                 vga_mm_wseq(par->io_virt, ClockHigh, hi);
 706                 vga_mm_wseq(par->io_virt, ClockLow, lo);
 707         } else {
 708                 t_outb(par, lo, 0x43C8);
 709                 t_outb(par, hi, 0x43C9);
 710         }
 711         debug("VCLK = %X %X\n", hi, lo);
 712 }
 713
 714 /* Set number of lines for flat panels*/
 715 static void set_number_of_lines(struct tridentfb_par *par, int lines)
 716 {
 717         int tmp = read3CE(par, CyberEnhance) & 0x8F;
 718         if (lines > 1024)
 719                 tmp |= 0x50;
 720         else if (lines > 768)
 721                 tmp |= 0x30;
 722         else if (lines > 600)
 723                 tmp |= 0x20;
 724         else if (lines > 480)
 725                 tmp |= 0x10;
 726         write3CE(par, CyberEnhance, tmp);
 727 }
 728
 729 /*
 730  * If we see that FP is active we assume we have one.
 731  * Otherwise we have a CRT display. User can override.
 732  */
 733 static int __devinit is_flatpanel(struct tridentfb_par *par)
 734 {
 735         if (fp)
 736                 return 1;
 737         if (crt || !iscyber(par->chip_id))
 738                 return 0;
 739         return (read3CE(par, FPConfig) & 0x10) ? 1 : 0;
 740 }
 741
 742 /* Try detecting the video memory size */
 743 static unsigned int __devinit get_memsize(struct tridentfb_par *par)
 744 {
 745         unsigned char tmp, tmp2;
 746         unsigned int k;
 747
 748         /* If memory size provided by user */
 749         if (memsize)
 750                 k = memsize * Kb;
 751         else
 752                 switch (par->chip_id) {
 753                 case CYBER9525DVD:
 754                         k = 2560 * Kb;
 755                         break;
 756                 default:
 757                         tmp = read3X4(par, SPR) & 0x0F;
 758                         switch (tmp) {
 759
 760                         case 0x01:
 761                                 k = 512 * Kb;
 762                                 break;
 763                         case 0x02:
 764                                 k = 6 * Mb;     /* XP */
 765                                 break;
 766                         case 0x03:
 767                                 k = 1 * Mb;
 768                                 break;
 769                         case 0x04:
 770                                 k = 8 * Mb;
 771                                 break;
 772                         case 0x06:
 773                                 k = 10 * Mb;    /* XP */
 774                                 break;
 775                         case 0x07:
 776                                 k = 2 * Mb;
 777                                 break;
 778                         case 0x08:
 779                                 k = 12 * Mb;    /* XP */
 780                                 break;
 781                         case 0x0A:
 782                                 k = 14 * Mb;    /* XP */
 783                                 break;
 784                         case 0x0C:
 785                                 k = 16 * Mb;    /* XP */
 786                                 break;
 787                         case 0x0E:              /* XP */
 788
 789                                 tmp2 = vga_mm_rseq(par->io_virt, 0xC1);
 790                                 switch (tmp2) {
 791                                 case 0x00:
 792                                         k = 20 * Mb;
 793                                         break;
 794                                 case 0x01:
 795                                         k = 24 * Mb;
 796                                         break;
 797                                 case 0x10:
 798                                         k = 28 * Mb;
 799                                         break;
 800                                 case 0x11:
 801                                         k = 32 * Mb;
 802                                         break;
 803                                 default:
 804                                         k = 1 * Mb;
 805                                         break;
 806                                 }
 807                                 break;
 808
 809                         case 0x0F:
 810                                 k = 4 * Mb;
 811                                 break;
 812                         default:
 813                                 k = 1 * Mb;
 814                                 break;
 815                         }
 816                 }
 817
 818         k -= memdiff * Kb;
 819         output("framebuffer size = %d Kb\n", k / Kb);
 820         return k;
 821 }
 822
 823 /* See if we can handle the video mode described in var */
 824 static int tridentfb_check_var(struct fb_var_screeninfo *var,
 825                                struct fb_info *info)
 826 {
 827         struct tridentfb_par *par = info->par;
 828         int bpp = var->bits_per_pixel;
 829         int line_length;
 830         int ramdac = 230000; /* 230MHz for most 3D chips */
 831         debug("enter\n");
 832
 833         /* check color depth */
 834         if (bpp == 24)
 835                 bpp = var->bits_per_pixel = 32;
 836         if (bpp != 8 && bpp != 16 && bpp != 32)
 837                 return -EINVAL;
 838         if (par->chip_id == TGUI9440 && bpp == 32)
 839                 return -EINVAL;
 840         /* check whether resolution fits on panel and in memory */
 841         if (par->flatpanel && nativex && var->xres > nativex)
 842                 return -EINVAL;
 843         /* various resolution checks */
 844         var->xres = (var->xres + 7) & ~0x7;
 845         if (var->xres > var->xres_virtual)
 846                 var->xres_virtual = var->xres;
 847         if (var->yres > var->yres_virtual)
 848                 var->yres_virtual = var->yres;
 849         if (var->xres_virtual > 4095 || var->yres > 2048)
 850                 return -EINVAL;
 851         /* prevent from position overflow for acceleration */
 852         if (var->yres_virtual > 0xffff)
 853                 return -EINVAL;
 854         line_length = var->xres_virtual * bpp / 8;
 855 #ifdef CONFIG_FB_TRIDENT_ACCEL
 856         if (!is3Dchip(par->chip_id)) {
 857                 /* acceleration requires line length to be power of 2 */
 858                 if (line_length <= 512)
 859                         var->xres_virtual = 512 * 8 / bpp;
 860                 else if (line_length <= 1024)
 861                         var->xres_virtual = 1024 * 8 / bpp;
 862                 else if (line_length <= 2048)
 863                         var->xres_virtual = 2048 * 8 / bpp;
 864                 else if (line_length <= 4096)
 865                         var->xres_virtual = 4096 * 8 / bpp;
 866                 else if (line_length <= 8192)
 867                         var->xres_virtual = 8192 * 8 / bpp;
 868                 else
 869                         return -EINVAL;
 870
 871                 line_length = var->xres_virtual * bpp / 8;
 872         }
 873 #endif
 874         if (var->yres > var->yres_virtual)
 875                 var->yres_virtual = var->yres;
 876         if (line_length * var->yres_virtual > info->fix.smem_len)
 877                 return -EINVAL;
 878
 879         switch (bpp) {
 880         case 8:
 881                 var->red.offset = 0;
 882                 var->green.offset = 0;
 883                 var->blue.offset = 0;
 884                 var->red.length = 6;
 885                 var->green.length = 6;
 886                 var->blue.length = 6;
 887                 break;
 888         case 16:
 889                 var->red.offset = 11;
 890                 var->green.offset = 5;
 891                 var->blue.offset = 0;
 892                 var->red.length = 5;
 893                 var->green.length = 6;
 894                 var->blue.length = 5;
 895                 break;
 896         case 32:
 897                 var->red.offset = 16;
 898                 var->green.offset = 8;
 899                 var->blue.offset = 0;
 900                 var->red.length = 8;
 901                 var->green.length = 8;
 902                 var->blue.length = 8;
 903                 break;
 904         default:
 905                 return -EINVAL;
 906         }
 907
 908         if (is_xp(par->chip_id))
 909                 ramdac = 350000;
 910
 911         switch (par->chip_id) {
 912         case TGUI9440:
 913                 ramdac = (bpp >= 16) ? 45000 : 90000;
 914                 break;
 915         case CYBER9320:
 916         case TGUI9660:
 917                 ramdac = 135000;
 918                 break;
 919         case PROVIDIA9685:
 920         case CYBER9388:
 921         case CYBER9382:
 922         case CYBER9385:
 923                 ramdac = 170000;
 924                 break;
 925         }
 926
 927         /* The clock is doubled for 32 bpp */
 928         if (bpp == 32)
 929                 ramdac /= 2;
 930
 931         if (PICOS2KHZ(var->pixclock) > ramdac)
 932                 return -EINVAL;
 933
 934         debug("exit\n");
 935
 936         return 0;
 937
 938 }
 939
 940 /* Pan the display */
 941 static int tridentfb_pan_display(struct fb_var_screeninfo *var,
 942                                  struct fb_info *info)
 943 {
 944         struct tridentfb_par *par = info->par;
 945         unsigned int offset;
 946
 947         debug("enter\n");
 948         offset = (var->xoffset + (var->yoffset * var->xres_virtual))
 949                 * var->bits_per_pixel / 32;
 950         info->var.xoffset = var->xoffset;
 951         info->var.yoffset = var->yoffset;
 952         set_screen_start(par, offset);
 953         debug("exit\n");
 954         return 0;
 955 }
 956
 957 static void shadowmode_on(struct tridentfb_par *par)
 958 {
 959         write3CE(par, CyberControl, read3CE(par, CyberControl) | 0x81);
 960 }
 961
 962 static void shadowmode_off(struct tridentfb_par *par)
 963 {
 964         write3CE(par, CyberControl, read3CE(par, CyberControl) & 0x7E);
 965 }
 966
 967 /* Set the hardware to the requested video mode */
 968 static int tridentfb_set_par(struct fb_info *info)
 969 {
 970         struct tridentfb_par *par = (struct tridentfb_par *)(info->par);
 971         u32 htotal, hdispend, hsyncstart, hsyncend, hblankstart, hblankend;
 972         u32 vtotal, vdispend, vsyncstart, vsyncend, vblankstart, vblankend;
 973         struct fb_var_screeninfo *var = &info->var;
 974         int bpp = var->bits_per_pixel;
 975         unsigned char tmp;
 976         unsigned long vclk;
 977
 978         debug("enter\n");
 979         hdispend = var->xres / 8 - 1;
 980         hsyncstart = (var->xres + var->right_margin) / 8 - 1;
 981         hsyncend = (var->xres + var->right_margin + var->hsync_len) / 8 - 1;
 982         htotal = (var->xres + var->left_margin + var->right_margin +
 983                   var->hsync_len) / 8 - 5;
 984         hblankstart = hdispend + 1;
 985         hblankend = htotal + 3;
 986
 987         vdispend = var->yres - 1;
 988         vsyncstart = var->yres + var->lower_margin;
 989         vsyncend = vsyncstart + var->vsync_len;
 990         vtotal = var->upper_margin + vsyncend - 2;
 991         vblankstart = vdispend + 1;
 992         vblankend = vtotal;
 993
 994         crtc_unlock(par);
 995         write3CE(par, CyberControl, 8);
 996
 997         if (par->flatpanel && var->xres < nativex) {
 998                 /*
 999                  * on flat panels with native size larger
1000                  * than requested resolution decide whether
1001                  * we stretch or center
1002                  */
1003                 t_outb(par, 0xEB, VGA_MIS_W);
1004
1005                 shadowmode_on(par);
1006
1007                 if (center)
1008                         screen_center(par);
1009                 else if (stretch)
1010                         screen_stretch(par);
1011
1012         } else {
1013                 t_outb(par, 0x2B, VGA_MIS_W);
1014                 write3CE(par, CyberControl, 8);
1015         }
1016
1017         /* vertical timing values */
1018         write3X4(par, VGA_CRTC_V_TOTAL, vtotal & 0xFF);
1019         write3X4(par, VGA_CRTC_V_DISP_END, vdispend & 0xFF);
1020         write3X4(par, VGA_CRTC_V_SYNC_START, vsyncstart & 0xFF);
1021         write3X4(par, VGA_CRTC_V_SYNC_END, (vsyncend & 0x0F));
1022         write3X4(par, VGA_CRTC_V_BLANK_START, vblankstart & 0xFF);
1023         write3X4(par, VGA_CRTC_V_BLANK_END, vblankend & 0xFF);
1024
1025         /* horizontal timing values */
1026         write3X4(par, VGA_CRTC_H_TOTAL, htotal & 0xFF);
1027         write3X4(par, VGA_CRTC_H_DISP, hdispend & 0xFF);
1028         write3X4(par, VGA_CRTC_H_SYNC_START, hsyncstart & 0xFF);
1029         write3X4(par, VGA_CRTC_H_SYNC_END,
1030                  (hsyncend & 0x1F) | ((hblankend & 0x20) << 2));
1031         write3X4(par, VGA_CRTC_H_BLANK_START, hblankstart & 0xFF);
1032         write3X4(par, VGA_CRTC_H_BLANK_END, hblankend & 0x1F);
1033
1034         /* higher bits of vertical timing values */
1035         tmp = 0x10;
1036         if (vtotal & 0x100) tmp |= 0x01;
1037         if (vdispend & 0x100) tmp |= 0x02;
1038         if (vsyncstart & 0x100) tmp |= 0x04;
1039         if (vblankstart & 0x100) tmp |= 0x08;
1040
1041         if (vtotal & 0x200) tmp |= 0x20;
1042         if (vdispend & 0x200) tmp |= 0x40;
1043         if (vsyncstart & 0x200) tmp |= 0x80;
1044         write3X4(par, VGA_CRTC_OVERFLOW, tmp);
1045
1046         tmp = read3X4(par, CRTHiOrd) & 0x07;
1047         tmp |= 0x08;    /* line compare bit 10 */
1048         if (vtotal & 0x400) tmp |= 0x80;
1049         if (vblankstart & 0x400) tmp |= 0x40;
1050         if (vsyncstart & 0x400) tmp |= 0x20;
1051         if (vdispend & 0x400) tmp |= 0x10;
1052         write3X4(par, CRTHiOrd, tmp);
1053
1054         tmp = (htotal >> 8) & 0x01;
1055         tmp |= (hdispend >> 7) & 0x02;
1056         tmp |= (hsyncstart >> 5) & 0x08;
1057         tmp |= (hblankstart >> 4) & 0x10;
1058         write3X4(par, HorizOverflow, tmp);
1059
1060         tmp = 0x40;
1061         if (vblankstart & 0x200) tmp |= 0x20;
1062 //FIXME if (info->var.vmode & FB_VMODE_DOUBLE) tmp |= 0x80;  /* double scan for 200 line modes */
1063         write3X4(par, VGA_CRTC_MAX_SCAN, tmp);
1064
1065         write3X4(par, VGA_CRTC_LINE_COMPARE, 0xFF);
1066         write3X4(par, VGA_CRTC_PRESET_ROW, 0);
1067         write3X4(par, VGA_CRTC_MODE, 0xC3);
1068
1069         write3X4(par, LinearAddReg, 0x20);      /* enable linear addressing */
1070
1071         tmp = (info->var.vmode & FB_VMODE_INTERLACED) ? 0x84 : 0x80;
1072         /* enable access extended memory */
1073         write3X4(par, CRTCModuleTest, tmp);
1074
1075         /* enable GE for text acceleration */
1076         write3X4(par, GraphEngReg, 0x80);
1077
1078 #ifdef CONFIG_FB_TRIDENT_ACCEL
1079         par->init_accel(par, info->var.xres_virtual, bpp);
1080 #endif
1081
1082         switch (bpp) {
1083         case 8:
1084                 tmp = 0x00;
1085                 break;
1086         case 16:
1087                 tmp = 0x05;
1088                 break;
1089         case 24:
1090                 tmp = 0x29;
1091                 break;
1092         case 32:
1093                 tmp = 0x09;
1094                 break;
1095         }
1096
1097         write3X4(par, PixelBusReg, tmp);
1098
1099         tmp = read3X4(par, DRAMControl);
1100         if (!is_oldprotect(par->chip_id))
1101                 tmp |= 0x10;
1102         if (iscyber(par->chip_id))
1103                 tmp |= 0x20;
1104         write3X4(par, DRAMControl, tmp);        /* both IO, linear enable */
1105
1106         write3X4(par, InterfaceSel, read3X4(par, InterfaceSel) | 0x40);
1107         if (!is_xp(par->chip_id))
1108                 write3X4(par, Performance, read3X4(par, Performance) | 0x10);
1109         /* MMIO & PCI read and write burst enable */
1110         if (par->chip_id != TGUI9440)
1111                 write3X4(par, PCIReg, read3X4(par, PCIReg) | 0x06);
1112
1113         vga_mm_wseq(par->io_virt, 0, 3);
1114         vga_mm_wseq(par->io_virt, 1, 1); /* set char clock 8 dots wide */
1115         /* enable 4 maps because needed in chain4 mode */
1116         vga_mm_wseq(par->io_virt, 2, 0x0F);
1117         vga_mm_wseq(par->io_virt, 3, 0);
1118         vga_mm_wseq(par->io_virt, 4, 0x0E); /* memory mode enable bitmaps ?? */
1119
1120         /* convert from picoseconds to kHz */
1121         vclk = PICOS2KHZ(info->var.pixclock);
1122
1123         /* divide clock by 2 if 32bpp chain4 mode display and CPU path */
1124         tmp = read3CE(par, MiscExtFunc) & 0xF0;
1125         if (bpp == 32 || (par->chip_id == TGUI9440 && bpp == 16)) {
1126                 tmp |= 8;
1127                 vclk *= 2;
1128         }
1129         set_vclk(par, vclk);
1130         write3CE(par, MiscExtFunc, tmp | 0x12);
1131         write3CE(par, 0x5, 0x40);       /* no CGA compat, allow 256 col */
1132         write3CE(par, 0x6, 0x05);       /* graphics mode */
1133         write3CE(par, 0x7, 0x0F);       /* planes? */
1134
1135         if (par->chip_id == CYBERBLADEXPAi1) {
1136                 /* This fixes snow-effect in 32 bpp */
1137                 write3X4(par, VGA_CRTC_H_SYNC_START, 0x84);
1138         }
1139
1140         /* graphics mode and support 256 color modes */
1141         writeAttr(par, 0x10, 0x41);
1142         writeAttr(par, 0x12, 0x0F);     /* planes */
1143         writeAttr(par, 0x13, 0);        /* horizontal pel panning */
1144
1145         /* colors */
1146         for (tmp = 0; tmp < 0x10; tmp++)
1147                 writeAttr(par, tmp, tmp);
1148         fb_readb(par->io_virt + VGA_IS1_RC);    /* flip-flop to index */
1149         t_outb(par, 0x20, VGA_ATT_W);           /* enable attr */
1150
1151         switch (bpp) {
1152         case 8:
1153                 tmp = 0;
1154                 break;
1155         case 16:
1156                 tmp = 0x30;
1157                 break;
1158         case 24:
1159         case 32:
1160                 tmp = 0xD0;
1161                 break;
1162         }
1163
1164         t_inb(par, VGA_PEL_IW);
1165         t_inb(par, VGA_PEL_MSK);
1166         t_inb(par, VGA_PEL_MSK);
1167         t_inb(par, VGA_PEL_MSK);
1168         t_inb(par, VGA_PEL_MSK);
1169         t_outb(par, tmp, VGA_PEL_MSK);
1170         t_inb(par, VGA_PEL_IW);
1171
1172         if (par->flatpanel)
1173                 set_number_of_lines(par, info->var.yres);
1174         info->fix.line_length = info->var.xres_virtual * bpp / 8;
1175         set_lwidth(par, info->fix.line_length / 8);
1176         info->fix.visual = (bpp == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
1177         info->cmap.len = (bpp == 8) ? 256 : 16;
1178         debug("exit\n");
1179         return 0;
1180 }
1181
1182 /* Set one color register */
1183 static int tridentfb_setcolreg(unsigned regno, unsigned red, unsigned green,
1184                                unsigned blue, unsigned transp,
1185                                struct fb_info *info)
1186 {
1187         int bpp = info->var.bits_per_pixel;
1188         struct tridentfb_par *par = info->par;
1189
1190         if (regno >= info->cmap.len)
1191                 return 1;
1192
1193         if (bpp == 8) {
1194                 t_outb(par, 0xFF, VGA_PEL_MSK);
1195                 t_outb(par, regno, VGA_PEL_IW);
1196
1197                 t_outb(par, red >> 10, VGA_PEL_D);
1198                 t_outb(par, green >> 10, VGA_PEL_D);
1199                 t_outb(par, blue >> 10, VGA_PEL_D);
1200
1201         } else if (regno < 16) {
1202                 if (bpp == 16) {        /* RGB 565 */
1203                         u32 col;
1204
1205                         col = (red & 0xF800) | ((green & 0xFC00) >> 5) |
1206                                 ((blue & 0xF800) >> 11);
1207                         col |= col << 16;
1208                         ((u32 *)(info->pseudo_palette))[regno] = col;
1209                 } else if (bpp == 32)           /* ARGB 8888 */
1210                         ((u32*)info->pseudo_palette)[regno] =
1211                                 ((transp & 0xFF00) << 16)       |
1212                                 ((red & 0xFF00) << 8)           |
1213                                 ((green & 0xFF00))              |
1214                                 ((blue & 0xFF00) >> 8);
1215         }
1216
1217 /*      debug("exit\n"); */
1218         return 0;
1219 }
1220
1221 /* Try blanking the screen.For flat panels it does nothing */
1222 static int tridentfb_blank(int blank_mode, struct fb_info *info)
1223 {
1224         unsigned char PMCont, DPMSCont;
1225         struct tridentfb_par *par = info->par;
1226
1227         debug("enter\n");
1228         if (par->flatpanel)
1229                 return 0;
1230         t_outb(par, 0x04, 0x83C8); /* Read DPMS Control */
1231         PMCont = t_inb(par, 0x83C6) & 0xFC;
1232         DPMSCont = read3CE(par, PowerStatus) & 0xFC;
1233         switch (blank_mode) {
1234         case FB_BLANK_UNBLANK:
1235                 /* Screen: On, HSync: On, VSync: On */
1236         case FB_BLANK_NORMAL:
1237                 /* Screen: Off, HSync: On, VSync: On */
1238                 PMCont |= 0x03;
1239                 DPMSCont |= 0x00;
1240                 break;
1241         case FB_BLANK_HSYNC_SUSPEND:
1242                 /* Screen: Off, HSync: Off, VSync: On */
1243                 PMCont |= 0x02;
1244                 DPMSCont |= 0x01;
1245                 break;
1246         case FB_BLANK_VSYNC_SUSPEND:
1247                 /* Screen: Off, HSync: On, VSync: Off */
1248                 PMCont |= 0x02;
1249                 DPMSCont |= 0x02;
1250                 break;
1251         case FB_BLANK_POWERDOWN:
1252                 /* Screen: Off, HSync: Off, VSync: Off */
1253                 PMCont |= 0x00;
1254                 DPMSCont |= 0x03;
1255                 break;
1256         }
1257
1258         write3CE(par, PowerStatus, DPMSCont);
1259         t_outb(par, 4, 0x83C8);
1260         t_outb(par, PMCont, 0x83C6);
1261
1262         debug("exit\n");
1263
1264         /* let fbcon do a softblank for us */
1265         return (blank_mode == FB_BLANK_NORMAL) ? 1 : 0;
1266 }
1267
1268 static struct fb_ops tridentfb_ops = {
1269         .owner = THIS_MODULE,
1270         .fb_setcolreg = tridentfb_setcolreg,
1271         .fb_pan_display = tridentfb_pan_display,
1272         .fb_blank = tridentfb_blank,
1273         .fb_check_var = tridentfb_check_var,
1274         .fb_set_par = tridentfb_set_par,
1275         .fb_fillrect = tridentfb_fillrect,
1276         .fb_copyarea = tridentfb_copyarea,
1277         .fb_imageblit = cfb_imageblit,
1278 #ifdef CONFIG_FB_TRIDENT_ACCEL
1279         .fb_sync = tridentfb_sync,
1280 #endif
1281 };
1282
1283 static int __devinit trident_pci_probe(struct pci_dev *dev,
1284                                        const struct pci_device_id *id)
1285 {
1286         int err;
1287         unsigned char revision;
1288         struct fb_info *info;
1289         struct tridentfb_par *default_par;
1290         int chip3D;
1291         int chip_id;
1292
1293         err = pci_enable_device(dev);
1294         if (err)
1295                 return err;
1296
1297         info = framebuffer_alloc(sizeof(struct tridentfb_par), &dev->dev);
1298         if (!info)
1299                 return -ENOMEM;
1300         default_par = info->par;
1301
1302         chip_id = id->device;
1303
1304         if (chip_id == CYBERBLADEi1)
1305                 output("*** Please do use cyblafb, Cyberblade/i1 support "
1306                        "will soon be removed from tridentfb!\n");
1307
1308
1309         /* If PCI id is 0x9660 then further detect chip type */
1310
1311         if (chip_id == TGUI9660) {
1312                 revision = vga_io_rseq(RevisionID);
1313
1314                 switch (revision) {
1315                 case 0x21:
1316                         chip_id = PROVIDIA9685;
1317                         break;
1318                 case 0x22:
1319                 case 0x23:
1320                         chip_id = CYBER9397;
1321                         break;
1322                 case 0x2A:
1323                         chip_id = CYBER9397DVD;
1324                         break;
1325                 case 0x30:
1326                 case 0x33:
1327                 case 0x34:
1328                 case 0x35:
1329                 case 0x38:
1330                 case 0x3A:
1331                 case 0xB3:
1332                         chip_id = CYBER9385;
1333                         break;
1334                 case 0x40 ... 0x43:
1335                         chip_id = CYBER9382;
1336                         break;
1337                 case 0x4A:
1338                         chip_id = CYBER9388;
1339                         break;
1340                 default:
1341                         break;
1342                 }
1343         }
1344
1345         chip3D = is3Dchip(chip_id);
1346
1347         if (is_xp(chip_id)) {
1348                 default_par->init_accel = xp_init_accel;
1349                 default_par->wait_engine = xp_wait_engine;
1350                 default_par->fill_rect = xp_fill_rect;
1351                 default_par->copy_rect = xp_copy_rect;
1352         } else if (is_blade(chip_id)) {
1353                 default_par->init_accel = blade_init_accel;
1354                 default_par->wait_engine = blade_wait_engine;
1355                 default_par->fill_rect = blade_fill_rect;
1356                 default_par->copy_rect = blade_copy_rect;
1357         } else if (chip3D) {                    /* 3DImage family left */
1358                 default_par->init_accel = image_init_accel;
1359                 default_par->wait_engine = image_wait_engine;
1360                 default_par->fill_rect = image_fill_rect;
1361                 default_par->copy_rect = image_copy_rect;
1362         } else {                                /* TGUI 9440/96XX family */
1363                 default_par->init_accel = tgui_init_accel;
1364                 default_par->wait_engine = xp_wait_engine;
1365                 default_par->fill_rect = tgui_fill_rect;
1366                 default_par->copy_rect = tgui_copy_rect;
1367         }
1368
1369         default_par->chip_id = chip_id;
1370
1371         /* setup MMIO region */
1372         tridentfb_fix.mmio_start = pci_resource_start(dev, 1);
1373         tridentfb_fix.mmio_len = chip3D ? 0x20000 : 0x10000;
1374
1375         if (!request_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len, "tridentfb")) {
1376                 debug("request_region failed!\n");
1377                 framebuffer_release(info);
1378                 return -1;
1379         }
1380
1381         default_par->io_virt = ioremap_nocache(tridentfb_fix.mmio_start,
1382                                                tridentfb_fix.mmio_len);
1383
1384         if (!default_par->io_virt) {
1385                 debug("ioremap failed\n");
1386                 err = -1;
1387                 goto out_unmap1;
1388         }
1389
1390         enable_mmio();
1391
1392         /* setup framebuffer memory */
1393         tridentfb_fix.smem_start = pci_resource_start(dev, 0);
1394         tridentfb_fix.smem_len = get_memsize(default_par);
1395
1396         if (!request_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len, "tridentfb")) {
1397                 debug("request_mem_region failed!\n");
1398                 disable_mmio(info->par);
1399                 err = -1;
1400                 goto out_unmap1;
1401         }
1402
1403         info->screen_base = ioremap_nocache(tridentfb_fix.smem_start,
1404                                             tridentfb_fix.smem_len);
1405
1406         if (!info->screen_base) {
1407                 debug("ioremap failed\n");
1408                 err = -1;
1409                 goto out_unmap2;
1410         }
1411
1412         output("%s board found\n", pci_name(dev));
1413         default_par->flatpanel = is_flatpanel(default_par);
1414
1415         if (default_par->flatpanel)
1416                 nativex = get_nativex(default_par);
1417
1418         info->fix = tridentfb_fix;
1419         info->fbops = &tridentfb_ops;
1420         info->pseudo_palette = default_par->pseudo_pal;
1421
1422         info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1423 #ifdef CONFIG_FB_TRIDENT_ACCEL
1424         info->flags |= FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT;
1425 #endif
1426         if (!fb_find_mode(&info->var, info,
1427                           mode_option, NULL, 0, NULL, bpp)) {
1428                 err = -EINVAL;
1429                 goto out_unmap2;
1430         }
1431         err = fb_alloc_cmap(&info->cmap, 256, 0);
1432         if (err < 0)
1433                 goto out_unmap2;
1434
1435         if (!noaccel && default_par->init_accel)
1436                 info->var.accel_flags |= FB_ACCELF_TEXT;
1437         else
1438                 info->var.accel_flags &= ~FB_ACCELF_TEXT;
1439         info->var.activate |= FB_ACTIVATE_NOW;
1440         info->device = &dev->dev;
1441         if (register_framebuffer(info) < 0) {
1442                 printk(KERN_ERR "tridentfb: could not register Trident framebuffer\n");
1443                 fb_dealloc_cmap(&info->cmap);
1444                 err = -EINVAL;
1445                 goto out_unmap2;
1446         }
1447         output("fb%d: %s frame buffer device %dx%d-%dbpp\n",
1448            info->node, info->fix.id, info->var.xres,
1449            info->var.yres, info->var.bits_per_pixel);
1450
1451         pci_set_drvdata(dev, info);
1452         return 0;
1453
1454 out_unmap2:
1455         if (info->screen_base)
1456                 iounmap(info->screen_base);
1457         release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len);
1458         disable_mmio(info->par);
1459 out_unmap1:
1460         if (default_par->io_virt)
1461                 iounmap(default_par->io_virt);
1462         release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len);
1463         framebuffer_release(info);
1464         return err;
1465 }
1466
1467 static void __devexit trident_pci_remove(struct pci_dev *dev)
1468 {
1469         struct fb_info *info = pci_get_drvdata(dev);
1470         struct tridentfb_par *par = info->par;
1471
1472         unregister_framebuffer(info);
1473         iounmap(par->io_virt);
1474         iounmap(info->screen_base);
1475         release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len);
1476         release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len);
1477         pci_set_drvdata(dev, NULL);
1478         framebuffer_release(info);
1479 }
1480
1481 /* List of boards that we are trying to support */
1482 static struct pci_device_id trident_devices[] = {
1483         {PCI_VENDOR_ID_TRIDENT, BLADE3D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1484         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1485         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi7D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1486         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1487         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1488         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1489         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEAi1D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1490         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEE4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1491         {PCI_VENDOR_ID_TRIDENT, TGUI9440, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1492         {PCI_VENDOR_ID_TRIDENT, TGUI9660, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1493         {PCI_VENDOR_ID_TRIDENT, IMAGE975, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1494         {PCI_VENDOR_ID_TRIDENT, IMAGE985, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1495         {PCI_VENDOR_ID_TRIDENT, CYBER9320, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1496         {PCI_VENDOR_ID_TRIDENT, CYBER9388, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1497         {PCI_VENDOR_ID_TRIDENT, CYBER9520, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1498         {PCI_VENDOR_ID_TRIDENT, CYBER9525DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1499         {PCI_VENDOR_ID_TRIDENT, CYBER9397, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1500         {PCI_VENDOR_ID_TRIDENT, CYBER9397DVD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1501         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPAi1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1502         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1503         {PCI_VENDOR_ID_TRIDENT, CYBERBLADEXPm16, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1504         {0,}
1505 };
1506
1507 MODULE_DEVICE_TABLE(pci, trident_devices);
1508
1509 static struct pci_driver tridentfb_pci_driver = {
1510         .name = "tridentfb",
1511         .id_table = trident_devices,
1512         .probe = trident_pci_probe,
1513         .remove = __devexit_p(trident_pci_remove)
1514 };
1515
1516 /*
1517  * Parse user specified options (`video=trident:')
1518  * example:
1519  *      video=trident:800x600,bpp=16,noaccel
1520  */
1521 #ifndef MODULE
1522 static int __init tridentfb_setup(char *options)
1523 {
1524         char *opt;
1525         if (!options || !*options)
1526                 return 0;
1527         while ((opt = strsep(&options, ",")) != NULL) {
1528                 if (!*opt)
1529                         continue;
1530                 if (!strncmp(opt, "noaccel", 7))
1531                         noaccel = 1;
1532                 else if (!strncmp(opt, "fp", 2))
1533                         fp = 1;
1534                 else if (!strncmp(opt, "crt", 3))
1535                         fp = 0;
1536                 else if (!strncmp(opt, "bpp=", 4))
1537                         bpp = simple_strtoul(opt + 4, NULL, 0);
1538                 else if (!strncmp(opt, "center", 6))
1539                         center = 1;
1540                 else if (!strncmp(opt, "stretch", 7))
1541                         stretch = 1;
1542                 else if (!strncmp(opt, "memsize=", 8))
1543                         memsize = simple_strtoul(opt + 8, NULL, 0);
1544                 else if (!strncmp(opt, "memdiff=", 8))
1545                         memdiff = simple_strtoul(opt + 8, NULL, 0);
1546                 else if (!strncmp(opt, "nativex=", 8))
1547                         nativex = simple_strtoul(opt + 8, NULL, 0);
1548                 else
1549                         mode_option = opt;
1550         }
1551         return 0;
1552 }
1553 #endif
1554
1555 static int __init tridentfb_init(void)
1556 {
1557 #ifndef MODULE
1558         char *option = NULL;
1559
1560         if (fb_get_options("tridentfb", &option))
1561                 return -ENODEV;
1562         tridentfb_setup(option);
1563 #endif
1564         output("Trident framebuffer %s initializing\n", VERSION);
1565         return pci_register_driver(&tridentfb_pci_driver);
1566 }
1567
1568 static void __exit tridentfb_exit(void)
1569 {
1570         pci_unregister_driver(&tridentfb_pci_driver);
1571 }
1572
1573 module_init(tridentfb_init);
1574 module_exit(tridentfb_exit);
1575
1576 MODULE_AUTHOR("Jani Monoses <jani@iv.ro>");
1577 MODULE_DESCRIPTION("Framebuffer driver for Trident cards");
1578 MODULE_LICENSE("GPL");
1579