77ca72c0c6d5d4a00cc63a56c3c3870cc2f59047
[deliverable/linux.git] / drivers / watchdog / hpwdt.c
1 /*
2 * HP WatchDog Driver
3 * based on
4 *
5 * SoftDog 0.05: A Software Watchdog Device
6 *
7 * (c) Copyright 2007 Hewlett-Packard Development Company, L.P.
8 * Thomas Mingarelli <thomas.mingarelli@hp.com>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation
13 *
14 */
15
16 #include <linux/device.h>
17 #include <linux/fs.h>
18 #include <linux/init.h>
19 #include <linux/io.h>
20 #include <linux/bitops.h>
21 #include <linux/kernel.h>
22 #include <linux/miscdevice.h>
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/pci.h>
26 #include <linux/pci_ids.h>
27 #include <linux/types.h>
28 #include <linux/uaccess.h>
29 #include <linux/watchdog.h>
30 #include <linux/dmi.h>
31 #include <linux/spinlock.h>
32 #include <linux/nmi.h>
33 #include <linux/kdebug.h>
34 #include <linux/notifier.h>
35 #include <asm/cacheflush.h>
36
37 #define HPWDT_VERSION "1.1.1"
38 #define DEFAULT_MARGIN 30
39
40 static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */
41 static unsigned int reload; /* the computed soft_margin */
42 static int nowayout = WATCHDOG_NOWAYOUT;
43 static char expect_release;
44 static unsigned long hpwdt_is_open;
45
46 static void __iomem *pci_mem_addr; /* the PCI-memory address */
47 static unsigned long __iomem *hpwdt_timer_reg;
48 static unsigned long __iomem *hpwdt_timer_con;
49
50 static struct pci_device_id hpwdt_devices[] = {
51 { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) }, /* iLO2 */
52 { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) }, /* iLO3 */
53 {0}, /* terminate list */
54 };
55 MODULE_DEVICE_TABLE(pci, hpwdt_devices);
56
57 #define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */
58 #define CRU_BIOS_SIGNATURE_VALUE 0x55524324
59 #define PCI_BIOS32_PARAGRAPH_LEN 16
60 #define PCI_ROM_BASE1 0x000F0000
61 #define ROM_SIZE 0x10000
62
63 struct bios32_service_dir {
64 u32 signature;
65 u32 entry_point;
66 u8 revision;
67 u8 length;
68 u8 checksum;
69 u8 reserved[5];
70 };
71
72 /* type 212 */
73 struct smbios_cru64_info {
74 u8 type;
75 u8 byte_length;
76 u16 handle;
77 u32 signature;
78 u64 physical_address;
79 u32 double_length;
80 u32 double_offset;
81 };
82 #define SMBIOS_CRU64_INFORMATION 212
83
84 struct cmn_registers {
85 union {
86 struct {
87 u8 ral;
88 u8 rah;
89 u16 rea2;
90 };
91 u32 reax;
92 } u1;
93 union {
94 struct {
95 u8 rbl;
96 u8 rbh;
97 u8 reb2l;
98 u8 reb2h;
99 };
100 u32 rebx;
101 } u2;
102 union {
103 struct {
104 u8 rcl;
105 u8 rch;
106 u16 rec2;
107 };
108 u32 recx;
109 } u3;
110 union {
111 struct {
112 u8 rdl;
113 u8 rdh;
114 u16 red2;
115 };
116 u32 redx;
117 } u4;
118
119 u32 resi;
120 u32 redi;
121 u16 rds;
122 u16 res;
123 u32 reflags;
124 } __attribute__((packed));
125
126 static unsigned int hpwdt_nmi_sourcing;
127 static unsigned int allow_kdump;
128 static unsigned int priority; /* hpwdt at end of die_notify list */
129 static DEFINE_SPINLOCK(rom_lock);
130 static void *cru_rom_addr;
131 static struct cmn_registers cmn_regs;
132
133 extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs,
134 unsigned long *pRomEntry);
135
136 #ifdef CONFIG_X86_32
137 /* --32 Bit Bios------------------------------------------------------------ */
138
139 #define HPWDT_ARCH 32
140
141 asm(".text \n\t"
142 ".align 4 \n"
143 "asminline_call: \n\t"
144 "pushl %ebp \n\t"
145 "movl %esp, %ebp \n\t"
146 "pusha \n\t"
147 "pushf \n\t"
148 "push %es \n\t"
149 "push %ds \n\t"
150 "pop %es \n\t"
151 "movl 8(%ebp),%eax \n\t"
152 "movl 4(%eax),%ebx \n\t"
153 "movl 8(%eax),%ecx \n\t"
154 "movl 12(%eax),%edx \n\t"
155 "movl 16(%eax),%esi \n\t"
156 "movl 20(%eax),%edi \n\t"
157 "movl (%eax),%eax \n\t"
158 "push %cs \n\t"
159 "call *12(%ebp) \n\t"
160 "pushf \n\t"
161 "pushl %eax \n\t"
162 "movl 8(%ebp),%eax \n\t"
163 "movl %ebx,4(%eax) \n\t"
164 "movl %ecx,8(%eax) \n\t"
165 "movl %edx,12(%eax) \n\t"
166 "movl %esi,16(%eax) \n\t"
167 "movl %edi,20(%eax) \n\t"
168 "movw %ds,24(%eax) \n\t"
169 "movw %es,26(%eax) \n\t"
170 "popl %ebx \n\t"
171 "movl %ebx,(%eax) \n\t"
172 "popl %ebx \n\t"
173 "movl %ebx,28(%eax) \n\t"
174 "pop %es \n\t"
175 "popf \n\t"
176 "popa \n\t"
177 "leave \n\t"
178 "ret \n\t"
179 ".previous");
180
181
182 /*
183 * cru_detect
184 *
185 * Routine Description:
186 * This function uses the 32-bit BIOS Service Directory record to
187 * search for a $CRU record.
188 *
189 * Return Value:
190 * 0 : SUCCESS
191 * <0 : FAILURE
192 */
193 static int __devinit cru_detect(unsigned long map_entry,
194 unsigned long map_offset)
195 {
196 void *bios32_map;
197 unsigned long *bios32_entrypoint;
198 unsigned long cru_physical_address;
199 unsigned long cru_length;
200 unsigned long physical_bios_base = 0;
201 unsigned long physical_bios_offset = 0;
202 int retval = -ENODEV;
203
204 bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
205
206 if (bios32_map == NULL)
207 return -ENODEV;
208
209 bios32_entrypoint = bios32_map + map_offset;
210
211 cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
212
213 asminline_call(&cmn_regs, bios32_entrypoint);
214
215 if (cmn_regs.u1.ral != 0) {
216 printk(KERN_WARNING
217 "hpwdt: Call succeeded but with an error: 0x%x\n",
218 cmn_regs.u1.ral);
219 } else {
220 physical_bios_base = cmn_regs.u2.rebx;
221 physical_bios_offset = cmn_regs.u4.redx;
222 cru_length = cmn_regs.u3.recx;
223 cru_physical_address =
224 physical_bios_base + physical_bios_offset;
225
226 /* If the values look OK, then map it in. */
227 if ((physical_bios_base + physical_bios_offset)) {
228 cru_rom_addr =
229 ioremap(cru_physical_address, cru_length);
230 if (cru_rom_addr)
231 retval = 0;
232 }
233
234 printk(KERN_DEBUG "hpwdt: CRU Base Address: 0x%lx\n",
235 physical_bios_base);
236 printk(KERN_DEBUG "hpwdt: CRU Offset Address: 0x%lx\n",
237 physical_bios_offset);
238 printk(KERN_DEBUG "hpwdt: CRU Length: 0x%lx\n",
239 cru_length);
240 printk(KERN_DEBUG "hpwdt: CRU Mapped Address: %p\n",
241 &cru_rom_addr);
242 }
243 iounmap(bios32_map);
244 return retval;
245 }
246
247 /*
248 * bios_checksum
249 */
250 static int __devinit bios_checksum(const char __iomem *ptr, int len)
251 {
252 char sum = 0;
253 int i;
254
255 /*
256 * calculate checksum of size bytes. This should add up
257 * to zero if we have a valid header.
258 */
259 for (i = 0; i < len; i++)
260 sum += ptr[i];
261
262 return ((sum == 0) && (len > 0));
263 }
264
265 /*
266 * bios32_present
267 *
268 * Routine Description:
269 * This function finds the 32-bit BIOS Service Directory
270 *
271 * Return Value:
272 * 0 : SUCCESS
273 * <0 : FAILURE
274 */
275 static int __devinit bios32_present(const char __iomem *p)
276 {
277 struct bios32_service_dir *bios_32_ptr;
278 int length;
279 unsigned long map_entry, map_offset;
280
281 bios_32_ptr = (struct bios32_service_dir *) p;
282
283 /*
284 * Search for signature by checking equal to the swizzled value
285 * instead of calling another routine to perform a strcmp.
286 */
287 if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
288 length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
289 if (bios_checksum(p, length)) {
290 /*
291 * According to the spec, we're looking for the
292 * first 4KB-aligned address below the entrypoint
293 * listed in the header. The Service Directory code
294 * is guaranteed to occupy no more than 2 4KB pages.
295 */
296 map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
297 map_offset = bios_32_ptr->entry_point - map_entry;
298
299 return cru_detect(map_entry, map_offset);
300 }
301 }
302 return -ENODEV;
303 }
304
305 static int __devinit detect_cru_service(void)
306 {
307 char __iomem *p, *q;
308 int rc = -1;
309
310 /*
311 * Search from 0x0f0000 through 0x0fffff, inclusive.
312 */
313 p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
314 if (p == NULL)
315 return -ENOMEM;
316
317 for (q = p; q < p + ROM_SIZE; q += 16) {
318 rc = bios32_present(q);
319 if (!rc)
320 break;
321 }
322 iounmap(p);
323 return rc;
324 }
325 /* ------------------------------------------------------------------------- */
326 #endif /* CONFIG_X86_32 */
327 #ifdef CONFIG_X86_64
328 /* --64 Bit Bios------------------------------------------------------------ */
329
330 #define HPWDT_ARCH 64
331
332 asm(".text \n\t"
333 ".align 4 \n"
334 "asminline_call: \n\t"
335 "pushq %rbp \n\t"
336 "movq %rsp, %rbp \n\t"
337 "pushq %rax \n\t"
338 "pushq %rbx \n\t"
339 "pushq %rdx \n\t"
340 "pushq %r12 \n\t"
341 "pushq %r9 \n\t"
342 "movq %rsi, %r12 \n\t"
343 "movq %rdi, %r9 \n\t"
344 "movl 4(%r9),%ebx \n\t"
345 "movl 8(%r9),%ecx \n\t"
346 "movl 12(%r9),%edx \n\t"
347 "movl 16(%r9),%esi \n\t"
348 "movl 20(%r9),%edi \n\t"
349 "movl (%r9),%eax \n\t"
350 "call *%r12 \n\t"
351 "pushfq \n\t"
352 "popq %r12 \n\t"
353 "movl %eax, (%r9) \n\t"
354 "movl %ebx, 4(%r9) \n\t"
355 "movl %ecx, 8(%r9) \n\t"
356 "movl %edx, 12(%r9) \n\t"
357 "movl %esi, 16(%r9) \n\t"
358 "movl %edi, 20(%r9) \n\t"
359 "movq %r12, %rax \n\t"
360 "movl %eax, 28(%r9) \n\t"
361 "popq %r9 \n\t"
362 "popq %r12 \n\t"
363 "popq %rdx \n\t"
364 "popq %rbx \n\t"
365 "popq %rax \n\t"
366 "leave \n\t"
367 "ret \n\t"
368 ".previous");
369
370 /*
371 * dmi_find_cru
372 *
373 * Routine Description:
374 * This function checks whether or not a SMBIOS/DMI record is
375 * the 64bit CRU info or not
376 */
377 static void __devinit dmi_find_cru(const struct dmi_header *dm, void *dummy)
378 {
379 struct smbios_cru64_info *smbios_cru64_ptr;
380 unsigned long cru_physical_address;
381
382 if (dm->type == SMBIOS_CRU64_INFORMATION) {
383 smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
384 if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
385 cru_physical_address =
386 smbios_cru64_ptr->physical_address +
387 smbios_cru64_ptr->double_offset;
388 cru_rom_addr = ioremap(cru_physical_address,
389 smbios_cru64_ptr->double_length);
390 set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
391 smbios_cru64_ptr->double_length >> PAGE_SHIFT);
392 }
393 }
394 }
395
396 static int __devinit detect_cru_service(void)
397 {
398 cru_rom_addr = NULL;
399
400 dmi_walk(dmi_find_cru, NULL);
401
402 /* if cru_rom_addr has been set then we found a CRU service */
403 return ((cru_rom_addr != NULL) ? 0 : -ENODEV);
404 }
405 /* ------------------------------------------------------------------------- */
406 #endif /* CONFIG_X86_64 */
407
408 /*
409 * Watchdog operations
410 */
411 static void hpwdt_start(void)
412 {
413 reload = (soft_margin * 1000) / 128;
414 iowrite16(reload, hpwdt_timer_reg);
415 iowrite16(0x85, hpwdt_timer_con);
416 }
417
418 static void hpwdt_stop(void)
419 {
420 unsigned long data;
421
422 data = ioread16(hpwdt_timer_con);
423 data &= 0xFE;
424 iowrite16(data, hpwdt_timer_con);
425 }
426
427 static void hpwdt_ping(void)
428 {
429 iowrite16(reload, hpwdt_timer_reg);
430 }
431
432 static int hpwdt_change_timer(int new_margin)
433 {
434 /* Arbitrary, can't find the card's limits */
435 if (new_margin < 5 || new_margin > 600) {
436 printk(KERN_WARNING
437 "hpwdt: New value passed in is invalid: %d seconds.\n",
438 new_margin);
439 return -EINVAL;
440 }
441
442 soft_margin = new_margin;
443 printk(KERN_DEBUG
444 "hpwdt: New timer passed in is %d seconds.\n",
445 new_margin);
446 reload = (soft_margin * 1000) / 128;
447
448 return 0;
449 }
450
451 /*
452 * NMI Handler
453 */
454 static int hpwdt_pretimeout(struct notifier_block *nb, unsigned long ulReason,
455 void *data)
456 {
457 unsigned long rom_pl;
458 static int die_nmi_called;
459
460 if (ulReason != DIE_NMI && ulReason != DIE_NMI_IPI)
461 return NOTIFY_OK;
462
463 if (hpwdt_nmi_sourcing) {
464 spin_lock_irqsave(&rom_lock, rom_pl);
465 if (!die_nmi_called)
466 asminline_call(&cmn_regs, cru_rom_addr);
467 die_nmi_called = 1;
468 spin_unlock_irqrestore(&rom_lock, rom_pl);
469 if (cmn_regs.u1.ral == 0) {
470 printk(KERN_WARNING "hpwdt: An NMI occurred, "
471 "but unable to determine source.\n");
472 } else {
473 if (allow_kdump)
474 hpwdt_stop();
475 panic("An NMI occurred, please see the Integrated "
476 "Management Log for details.\n");
477 }
478 }
479 return NOTIFY_OK;
480 }
481
482 /*
483 * /dev/watchdog handling
484 */
485 static int hpwdt_open(struct inode *inode, struct file *file)
486 {
487 /* /dev/watchdog can only be opened once */
488 if (test_and_set_bit(0, &hpwdt_is_open))
489 return -EBUSY;
490
491 /* Start the watchdog */
492 hpwdt_start();
493 hpwdt_ping();
494
495 return nonseekable_open(inode, file);
496 }
497
498 static int hpwdt_release(struct inode *inode, struct file *file)
499 {
500 /* Stop the watchdog */
501 if (expect_release == 42) {
502 hpwdt_stop();
503 } else {
504 printk(KERN_CRIT
505 "hpwdt: Unexpected close, not stopping watchdog!\n");
506 hpwdt_ping();
507 }
508
509 expect_release = 0;
510
511 /* /dev/watchdog is being closed, make sure it can be re-opened */
512 clear_bit(0, &hpwdt_is_open);
513
514 return 0;
515 }
516
517 static ssize_t hpwdt_write(struct file *file, const char __user *data,
518 size_t len, loff_t *ppos)
519 {
520 /* See if we got the magic character 'V' and reload the timer */
521 if (len) {
522 if (!nowayout) {
523 size_t i;
524
525 /* note: just in case someone wrote the magic character
526 * five months ago... */
527 expect_release = 0;
528
529 /* scan to see whether or not we got the magic char. */
530 for (i = 0; i != len; i++) {
531 char c;
532 if (get_user(c, data + i))
533 return -EFAULT;
534 if (c == 'V')
535 expect_release = 42;
536 }
537 }
538
539 /* someone wrote to us, we should reload the timer */
540 hpwdt_ping();
541 }
542
543 return len;
544 }
545
546 static const struct watchdog_info ident = {
547 .options = WDIOF_SETTIMEOUT |
548 WDIOF_KEEPALIVEPING |
549 WDIOF_MAGICCLOSE,
550 .identity = "HP iLO2+ HW Watchdog Timer",
551 };
552
553 static long hpwdt_ioctl(struct file *file, unsigned int cmd,
554 unsigned long arg)
555 {
556 void __user *argp = (void __user *)arg;
557 int __user *p = argp;
558 int new_margin;
559 int ret = -ENOTTY;
560
561 switch (cmd) {
562 case WDIOC_GETSUPPORT:
563 ret = 0;
564 if (copy_to_user(argp, &ident, sizeof(ident)))
565 ret = -EFAULT;
566 break;
567
568 case WDIOC_GETSTATUS:
569 case WDIOC_GETBOOTSTATUS:
570 ret = put_user(0, p);
571 break;
572
573 case WDIOC_KEEPALIVE:
574 hpwdt_ping();
575 ret = 0;
576 break;
577
578 case WDIOC_SETTIMEOUT:
579 ret = get_user(new_margin, p);
580 if (ret)
581 break;
582
583 ret = hpwdt_change_timer(new_margin);
584 if (ret)
585 break;
586
587 hpwdt_ping();
588 /* Fall */
589 case WDIOC_GETTIMEOUT:
590 ret = put_user(soft_margin, p);
591 break;
592 }
593 return ret;
594 }
595
596 /*
597 * Kernel interfaces
598 */
599 static const struct file_operations hpwdt_fops = {
600 .owner = THIS_MODULE,
601 .llseek = no_llseek,
602 .write = hpwdt_write,
603 .unlocked_ioctl = hpwdt_ioctl,
604 .open = hpwdt_open,
605 .release = hpwdt_release,
606 };
607
608 static struct miscdevice hpwdt_miscdev = {
609 .minor = WATCHDOG_MINOR,
610 .name = "watchdog",
611 .fops = &hpwdt_fops,
612 };
613
614 static struct notifier_block die_notifier = {
615 .notifier_call = hpwdt_pretimeout,
616 .priority = 0,
617 };
618
619 /*
620 * Init & Exit
621 */
622
623 #ifdef ARCH_HAS_NMI_WATCHDOG
624 static void __devinit hpwdt_check_nmi_sourcing(struct pci_dev *dev)
625 {
626 /*
627 * If nmi_watchdog is turned off then we can turn on
628 * our nmi sourcing capability.
629 */
630 if (!nmi_watchdog_active())
631 hpwdt_nmi_sourcing = 1;
632 else
633 dev_warn(&dev->dev, "NMI sourcing is disabled. To enable this "
634 "functionality you must reboot with nmi_watchdog=0 "
635 "and load the hpwdt driver with priority=1.\n");
636 }
637 #else
638 static void __devinit hpwdt_check_nmi_sourcing(struct pci_dev *dev)
639 {
640 dev_warn(&dev->dev, "NMI sourcing is disabled. "
641 "Your kernel does not support a NMI Watchdog.\n");
642 }
643 #endif
644
645 static int __devinit hpwdt_init_one(struct pci_dev *dev,
646 const struct pci_device_id *ent)
647 {
648 int retval;
649
650 /*
651 * Check if we can do NMI sourcing or not
652 */
653 hpwdt_check_nmi_sourcing(dev);
654
655 /*
656 * First let's find out if we are on an iLO2+ server. We will
657 * not run on a legacy ASM box.
658 * So we only support the G5 ProLiant servers and higher.
659 */
660 if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) {
661 dev_warn(&dev->dev,
662 "This server does not have an iLO2+ ASIC.\n");
663 return -ENODEV;
664 }
665
666 if (pci_enable_device(dev)) {
667 dev_warn(&dev->dev,
668 "Not possible to enable PCI Device: 0x%x:0x%x.\n",
669 ent->vendor, ent->device);
670 return -ENODEV;
671 }
672
673 pci_mem_addr = pci_iomap(dev, 1, 0x80);
674 if (!pci_mem_addr) {
675 dev_warn(&dev->dev,
676 "Unable to detect the iLO2+ server memory.\n");
677 retval = -ENOMEM;
678 goto error_pci_iomap;
679 }
680 hpwdt_timer_reg = pci_mem_addr + 0x70;
681 hpwdt_timer_con = pci_mem_addr + 0x72;
682
683 /* Make sure that we have a valid soft_margin */
684 if (hpwdt_change_timer(soft_margin))
685 hpwdt_change_timer(DEFAULT_MARGIN);
686
687 /*
688 * We need to map the ROM to get the CRU service.
689 * For 32 bit Operating Systems we need to go through the 32 Bit
690 * BIOS Service Directory
691 * For 64 bit Operating Systems we get that service through SMBIOS.
692 */
693 retval = detect_cru_service();
694 if (retval < 0) {
695 dev_warn(&dev->dev,
696 "Unable to detect the %d Bit CRU Service.\n",
697 HPWDT_ARCH);
698 goto error_get_cru;
699 }
700
701 /*
702 * We know this is the only CRU call we need to make so lets keep as
703 * few instructions as possible once the NMI comes in.
704 */
705 cmn_regs.u1.rah = 0x0D;
706 cmn_regs.u1.ral = 0x02;
707
708 /*
709 * If the priority is set to 1, then we will be put first on the
710 * die notify list to handle a critical NMI. The default is to
711 * be last so other users of the NMI signal can function.
712 */
713 if (priority)
714 die_notifier.priority = 0x7FFFFFFF;
715
716 retval = register_die_notifier(&die_notifier);
717 if (retval != 0) {
718 dev_warn(&dev->dev,
719 "Unable to register a die notifier (err=%d).\n",
720 retval);
721 goto error_die_notifier;
722 }
723
724 retval = misc_register(&hpwdt_miscdev);
725 if (retval < 0) {
726 dev_warn(&dev->dev,
727 "Unable to register miscdev on minor=%d (err=%d).\n",
728 WATCHDOG_MINOR, retval);
729 goto error_misc_register;
730 }
731
732 printk(KERN_INFO
733 "hp Watchdog Timer Driver: %s"
734 ", timer margin: %d seconds (nowayout=%d)"
735 ", allow kernel dump: %s (default = 0/OFF)"
736 ", priority: %s (default = 0/LAST).\n",
737 HPWDT_VERSION, soft_margin, nowayout,
738 (allow_kdump == 0) ? "OFF" : "ON",
739 (priority == 0) ? "LAST" : "FIRST");
740
741 return 0;
742
743 error_misc_register:
744 unregister_die_notifier(&die_notifier);
745 error_die_notifier:
746 if (cru_rom_addr)
747 iounmap(cru_rom_addr);
748 error_get_cru:
749 pci_iounmap(dev, pci_mem_addr);
750 error_pci_iomap:
751 pci_disable_device(dev);
752 return retval;
753 }
754
755 static void __devexit hpwdt_exit(struct pci_dev *dev)
756 {
757 if (!nowayout)
758 hpwdt_stop();
759
760 misc_deregister(&hpwdt_miscdev);
761 unregister_die_notifier(&die_notifier);
762
763 if (cru_rom_addr)
764 iounmap(cru_rom_addr);
765 pci_iounmap(dev, pci_mem_addr);
766 pci_disable_device(dev);
767 }
768
769 static struct pci_driver hpwdt_driver = {
770 .name = "hpwdt",
771 .id_table = hpwdt_devices,
772 .probe = hpwdt_init_one,
773 .remove = __devexit_p(hpwdt_exit),
774 };
775
776 static void __exit hpwdt_cleanup(void)
777 {
778 pci_unregister_driver(&hpwdt_driver);
779 }
780
781 static int __init hpwdt_init(void)
782 {
783 return pci_register_driver(&hpwdt_driver);
784 }
785
786 MODULE_AUTHOR("Tom Mingarelli");
787 MODULE_DESCRIPTION("hp watchdog driver");
788 MODULE_LICENSE("GPL");
789 MODULE_VERSION(HPWDT_VERSION);
790 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
791
792 module_param(soft_margin, int, 0);
793 MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
794
795 module_param(nowayout, int, 0);
796 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
797 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
798
799 module_param(allow_kdump, int, 0);
800 MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs");
801
802 module_param(priority, int, 0);
803 MODULE_PARM_DESC(priority, "The hpwdt driver handles NMIs first or last"
804 " (default = 0/Last)\n");
805
806 module_init(hpwdt_init);
807 module_exit(hpwdt_cleanup);
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