2 * Watchdog driver for IMX2 and later processors
4 * Copyright (C) 2010 Wolfram Sang, Pengutronix e.K. <w.sang@pengutronix.de>
5 * Copyright (C) 2014 Freescale Semiconductor, Inc.
7 * some parts adapted by similar drivers from Darius Augulis and Vladimir
8 * Zapolskiy, additional improvements by Wim Van Sebroeck.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * NOTE: MX1 has a slightly different Watchdog than MX2 and later:
18 * Registers: 32-bit 16-bit
19 * Stopable timer: Yes No
20 * Need to enable clk: No Yes
21 * Halt on suspend: Manual Can be automatic
24 #include <linux/clk.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
28 #include <linux/jiffies.h>
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/moduleparam.h>
32 #include <linux/of_address.h>
33 #include <linux/platform_device.h>
34 #include <linux/regmap.h>
35 #include <linux/timer.h>
36 #include <linux/watchdog.h>
38 #define DRIVER_NAME "imx2-wdt"
40 #define IMX2_WDT_WCR 0x00 /* Control Register */
41 #define IMX2_WDT_WCR_WT (0xFF << 8) /* -> Watchdog Timeout Field */
42 #define IMX2_WDT_WCR_WRE (1 << 3) /* -> WDOG Reset Enable */
43 #define IMX2_WDT_WCR_WDE (1 << 2) /* -> Watchdog Enable */
44 #define IMX2_WDT_WCR_WDZST (1 << 0) /* -> Watchdog timer Suspend */
46 #define IMX2_WDT_WSR 0x02 /* Service Register */
47 #define IMX2_WDT_SEQ1 0x5555 /* -> service sequence 1 */
48 #define IMX2_WDT_SEQ2 0xAAAA /* -> service sequence 2 */
50 #define IMX2_WDT_WRSR 0x04 /* Reset Status Register */
51 #define IMX2_WDT_WRSR_TOUT (1 << 1) /* -> Reset due to Timeout */
53 #define IMX2_WDT_WMCR 0x08 /* Misc Register */
55 #define IMX2_WDT_MAX_TIME 128
56 #define IMX2_WDT_DEFAULT_TIME 60 /* in seconds */
58 #define WDOG_SEC_TO_COUNT(s) ((s * 2 - 1) << 8)
60 struct imx2_wdt_device
{
62 struct regmap
*regmap
;
63 struct timer_list timer
; /* Pings the watchdog when closed */
64 struct watchdog_device wdog
;
67 static bool nowayout
= WATCHDOG_NOWAYOUT
;
68 module_param(nowayout
, bool, 0);
69 MODULE_PARM_DESC(nowayout
, "Watchdog cannot be stopped once started (default="
70 __MODULE_STRING(WATCHDOG_NOWAYOUT
) ")");
73 static unsigned timeout
= IMX2_WDT_DEFAULT_TIME
;
74 module_param(timeout
, uint
, 0);
75 MODULE_PARM_DESC(timeout
, "Watchdog timeout in seconds (default="
76 __MODULE_STRING(IMX2_WDT_DEFAULT_TIME
) ")");
78 static const struct watchdog_info imx2_wdt_info
= {
79 .identity
= "imx2+ watchdog",
80 .options
= WDIOF_KEEPALIVEPING
| WDIOF_SETTIMEOUT
| WDIOF_MAGICCLOSE
,
83 static int imx2_wdt_restart(struct watchdog_device
*wdog
)
85 struct imx2_wdt_device
*wdev
= watchdog_get_drvdata(wdog
);
86 unsigned int wcr_enable
= IMX2_WDT_WCR_WDE
;
88 /* Assert SRS signal */
89 regmap_write(wdev
->regmap
, IMX2_WDT_WCR
, wcr_enable
);
91 * Due to imx6q errata ERR004346 (WDOG: WDOG SRS bit requires to be
92 * written twice), we add another two writes to ensure there must be at
93 * least two writes happen in the same one 32kHz clock period. We save
94 * the target check here, since the writes shouldn't be a huge burden
95 * for other platforms.
97 regmap_write(wdev
->regmap
, IMX2_WDT_WCR
, wcr_enable
);
98 regmap_write(wdev
->regmap
, IMX2_WDT_WCR
, wcr_enable
);
100 /* wait for reset to assert... */
106 static inline void imx2_wdt_setup(struct watchdog_device
*wdog
)
108 struct imx2_wdt_device
*wdev
= watchdog_get_drvdata(wdog
);
111 regmap_read(wdev
->regmap
, IMX2_WDT_WCR
, &val
);
113 /* Suspend timer in low power mode, write once-only */
114 val
|= IMX2_WDT_WCR_WDZST
;
115 /* Strip the old watchdog Time-Out value */
116 val
&= ~IMX2_WDT_WCR_WT
;
117 /* Generate reset if WDOG times out */
118 val
&= ~IMX2_WDT_WCR_WRE
;
119 /* Keep Watchdog Disabled */
120 val
&= ~IMX2_WDT_WCR_WDE
;
121 /* Set the watchdog's Time-Out value */
122 val
|= WDOG_SEC_TO_COUNT(wdog
->timeout
);
124 regmap_write(wdev
->regmap
, IMX2_WDT_WCR
, val
);
126 /* enable the watchdog */
127 val
|= IMX2_WDT_WCR_WDE
;
128 regmap_write(wdev
->regmap
, IMX2_WDT_WCR
, val
);
131 static inline bool imx2_wdt_is_running(struct imx2_wdt_device
*wdev
)
135 regmap_read(wdev
->regmap
, IMX2_WDT_WCR
, &val
);
137 return val
& IMX2_WDT_WCR_WDE
;
140 static int imx2_wdt_ping(struct watchdog_device
*wdog
)
142 struct imx2_wdt_device
*wdev
= watchdog_get_drvdata(wdog
);
144 regmap_write(wdev
->regmap
, IMX2_WDT_WSR
, IMX2_WDT_SEQ1
);
145 regmap_write(wdev
->regmap
, IMX2_WDT_WSR
, IMX2_WDT_SEQ2
);
149 static void imx2_wdt_timer_ping(unsigned long arg
)
151 struct watchdog_device
*wdog
= (struct watchdog_device
*)arg
;
152 struct imx2_wdt_device
*wdev
= watchdog_get_drvdata(wdog
);
154 /* ping it every wdog->timeout / 2 seconds to prevent reboot */
156 mod_timer(&wdev
->timer
, jiffies
+ wdog
->timeout
* HZ
/ 2);
159 static int imx2_wdt_set_timeout(struct watchdog_device
*wdog
,
160 unsigned int new_timeout
)
162 struct imx2_wdt_device
*wdev
= watchdog_get_drvdata(wdog
);
164 wdog
->timeout
= new_timeout
;
166 regmap_update_bits(wdev
->regmap
, IMX2_WDT_WCR
, IMX2_WDT_WCR_WT
,
167 WDOG_SEC_TO_COUNT(new_timeout
));
171 static int imx2_wdt_start(struct watchdog_device
*wdog
)
173 struct imx2_wdt_device
*wdev
= watchdog_get_drvdata(wdog
);
175 if (imx2_wdt_is_running(wdev
)) {
176 /* delete the timer that pings the watchdog after close */
177 del_timer_sync(&wdev
->timer
);
178 imx2_wdt_set_timeout(wdog
, wdog
->timeout
);
180 imx2_wdt_setup(wdog
);
182 return imx2_wdt_ping(wdog
);
185 static int imx2_wdt_stop(struct watchdog_device
*wdog
)
188 * We don't need a clk_disable, it cannot be disabled once started.
189 * We use a timer to ping the watchdog while /dev/watchdog is closed
191 imx2_wdt_timer_ping((unsigned long)wdog
);
195 static inline void imx2_wdt_ping_if_active(struct watchdog_device
*wdog
)
197 struct imx2_wdt_device
*wdev
= watchdog_get_drvdata(wdog
);
199 if (imx2_wdt_is_running(wdev
)) {
200 imx2_wdt_set_timeout(wdog
, wdog
->timeout
);
201 imx2_wdt_timer_ping((unsigned long)wdog
);
205 static const struct watchdog_ops imx2_wdt_ops
= {
206 .owner
= THIS_MODULE
,
207 .start
= imx2_wdt_start
,
208 .stop
= imx2_wdt_stop
,
209 .ping
= imx2_wdt_ping
,
210 .set_timeout
= imx2_wdt_set_timeout
,
211 .restart
= imx2_wdt_restart
,
214 static const struct regmap_config imx2_wdt_regmap_config
= {
221 static int __init
imx2_wdt_probe(struct platform_device
*pdev
)
223 struct imx2_wdt_device
*wdev
;
224 struct watchdog_device
*wdog
;
225 struct resource
*res
;
230 wdev
= devm_kzalloc(&pdev
->dev
, sizeof(*wdev
), GFP_KERNEL
);
234 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
235 base
= devm_ioremap_resource(&pdev
->dev
, res
);
237 return PTR_ERR(base
);
239 wdev
->regmap
= devm_regmap_init_mmio_clk(&pdev
->dev
, NULL
, base
,
240 &imx2_wdt_regmap_config
);
241 if (IS_ERR(wdev
->regmap
)) {
242 dev_err(&pdev
->dev
, "regmap init failed\n");
243 return PTR_ERR(wdev
->regmap
);
246 wdev
->clk
= devm_clk_get(&pdev
->dev
, NULL
);
247 if (IS_ERR(wdev
->clk
)) {
248 dev_err(&pdev
->dev
, "can't get Watchdog clock\n");
249 return PTR_ERR(wdev
->clk
);
253 wdog
->info
= &imx2_wdt_info
;
254 wdog
->ops
= &imx2_wdt_ops
;
255 wdog
->min_timeout
= 1;
256 wdog
->max_timeout
= IMX2_WDT_MAX_TIME
;
257 wdog
->parent
= &pdev
->dev
;
259 ret
= clk_prepare_enable(wdev
->clk
);
263 regmap_read(wdev
->regmap
, IMX2_WDT_WRSR
, &val
);
264 wdog
->bootstatus
= val
& IMX2_WDT_WRSR_TOUT
? WDIOF_CARDRESET
: 0;
266 wdog
->timeout
= clamp_t(unsigned, timeout
, 1, IMX2_WDT_MAX_TIME
);
267 if (wdog
->timeout
!= timeout
)
268 dev_warn(&pdev
->dev
, "Initial timeout out of range! Clamped from %u to %u\n",
269 timeout
, wdog
->timeout
);
271 platform_set_drvdata(pdev
, wdog
);
272 watchdog_set_drvdata(wdog
, wdev
);
273 watchdog_set_nowayout(wdog
, nowayout
);
274 watchdog_set_restart_priority(wdog
, 128);
275 watchdog_init_timeout(wdog
, timeout
, &pdev
->dev
);
277 setup_timer(&wdev
->timer
, imx2_wdt_timer_ping
, (unsigned long)wdog
);
279 imx2_wdt_ping_if_active(wdog
);
282 * Disable the watchdog power down counter at boot. Otherwise the power
283 * down counter will pull down the #WDOG interrupt line for one clock
286 regmap_write(wdev
->regmap
, IMX2_WDT_WMCR
, 0);
288 ret
= watchdog_register_device(wdog
);
290 dev_err(&pdev
->dev
, "cannot register watchdog device\n");
294 dev_info(&pdev
->dev
, "timeout %d sec (nowayout=%d)\n",
295 wdog
->timeout
, nowayout
);
300 clk_disable_unprepare(wdev
->clk
);
304 static int __exit
imx2_wdt_remove(struct platform_device
*pdev
)
306 struct watchdog_device
*wdog
= platform_get_drvdata(pdev
);
307 struct imx2_wdt_device
*wdev
= watchdog_get_drvdata(wdog
);
309 watchdog_unregister_device(wdog
);
311 if (imx2_wdt_is_running(wdev
)) {
312 del_timer_sync(&wdev
->timer
);
314 dev_crit(&pdev
->dev
, "Device removed: Expect reboot!\n");
319 static void imx2_wdt_shutdown(struct platform_device
*pdev
)
321 struct watchdog_device
*wdog
= platform_get_drvdata(pdev
);
322 struct imx2_wdt_device
*wdev
= watchdog_get_drvdata(wdog
);
324 if (imx2_wdt_is_running(wdev
)) {
326 * We are running, we need to delete the timer but will
327 * give max timeout before reboot will take place
329 del_timer_sync(&wdev
->timer
);
330 imx2_wdt_set_timeout(wdog
, IMX2_WDT_MAX_TIME
);
332 dev_crit(&pdev
->dev
, "Device shutdown: Expect reboot!\n");
336 #ifdef CONFIG_PM_SLEEP
337 /* Disable watchdog if it is active or non-active but still running */
338 static int imx2_wdt_suspend(struct device
*dev
)
340 struct watchdog_device
*wdog
= dev_get_drvdata(dev
);
341 struct imx2_wdt_device
*wdev
= watchdog_get_drvdata(wdog
);
343 /* The watchdog IP block is running */
344 if (imx2_wdt_is_running(wdev
)) {
345 imx2_wdt_set_timeout(wdog
, IMX2_WDT_MAX_TIME
);
348 /* The watchdog is not active */
349 if (!watchdog_active(wdog
))
350 del_timer_sync(&wdev
->timer
);
353 clk_disable_unprepare(wdev
->clk
);
358 /* Enable watchdog and configure it if necessary */
359 static int imx2_wdt_resume(struct device
*dev
)
361 struct watchdog_device
*wdog
= dev_get_drvdata(dev
);
362 struct imx2_wdt_device
*wdev
= watchdog_get_drvdata(wdog
);
365 ret
= clk_prepare_enable(wdev
->clk
);
369 if (watchdog_active(wdog
) && !imx2_wdt_is_running(wdev
)) {
371 * If the watchdog is still active and resumes
372 * from deep sleep state, need to restart the
375 imx2_wdt_setup(wdog
);
376 imx2_wdt_set_timeout(wdog
, wdog
->timeout
);
378 } else if (imx2_wdt_is_running(wdev
)) {
379 /* Resuming from non-deep sleep state. */
380 imx2_wdt_set_timeout(wdog
, wdog
->timeout
);
383 * But the watchdog is not active, then start
386 if (!watchdog_active(wdog
))
387 mod_timer(&wdev
->timer
,
388 jiffies
+ wdog
->timeout
* HZ
/ 2);
395 static SIMPLE_DEV_PM_OPS(imx2_wdt_pm_ops
, imx2_wdt_suspend
,
398 static const struct of_device_id imx2_wdt_dt_ids
[] = {
399 { .compatible
= "fsl,imx21-wdt", },
402 MODULE_DEVICE_TABLE(of
, imx2_wdt_dt_ids
);
404 static struct platform_driver imx2_wdt_driver
= {
405 .remove
= __exit_p(imx2_wdt_remove
),
406 .shutdown
= imx2_wdt_shutdown
,
409 .pm
= &imx2_wdt_pm_ops
,
410 .of_match_table
= imx2_wdt_dt_ids
,
414 module_platform_driver_probe(imx2_wdt_driver
, imx2_wdt_probe
);
416 MODULE_AUTHOR("Wolfram Sang");
417 MODULE_DESCRIPTION("Watchdog driver for IMX2 and later");
418 MODULE_LICENSE("GPL v2");
419 MODULE_ALIAS("platform:" DRIVER_NAME
);