drivers/watchdog/of_xilinx_wdt.c

   1 /*
   2  * Watchdog Device Driver for Xilinx axi/xps_timebase_wdt
   3  *
   4  * (C) Copyright 2013 - 2014 Xilinx, Inc.
   5  * (C) Copyright 2011 (Alejandro Cabrera <aldaya@gmail.com>)
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License
   9  * as published by the Free Software Foundation; either version
  10  * 2 of the License, or (at your option) any later version.
  11  */
  12
  13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  14
  15 #include <linux/err.h>
  16 #include <linux/module.h>
  17 #include <linux/types.h>
  18 #include <linux/kernel.h>
  19 #include <linux/ioport.h>
  20 #include <linux/watchdog.h>
  21 #include <linux/io.h>
  22 #include <linux/of.h>
  23 #include <linux/of_device.h>
  24 #include <linux/of_address.h>
  25
  26 /* Register offsets for the Wdt device */
  27 #define XWT_TWCSR0_OFFSET   0x0 /* Control/Status Register0 */
  28 #define XWT_TWCSR1_OFFSET   0x4 /* Control/Status Register1 */
  29 #define XWT_TBR_OFFSET      0x8 /* Timebase Register Offset */
  30
  31 /* Control/Status Register Masks  */
  32 #define XWT_CSR0_WRS_MASK   0x00000008 /* Reset status */
  33 #define XWT_CSR0_WDS_MASK   0x00000004 /* Timer state  */
  34 #define XWT_CSR0_EWDT1_MASK 0x00000002 /* Enable bit 1 */
  35
  36 /* Control/Status Register 0/1 bits  */
  37 #define XWT_CSRX_EWDT2_MASK 0x00000001 /* Enable bit 2 */
  38
  39 /* SelfTest constants */
  40 #define XWT_MAX_SELFTEST_LOOP_COUNT 0x00010000
  41 #define XWT_TIMER_FAILED            0xFFFFFFFF
  42
  43 #define WATCHDOG_NAME     "Xilinx Watchdog"
  44 #define PFX WATCHDOG_NAME ": "
  45
  46 struct xwdt_device {
  47         void __iomem *base;
  48         u32 wdt_interval;
  49 };
  50
  51 static struct xwdt_device xdev;
  52
  53 static  u32 timeout;
  54
  55 static  DEFINE_SPINLOCK(spinlock);
  56
  57 static int xilinx_wdt_start(struct watchdog_device *wdd)
  58 {
  59         u32 control_status_reg;
  60
  61         spin_lock(&spinlock);
  62
  63         /* Clean previous status and enable the watchdog timer */
  64         control_status_reg = ioread32(xdev.base + XWT_TWCSR0_OFFSET);
  65         control_status_reg |= (XWT_CSR0_WRS_MASK | XWT_CSR0_WDS_MASK);
  66
  67         iowrite32((control_status_reg | XWT_CSR0_EWDT1_MASK),
  68                                 xdev.base + XWT_TWCSR0_OFFSET);
  69
  70         iowrite32(XWT_CSRX_EWDT2_MASK, xdev.base + XWT_TWCSR1_OFFSET);
  71
  72         spin_unlock(&spinlock);
  73
  74         return 0;
  75 }
  76
  77 static int xilinx_wdt_stop(struct watchdog_device *wdd)
  78 {
  79         u32 control_status_reg;
  80
  81         spin_lock(&spinlock);
  82
  83         control_status_reg = ioread32(xdev.base + XWT_TWCSR0_OFFSET);
  84
  85         iowrite32((control_status_reg & ~XWT_CSR0_EWDT1_MASK),
  86                                 xdev.base + XWT_TWCSR0_OFFSET);
  87
  88         iowrite32(0, xdev.base + XWT_TWCSR1_OFFSET);
  89
  90         spin_unlock(&spinlock);
  91         pr_info("Stopped!\n");
  92
  93         return 0;
  94 }
  95
  96 static int xilinx_wdt_keepalive(struct watchdog_device *wdd)
  97 {
  98         u32 control_status_reg;
  99
 100         spin_lock(&spinlock);
 101
 102         control_status_reg = ioread32(xdev.base + XWT_TWCSR0_OFFSET);
 103         control_status_reg |= (XWT_CSR0_WRS_MASK | XWT_CSR0_WDS_MASK);
 104         iowrite32(control_status_reg, xdev.base + XWT_TWCSR0_OFFSET);
 105
 106         spin_unlock(&spinlock);
 107
 108         return 0;
 109 }
 110
 111 static const struct watchdog_info xilinx_wdt_ident = {
 112         .options =  WDIOF_MAGICCLOSE |
 113                     WDIOF_KEEPALIVEPING,
 114         .firmware_version =     1,
 115         .identity =     WATCHDOG_NAME,
 116 };
 117
 118 static const struct watchdog_ops xilinx_wdt_ops = {
 119         .owner = THIS_MODULE,
 120         .start = xilinx_wdt_start,
 121         .stop = xilinx_wdt_stop,
 122         .ping = xilinx_wdt_keepalive,
 123 };
 124
 125 static struct watchdog_device xilinx_wdt_wdd = {
 126         .info = &xilinx_wdt_ident,
 127         .ops = &xilinx_wdt_ops,
 128 };
 129
 130 static u32 xwdt_selftest(void)
 131 {
 132         int i;
 133         u32 timer_value1;
 134         u32 timer_value2;
 135
 136         spin_lock(&spinlock);
 137
 138         timer_value1 = ioread32(xdev.base + XWT_TBR_OFFSET);
 139         timer_value2 = ioread32(xdev.base + XWT_TBR_OFFSET);
 140
 141         for (i = 0;
 142                 ((i <= XWT_MAX_SELFTEST_LOOP_COUNT) &&
 143                         (timer_value2 == timer_value1)); i++) {
 144                 timer_value2 = ioread32(xdev.base + XWT_TBR_OFFSET);
 145         }
 146
 147         spin_unlock(&spinlock);
 148
 149         if (timer_value2 != timer_value1)
 150                 return ~XWT_TIMER_FAILED;
 151         else
 152                 return XWT_TIMER_FAILED;
 153 }
 154
 155 static int xwdt_probe(struct platform_device *pdev)
 156 {
 157         int rc;
 158         u32 *tmptr;
 159         u32 *pfreq;
 160         struct resource *res;
 161         bool no_timeout = false;
 162
 163         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 164         xdev.base = devm_ioremap_resource(&pdev->dev, res);
 165         if (IS_ERR(xdev.base))
 166                 return PTR_ERR(xdev.base);
 167
 168         pfreq = (u32 *)of_get_property(pdev->dev.of_node,
 169                                         "clock-frequency", NULL);
 170
 171         if (pfreq == NULL) {
 172                 pr_warn("The watchdog clock frequency cannot be obtained!\n");
 173                 no_timeout = true;
 174         }
 175
 176         tmptr = (u32 *)of_get_property(pdev->dev.of_node,
 177                                         "xlnx,wdt-interval", NULL);
 178         if (tmptr == NULL) {
 179                 pr_warn("Parameter \"xlnx,wdt-interval\" not found in device tree!\n");
 180                 no_timeout = true;
 181         } else {
 182                 xdev.wdt_interval = *tmptr;
 183         }
 184
 185         tmptr = (u32 *)of_get_property(pdev->dev.of_node,
 186                                         "xlnx,wdt-enable-once", NULL);
 187         if (tmptr == NULL) {
 188                 pr_warn("Parameter \"xlnx,wdt-enable-once\" not found in device tree!\n");
 189                 watchdog_set_nowayout(&xilinx_wdt_wdd, true);
 190         }
 191
 192 /*
 193  *  Twice of the 2^wdt_interval / freq  because the first wdt overflow is
 194  *  ignored (interrupt), reset is only generated at second wdt overflow
 195  */
 196         if (!no_timeout)
 197                 timeout = 2 * ((1<<xdev.wdt_interval) / *pfreq);
 198
 199         rc = xwdt_selftest();
 200         if (rc == XWT_TIMER_FAILED) {
 201                 pr_err("SelfTest routine error!\n");
 202                 return rc;
 203         }
 204
 205         rc = watchdog_register_device(&xilinx_wdt_wdd);
 206         if (rc) {
 207                 pr_err("cannot register watchdog (err=%d)\n", rc);
 208                 return rc;
 209         }
 210
 211         dev_info(&pdev->dev, "Xilinx Watchdog Timer at %p with timeout %ds\n",
 212                  xdev.base, timeout);
 213
 214         return 0;
 215 }
 216
 217 static int xwdt_remove(struct platform_device *dev)
 218 {
 219         watchdog_unregister_device(&xilinx_wdt_wdd);
 220
 221         return 0;
 222 }
 223
 224 /* Match table for of_platform binding */
 225 static struct of_device_id xwdt_of_match[] = {
 226         { .compatible = "xlnx,xps-timebase-wdt-1.00.a", },
 227         { .compatible = "xlnx,xps-timebase-wdt-1.01.a", },
 228         {},
 229 };
 230 MODULE_DEVICE_TABLE(of, xwdt_of_match);
 231
 232 static struct platform_driver xwdt_driver = {
 233         .probe       = xwdt_probe,
 234         .remove      = xwdt_remove,
 235         .driver = {
 236                 .owner = THIS_MODULE,
 237                 .name  = WATCHDOG_NAME,
 238                 .of_match_table = xwdt_of_match,
 239         },
 240 };
 241
 242 module_platform_driver(xwdt_driver);
 243
 244 MODULE_AUTHOR("Alejandro Cabrera <aldaya@gmail.com>");
 245 MODULE_DESCRIPTION("Xilinx Watchdog driver");
 246 MODULE_LICENSE("GPL v2");