2 * drivers/watchdog/orion_wdt.c
4 * Watchdog driver for Orion/Kirkwood processors
6 * Author: Sylver Bruneau <sylver.bruneau@googlemail.com>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/module.h>
16 #include <linux/moduleparam.h>
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/platform_device.h>
20 #include <linux/watchdog.h>
21 #include <linux/interrupt.h>
23 #include <linux/clk.h>
24 #include <linux/err.h>
26 #include <linux/of_device.h>
28 /* RSTOUT mask register physical address for Orion5x, Kirkwood and Dove */
29 #define ORION_RSTOUT_MASK_OFFSET 0x20108
31 /* Internal registers can be configured at any 1 MiB aligned address */
32 #define INTERNAL_REGS_MASK ~(SZ_1M - 1)
35 * Watchdog timer block registers.
37 #define TIMER_CTRL 0x0000
38 #define TIMER_A370_STATUS 0x04
40 #define WDT_MAX_CYCLE_COUNT 0xffffffff
42 #define WDT_A370_RATIO_MASK(v) ((v) << 16)
43 #define WDT_A370_RATIO_SHIFT 5
44 #define WDT_A370_RATIO (1 << WDT_A370_RATIO_SHIFT)
46 #define WDT_AXP_FIXED_ENABLE_BIT BIT(10)
47 #define WDT_A370_EXPIRED BIT(31)
49 static bool nowayout
= WATCHDOG_NOWAYOUT
;
50 static int heartbeat
= -1; /* module parameter (seconds) */
52 struct orion_watchdog
;
54 struct orion_watchdog_data
{
55 int wdt_counter_offset
;
57 int rstout_enable_bit
;
58 int (*clock_init
)(struct platform_device
*,
59 struct orion_watchdog
*);
60 int (*start
)(struct watchdog_device
*);
63 struct orion_watchdog
{
64 struct watchdog_device wdt
;
67 unsigned long clk_rate
;
69 const struct orion_watchdog_data
*data
;
72 static int orion_wdt_clock_init(struct platform_device
*pdev
,
73 struct orion_watchdog
*dev
)
77 dev
->clk
= clk_get(&pdev
->dev
, NULL
);
79 return PTR_ERR(dev
->clk
);
80 ret
= clk_prepare_enable(dev
->clk
);
86 dev
->clk_rate
= clk_get_rate(dev
->clk
);
90 static int armada370_wdt_clock_init(struct platform_device
*pdev
,
91 struct orion_watchdog
*dev
)
95 dev
->clk
= clk_get(&pdev
->dev
, NULL
);
97 return PTR_ERR(dev
->clk
);
98 ret
= clk_prepare_enable(dev
->clk
);
104 /* Setup watchdog input clock */
105 atomic_io_modify(dev
->reg
+ TIMER_CTRL
,
106 WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT
),
107 WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT
));
109 dev
->clk_rate
= clk_get_rate(dev
->clk
) / WDT_A370_RATIO
;
113 static int armadaxp_wdt_clock_init(struct platform_device
*pdev
,
114 struct orion_watchdog
*dev
)
118 dev
->clk
= of_clk_get_by_name(pdev
->dev
.of_node
, "fixed");
119 if (IS_ERR(dev
->clk
))
120 return PTR_ERR(dev
->clk
);
121 ret
= clk_prepare_enable(dev
->clk
);
127 /* Enable the fixed watchdog clock input */
128 atomic_io_modify(dev
->reg
+ TIMER_CTRL
,
129 WDT_AXP_FIXED_ENABLE_BIT
,
130 WDT_AXP_FIXED_ENABLE_BIT
);
132 dev
->clk_rate
= clk_get_rate(dev
->clk
);
136 static int orion_wdt_ping(struct watchdog_device
*wdt_dev
)
138 struct orion_watchdog
*dev
= watchdog_get_drvdata(wdt_dev
);
139 /* Reload watchdog duration */
140 writel(dev
->clk_rate
* wdt_dev
->timeout
,
141 dev
->reg
+ dev
->data
->wdt_counter_offset
);
145 static int armada370_start(struct watchdog_device
*wdt_dev
)
147 struct orion_watchdog
*dev
= watchdog_get_drvdata(wdt_dev
);
150 /* Set watchdog duration */
151 writel(dev
->clk_rate
* wdt_dev
->timeout
,
152 dev
->reg
+ dev
->data
->wdt_counter_offset
);
154 /* Clear the watchdog expiration bit */
155 atomic_io_modify(dev
->reg
+ TIMER_A370_STATUS
, WDT_A370_EXPIRED
, 0);
157 /* Enable watchdog timer */
158 atomic_io_modify(dev
->reg
+ TIMER_CTRL
, dev
->data
->wdt_enable_bit
,
159 dev
->data
->wdt_enable_bit
);
161 /* Enable reset on watchdog */
162 reg
= readl(dev
->rstout
);
163 reg
|= dev
->data
->rstout_enable_bit
;
164 writel(reg
, dev
->rstout
);
168 static int orion_start(struct watchdog_device
*wdt_dev
)
170 struct orion_watchdog
*dev
= watchdog_get_drvdata(wdt_dev
);
172 /* Set watchdog duration */
173 writel(dev
->clk_rate
* wdt_dev
->timeout
,
174 dev
->reg
+ dev
->data
->wdt_counter_offset
);
176 /* Enable watchdog timer */
177 atomic_io_modify(dev
->reg
+ TIMER_CTRL
, dev
->data
->wdt_enable_bit
,
178 dev
->data
->wdt_enable_bit
);
180 /* Enable reset on watchdog */
181 atomic_io_modify(dev
->rstout
, dev
->data
->rstout_enable_bit
,
182 dev
->data
->rstout_enable_bit
);
187 static int orion_wdt_start(struct watchdog_device
*wdt_dev
)
189 struct orion_watchdog
*dev
= watchdog_get_drvdata(wdt_dev
);
191 /* There are some per-SoC quirks to handle */
192 return dev
->data
->start(wdt_dev
);
195 static int orion_wdt_stop(struct watchdog_device
*wdt_dev
)
197 struct orion_watchdog
*dev
= watchdog_get_drvdata(wdt_dev
);
199 /* Disable reset on watchdog */
200 atomic_io_modify(dev
->rstout
, dev
->data
->rstout_enable_bit
, 0);
202 /* Disable watchdog timer */
203 atomic_io_modify(dev
->reg
+ TIMER_CTRL
, dev
->data
->wdt_enable_bit
, 0);
208 static int orion_wdt_enabled(struct orion_watchdog
*dev
)
210 bool enabled
, running
;
212 enabled
= readl(dev
->rstout
) & dev
->data
->rstout_enable_bit
;
213 running
= readl(dev
->reg
+ TIMER_CTRL
) & dev
->data
->wdt_enable_bit
;
215 return enabled
&& running
;
218 static unsigned int orion_wdt_get_timeleft(struct watchdog_device
*wdt_dev
)
220 struct orion_watchdog
*dev
= watchdog_get_drvdata(wdt_dev
);
221 return readl(dev
->reg
+ dev
->data
->wdt_counter_offset
) / dev
->clk_rate
;
224 static int orion_wdt_set_timeout(struct watchdog_device
*wdt_dev
,
225 unsigned int timeout
)
227 wdt_dev
->timeout
= timeout
;
231 static const struct watchdog_info orion_wdt_info
= {
232 .options
= WDIOF_SETTIMEOUT
| WDIOF_KEEPALIVEPING
| WDIOF_MAGICCLOSE
,
233 .identity
= "Orion Watchdog",
236 static const struct watchdog_ops orion_wdt_ops
= {
237 .owner
= THIS_MODULE
,
238 .start
= orion_wdt_start
,
239 .stop
= orion_wdt_stop
,
240 .ping
= orion_wdt_ping
,
241 .set_timeout
= orion_wdt_set_timeout
,
242 .get_timeleft
= orion_wdt_get_timeleft
,
245 static irqreturn_t
orion_wdt_irq(int irq
, void *devid
)
247 panic("Watchdog Timeout");
252 * The original devicetree binding for this driver specified only
253 * one memory resource, so in order to keep DT backwards compatibility
254 * we try to fallback to a hardcoded register address, if the resource
255 * is missing from the devicetree.
257 static void __iomem
*orion_wdt_ioremap_rstout(struct platform_device
*pdev
,
258 phys_addr_t internal_regs
)
260 struct resource
*res
;
263 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 1);
265 return devm_ioremap(&pdev
->dev
, res
->start
,
268 rstout
= internal_regs
+ ORION_RSTOUT_MASK_OFFSET
;
270 WARN(1, FW_BUG
"falling back to harcoded RSTOUT reg %pa\n", &rstout
);
271 return devm_ioremap(&pdev
->dev
, rstout
, 0x4);
274 static const struct orion_watchdog_data orion_data
= {
275 .rstout_enable_bit
= BIT(1),
276 .wdt_enable_bit
= BIT(4),
277 .wdt_counter_offset
= 0x24,
278 .clock_init
= orion_wdt_clock_init
,
279 .start
= orion_start
,
282 static const struct orion_watchdog_data armada370_data
= {
283 .rstout_enable_bit
= BIT(8),
284 .wdt_enable_bit
= BIT(8),
285 .wdt_counter_offset
= 0x34,
286 .clock_init
= armada370_wdt_clock_init
,
287 .start
= armada370_start
,
290 static const struct orion_watchdog_data armadaxp_data
= {
291 .rstout_enable_bit
= BIT(8),
292 .wdt_enable_bit
= BIT(8),
293 .wdt_counter_offset
= 0x34,
294 .clock_init
= armadaxp_wdt_clock_init
,
295 .start
= armada370_start
,
298 static const struct of_device_id orion_wdt_of_match_table
[] = {
300 .compatible
= "marvell,orion-wdt",
304 .compatible
= "marvell,armada-370-wdt",
305 .data
= &armada370_data
,
308 .compatible
= "marvell,armada-xp-wdt",
309 .data
= &armadaxp_data
,
313 MODULE_DEVICE_TABLE(of
, orion_wdt_of_match_table
);
315 static int orion_wdt_get_regs(struct platform_device
*pdev
,
316 struct orion_watchdog
*dev
)
318 struct device_node
*node
= pdev
->dev
.of_node
;
319 struct resource
*res
;
321 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
324 dev
->reg
= devm_ioremap(&pdev
->dev
, res
->start
,
329 /* Each supported compatible has some RSTOUT register quirk */
330 if (of_device_is_compatible(node
, "marvell,orion-wdt")) {
332 dev
->rstout
= orion_wdt_ioremap_rstout(pdev
, res
->start
&
337 } else if (of_device_is_compatible(node
, "marvell,armada-370-wdt") ||
338 of_device_is_compatible(node
, "marvell,armada-xp-wdt")) {
340 /* Dedicated RSTOUT register, can be requested. */
341 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 1);
342 dev
->rstout
= devm_ioremap_resource(&pdev
->dev
, res
);
343 if (IS_ERR(dev
->rstout
))
344 return PTR_ERR(dev
->rstout
);
353 static int orion_wdt_probe(struct platform_device
*pdev
)
355 struct orion_watchdog
*dev
;
356 const struct of_device_id
*match
;
357 unsigned int wdt_max_duration
; /* (seconds) */
360 dev
= devm_kzalloc(&pdev
->dev
, sizeof(struct orion_watchdog
),
365 match
= of_match_device(orion_wdt_of_match_table
, &pdev
->dev
);
367 /* Default legacy match */
368 match
= &orion_wdt_of_match_table
[0];
370 dev
->wdt
.info
= &orion_wdt_info
;
371 dev
->wdt
.ops
= &orion_wdt_ops
;
372 dev
->wdt
.min_timeout
= 1;
373 dev
->data
= match
->data
;
375 ret
= orion_wdt_get_regs(pdev
, dev
);
379 ret
= dev
->data
->clock_init(pdev
, dev
);
381 dev_err(&pdev
->dev
, "cannot initialize clock\n");
385 wdt_max_duration
= WDT_MAX_CYCLE_COUNT
/ dev
->clk_rate
;
387 dev
->wdt
.timeout
= wdt_max_duration
;
388 dev
->wdt
.max_timeout
= wdt_max_duration
;
389 watchdog_init_timeout(&dev
->wdt
, heartbeat
, &pdev
->dev
);
391 platform_set_drvdata(pdev
, &dev
->wdt
);
392 watchdog_set_drvdata(&dev
->wdt
, dev
);
395 * Let's make sure the watchdog is fully stopped, unless it's
396 * explicitly enabled. This may be the case if the module was
397 * removed and re-insterted, or if the bootloader explicitly
398 * set a running watchdog before booting the kernel.
400 if (!orion_wdt_enabled(dev
))
401 orion_wdt_stop(&dev
->wdt
);
403 /* Request the IRQ only after the watchdog is disabled */
404 irq
= platform_get_irq(pdev
, 0);
407 * Not all supported platforms specify an interrupt for the
408 * watchdog, so let's make it optional.
410 ret
= devm_request_irq(&pdev
->dev
, irq
, orion_wdt_irq
, 0,
413 dev_err(&pdev
->dev
, "failed to request IRQ\n");
418 watchdog_set_nowayout(&dev
->wdt
, nowayout
);
419 ret
= watchdog_register_device(&dev
->wdt
);
423 pr_info("Initial timeout %d sec%s\n",
424 dev
->wdt
.timeout
, nowayout
? ", nowayout" : "");
428 clk_disable_unprepare(dev
->clk
);
433 static int orion_wdt_remove(struct platform_device
*pdev
)
435 struct watchdog_device
*wdt_dev
= platform_get_drvdata(pdev
);
436 struct orion_watchdog
*dev
= watchdog_get_drvdata(wdt_dev
);
438 watchdog_unregister_device(wdt_dev
);
439 clk_disable_unprepare(dev
->clk
);
444 static void orion_wdt_shutdown(struct platform_device
*pdev
)
446 struct watchdog_device
*wdt_dev
= platform_get_drvdata(pdev
);
447 orion_wdt_stop(wdt_dev
);
450 static struct platform_driver orion_wdt_driver
= {
451 .probe
= orion_wdt_probe
,
452 .remove
= orion_wdt_remove
,
453 .shutdown
= orion_wdt_shutdown
,
455 .owner
= THIS_MODULE
,
457 .of_match_table
= orion_wdt_of_match_table
,
461 module_platform_driver(orion_wdt_driver
);
463 MODULE_AUTHOR("Sylver Bruneau <sylver.bruneau@googlemail.com>");
464 MODULE_DESCRIPTION("Orion Processor Watchdog");
466 module_param(heartbeat
, int, 0);
467 MODULE_PARM_DESC(heartbeat
, "Initial watchdog heartbeat in seconds");
469 module_param(nowayout
, bool, 0);
470 MODULE_PARM_DESC(nowayout
, "Watchdog cannot be stopped once started (default="
471 __MODULE_STRING(WATCHDOG_NOWAYOUT
) ")");
473 MODULE_LICENSE("GPL");
474 MODULE_ALIAS("platform:orion_wdt");