1 /* linux/drivers/char/watchdog/s3c2410_wdt.c
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C2410 Watchdog Timer Support
8 * Based on, softdog.c by Alan Cox,
9 * (c) Copyright 1996 Alan Cox <alan@lxorguk.ukuu.org.uk>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/types.h>
31 #include <linux/timer.h>
32 #include <linux/miscdevice.h> /* for MODULE_ALIAS_MISCDEV */
33 #include <linux/watchdog.h>
34 #include <linux/init.h>
35 #include <linux/platform_device.h>
36 #include <linux/interrupt.h>
37 #include <linux/clk.h>
38 #include <linux/uaccess.h>
40 #include <linux/cpufreq.h>
41 #include <linux/slab.h>
42 #include <linux/err.h>
45 #define S3C2410_WTCON 0x00
46 #define S3C2410_WTDAT 0x04
47 #define S3C2410_WTCNT 0x08
49 #define S3C2410_WTCON_RSTEN (1 << 0)
50 #define S3C2410_WTCON_INTEN (1 << 2)
51 #define S3C2410_WTCON_ENABLE (1 << 5)
53 #define S3C2410_WTCON_DIV16 (0 << 3)
54 #define S3C2410_WTCON_DIV32 (1 << 3)
55 #define S3C2410_WTCON_DIV64 (2 << 3)
56 #define S3C2410_WTCON_DIV128 (3 << 3)
58 #define S3C2410_WTCON_PRESCALE(x) ((x) << 8)
59 #define S3C2410_WTCON_PRESCALE_MASK (0xff << 8)
61 #define CONFIG_S3C2410_WATCHDOG_ATBOOT (0)
62 #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME (15)
64 static bool nowayout
= WATCHDOG_NOWAYOUT
;
65 static int tmr_margin
;
66 static int tmr_atboot
= CONFIG_S3C2410_WATCHDOG_ATBOOT
;
67 static int soft_noboot
;
70 module_param(tmr_margin
, int, 0);
71 module_param(tmr_atboot
, int, 0);
72 module_param(nowayout
, bool, 0);
73 module_param(soft_noboot
, int, 0);
74 module_param(debug
, int, 0);
76 MODULE_PARM_DESC(tmr_margin
, "Watchdog tmr_margin in seconds. (default="
77 __MODULE_STRING(CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME
) ")");
78 MODULE_PARM_DESC(tmr_atboot
,
79 "Watchdog is started at boot time if set to 1, default="
80 __MODULE_STRING(CONFIG_S3C2410_WATCHDOG_ATBOOT
));
81 MODULE_PARM_DESC(nowayout
, "Watchdog cannot be stopped once started (default="
82 __MODULE_STRING(WATCHDOG_NOWAYOUT
) ")");
83 MODULE_PARM_DESC(soft_noboot
, "Watchdog action, set to 1 to ignore reboots, "
84 "0 to reboot (default 0)");
85 MODULE_PARM_DESC(debug
, "Watchdog debug, set to >1 for debug (default 0)");
87 static struct device
*wdt_dev
; /* platform device attached to */
88 static struct resource
*wdt_mem
;
89 static struct resource
*wdt_irq
;
90 static struct clk
*wdt_clock
;
91 static void __iomem
*wdt_base
;
92 static unsigned int wdt_count
;
93 static DEFINE_SPINLOCK(wdt_lock
);
95 /* watchdog control routines */
97 #define DBG(fmt, ...) \
100 pr_info(fmt, ##__VA_ARGS__); \
105 static int s3c2410wdt_keepalive(struct watchdog_device
*wdd
)
107 spin_lock(&wdt_lock
);
108 writel(wdt_count
, wdt_base
+ S3C2410_WTCNT
);
109 spin_unlock(&wdt_lock
);
114 static void __s3c2410wdt_stop(void)
118 wtcon
= readl(wdt_base
+ S3C2410_WTCON
);
119 wtcon
&= ~(S3C2410_WTCON_ENABLE
| S3C2410_WTCON_RSTEN
);
120 writel(wtcon
, wdt_base
+ S3C2410_WTCON
);
123 static int s3c2410wdt_stop(struct watchdog_device
*wdd
)
125 spin_lock(&wdt_lock
);
127 spin_unlock(&wdt_lock
);
132 static int s3c2410wdt_start(struct watchdog_device
*wdd
)
136 spin_lock(&wdt_lock
);
140 wtcon
= readl(wdt_base
+ S3C2410_WTCON
);
141 wtcon
|= S3C2410_WTCON_ENABLE
| S3C2410_WTCON_DIV128
;
144 wtcon
|= S3C2410_WTCON_INTEN
;
145 wtcon
&= ~S3C2410_WTCON_RSTEN
;
147 wtcon
&= ~S3C2410_WTCON_INTEN
;
148 wtcon
|= S3C2410_WTCON_RSTEN
;
151 DBG("%s: wdt_count=0x%08x, wtcon=%08lx\n",
152 __func__
, wdt_count
, wtcon
);
154 writel(wdt_count
, wdt_base
+ S3C2410_WTDAT
);
155 writel(wdt_count
, wdt_base
+ S3C2410_WTCNT
);
156 writel(wtcon
, wdt_base
+ S3C2410_WTCON
);
157 spin_unlock(&wdt_lock
);
162 static inline int s3c2410wdt_is_running(void)
164 return readl(wdt_base
+ S3C2410_WTCON
) & S3C2410_WTCON_ENABLE
;
167 static int s3c2410wdt_set_heartbeat(struct watchdog_device
*wdd
, unsigned timeout
)
169 unsigned long freq
= clk_get_rate(wdt_clock
);
171 unsigned int divisor
= 1;
178 count
= timeout
* freq
;
180 DBG("%s: count=%d, timeout=%d, freq=%lu\n",
181 __func__
, count
, timeout
, freq
);
183 /* if the count is bigger than the watchdog register,
184 then work out what we need to do (and if) we can
185 actually make this value
188 if (count
>= 0x10000) {
189 for (divisor
= 1; divisor
<= 0x100; divisor
++) {
190 if ((count
/ divisor
) < 0x10000)
194 if ((count
/ divisor
) >= 0x10000) {
195 dev_err(wdt_dev
, "timeout %d too big\n", timeout
);
200 DBG("%s: timeout=%d, divisor=%d, count=%d (%08x)\n",
201 __func__
, timeout
, divisor
, count
, count
/divisor
);
206 /* update the pre-scaler */
207 wtcon
= readl(wdt_base
+ S3C2410_WTCON
);
208 wtcon
&= ~S3C2410_WTCON_PRESCALE_MASK
;
209 wtcon
|= S3C2410_WTCON_PRESCALE(divisor
-1);
211 writel(count
, wdt_base
+ S3C2410_WTDAT
);
212 writel(wtcon
, wdt_base
+ S3C2410_WTCON
);
214 wdd
->timeout
= (count
* divisor
) / freq
;
219 #define OPTIONS (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE)
221 static const struct watchdog_info s3c2410_wdt_ident
= {
223 .firmware_version
= 0,
224 .identity
= "S3C2410 Watchdog",
227 static struct watchdog_ops s3c2410wdt_ops
= {
228 .owner
= THIS_MODULE
,
229 .start
= s3c2410wdt_start
,
230 .stop
= s3c2410wdt_stop
,
231 .ping
= s3c2410wdt_keepalive
,
232 .set_timeout
= s3c2410wdt_set_heartbeat
,
235 static struct watchdog_device s3c2410_wdd
= {
236 .info
= &s3c2410_wdt_ident
,
237 .ops
= &s3c2410wdt_ops
,
238 .timeout
= CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME
,
241 /* interrupt handler code */
243 static irqreturn_t
s3c2410wdt_irq(int irqno
, void *param
)
245 dev_info(wdt_dev
, "watchdog timer expired (irq)\n");
247 s3c2410wdt_keepalive(&s3c2410_wdd
);
252 #ifdef CONFIG_CPU_FREQ
254 static int s3c2410wdt_cpufreq_transition(struct notifier_block
*nb
,
255 unsigned long val
, void *data
)
259 if (!s3c2410wdt_is_running())
262 if (val
== CPUFREQ_PRECHANGE
) {
263 /* To ensure that over the change we don't cause the
264 * watchdog to trigger, we perform an keep-alive if
265 * the watchdog is running.
268 s3c2410wdt_keepalive(&s3c2410_wdd
);
269 } else if (val
== CPUFREQ_POSTCHANGE
) {
270 s3c2410wdt_stop(&s3c2410_wdd
);
272 ret
= s3c2410wdt_set_heartbeat(&s3c2410_wdd
, s3c2410_wdd
.timeout
);
275 s3c2410wdt_start(&s3c2410_wdd
);
284 dev_err(wdt_dev
, "cannot set new value for timeout %d\n",
285 s3c2410_wdd
.timeout
);
289 static struct notifier_block s3c2410wdt_cpufreq_transition_nb
= {
290 .notifier_call
= s3c2410wdt_cpufreq_transition
,
293 static inline int s3c2410wdt_cpufreq_register(void)
295 return cpufreq_register_notifier(&s3c2410wdt_cpufreq_transition_nb
,
296 CPUFREQ_TRANSITION_NOTIFIER
);
299 static inline void s3c2410wdt_cpufreq_deregister(void)
301 cpufreq_unregister_notifier(&s3c2410wdt_cpufreq_transition_nb
,
302 CPUFREQ_TRANSITION_NOTIFIER
);
306 static inline int s3c2410wdt_cpufreq_register(void)
311 static inline void s3c2410wdt_cpufreq_deregister(void)
316 static int s3c2410wdt_probe(struct platform_device
*pdev
)
323 DBG("%s: probe=%p\n", __func__
, pdev
);
326 wdt_dev
= &pdev
->dev
;
328 wdt_mem
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
329 if (wdt_mem
== NULL
) {
330 dev_err(dev
, "no memory resource specified\n");
334 wdt_irq
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
335 if (wdt_irq
== NULL
) {
336 dev_err(dev
, "no irq resource specified\n");
341 /* get the memory region for the watchdog timer */
342 wdt_base
= devm_ioremap_resource(dev
, wdt_mem
);
343 if (IS_ERR(wdt_base
)) {
344 ret
= PTR_ERR(wdt_base
);
348 DBG("probe: mapped wdt_base=%p\n", wdt_base
);
350 wdt_clock
= devm_clk_get(dev
, "watchdog");
351 if (IS_ERR(wdt_clock
)) {
352 dev_err(dev
, "failed to find watchdog clock source\n");
353 ret
= PTR_ERR(wdt_clock
);
357 clk_prepare_enable(wdt_clock
);
359 ret
= s3c2410wdt_cpufreq_register();
361 dev_err(dev
, "failed to register cpufreq\n");
365 /* see if we can actually set the requested timer margin, and if
366 * not, try the default value */
368 watchdog_init_timeout(&s3c2410_wdd
, tmr_margin
, &pdev
->dev
);
369 if (s3c2410wdt_set_heartbeat(&s3c2410_wdd
, s3c2410_wdd
.timeout
)) {
370 started
= s3c2410wdt_set_heartbeat(&s3c2410_wdd
,
371 CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME
);
375 "tmr_margin value out of range, default %d used\n",
376 CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME
);
378 dev_info(dev
, "default timer value is out of range, "
382 ret
= devm_request_irq(dev
, wdt_irq
->start
, s3c2410wdt_irq
, 0,
385 dev_err(dev
, "failed to install irq (%d)\n", ret
);
389 watchdog_set_nowayout(&s3c2410_wdd
, nowayout
);
391 ret
= watchdog_register_device(&s3c2410_wdd
);
393 dev_err(dev
, "cannot register watchdog (%d)\n", ret
);
397 if (tmr_atboot
&& started
== 0) {
398 dev_info(dev
, "starting watchdog timer\n");
399 s3c2410wdt_start(&s3c2410_wdd
);
400 } else if (!tmr_atboot
) {
401 /* if we're not enabling the watchdog, then ensure it is
402 * disabled if it has been left running from the bootloader
405 s3c2410wdt_stop(&s3c2410_wdd
);
408 /* print out a statement of readiness */
410 wtcon
= readl(wdt_base
+ S3C2410_WTCON
);
412 dev_info(dev
, "watchdog %sactive, reset %sabled, irq %sabled\n",
413 (wtcon
& S3C2410_WTCON_ENABLE
) ? "" : "in",
414 (wtcon
& S3C2410_WTCON_RSTEN
) ? "en" : "dis",
415 (wtcon
& S3C2410_WTCON_INTEN
) ? "en" : "dis");
420 s3c2410wdt_cpufreq_deregister();
423 clk_disable_unprepare(wdt_clock
);
432 static int s3c2410wdt_remove(struct platform_device
*dev
)
434 watchdog_unregister_device(&s3c2410_wdd
);
436 s3c2410wdt_cpufreq_deregister();
438 clk_disable_unprepare(wdt_clock
);
446 static void s3c2410wdt_shutdown(struct platform_device
*dev
)
448 s3c2410wdt_stop(&s3c2410_wdd
);
451 #ifdef CONFIG_PM_SLEEP
453 static unsigned long wtcon_save
;
454 static unsigned long wtdat_save
;
456 static int s3c2410wdt_suspend(struct device
*dev
)
458 /* Save watchdog state, and turn it off. */
459 wtcon_save
= readl(wdt_base
+ S3C2410_WTCON
);
460 wtdat_save
= readl(wdt_base
+ S3C2410_WTDAT
);
462 /* Note that WTCNT doesn't need to be saved. */
463 s3c2410wdt_stop(&s3c2410_wdd
);
468 static int s3c2410wdt_resume(struct device
*dev
)
470 /* Restore watchdog state. */
472 writel(wtdat_save
, wdt_base
+ S3C2410_WTDAT
);
473 writel(wtdat_save
, wdt_base
+ S3C2410_WTCNT
); /* Reset count */
474 writel(wtcon_save
, wdt_base
+ S3C2410_WTCON
);
476 dev_info(dev
, "watchdog %sabled\n",
477 (wtcon_save
& S3C2410_WTCON_ENABLE
) ? "en" : "dis");
483 static SIMPLE_DEV_PM_OPS(s3c2410wdt_pm_ops
, s3c2410wdt_suspend
,
487 static const struct of_device_id s3c2410_wdt_match
[] = {
488 { .compatible
= "samsung,s3c2410-wdt" },
491 MODULE_DEVICE_TABLE(of
, s3c2410_wdt_match
);
494 static struct platform_driver s3c2410wdt_driver
= {
495 .probe
= s3c2410wdt_probe
,
496 .remove
= s3c2410wdt_remove
,
497 .shutdown
= s3c2410wdt_shutdown
,
499 .owner
= THIS_MODULE
,
500 .name
= "s3c2410-wdt",
501 .pm
= &s3c2410wdt_pm_ops
,
502 .of_match_table
= of_match_ptr(s3c2410_wdt_match
),
506 module_platform_driver(s3c2410wdt_driver
);
508 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>, "
509 "Dimitry Andric <dimitry.andric@tomtom.com>");
510 MODULE_DESCRIPTION("S3C2410 Watchdog Device Driver");
511 MODULE_LICENSE("GPL");
512 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR
);
513 MODULE_ALIAS("platform:s3c2410-wdt");