Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6
[deliverable/linux.git] / drivers / watchdog / s3c2410_wdt.c
1 /* linux/drivers/char/watchdog/s3c2410_wdt.c
2 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2410 Watchdog Timer Support
7 *
8 * Based on, softdog.c by Alan Cox,
9 * (c) Copyright 1996 Alan Cox <alan@redhat.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 * Changelog:
26 * 05-Oct-2004 BJD Added semaphore init to stop crashes on open
27 * Fixed tmr_count / wdt_count confusion
28 * Added configurable debug
29 *
30 * 11-Jan-2005 BJD Fixed divide-by-2 in timeout code
31 *
32 * 25-Jan-2005 DA Added suspend/resume support
33 * Replaced reboot notifier with .shutdown method
34 *
35 * 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
36 */
37
38 #include <linux/module.h>
39 #include <linux/moduleparam.h>
40 #include <linux/types.h>
41 #include <linux/timer.h>
42 #include <linux/miscdevice.h>
43 #include <linux/watchdog.h>
44 #include <linux/fs.h>
45 #include <linux/init.h>
46 #include <linux/platform_device.h>
47 #include <linux/interrupt.h>
48 #include <linux/clk.h>
49 #include <linux/uaccess.h>
50 #include <linux/io.h>
51
52 #include <asm/arch/map.h>
53
54 #undef S3C_VA_WATCHDOG
55 #define S3C_VA_WATCHDOG (0)
56
57 #include <asm/plat-s3c/regs-watchdog.h>
58
59 #define PFX "s3c2410-wdt: "
60
61 #define CONFIG_S3C2410_WATCHDOG_ATBOOT (0)
62 #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME (15)
63
64 static int nowayout = WATCHDOG_NOWAYOUT;
65 static int tmr_margin = CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME;
66 static int tmr_atboot = CONFIG_S3C2410_WATCHDOG_ATBOOT;
67 static int soft_noboot;
68 static int debug;
69
70 module_param(tmr_margin, int, 0);
71 module_param(tmr_atboot, int, 0);
72 module_param(nowayout, int, 0);
73 module_param(soft_noboot, int, 0);
74 module_param(debug, int, 0);
75
76 MODULE_PARM_DESC(tmr_margin, "Watchdog tmr_margin in seconds. default="
77 __MODULE_STRING(CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME) ")");
78 MODULE_PARM_DESC(tmr_atboot,
79 "Watchdog is started at boot time if set to 1, default="
80 __MODULE_STRING(CONFIG_S3C2410_WATCHDOG_ATBOOT));
81 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
82 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
83 MODULE_PARM_DESC(soft_noboot, "Watchdog action, set to 1 to ignore reboots, 0 to reboot (default depends on ONLY_TESTING)");
84 MODULE_PARM_DESC(debug, "Watchdog debug, set to >1 for debug, (default 0)");
85
86
87 typedef enum close_state {
88 CLOSE_STATE_NOT,
89 CLOSE_STATE_ALLOW = 0x4021
90 } close_state_t;
91
92 static unsigned long open_lock;
93 static struct device *wdt_dev; /* platform device attached to */
94 static struct resource *wdt_mem;
95 static struct resource *wdt_irq;
96 static struct clk *wdt_clock;
97 static void __iomem *wdt_base;
98 static unsigned int wdt_count;
99 static close_state_t allow_close;
100 static DEFINE_SPINLOCK(wdt_lock);
101
102 /* watchdog control routines */
103
104 #define DBG(msg...) do { \
105 if (debug) \
106 printk(KERN_INFO msg); \
107 } while (0)
108
109 /* functions */
110
111 static void s3c2410wdt_keepalive(void)
112 {
113 spin_lock(&wdt_lock);
114 writel(wdt_count, wdt_base + S3C2410_WTCNT);
115 spin_unlock(&wdt_lock);
116 }
117
118 static void __s3c2410wdt_stop(void)
119 {
120 unsigned long wtcon;
121
122 spin_lock(&wdt_lock);
123 wtcon = readl(wdt_base + S3C2410_WTCON);
124 wtcon &= ~(S3C2410_WTCON_ENABLE | S3C2410_WTCON_RSTEN);
125 writel(wtcon, wdt_base + S3C2410_WTCON);
126 spin_unlock(&wdt_lock);
127 }
128
129 static void __s3c2410wdt_stop(void)
130 {
131 unsigned long wtcon;
132
133 wtcon = readl(wdt_base + S3C2410_WTCON);
134 wtcon &= ~(S3C2410_WTCON_ENABLE | S3C2410_WTCON_RSTEN);
135 writel(wtcon, wdt_base + S3C2410_WTCON);
136 }
137
138 static void s3c2410wdt_stop(void)
139 {
140 spin_lock(&wdt_lock);
141 __s3c2410wdt_stop();
142 spin_unlock(&wdt_lock);
143 }
144
145 static void s3c2410wdt_start(void)
146 {
147 unsigned long wtcon;
148
149 spin_lock(&wdt_lock);
150
151 __s3c2410wdt_stop();
152
153 wtcon = readl(wdt_base + S3C2410_WTCON);
154 wtcon |= S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128;
155
156 if (soft_noboot) {
157 wtcon |= S3C2410_WTCON_INTEN;
158 wtcon &= ~S3C2410_WTCON_RSTEN;
159 } else {
160 wtcon &= ~S3C2410_WTCON_INTEN;
161 wtcon |= S3C2410_WTCON_RSTEN;
162 }
163
164 DBG("%s: wdt_count=0x%08x, wtcon=%08lx\n",
165 __func__, wdt_count, wtcon);
166
167 writel(wdt_count, wdt_base + S3C2410_WTDAT);
168 writel(wdt_count, wdt_base + S3C2410_WTCNT);
169 writel(wtcon, wdt_base + S3C2410_WTCON);
170 spin_unlock(&wdt_lock);
171
172 return 0;
173 }
174
175 static int s3c2410wdt_set_heartbeat(int timeout)
176 {
177 unsigned int freq = clk_get_rate(wdt_clock);
178 unsigned int count;
179 unsigned int divisor = 1;
180 unsigned long wtcon;
181
182 if (timeout < 1)
183 return -EINVAL;
184
185 freq /= 128;
186 count = timeout * freq;
187
188 DBG("%s: count=%d, timeout=%d, freq=%d\n",
189 __func__, count, timeout, freq);
190
191 /* if the count is bigger than the watchdog register,
192 then work out what we need to do (and if) we can
193 actually make this value
194 */
195
196 if (count >= 0x10000) {
197 for (divisor = 1; divisor <= 0x100; divisor++) {
198 if ((count / divisor) < 0x10000)
199 break;
200 }
201
202 if ((count / divisor) >= 0x10000) {
203 dev_err(wdt_dev, "timeout %d too big\n", timeout);
204 return -EINVAL;
205 }
206 }
207
208 tmr_margin = timeout;
209
210 DBG("%s: timeout=%d, divisor=%d, count=%d (%08x)\n",
211 __func__, timeout, divisor, count, count/divisor);
212
213 count /= divisor;
214 wdt_count = count;
215
216 /* update the pre-scaler */
217 wtcon = readl(wdt_base + S3C2410_WTCON);
218 wtcon &= ~S3C2410_WTCON_PRESCALE_MASK;
219 wtcon |= S3C2410_WTCON_PRESCALE(divisor-1);
220
221 writel(count, wdt_base + S3C2410_WTDAT);
222 writel(wtcon, wdt_base + S3C2410_WTCON);
223
224 return 0;
225 }
226
227 /*
228 * /dev/watchdog handling
229 */
230
231 static int s3c2410wdt_open(struct inode *inode, struct file *file)
232 {
233 if (test_and_set_bit(0, &open_lock))
234 return -EBUSY;
235
236 if (nowayout)
237 __module_get(THIS_MODULE);
238
239 allow_close = CLOSE_STATE_NOT;
240
241 /* start the timer */
242 s3c2410wdt_start();
243 return nonseekable_open(inode, file);
244 }
245
246 static int s3c2410wdt_release(struct inode *inode, struct file *file)
247 {
248 /*
249 * Shut off the timer.
250 * Lock it in if it's a module and we set nowayout
251 */
252
253 if (allow_close == CLOSE_STATE_ALLOW)
254 s3c2410wdt_stop();
255 else {
256 dev_err(wdt_dev, "Unexpected close, not stopping watchdog\n");
257 s3c2410wdt_keepalive();
258 }
259 allow_close = CLOSE_STATE_NOT;
260 clear_bit(0, &open_lock);
261 return 0;
262 }
263
264 static ssize_t s3c2410wdt_write(struct file *file, const char __user *data,
265 size_t len, loff_t *ppos)
266 {
267 /*
268 * Refresh the timer.
269 */
270 if (len) {
271 if (!nowayout) {
272 size_t i;
273
274 /* In case it was set long ago */
275 allow_close = CLOSE_STATE_NOT;
276
277 for (i = 0; i != len; i++) {
278 char c;
279
280 if (get_user(c, data + i))
281 return -EFAULT;
282 if (c == 'V')
283 allow_close = CLOSE_STATE_ALLOW;
284 }
285 }
286 s3c2410wdt_keepalive();
287 }
288 return len;
289 }
290
291 #define OPTIONS WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE
292
293 static const struct watchdog_info s3c2410_wdt_ident = {
294 .options = OPTIONS,
295 .firmware_version = 0,
296 .identity = "S3C2410 Watchdog",
297 };
298
299
300 static long s3c2410wdt_ioctl(struct file *file, unsigned int cmd,
301 unsigned long arg)
302 {
303 void __user *argp = (void __user *)arg;
304 int __user *p = argp;
305 int new_margin;
306
307 switch (cmd) {
308 default:
309 return -ENOTTY;
310 case WDIOC_GETSUPPORT:
311 return copy_to_user(argp, &s3c2410_wdt_ident,
312 sizeof(s3c2410_wdt_ident)) ? -EFAULT : 0;
313 case WDIOC_GETSTATUS:
314 case WDIOC_GETBOOTSTATUS:
315 return put_user(0, p);
316 case WDIOC_KEEPALIVE:
317 s3c2410wdt_keepalive();
318 return 0;
319 case WDIOC_SETTIMEOUT:
320 if (get_user(new_margin, p))
321 return -EFAULT;
322 if (s3c2410wdt_set_heartbeat(new_margin))
323 return -EINVAL;
324 s3c2410wdt_keepalive();
325 return put_user(tmr_margin, p);
326 case WDIOC_GETTIMEOUT:
327 return put_user(tmr_margin, p);
328 }
329 }
330
331 /* kernel interface */
332
333 static const struct file_operations s3c2410wdt_fops = {
334 .owner = THIS_MODULE,
335 .llseek = no_llseek,
336 .write = s3c2410wdt_write,
337 .unlocked_ioctl = s3c2410wdt_ioctl,
338 .open = s3c2410wdt_open,
339 .release = s3c2410wdt_release,
340 };
341
342 static struct miscdevice s3c2410wdt_miscdev = {
343 .minor = WATCHDOG_MINOR,
344 .name = "watchdog",
345 .fops = &s3c2410wdt_fops,
346 };
347
348 /* interrupt handler code */
349
350 static irqreturn_t s3c2410wdt_irq(int irqno, void *param)
351 {
352 dev_info(wdt_dev, "watchdog timer expired (irq)\n");
353
354 s3c2410wdt_keepalive();
355 return IRQ_HANDLED;
356 }
357 /* device interface */
358
359 static int s3c2410wdt_probe(struct platform_device *pdev)
360 {
361 struct resource *res;
362 struct device *dev;
363 unsigned int wtcon;
364 int started = 0;
365 int ret;
366 int size;
367
368 DBG("%s: probe=%p\n", __func__, pdev);
369
370 dev = &pdev->dev;
371 wdt_dev = &pdev->dev;
372
373 /* get the memory region for the watchdog timer */
374
375 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
376 if (res == NULL) {
377 dev_err(dev, "no memory resource specified\n");
378 return -ENOENT;
379 }
380
381 size = (res->end-res->start)+1;
382 wdt_mem = request_mem_region(res->start, size, pdev->name);
383 if (wdt_mem == NULL) {
384 dev_err(dev, "failed to get memory region\n");
385 ret = -ENOENT;
386 goto err_req;
387 }
388
389 wdt_base = ioremap(res->start, size);
390 if (wdt_base == 0) {
391 dev_err(dev, "failed to ioremap() region\n");
392 ret = -EINVAL;
393 goto err_req;
394 }
395
396 DBG("probe: mapped wdt_base=%p\n", wdt_base);
397
398 wdt_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
399 if (wdt_irq == NULL) {
400 dev_err(dev, "no irq resource specified\n");
401 ret = -ENOENT;
402 goto err_map;
403 }
404
405 ret = request_irq(wdt_irq->start, s3c2410wdt_irq, 0, pdev->name, pdev);
406 if (ret != 0) {
407 dev_err(dev, "failed to install irq (%d)\n", ret);
408 goto err_map;
409 }
410
411 wdt_clock = clk_get(&pdev->dev, "watchdog");
412 if (IS_ERR(wdt_clock)) {
413 dev_err(dev, "failed to find watchdog clock source\n");
414 ret = PTR_ERR(wdt_clock);
415 goto err_irq;
416 }
417
418 clk_enable(wdt_clock);
419
420 /* see if we can actually set the requested timer margin, and if
421 * not, try the default value */
422
423 if (s3c2410wdt_set_heartbeat(tmr_margin)) {
424 started = s3c2410wdt_set_heartbeat(
425 CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME);
426
427 if (started == 0)
428 dev_info(dev,
429 "tmr_margin value out of range, default %d used\n",
430 CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME);
431 else
432 dev_info(dev, "default timer value is out of range, cannot start\n");
433 }
434
435 ret = misc_register(&s3c2410wdt_miscdev);
436 if (ret) {
437 dev_err(dev, "cannot register miscdev on minor=%d (%d)\n",
438 WATCHDOG_MINOR, ret);
439 goto err_clk;
440 }
441
442 if (tmr_atboot && started == 0) {
443 dev_info(dev, "starting watchdog timer\n");
444 s3c2410wdt_start();
445 } else if (!tmr_atboot) {
446 /* if we're not enabling the watchdog, then ensure it is
447 * disabled if it has been left running from the bootloader
448 * or other source */
449
450 s3c2410wdt_stop();
451 }
452
453 /* print out a statement of readiness */
454
455 wtcon = readl(wdt_base + S3C2410_WTCON);
456
457 dev_info(dev, "watchdog %sactive, reset %sabled, irq %sabled\n",
458 (wtcon & S3C2410_WTCON_ENABLE) ? "" : "in",
459 (wtcon & S3C2410_WTCON_RSTEN) ? "" : "dis",
460 (wtcon & S3C2410_WTCON_INTEN) ? "" : "en");
461
462 return 0;
463
464 err_clk:
465 clk_disable(wdt_clock);
466 clk_put(wdt_clock);
467
468 err_irq:
469 free_irq(wdt_irq->start, pdev);
470
471 err_map:
472 iounmap(wdt_base);
473
474 err_req:
475 release_resource(wdt_mem);
476 kfree(wdt_mem);
477
478 return ret;
479 }
480
481 static int s3c2410wdt_remove(struct platform_device *dev)
482 {
483 release_resource(wdt_mem);
484 kfree(wdt_mem);
485 wdt_mem = NULL;
486
487 free_irq(wdt_irq->start, dev);
488 wdt_irq = NULL;
489
490 clk_disable(wdt_clock);
491 clk_put(wdt_clock);
492 wdt_clock = NULL;
493
494 iounmap(wdt_base);
495 misc_deregister(&s3c2410wdt_miscdev);
496 return 0;
497 }
498
499 static void s3c2410wdt_shutdown(struct platform_device *dev)
500 {
501 s3c2410wdt_stop();
502 }
503
504 #ifdef CONFIG_PM
505
506 static unsigned long wtcon_save;
507 static unsigned long wtdat_save;
508
509 static int s3c2410wdt_suspend(struct platform_device *dev, pm_message_t state)
510 {
511 /* Save watchdog state, and turn it off. */
512 wtcon_save = readl(wdt_base + S3C2410_WTCON);
513 wtdat_save = readl(wdt_base + S3C2410_WTDAT);
514
515 /* Note that WTCNT doesn't need to be saved. */
516 s3c2410wdt_stop();
517
518 return 0;
519 }
520
521 static int s3c2410wdt_resume(struct platform_device *dev)
522 {
523 /* Restore watchdog state. */
524
525 writel(wtdat_save, wdt_base + S3C2410_WTDAT);
526 writel(wtdat_save, wdt_base + S3C2410_WTCNT); /* Reset count */
527 writel(wtcon_save, wdt_base + S3C2410_WTCON);
528
529 printk(KERN_INFO PFX "watchdog %sabled\n",
530 (wtcon_save & S3C2410_WTCON_ENABLE) ? "en" : "dis");
531
532 return 0;
533 }
534
535 #else
536 #define s3c2410wdt_suspend NULL
537 #define s3c2410wdt_resume NULL
538 #endif /* CONFIG_PM */
539
540
541 static struct platform_driver s3c2410wdt_driver = {
542 .probe = s3c2410wdt_probe,
543 .remove = s3c2410wdt_remove,
544 .shutdown = s3c2410wdt_shutdown,
545 .suspend = s3c2410wdt_suspend,
546 .resume = s3c2410wdt_resume,
547 .driver = {
548 .owner = THIS_MODULE,
549 .name = "s3c2410-wdt",
550 },
551 };
552
553
554 static char banner[] __initdata =
555 KERN_INFO "S3C2410 Watchdog Timer, (c) 2004 Simtec Electronics\n";
556
557 static int __init watchdog_init(void)
558 {
559 printk(banner);
560 return platform_driver_register(&s3c2410wdt_driver);
561 }
562
563 static void __exit watchdog_exit(void)
564 {
565 platform_driver_unregister(&s3c2410wdt_driver);
566 }
567
568 module_init(watchdog_init);
569 module_exit(watchdog_exit);
570
571 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>, "
572 "Dimitry Andric <dimitry.andric@tomtom.com>");
573 MODULE_DESCRIPTION("S3C2410 Watchdog Device Driver");
574 MODULE_LICENSE("GPL");
575 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
576 MODULE_ALIAS("platform:s3c2410-wdt");
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