drivers/watchdog/sunxi_wdt.c

   1 /*
   2  *      sunxi Watchdog Driver
   3  *
   4  *      Copyright (c) 2013 Carlo Caione
   5  *                    2012 Henrik Nordstrom
   6  *
   7  *      This program is free software; you can redistribute it and/or
   8  *      modify it under the terms of the GNU General Public License
   9  *      as published by the Free Software Foundation; either version
  10  *      2 of the License, or (at your option) any later version.
  11  *
  12  *      Based on xen_wdt.c
  13  *      (c) Copyright 2010 Novell, Inc.
  14  */
  15
  16 #include <linux/clk.h>
  17 #include <linux/delay.h>
  18 #include <linux/err.h>
  19 #include <linux/init.h>
  20 #include <linux/io.h>
  21 #include <linux/kernel.h>
  22 #include <linux/module.h>
  23 #include <linux/moduleparam.h>
  24 #include <linux/of.h>
  25 #include <linux/of_device.h>
  26 #include <linux/platform_device.h>
  27 #include <linux/types.h>
  28 #include <linux/watchdog.h>
  29
  30 #define WDT_MAX_TIMEOUT         16
  31 #define WDT_MIN_TIMEOUT         1
  32 #define WDT_TIMEOUT_MASK        0x0F
  33
  34 #define WDT_CTRL_RELOAD         ((1 << 0) | (0x0a57 << 1))
  35
  36 #define WDT_MODE_EN             (1 << 0)
  37
  38 #define DRV_NAME                "sunxi-wdt"
  39 #define DRV_VERSION             "1.0"
  40
  41 static bool nowayout = WATCHDOG_NOWAYOUT;
  42 static unsigned int timeout = WDT_MAX_TIMEOUT;
  43
  44 /*
  45  * This structure stores the register offsets for different variants
  46  * of Allwinner's watchdog hardware.
  47  */
  48 struct sunxi_wdt_reg {
  49         u8 wdt_ctrl;
  50         u8 wdt_cfg;
  51         u8 wdt_mode;
  52         u8 wdt_timeout_shift;
  53         u8 wdt_reset_mask;
  54         u8 wdt_reset_val;
  55 };
  56
  57 struct sunxi_wdt_dev {
  58         struct watchdog_device wdt_dev;
  59         void __iomem *wdt_base;
  60         const struct sunxi_wdt_reg *wdt_regs;
  61 };
  62
  63 /*
  64  * wdt_timeout_map maps the watchdog timer interval value in seconds to
  65  * the value of the register WDT_MODE at bits .wdt_timeout_shift ~ +3
  66  *
  67  * [timeout seconds] = register value
  68  *
  69  */
  70
  71 static const int wdt_timeout_map[] = {
  72         [1] = 0x1,  /* 1s  */
  73         [2] = 0x2,  /* 2s  */
  74         [3] = 0x3,  /* 3s  */
  75         [4] = 0x4,  /* 4s  */
  76         [5] = 0x5,  /* 5s  */
  77         [6] = 0x6,  /* 6s  */
  78         [8] = 0x7,  /* 8s  */
  79         [10] = 0x8, /* 10s */
  80         [12] = 0x9, /* 12s */
  81         [14] = 0xA, /* 14s */
  82         [16] = 0xB, /* 16s */
  83 };
  84
  85
  86 static int sunxi_wdt_restart(struct watchdog_device *wdt_dev)
  87 {
  88         struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
  89         void __iomem *wdt_base = sunxi_wdt->wdt_base;
  90         const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
  91         u32 val;
  92
  93         /* Set system reset function */
  94         val = readl(wdt_base + regs->wdt_cfg);
  95         val &= ~(regs->wdt_reset_mask);
  96         val |= regs->wdt_reset_val;
  97         writel(val, wdt_base + regs->wdt_cfg);
  98
  99         /* Set lowest timeout and enable watchdog */
 100         val = readl(wdt_base + regs->wdt_mode);
 101         val &= ~(WDT_TIMEOUT_MASK << regs->wdt_timeout_shift);
 102         val |= WDT_MODE_EN;
 103         writel(val, wdt_base + regs->wdt_mode);
 104
 105         /*
 106          * Restart the watchdog. The default (and lowest) interval
 107          * value for the watchdog is 0.5s.
 108          */
 109         writel(WDT_CTRL_RELOAD, wdt_base + regs->wdt_ctrl);
 110
 111         while (1) {
 112                 mdelay(5);
 113                 val = readl(wdt_base + regs->wdt_mode);
 114                 val |= WDT_MODE_EN;
 115                 writel(val, wdt_base + regs->wdt_mode);
 116         }
 117         return 0;
 118 }
 119
 120 static int sunxi_wdt_ping(struct watchdog_device *wdt_dev)
 121 {
 122         struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
 123         void __iomem *wdt_base = sunxi_wdt->wdt_base;
 124         const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
 125
 126         writel(WDT_CTRL_RELOAD, wdt_base + regs->wdt_ctrl);
 127
 128         return 0;
 129 }
 130
 131 static int sunxi_wdt_set_timeout(struct watchdog_device *wdt_dev,
 132                 unsigned int timeout)
 133 {
 134         struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
 135         void __iomem *wdt_base = sunxi_wdt->wdt_base;
 136         const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
 137         u32 reg;
 138
 139         if (wdt_timeout_map[timeout] == 0)
 140                 timeout++;
 141
 142         sunxi_wdt->wdt_dev.timeout = timeout;
 143
 144         reg = readl(wdt_base + regs->wdt_mode);
 145         reg &= ~(WDT_TIMEOUT_MASK << regs->wdt_timeout_shift);
 146         reg |= wdt_timeout_map[timeout] << regs->wdt_timeout_shift;
 147         writel(reg, wdt_base + regs->wdt_mode);
 148
 149         sunxi_wdt_ping(wdt_dev);
 150
 151         return 0;
 152 }
 153
 154 static int sunxi_wdt_stop(struct watchdog_device *wdt_dev)
 155 {
 156         struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
 157         void __iomem *wdt_base = sunxi_wdt->wdt_base;
 158         const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
 159
 160         writel(0, wdt_base + regs->wdt_mode);
 161
 162         return 0;
 163 }
 164
 165 static int sunxi_wdt_start(struct watchdog_device *wdt_dev)
 166 {
 167         u32 reg;
 168         struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
 169         void __iomem *wdt_base = sunxi_wdt->wdt_base;
 170         const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
 171         int ret;
 172
 173         ret = sunxi_wdt_set_timeout(&sunxi_wdt->wdt_dev,
 174                         sunxi_wdt->wdt_dev.timeout);
 175         if (ret < 0)
 176                 return ret;
 177
 178         /* Set system reset function */
 179         reg = readl(wdt_base + regs->wdt_cfg);
 180         reg &= ~(regs->wdt_reset_mask);
 181         reg |= regs->wdt_reset_val;
 182         writel(reg, wdt_base + regs->wdt_cfg);
 183
 184         /* Enable watchdog */
 185         reg = readl(wdt_base + regs->wdt_mode);
 186         reg |= WDT_MODE_EN;
 187         writel(reg, wdt_base + regs->wdt_mode);
 188
 189         return 0;
 190 }
 191
 192 static const struct watchdog_info sunxi_wdt_info = {
 193         .identity       = DRV_NAME,
 194         .options        = WDIOF_SETTIMEOUT |
 195                           WDIOF_KEEPALIVEPING |
 196                           WDIOF_MAGICCLOSE,
 197 };
 198
 199 static const struct watchdog_ops sunxi_wdt_ops = {
 200         .owner          = THIS_MODULE,
 201         .start          = sunxi_wdt_start,
 202         .stop           = sunxi_wdt_stop,
 203         .ping           = sunxi_wdt_ping,
 204         .set_timeout    = sunxi_wdt_set_timeout,
 205         .restart        = sunxi_wdt_restart,
 206 };
 207
 208 static const struct sunxi_wdt_reg sun4i_wdt_reg = {
 209         .wdt_ctrl = 0x00,
 210         .wdt_cfg = 0x04,
 211         .wdt_mode = 0x04,
 212         .wdt_timeout_shift = 3,
 213         .wdt_reset_mask = 0x02,
 214         .wdt_reset_val = 0x02,
 215 };
 216
 217 static const struct sunxi_wdt_reg sun6i_wdt_reg = {
 218         .wdt_ctrl = 0x10,
 219         .wdt_cfg = 0x14,
 220         .wdt_mode = 0x18,
 221         .wdt_timeout_shift = 4,
 222         .wdt_reset_mask = 0x03,
 223         .wdt_reset_val = 0x01,
 224 };
 225
 226 static const struct of_device_id sunxi_wdt_dt_ids[] = {
 227         { .compatible = "allwinner,sun4i-a10-wdt", .data = &sun4i_wdt_reg },
 228         { .compatible = "allwinner,sun6i-a31-wdt", .data = &sun6i_wdt_reg },
 229         { /* sentinel */ }
 230 };
 231 MODULE_DEVICE_TABLE(of, sunxi_wdt_dt_ids);
 232
 233 static int sunxi_wdt_probe(struct platform_device *pdev)
 234 {
 235         struct sunxi_wdt_dev *sunxi_wdt;
 236         const struct of_device_id *device;
 237         struct resource *res;
 238         int err;
 239
 240         sunxi_wdt = devm_kzalloc(&pdev->dev, sizeof(*sunxi_wdt), GFP_KERNEL);
 241         if (!sunxi_wdt)
 242                 return -EINVAL;
 243
 244         platform_set_drvdata(pdev, sunxi_wdt);
 245
 246         device = of_match_device(sunxi_wdt_dt_ids, &pdev->dev);
 247         if (!device)
 248                 return -ENODEV;
 249
 250         sunxi_wdt->wdt_regs = device->data;
 251
 252         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 253         sunxi_wdt->wdt_base = devm_ioremap_resource(&pdev->dev, res);
 254         if (IS_ERR(sunxi_wdt->wdt_base))
 255                 return PTR_ERR(sunxi_wdt->wdt_base);
 256
 257         sunxi_wdt->wdt_dev.info = &sunxi_wdt_info;
 258         sunxi_wdt->wdt_dev.ops = &sunxi_wdt_ops;
 259         sunxi_wdt->wdt_dev.timeout = WDT_MAX_TIMEOUT;
 260         sunxi_wdt->wdt_dev.max_timeout = WDT_MAX_TIMEOUT;
 261         sunxi_wdt->wdt_dev.min_timeout = WDT_MIN_TIMEOUT;
 262         sunxi_wdt->wdt_dev.parent = &pdev->dev;
 263
 264         watchdog_init_timeout(&sunxi_wdt->wdt_dev, timeout, &pdev->dev);
 265         watchdog_set_nowayout(&sunxi_wdt->wdt_dev, nowayout);
 266         watchdog_set_restart_priority(&sunxi_wdt->wdt_dev, 128);
 267
 268         watchdog_set_drvdata(&sunxi_wdt->wdt_dev, sunxi_wdt);
 269
 270         sunxi_wdt_stop(&sunxi_wdt->wdt_dev);
 271
 272         err = watchdog_register_device(&sunxi_wdt->wdt_dev);
 273         if (unlikely(err))
 274                 return err;
 275
 276         dev_info(&pdev->dev, "Watchdog enabled (timeout=%d sec, nowayout=%d)",
 277                         sunxi_wdt->wdt_dev.timeout, nowayout);
 278
 279         return 0;
 280 }
 281
 282 static int sunxi_wdt_remove(struct platform_device *pdev)
 283 {
 284         struct sunxi_wdt_dev *sunxi_wdt = platform_get_drvdata(pdev);
 285
 286         watchdog_unregister_device(&sunxi_wdt->wdt_dev);
 287         watchdog_set_drvdata(&sunxi_wdt->wdt_dev, NULL);
 288
 289         return 0;
 290 }
 291
 292 static void sunxi_wdt_shutdown(struct platform_device *pdev)
 293 {
 294         struct sunxi_wdt_dev *sunxi_wdt = platform_get_drvdata(pdev);
 295
 296         sunxi_wdt_stop(&sunxi_wdt->wdt_dev);
 297 }
 298
 299 static struct platform_driver sunxi_wdt_driver = {
 300         .probe          = sunxi_wdt_probe,
 301         .remove         = sunxi_wdt_remove,
 302         .shutdown       = sunxi_wdt_shutdown,
 303         .driver         = {
 304                 .name           = DRV_NAME,
 305                 .of_match_table = sunxi_wdt_dt_ids,
 306         },
 307 };
 308
 309 module_platform_driver(sunxi_wdt_driver);
 310
 311 module_param(timeout, uint, 0);
 312 MODULE_PARM_DESC(timeout, "Watchdog heartbeat in seconds");
 313
 314 module_param(nowayout, bool, 0);
 315 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
 316                 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 317
 318 MODULE_LICENSE("GPL");
 319 MODULE_AUTHOR("Carlo Caione <carlo.caione@gmail.com>");
 320 MODULE_AUTHOR("Henrik Nordstrom <henrik@henriknordstrom.net>");
 321 MODULE_DESCRIPTION("sunxi WatchDog Timer Driver");
 322 MODULE_VERSION(DRV_VERSION);