1 // mips.h -- ELF definitions specific to EM_MIPS -*- C++ -*-
3 // Copyright (C) 2012-2016 Free Software Foundation, Inc.
4 // Written by Sasa Stankovic <sasa.stankovic@imgtec.com>
5 // and Aleksandar Simeonov <aleksandar.simeonov@rt-rk.com>.
7 // This file is part of elfcpp.
9 // This program is free software; you can redistribute it and/or
10 // modify it under the terms of the GNU Library General Public License
11 // as published by the Free Software Foundation; either version 2, or
12 // (at your option) any later version.
14 // In addition to the permissions in the GNU Library General Public
15 // License, the Free Software Foundation gives you unlimited
16 // permission to link the compiled version of this file into
17 // combinations with other programs, and to distribute those
18 // combinations without any restriction coming from the use of this
19 // file. (The Library Public License restrictions do apply in other
20 // respects; for example, they cover modification of the file, and
21 /// distribution when not linked into a combined executable.)
23 // This program is distributed in the hope that it will be useful, but
24 // WITHOUT ANY WARRANTY; without even the implied warranty of
25 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
26 // Library General Public License for more details.
28 // You should have received a copy of the GNU Library General Public
29 // License along with this program; if not, write to the Free Software
30 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
36 // Documentation for the MIPS relocs is taken from
37 // http://math-atlas.sourceforge.net/devel/assembly/mipsabi32.pdf
43 // MIPS Relocation Codes
50 R_MIPS_32
= 2, // In Elf 64: alias R_MIPS_ADD
51 R_MIPS_REL32
= 3, // In Elf 64: alias R_MIPS_REL
55 R_MIPS_GPREL16
= 7, // In Elf 64: alias R_MIPS_GPREL
57 R_MIPS_GOT16
= 9, // In Elf 64: alias R_MIPS_GOT
59 R_MIPS_CALL16
= 11, // In Elf 64: alias R_MIPS_CALL
78 R_MIPS_CALL_HI16
= 30,
79 R_MIPS_CALL_LO16
= 31,
82 R_MIPS_ADD_IMMEDIATE
= 34,
87 R_MIPS_TLS_DTPMOD32
= 38,
88 R_MIPS_TLS_DTPREL32
= 39,
89 R_MIPS_TLS_DTPMOD64
= 40,
90 R_MIPS_TLS_DTPREL64
= 41,
93 R_MIPS_TLS_DTPREL_HI16
= 44,
94 R_MIPS_TLS_DTPREL_LO16
= 45,
95 R_MIPS_TLS_GOTTPREL
= 46,
96 R_MIPS_TLS_TPREL32
= 47,
97 R_MIPS_TLS_TPREL64
= 48,
98 R_MIPS_TLS_TPREL_HI16
= 49,
99 R_MIPS_TLS_TPREL_LO16
= 50,
100 R_MIPS_GLOB_DAT
= 51,
101 // These relocs are used for the mips16.
103 R_MIPS16_GPREL
= 101,
104 R_MIPS16_GOT16
= 102,
105 R_MIPS16_CALL16
= 103,
108 R_MIPS16_TLS_GD
= 106,
109 R_MIPS16_TLS_LDM
= 107,
110 R_MIPS16_TLS_DTPREL_HI16
= 108,
111 R_MIPS16_TLS_DTPREL_LO16
= 109,
112 R_MIPS16_TLS_GOTTPREL
= 110,
113 R_MIPS16_TLS_TPREL_HI16
= 111,
114 R_MIPS16_TLS_TPREL_LO16
= 112,
117 R_MIPS_JUMP_SLOT
= 127,
119 // These relocations are specific to microMIPS.
120 R_MICROMIPS_26_S1
= 133,
121 R_MICROMIPS_HI16
= 134,
122 R_MICROMIPS_LO16
= 135,
123 R_MICROMIPS_GPREL16
= 136, // In Elf 64: alias R_MICROMIPS_GPREL
124 R_MICROMIPS_LITERAL
= 137,
125 R_MICROMIPS_GOT16
= 138, // In Elf 64: alias R_MICROMIPS_GOT
126 R_MICROMIPS_PC7_S1
= 139,
127 R_MICROMIPS_PC10_S1
= 140,
128 R_MICROMIPS_PC16_S1
= 141,
129 R_MICROMIPS_CALL16
= 142, // In Elf 64: alias R_MICROMIPS_CALL
130 R_MICROMIPS_GOT_DISP
= 145,
131 R_MICROMIPS_GOT_PAGE
= 146,
132 R_MICROMIPS_GOT_OFST
= 147,
133 R_MICROMIPS_GOT_HI16
= 148,
134 R_MICROMIPS_GOT_LO16
= 149,
135 R_MICROMIPS_SUB
= 150,
136 R_MICROMIPS_HIGHER
= 151,
137 R_MICROMIPS_HIGHEST
= 152,
138 R_MICROMIPS_CALL_HI16
= 153,
139 R_MICROMIPS_CALL_LO16
= 154,
140 R_MICROMIPS_SCN_DISP
= 155,
141 R_MICROMIPS_JALR
= 156,
142 R_MICROMIPS_HI0_LO16
= 157,
144 R_MICROMIPS_TLS_GD
= 162,
145 R_MICROMIPS_TLS_LDM
= 163,
146 R_MICROMIPS_TLS_DTPREL_HI16
= 164,
147 R_MICROMIPS_TLS_DTPREL_LO16
= 165,
148 R_MICROMIPS_TLS_GOTTPREL
= 166,
149 R_MICROMIPS_TLS_TPREL_HI16
= 169,
150 R_MICROMIPS_TLS_TPREL_LO16
= 170,
151 // microMIPS GP- and PC-relative relocations.
152 R_MICROMIPS_GPREL7_S2
= 172,
153 R_MICROMIPS_PC23_S2
= 173,
155 // This was a GNU extension used by embedded-PIC. It was co-opted by
156 // mips-linux for exception-handling data. GCC stopped using it in
157 // May, 2004, then started using it again for compact unwind tables.
160 // This relocation is used internally by gas.
161 R_MIPS_GNU_REL16_S2
= 250,
162 // These are GNU extensions to enable C++ vtable garbage collection.
163 R_MIPS_GNU_VTINHERIT
= 253,
164 R_MIPS_GNU_VTENTRY
= 254
167 // Processor specific flags for the ELF header e_flags field.
170 // At least one .noreorder directive appears in the source.
171 EF_MIPS_NOREORDER
= 0x00000001,
172 // File contains position independent code.
173 EF_MIPS_PIC
= 0x00000002,
174 // Code in file uses the standard calling sequence for calling
175 // position independent code.
176 EF_MIPS_CPIC
= 0x00000004,
177 // ??? Unknown flag, set in IRIX 6's BSDdup2.o in libbsd.a.
178 EF_MIPS_XGOT
= 0x00000008,
179 // Code in file uses UCODE (obsolete)
180 EF_MIPS_UCODE
= 0x00000010,
181 // Code in file uses new ABI (-n32 on Irix 6).
182 EF_MIPS_ABI2
= 0x00000020,
183 // Process the .MIPS.options section first by ld
184 EF_MIPS_OPTIONS_FIRST
= 0x00000080,
185 // Architectural Extensions used by this file
186 EF_MIPS_ARCH_ASE
= 0x0f000000,
187 // Use MDMX multimedia extensions
188 EF_MIPS_ARCH_ASE_MDMX
= 0x08000000,
189 // Use MIPS-16 ISA extensions
190 EF_MIPS_ARCH_ASE_M16
= 0x04000000,
191 // Use MICROMIPS ISA extensions.
192 EF_MIPS_ARCH_ASE_MICROMIPS
= 0x02000000,
193 // Indicates code compiled for a 64-bit machine in 32-bit mode.
194 // (regs are 32-bits wide.)
195 EF_MIPS_32BITMODE
= 0x00000100,
196 // 32-bit machine but FP registers are 64 bit (-mfp64).
197 EF_MIPS_FP64
= 0x00000200,
198 /// Code in file uses the IEEE 754-2008 NaN encoding convention.
199 EF_MIPS_NAN2008
= 0x00000400,
201 EF_MIPS_DYNAMIC
= 0x40
204 // Machine variant if we know it. This field was invented at Cygnus,
205 // but it is hoped that other vendors will adopt it. If some standard
206 // is developed, this code should be changed to follow it.
209 EF_MIPS_MACH
= 0x00FF0000,
211 // Cygnus is choosing values between 80 and 9F;
212 // 00 - 7F should be left for a future standard;
213 // the rest are open.
215 E_MIPS_MACH_3900
= 0x00810000,
216 E_MIPS_MACH_4010
= 0x00820000,
217 E_MIPS_MACH_4100
= 0x00830000,
218 E_MIPS_MACH_4650
= 0x00850000,
219 E_MIPS_MACH_4120
= 0x00870000,
220 E_MIPS_MACH_4111
= 0x00880000,
221 E_MIPS_MACH_SB1
= 0x008a0000,
222 E_MIPS_MACH_OCTEON
= 0x008b0000,
223 E_MIPS_MACH_XLR
= 0x008c0000,
224 E_MIPS_MACH_OCTEON2
= 0x008d0000,
225 E_MIPS_MACH_OCTEON3
= 0x008e0000,
226 E_MIPS_MACH_5400
= 0x00910000,
227 E_MIPS_MACH_5900
= 0x00920000,
228 E_MIPS_MACH_5500
= 0x00980000,
229 E_MIPS_MACH_9000
= 0x00990000,
230 E_MIPS_MACH_LS2E
= 0x00A00000,
231 E_MIPS_MACH_LS2F
= 0x00A10000,
232 E_MIPS_MACH_LS3A
= 0x00A20000,
238 // Four bit MIPS architecture field.
239 EF_MIPS_ARCH
= 0xf0000000,
241 E_MIPS_ARCH_1
= 0x00000000,
243 E_MIPS_ARCH_2
= 0x10000000,
245 E_MIPS_ARCH_3
= 0x20000000,
247 E_MIPS_ARCH_4
= 0x30000000,
249 E_MIPS_ARCH_5
= 0x40000000,
251 E_MIPS_ARCH_32
= 0x50000000,
253 E_MIPS_ARCH_64
= 0x60000000,
255 E_MIPS_ARCH_32R2
= 0x70000000,
257 E_MIPS_ARCH_64R2
= 0x80000000,
259 E_MIPS_ARCH_32R6
= 0x90000000,
261 E_MIPS_ARCH_64R6
= 0xa0000000,
264 // Values for the xxx_size bytes of an ABI flags structure.
273 // 128-bit registers.
277 // Masks for the ases word of an ABI flags structure.
281 AFL_ASE_DSP
= 0x00000001,
283 AFL_ASE_DSPR2
= 0x00000002,
284 // Enhanced VA Scheme.
285 AFL_ASE_EVA
= 0x00000004,
286 // MCU (MicroController) ASE.
287 AFL_ASE_MCU
= 0x00000008,
289 AFL_ASE_MDMX
= 0x00000010,
291 AFL_ASE_MIPS3D
= 0x00000020,
293 AFL_ASE_MT
= 0x00000040,
295 AFL_ASE_SMARTMIPS
= 0x00000080,
297 AFL_ASE_VIRT
= 0x00000100,
299 AFL_ASE_MSA
= 0x00000200,
301 AFL_ASE_MIPS16
= 0x00000400,
303 AFL_ASE_MICROMIPS
= 0x00000800,
305 AFL_ASE_XPA
= 0x00001000
308 // Values for the isa_ext word of an ABI flags structure.
311 // RMI Xlr instruction.
313 // Cavium Networks Octeon2.
315 // Cavium Networks OcteonP.
318 AFL_EXT_LOONGSON_3A
= 4,
319 // Cavium Networks Octeon.
321 // MIPS R5900 instruction.
323 // MIPS R4650 instruction.
325 // LSI R4010 instruction.
327 // NEC VR4100 instruction.
329 // Toshiba R3900 instruction.
331 // MIPS R10000 instruction.
333 // Broadcom SB-1 instruction.
335 // NEC VR4111/VR4181 instruction.
337 // NEC VR4120 instruction.
339 // NEC VR5400 instruction.
341 // NEC VR5500 instruction.
343 // ST Microelectronics Loongson 2E.
344 AFL_EXT_LOONGSON_2E
= 17,
345 // ST Microelectronics Loongson 2F.
346 AFL_EXT_LOONGSON_2F
= 18,
347 // Cavium Networks Octeon3.
351 // Masks for the flags1 word of an ABI flags structure.
354 // Uses odd single-precision registers.
355 AFL_FLAGS1_ODDSPREG
= 1
358 // Object attribute tags.
362 // Floating-point ABI used by this object file.
363 Tag_GNU_MIPS_ABI_FP
= 4,
364 // MSA ABI used by this object file.
365 Tag_GNU_MIPS_ABI_MSA
= 8
368 // Object attribute values.
371 // Values defined for Tag_GNU_MIPS_ABI_FP.
372 // Not tagged or not using any ABIs affected by the differences.
373 Val_GNU_MIPS_ABI_FP_ANY
= 0,
374 // Using hard-float -mdouble-float.
375 Val_GNU_MIPS_ABI_FP_DOUBLE
= 1,
376 // Using hard-float -msingle-float.
377 Val_GNU_MIPS_ABI_FP_SINGLE
= 2,
379 Val_GNU_MIPS_ABI_FP_SOFT
= 3,
380 // Using -mips32r2 -mfp64.
381 Val_GNU_MIPS_ABI_FP_OLD_64
= 4,
383 Val_GNU_MIPS_ABI_FP_XX
= 5,
384 // Using -mips32r2 -mfp64.
385 Val_GNU_MIPS_ABI_FP_64
= 6,
386 // Using -mips32r2 -mfp64 -mno-odd-spreg.
387 Val_GNU_MIPS_ABI_FP_64A
= 7,
388 // This is reserved for backward-compatibility with an earlier
389 // implementation of the MIPS NaN2008 functionality.
390 Val_GNU_MIPS_ABI_FP_NAN2008
= 8,
392 // Values defined for Tag_GNU_MIPS_ABI_MSA.
393 // Not tagged or not using any ABIs affected by the differences.
394 Val_GNU_MIPS_ABI_MSA_ANY
= 0,
395 // Using 128-bit MSA.
396 Val_GNU_MIPS_ABI_MSA_128
= 1
401 // Mask to extract ABI version, not really a flag value.
402 EF_MIPS_ABI
= 0x0000F000,
404 // The original o32 abi.
405 E_MIPS_ABI_O32
= 0x00001000,
406 // O32 extended to work on 64 bit architectures
407 E_MIPS_ABI_O64
= 0x00002000,
408 // EABI in 32 bit mode
409 E_MIPS_ABI_EABI32
= 0x00003000,
410 // EABI in 64 bit mode
411 E_MIPS_ABI_EABI64
= 0x00004000,
414 // Dynamic section MIPS flags
418 RHF_NONE
= 0x00000000,
419 // Use shortcut pointers
420 RHF_QUICKSTART
= 0x00000001,
421 // Hash size not power of two
422 RHF_NOTPOT
= 0x00000002,
423 // Ignore LD_LIBRARY_PATH
424 RHF_NO_LIBRARY_REPLACEMENT
= 0x00000004
427 // Special values for the st_other field in the symbol table.
430 // Two topmost bits denote the MIPS ISA for .text symbols:
431 // + 00 -- standard MIPS code,
432 // + 10 -- microMIPS code,
433 // + 11 -- MIPS16 code; requires the following two bits to be set too.
434 // Note that one of the MIPS16 bits overlaps with STO_MIPS_PIC.
437 // The mask spanning the rest of MIPS psABI flags. At most one is expected
438 // to be set except for STO_MIPS16.
439 STO_MIPS_FLAGS
= ~(STO_MIPS_ISA
| 0x3),
441 // The MIPS psABI was updated in 2008 with support for PLTs and copy
442 // relocs. There are therefore two types of nonzero SHN_UNDEF functions:
443 // PLT entries and traditional MIPS lazy binding stubs. We mark the former
444 // with STO_MIPS_PLT to distinguish them from the latter.
447 // This value is used to mark PIC functions in an object that mixes
448 // PIC and non-PIC. Note that this bit overlaps with STO_MIPS16,
449 // although MIPS16 symbols are never considered to be MIPS_PIC.
452 // This value is used for a mips16 .text symbol.
455 // This value is used for a microMIPS .text symbol. To distinguish from
456 // STO_MIPS16, we set top two bits to be 10 to denote STO_MICROMIPS. The
457 // mask is STO_MIPS_ISA.
461 // Values for base offsets for thread-local storage
470 elf_st_is_mips16(unsigned char st_other
)
471 { return (st_other
& elfcpp::STO_MIPS16
) == elfcpp::STO_MIPS16
; }
474 elf_st_is_micromips(unsigned char st_other
)
475 { return (st_other
& elfcpp::STO_MIPS_ISA
) == elfcpp::STO_MICROMIPS
; }
477 // Whether the ABI is N32.
479 abi_n32(elfcpp::Elf_Word e_flags
)
480 { return (e_flags
& elfcpp::EF_MIPS_ABI2
) != 0; }
482 // Whether the file has microMIPS code.
484 is_micromips(elfcpp::Elf_Word e_flags
)
485 { return (e_flags
& elfcpp::EF_MIPS_ARCH_ASE_MICROMIPS
) != 0; }
487 // Values which may appear in the kind field of an Elf_Options structure.
492 // Register usage and GP value.
494 // Exception processing information.
496 // Section padding information.
498 // Hardware workarounds performed.
500 // Fill value used by the linker.
502 // Reserved space for desktop tools.
504 // Hardware workarounds, AND bits when merging.
506 // Hardware workarounds, OR bits when merging.
508 // GP group to use for text/data sections.
514 } // End namespace elfcpp.
516 #endif // !defined(ELFCPP_MIPS_H)