1 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
3 * doc/as.texinfo (Org): Remove space.
4 (P2align): Add "@var{abs-expr},".
6 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
8 * config/tc-i386.c (cpu_arch_tune_set): New.
9 (cpu_arch_isa): Likewise.
10 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
11 nops with short or long nop sequences based on -march=/.arch
13 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
14 set cpu_arch_tune and cpu_arch_tune_flags.
15 (md_parse_option): For -march=, set cpu_arch_isa and set
16 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
17 0. Set cpu_arch_tune_set to 1 for -mtune=.
18 (i386_target_format): Don't set cpu_arch_tune.
20 2006-06-23 Nigel Stephens <nigel@mips.com>
22 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
23 generated .sbss.* and .gnu.linkonce.sb.*.
25 2006-06-23 Thiemo Seufer <ths@mips.com>
26 David Ung <davidu@mips.com>
28 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
30 * config/tc-mips.c (label_list): Define per-segment label_list.
31 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
32 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
33 mips_from_file_after_relocs, mips_define_label): Use per-segment
36 2006-06-22 Thiemo Seufer <ths@mips.com>
38 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
39 (append_insn): Use it.
40 (md_apply_fix): Whitespace formatting.
41 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
42 mips16_extended_frag): Remove register specifier.
43 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
46 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
48 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
49 a directive saving VFP registers for ARMv6 or later.
50 (s_arm_unwind_save): Add parameter arch_v6 and call
51 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
53 (md_pseudo_table): Add entry for new "vsave" directive.
54 * doc/c-arm.texi: Correct error in example for "save"
55 directive (fstmdf -> fstmdx). Also document "vsave" directive.
57 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
58 Anatoly Sokolov <aesok@post.ru>
60 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
61 and atmega644p devices. Rename atmega164/atmega324 devices to
62 atmega164p/atmega324p.
63 * doc/c-avr.texi: Document new mcu and arch options.
65 2006-06-17 Nick Clifton <nickc@redhat.com>
67 * config/tc-arm.c (enum parse_operand_result): Move outside of
68 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
70 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
72 * config/tc-i386.h (processor_type): New.
73 (arch_entry): Add type.
75 * config/tc-i386.c (cpu_arch_tune): New.
76 (cpu_arch_tune_flags): Likewise.
77 (cpu_arch_isa_flags): Likewise.
79 (set_cpu_arch): Also update cpu_arch_isa_flags.
80 (md_assemble): Update cpu_arch_isa_flags.
82 (OPTION_MTUNE): Likewise.
83 (md_longopts): Add -march= and -mtune=.
84 (md_parse_option): Support -march= and -mtune=.
85 (md_show_usage): Add -march=CPU/-mtune=CPU.
86 (i386_target_format): Also update cpu_arch_isa_flags,
87 cpu_arch_tune and cpu_arch_tune_flags.
89 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
91 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
93 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
95 * config/tc-arm.c (enum parse_operand_result): New.
96 (struct group_reloc_table_entry): New.
97 (enum group_reloc_type): New.
98 (group_reloc_table): New array.
99 (find_group_reloc_table_entry): New function.
100 (parse_shifter_operand_group_reloc): New function.
101 (parse_address_main): New function, incorporating code
102 from the old parse_address function. To be used via...
103 (parse_address): wrapper for parse_address_main; and
104 (parse_address_group_reloc): new function, likewise.
105 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
106 OP_ADDRGLDRS, OP_ADDRGLDC.
107 (parse_operands): Support for these new operand codes.
108 New macro po_misc_or_fail_no_backtrack.
109 (encode_arm_cp_address): Preserve group relocations.
110 (insns): Modify to use the above operand codes where group
111 relocations are permitted.
112 (md_apply_fix): Handle the group relocations
113 ALU_PC_G0_NC through LDC_SB_G2.
114 (tc_gen_reloc): Likewise.
115 (arm_force_relocation): Leave group relocations for the linker.
116 (arm_fix_adjustable): Likewise.
118 2006-06-15 Julian Brown <julian@codesourcery.com>
120 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
121 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
124 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
126 * config/tc-i386.c (process_suffix): Don't add rex64 for
129 2006-06-09 Thiemo Seufer <ths@mips.com>
131 * config/tc-mips.c (mips_ip): Maintain argument count.
133 2006-06-09 Alan Modra <amodra@bigpond.net.au>
135 * config/tc-iq2000.c: Include sb.h.
137 2006-06-08 Nigel Stephens <nigel@mips.com>
139 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
140 aliases for better compatibility with SGI tools.
142 2006-06-08 Alan Modra <amodra@bigpond.net.au>
144 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
145 * Makefile.am (GASLIBS): Expand @BFDLIB@.
147 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
148 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
149 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
151 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
152 * Makefile.in: Regenerate.
153 * doc/Makefile.in: Regenerate.
154 * configure: Regenerate.
156 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
158 * po/Make-in (pdf, ps): New dummy targets.
160 2006-06-07 Julian Brown <julian@codesourcery.com>
162 * config/tc-arm.c (stdarg.h): include.
163 (arm_it): Add uncond_value field. Add isvec and issingle to operand
165 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
166 REG_TYPE_NSDQ (single, double or quad vector reg).
167 (reg_expected_msgs): Update.
168 (BAD_FPU): Add macro for unsupported FPU instruction error.
169 (parse_neon_type): Support 'd' as an alias for .f64.
170 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
172 (parse_vfp_reg_list): Don't update first arg on error.
173 (parse_neon_mov): Support extra syntax for VFP moves.
174 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
175 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
176 (parse_operands): Support isvec, issingle operands fields, new parse
178 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
180 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
181 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
182 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
183 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
185 (neon_shape): Redefine in terms of above.
186 (neon_shape_class): New enumeration, table of shape classes.
187 (neon_shape_el): New enumeration. One element of a shape.
188 (neon_shape_el_size): Register widths of above, where appropriate.
189 (neon_shape_info): New struct. Info for shape table.
190 (neon_shape_tab): New array.
191 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
192 (neon_check_shape): Rewrite as...
193 (neon_select_shape): New function to classify instruction shapes,
194 driven by new table neon_shape_tab array.
195 (neon_quad): New function. Return 1 if shape should set Q flag in
196 instructions (or equivalent), 0 otherwise.
197 (type_chk_of_el_type): Support F64.
198 (el_type_of_type_chk): Likewise.
199 (neon_check_type): Add support for VFP type checking (VFP data
200 elements fill their containing registers).
201 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
202 in thumb mode for VFP instructions.
203 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
204 and encode the current instruction as if it were that opcode.
205 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
206 arguments, call function in PFN.
207 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
208 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
209 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
210 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
211 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
212 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
213 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
214 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
215 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
216 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
217 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
218 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
219 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
220 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
221 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
223 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
224 between VFP and Neon turns out to belong to Neon. Perform
225 architecture check and fill in condition field if appropriate.
226 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
227 (do_neon_cvt): Add support for VFP variants of instructions.
228 (neon_cvt_flavour): Extend to cover VFP conversions.
229 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
231 (do_neon_ldr_str): Handle single-precision VFP load/store.
232 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
233 NS_NULL not NS_IGNORE.
234 (opcode_tag): Add OT_csuffixF for operands which either take a
235 conditional suffix, or have 0xF in the condition field.
236 (md_assemble): Add support for OT_csuffixF.
237 (NCE): Replace macro with...
238 (NCE_tag, NCE, NCEF): New macros.
239 (nCE): Replace macro with...
240 (nCE_tag, nCE, nCEF): New macros.
241 (insns): Add support for VFP insns or VFP versions of insns msr,
242 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
243 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
244 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
245 VFP/Neon insns together.
247 2006-06-07 Alan Modra <amodra@bigpond.net.au>
248 Ladislav Michl <ladis@linux-mips.org>
250 * app.c: Don't include headers already included by as.h.
252 * atof-generic.c: Likewise.
254 * dwarf2dbg.c: Likewise.
256 * input-file.c: Likewise.
257 * input-scrub.c: Likewise.
259 * output-file.c: Likewise.
262 * config/bfin-lex.l: Likewise.
263 * config/obj-coff.h: Likewise.
264 * config/obj-elf.h: Likewise.
265 * config/obj-som.h: Likewise.
266 * config/tc-arc.c: Likewise.
267 * config/tc-arm.c: Likewise.
268 * config/tc-avr.c: Likewise.
269 * config/tc-bfin.c: Likewise.
270 * config/tc-cris.c: Likewise.
271 * config/tc-d10v.c: Likewise.
272 * config/tc-d30v.c: Likewise.
273 * config/tc-dlx.h: Likewise.
274 * config/tc-fr30.c: Likewise.
275 * config/tc-frv.c: Likewise.
276 * config/tc-h8300.c: Likewise.
277 * config/tc-hppa.c: Likewise.
278 * config/tc-i370.c: Likewise.
279 * config/tc-i860.c: Likewise.
280 * config/tc-i960.c: Likewise.
281 * config/tc-ip2k.c: Likewise.
282 * config/tc-iq2000.c: Likewise.
283 * config/tc-m32c.c: Likewise.
284 * config/tc-m32r.c: Likewise.
285 * config/tc-maxq.c: Likewise.
286 * config/tc-mcore.c: Likewise.
287 * config/tc-mips.c: Likewise.
288 * config/tc-mmix.c: Likewise.
289 * config/tc-mn10200.c: Likewise.
290 * config/tc-mn10300.c: Likewise.
291 * config/tc-msp430.c: Likewise.
292 * config/tc-mt.c: Likewise.
293 * config/tc-ns32k.c: Likewise.
294 * config/tc-openrisc.c: Likewise.
295 * config/tc-ppc.c: Likewise.
296 * config/tc-s390.c: Likewise.
297 * config/tc-sh.c: Likewise.
298 * config/tc-sh64.c: Likewise.
299 * config/tc-sparc.c: Likewise.
300 * config/tc-tic30.c: Likewise.
301 * config/tc-tic4x.c: Likewise.
302 * config/tc-tic54x.c: Likewise.
303 * config/tc-v850.c: Likewise.
304 * config/tc-vax.c: Likewise.
305 * config/tc-xc16x.c: Likewise.
306 * config/tc-xstormy16.c: Likewise.
307 * config/tc-xtensa.c: Likewise.
308 * config/tc-z80.c: Likewise.
309 * config/tc-z8k.c: Likewise.
310 * macro.h: Don't include sb.h or ansidecl.h.
311 * sb.h: Don't include stdio.h or ansidecl.h.
312 * cond.c: Include sb.h.
313 * itbl-lex.l: Include as.h instead of other system headers.
314 * itbl-parse.y: Likewise.
315 * itbl-ops.c: Similarly.
316 * itbl-ops.h: Don't include as.h or ansidecl.h.
317 * config/bfin-defs.h: Don't include bfd.h or as.h.
318 * config/bfin-parse.y: Include as.h instead of other system headers.
320 2006-06-06 Ben Elliston <bje@au.ibm.com>
321 Anton Blanchard <anton@samba.org>
323 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
324 (md_show_usage): Document it.
325 (ppc_setup_opcodes): Test power6 opcode flag bits.
326 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
328 2006-06-06 Thiemo Seufer <ths@mips.com>
329 Chao-ying Fu <fu@mips.com>
331 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
332 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
333 (macro_build): Update comment.
334 (mips_ip): Allow DSP64 instructions for MIPS64R2.
335 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
337 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
338 MIPS_CPU_ASE_MDMX flags for sb1.
340 2006-06-05 Thiemo Seufer <ths@mips.com>
342 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
344 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
345 (mips_ip): Make overflowed/underflowed constant arguments in DSP
346 and MT instructions a fatal error. Use INSERT_OPERAND where
347 appropriate. Improve warnings for break and wait code overflows.
348 Use symbolic constant of OP_MASK_COPZ.
349 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
351 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
353 * po/Make-in (top_builddir): Define.
355 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
357 * doc/Makefile.am (TEXI2DVI): Define.
358 * doc/Makefile.in: Regenerate.
359 * doc/c-arc.texi: Fix typo.
361 2006-06-01 Alan Modra <amodra@bigpond.net.au>
363 * config/obj-ieee.c: Delete.
364 * config/obj-ieee.h: Delete.
365 * Makefile.am (OBJ_FORMATS): Remove ieee.
366 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
367 (obj-ieee.o): Remove rule.
368 * Makefile.in: Regenerate.
369 * configure.in (atof): Remove tahoe.
370 (OBJ_MAYBE_IEEE): Don't define.
371 * configure: Regenerate.
372 * config.in: Regenerate.
373 * doc/Makefile.in: Regenerate.
374 * po/POTFILES.in: Regenerate.
376 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
378 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
379 and LIBINTL_DEP everywhere.
381 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
382 * acinclude.m4: Include new gettext macros.
383 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
384 Remove local code for po/Makefile.
385 * Makefile.in, configure, doc/Makefile.in: Regenerated.
387 2006-05-30 Nick Clifton <nickc@redhat.com>
389 * po/es.po: Updated Spanish translation.
391 2006-05-06 Denis Chertykov <denisc@overta.ru>
393 * doc/c-avr.texi: New file.
394 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
395 * doc/all.texi: Set AVR
396 * doc/as.texinfo: Include c-avr.texi
398 2006-05-28 Jie Zhang <jie.zhang@analog.com>
400 * config/bfin-parse.y (check_macfunc): Loose the condition of
401 calling check_multiply_halfregs ().
403 2006-05-25 Jie Zhang <jie.zhang@analog.com>
405 * config/bfin-parse.y (asm_1): Better check and deal with
406 vector and scalar Multiply 16-Bit Operands instructions.
408 2006-05-24 Nick Clifton <nickc@redhat.com>
410 * config/tc-hppa.c: Convert to ISO C90 format.
411 * config/tc-hppa.h: Likewise.
413 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
414 Randolph Chung <randolph@tausq.org>
416 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
417 is_tls_ieoff, is_tls_leoff): Define.
418 (fix_new_hppa): Handle TLS.
419 (cons_fix_new_hppa): Likewise.
421 (md_apply_fix): Handle TLS relocs.
422 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
424 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
426 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
428 2006-05-23 Thiemo Seufer <ths@mips.com>
429 David Ung <davidu@mips.com>
430 Nigel Stephens <nigel@mips.com>
433 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
434 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
435 ISA_HAS_MXHC1): New macros.
436 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
437 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
438 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
439 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
440 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
441 (mips_after_parse_args): Change default handling of float register
442 size to account for 32bit code with 64bit FP. Better sanity checking
443 of ISA/ASE/ABI option combinations.
444 (s_mipsset): Support switching of GPR and FPR sizes via
445 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
447 (mips_elf_final_processing): We should record the use of 64bit FP
448 registers in 32bit code but we don't, because ELF header flags are
450 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
451 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
452 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
453 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
454 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
455 missing -march options. Document .set arch=CPU. Move .set smartmips
456 to ASE page. Use @code for .set FOO examples.
458 2006-05-23 Jie Zhang <jie.zhang@analog.com>
460 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
463 2006-05-23 Jie Zhang <jie.zhang@analog.com>
465 * config/bfin-defs.h (bfin_equals): Remove declaration.
466 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
467 * config/tc-bfin.c (bfin_name_is_register): Remove.
468 (bfin_equals): Remove.
469 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
470 (bfin_name_is_register): Remove declaration.
472 2006-05-19 Thiemo Seufer <ths@mips.com>
473 Nigel Stephens <nigel@mips.com>
475 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
476 (mips_oddfpreg_ok): New function.
479 2006-05-19 Thiemo Seufer <ths@mips.com>
480 David Ung <davidu@mips.com>
482 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
483 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
484 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
485 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
486 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
487 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
488 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
489 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
490 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
491 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
492 reg_names_o32, reg_names_n32n64): Define register classes.
493 (reg_lookup): New function, use register classes.
494 (md_begin): Reserve register names in the symbol table. Simplify
496 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
498 (mips16_ip): Use reg_lookup.
499 (tc_get_register): Likewise.
500 (tc_mips_regname_to_dw2regnum): New function.
502 2006-05-19 Thiemo Seufer <ths@mips.com>
504 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
505 Un-constify string argument.
506 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
508 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
510 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
512 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
514 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
516 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
519 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
521 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
522 cfloat/m68881 to correct architecture before using it.
524 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
526 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
529 2006-05-15 Paul Brook <paul@codesourcery.com>
531 * config/tc-arm.c (arm_adjust_symtab): Use
532 bfd_is_arm_special_symbol_name.
534 2006-05-15 Bob Wilson <bob.wilson@acm.org>
536 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
537 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
538 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
539 Handle errors from calls to xtensa_opcode_is_* functions.
541 2006-05-14 Thiemo Seufer <ths@mips.com>
543 * config/tc-mips.c (macro_build): Test for currently active
545 (mips16_ip): Reject invalid opcodes.
547 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
549 * doc/as.texinfo: Rename "Index" to "AS Index",
550 and "ABORT" to "ABORT (COFF)".
552 2006-05-11 Paul Brook <paul@codesourcery.com>
554 * config/tc-arm.c (parse_half): New function.
555 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
556 (parse_operands): Ditto.
557 (do_mov16): Reject invalid relocations.
558 (do_t_mov16): Ditto. Use Thumb reloc numbers.
559 (insns): Replace Iffff with HALF.
560 (md_apply_fix): Add MOVW and MOVT relocs.
561 (tc_gen_reloc): Ditto.
562 * doc/c-arm.texi: Document relocation operators
564 2006-05-11 Paul Brook <paul@codesourcery.com>
566 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
568 2006-05-11 Thiemo Seufer <ths@mips.com>
570 * config/tc-mips.c (append_insn): Don't check the range of j or
573 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
575 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
576 relocs against external symbols for WinCE targets.
577 (md_apply_fix): Likewise.
579 2006-05-09 David Ung <davidu@mips.com>
581 * config/tc-mips.c (append_insn): Only warn about an out-of-range
584 2006-05-09 Nick Clifton <nickc@redhat.com>
586 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
587 against symbols which are not going to be placed into the symbol
590 2006-05-09 Ben Elliston <bje@au.ibm.com>
592 * expr.c (operand): Remove `if (0 && ..)' statement and
593 subsequently unused target_op label. Collapse `if (1 || ..)'
595 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
596 separately above the switch.
598 2006-05-08 Nick Clifton <nickc@redhat.com>
601 * config/tc-msp430.c (line_separator_character): Define as |.
603 2006-05-08 Thiemo Seufer <ths@mips.com>
604 Nigel Stephens <nigel@mips.com>
605 David Ung <davidu@mips.com>
607 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
608 (mips_opts): Likewise.
609 (file_ase_smartmips): New variable.
610 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
611 (macro_build): Handle SmartMIPS instructions.
613 (md_longopts): Add argument handling for smartmips.
614 (md_parse_options, mips_after_parse_args): Likewise.
615 (s_mipsset): Add .set smartmips support.
616 (md_show_usage): Document -msmartmips/-mno-smartmips.
617 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
619 * doc/c-mips.texi: Likewise.
621 2006-05-08 Alan Modra <amodra@bigpond.net.au>
623 * write.c (relax_segment): Add pass count arg. Don't error on
624 negative org/space on first two passes.
625 (relax_seg_info): New struct.
626 (relax_seg, write_object_file): Adjust.
627 * write.h (relax_segment): Update prototype.
629 2006-05-05 Julian Brown <julian@codesourcery.com>
631 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
633 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
634 architecture version checks.
635 (insns): Allow overlapping instructions to be used in VFP mode.
637 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
640 * config/obj-elf.c (obj_elf_change_section): Allow user
641 specified SHF_ALPHA_GPREL.
643 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
645 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
646 for PMEM related expressions.
648 2006-05-05 Nick Clifton <nickc@redhat.com>
651 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
652 insertion of a directory separator character into a string at a
653 given offset. Uses heuristics to decide when to use a backslash
654 character rather than a forward-slash character.
655 (dwarf2_directive_loc): Use the macro.
656 (out_debug_info): Likewise.
658 2006-05-05 Thiemo Seufer <ths@mips.com>
659 David Ung <davidu@mips.com>
661 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
663 (macro): Add new case M_CACHE_AB.
665 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
667 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
668 (opcode_lookup): Issue a warning for opcode with
669 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
670 identical to OT_cinfix3.
671 (TxC3w, TC3w, tC3w): New.
672 (insns): Use tC3w and TC3w for comparison instructions with
675 2006-05-04 Alan Modra <amodra@bigpond.net.au>
677 * subsegs.h (struct frchain): Delete frch_seg.
678 (frchain_root): Delete.
679 (seg_info): Define as macro.
680 * subsegs.c (frchain_root): Delete.
681 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
682 (subsegs_begin, subseg_change): Adjust for above.
683 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
684 rather than to one big list.
685 (subseg_get): Don't special case abs, und sections.
686 (subseg_new, subseg_force_new): Don't set frchainP here.
688 (subsegs_print_statistics): Adjust frag chain control list traversal.
689 * debug.c (dmp_frags): Likewise.
690 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
691 at frchain_root. Make use of known frchain ordering.
692 (last_frag_for_seg): Likewise.
693 (get_frag_fix): Likewise. Add seg param.
694 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
695 * write.c (chain_frchains_together_1): Adjust for struct frchain.
696 (SUB_SEGMENT_ALIGN): Likewise.
697 (subsegs_finish): Adjust frchain list traversal.
698 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
699 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
700 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
701 (xtensa_fix_b_j_loop_end_frags): Likewise.
702 (xtensa_fix_close_loop_end_frags): Likewise.
703 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
704 (retrieve_segment_info): Delete frch_seg initialisation.
706 2006-05-03 Alan Modra <amodra@bigpond.net.au>
708 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
709 * config/obj-elf.h (obj_sec_set_private_data): Delete.
710 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
711 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
713 2006-05-02 Joseph Myers <joseph@codesourcery.com>
715 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
717 (md_apply_fix3): Multiply offset by 4 here for
718 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
720 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
721 Jan Beulich <jbeulich@novell.com>
723 * config/tc-i386.c (output_invalid_buf): Change size for
725 * config/tc-tic30.c (output_invalid_buf): Likewise.
727 * config/tc-i386.c (output_invalid): Cast none-ascii char to
729 * config/tc-tic30.c (output_invalid): Likewise.
731 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
733 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
734 (TEXI2POD): Use AM_MAKEINFOFLAGS.
735 (asconfig.texi): Don't set top_srcdir.
736 * doc/as.texinfo: Don't use top_srcdir.
737 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
739 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
741 * config/tc-i386.c (output_invalid_buf): Change size to 16.
742 * config/tc-tic30.c (output_invalid_buf): Likewise.
744 * config/tc-i386.c (output_invalid): Use snprintf instead of
746 * config/tc-ia64.c (declare_register_set): Likewise.
747 (emit_one_bundle): Likewise.
748 (check_dependencies): Likewise.
749 * config/tc-tic30.c (output_invalid): Likewise.
751 2006-05-02 Paul Brook <paul@codesourcery.com>
753 * config/tc-arm.c (arm_optimize_expr): New function.
754 * config/tc-arm.h (md_optimize_expr): Define
755 (arm_optimize_expr): Add prototype.
756 (TC_FORCE_RELOCATION_SUB_SAME): Define.
758 2006-05-02 Ben Elliston <bje@au.ibm.com>
760 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
763 * sb.h (sb_list_vector): Move to sb.c.
764 * sb.c (free_list): Use type of sb_list_vector directly.
765 (sb_build): Fix off-by-one error in assertion about `size'.
767 2006-05-01 Ben Elliston <bje@au.ibm.com>
769 * listing.c (listing_listing): Remove useless loop.
770 * macro.c (macro_expand): Remove is_positional local variable.
771 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
772 and simplify surrounding expressions, where possible.
773 (assign_symbol): Likewise.
774 (s_weakref): Likewise.
775 * symbols.c (colon): Likewise.
777 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
779 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
781 2006-04-30 Thiemo Seufer <ths@mips.com>
782 David Ung <davidu@mips.com>
784 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
785 (mips_immed): New table that records various handling of udi
786 instruction patterns.
787 (mips_ip): Adds udi handling.
789 2006-04-28 Alan Modra <amodra@bigpond.net.au>
791 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
792 of list rather than beginning.
794 2006-04-26 Julian Brown <julian@codesourcery.com>
796 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
797 (is_quarter_float): Rename from above. Simplify slightly.
798 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
800 (parse_neon_mov): Parse floating-point constants.
801 (neon_qfloat_bits): Fix encoding.
802 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
803 preference to integer encoding when using the F32 type.
805 2006-04-26 Julian Brown <julian@codesourcery.com>
807 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
808 zero-initialising structures containing it will lead to invalid types).
809 (arm_it): Add vectype to each operand.
810 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
812 (neon_typed_alias): New structure. Extra information for typed
814 (reg_entry): Add neon type info field.
815 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
816 Break out alternative syntax for coprocessor registers, etc. into...
817 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
818 out from arm_reg_parse.
819 (parse_neon_type): Move. Return SUCCESS/FAIL.
820 (first_error): New function. Call to ensure first error which occurs is
822 (parse_neon_operand_type): Parse exactly one type.
823 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
824 (parse_typed_reg_or_scalar): New function. Handle core of both
825 arm_typed_reg_parse and parse_scalar.
826 (arm_typed_reg_parse): Parse a register with an optional type.
827 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
829 (parse_scalar): Parse a Neon scalar with optional type.
830 (parse_reg_list): Use first_error.
831 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
832 (neon_alias_types_same): New function. Return true if two (alias) types
834 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
836 (insert_reg_alias): Return new reg_entry not void.
837 (insert_neon_reg_alias): New function. Insert type/index information as
838 well as register for alias.
839 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
840 make typed register aliases accordingly.
841 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
843 (s_unreq): Delete type information if present.
844 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
845 (s_arm_unwind_save_mmxwcg): Likewise.
846 (s_arm_unwind_movsp): Likewise.
847 (s_arm_unwind_setfp): Likewise.
848 (parse_shift): Likewise.
849 (parse_shifter_operand): Likewise.
850 (parse_address): Likewise.
851 (parse_tb): Likewise.
852 (tc_arm_regname_to_dw2regnum): Likewise.
853 (md_pseudo_table): Add dn, qn.
854 (parse_neon_mov): Handle typed operands.
855 (parse_operands): Likewise.
856 (neon_type_mask): Add N_SIZ.
857 (N_ALLMODS): New macro.
858 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
859 (el_type_of_type_chk): Add some safeguards.
860 (modify_types_allowed): Fix logic bug.
861 (neon_check_type): Handle operands with types.
862 (neon_three_same): Remove redundant optional arg handling.
863 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
864 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
865 (do_neon_step): Adjust accordingly.
866 (neon_cmode_for_logic_imm): Use first_error.
867 (do_neon_bitfield): Call neon_check_type.
868 (neon_dyadic): Rename to...
869 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
870 to allow modification of type of the destination.
871 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
872 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
873 (do_neon_compare): Make destination be an untyped bitfield.
874 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
875 (neon_mul_mac): Return early in case of errors.
876 (neon_move_immediate): Use first_error.
877 (neon_mac_reg_scalar_long): Fix type to include scalar.
878 (do_neon_dup): Likewise.
879 (do_neon_mov): Likewise (in several places).
880 (do_neon_tbl_tbx): Fix type.
881 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
882 (do_neon_ld_dup): Exit early in case of errors and/or use
884 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
885 Handle .dn/.qn directives.
886 (REGDEF): Add zero for reg_entry neon field.
888 2006-04-26 Julian Brown <julian@codesourcery.com>
890 * config/tc-arm.c (limits.h): Include.
891 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
892 (fpu_vfp_v3_or_neon_ext): Declare constants.
893 (neon_el_type): New enumeration of types for Neon vector elements.
894 (neon_type_el): New struct. Define type and size of a vector element.
895 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
897 (neon_type): Define struct. The type of an instruction.
898 (arm_it): Add 'vectype' for the current instruction.
899 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
900 (vfp_sp_reg_pos): Rename to...
901 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
903 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
904 (Neon D or Q register).
905 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
907 (GE_OPT_PREFIX_BIG): Define constant, for use in...
908 (my_get_expression): Allow above constant as argument to accept
909 64-bit constants with optional prefix.
910 (arm_reg_parse): Add extra argument to return the specific type of
911 register in when either a D or Q register (REG_TYPE_NDQ) is
912 requested. Can be NULL.
913 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
914 (parse_reg_list): Update for new arm_reg_parse args.
915 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
916 (parse_neon_el_struct_list): New function. Parse element/structure
917 register lists for VLD<n>/VST<n> instructions.
918 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
919 (s_arm_unwind_save_mmxwr): Likewise.
920 (s_arm_unwind_save_mmxwcg): Likewise.
921 (s_arm_unwind_movsp): Likewise.
922 (s_arm_unwind_setfp): Likewise.
923 (parse_big_immediate): New function. Parse an immediate, which may be
924 64 bits wide. Put results in inst.operands[i].
925 (parse_shift): Update for new arm_reg_parse args.
926 (parse_address): Likewise. Add parsing of alignment specifiers.
927 (parse_neon_mov): Parse the operands of a VMOV instruction.
928 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
929 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
930 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
931 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
932 (parse_operands): Handle new codes above.
933 (encode_arm_vfp_sp_reg): Rename to...
934 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
935 selected VFP version only supports D0-D15.
936 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
937 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
938 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
939 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
940 encode_arm_vfp_reg name, and allow 32 D regs.
941 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
942 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
944 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
945 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
946 constant-load and conversion insns introduced with VFPv3.
947 (neon_tab_entry): New struct.
948 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
949 those which are the targets of pseudo-instructions.
950 (neon_opc): Enumerate opcodes, use as indices into...
951 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
952 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
953 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
954 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
956 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
958 (neon_type_mask): New. Compact type representation for type checking.
959 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
960 permitted type combinations.
961 (N_IGNORE_TYPE): New macro.
962 (neon_check_shape): New function. Check an instruction shape for
963 multiple alternatives. Return the specific shape for the current
965 (neon_modify_type_size): New function. Modify a vector type and size,
966 depending on the bit mask in argument 1.
967 (neon_type_promote): New function. Convert a given "key" type (of an
968 operand) into the correct type for a different operand, based on a bit
970 (type_chk_of_el_type): New function. Convert a type and size into the
971 compact representation used for type checking.
972 (el_type_of_type_ckh): New function. Reverse of above (only when a
973 single bit is set in the bit mask).
974 (modify_types_allowed): New function. Alter a mask of allowed types
975 based on a bit mask of modifications.
976 (neon_check_type): New function. Check the type of the current
977 instruction against the variable argument list. The "key" type of the
978 instruction is returned.
979 (neon_dp_fixup): New function. Fill in and modify instruction bits for
980 a Neon data-processing instruction depending on whether we're in ARM
981 mode or Thumb-2 mode.
982 (neon_logbits): New function.
983 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
984 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
985 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
986 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
987 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
988 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
989 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
990 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
991 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
992 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
993 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
994 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
995 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
996 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
997 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
998 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
999 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1000 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1001 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1002 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1003 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1004 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1005 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1006 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1007 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1009 (parse_neon_type): New function. Parse Neon type specifier.
1010 (opcode_lookup): Allow parsing of Neon type specifiers.
1011 (REGNUM2, REGSETH, REGSET2): New macros.
1012 (reg_names): Add new VFPv3 and Neon registers.
1013 (NUF, nUF, NCE, nCE): New macros for opcode table.
1014 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1015 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1016 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1017 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1018 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1019 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1020 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1021 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1022 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1023 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1024 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1025 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1026 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1027 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1029 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1030 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1031 (arm_option_cpu_value): Add vfp3 and neon.
1032 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1035 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1037 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1038 syntax instead of hardcoded opcodes with ".w18" suffixes.
1039 (wide_branch_opcode): New.
1040 (build_transition): Use it to check for wide branch opcodes with
1041 either ".w18" or ".w15" suffixes.
1043 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1045 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1046 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1047 frag's is_literal flag.
1049 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1051 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1053 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1055 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1056 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1057 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1058 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1059 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1061 2005-04-20 Paul Brook <paul@codesourcery.com>
1063 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1065 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1067 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1069 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1070 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1071 Make some cpus unsupported on ELF. Run "make dep-am".
1072 * Makefile.in: Regenerate.
1074 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1076 * configure.in (--enable-targets): Indent help message.
1077 * configure: Regenerate.
1079 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1082 * config/tc-i386.c (i386_immediate): Check illegal immediate
1085 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1087 * config/tc-i386.c: Formatting.
1088 (output_disp, output_imm): ISO C90 params.
1090 * frags.c (frag_offset_fixed_p): Constify args.
1091 * frags.h (frag_offset_fixed_p): Ditto.
1093 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1094 (COFF_MAGIC): Delete.
1096 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1098 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1100 * po/POTFILES.in: Regenerated.
1102 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1104 * doc/as.texinfo: Mention that some .type syntaxes are not
1105 supported on all architectures.
1107 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1109 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1110 instructions when such transformations have been disabled.
1112 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1114 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1115 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1116 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1117 decoding the loop instructions. Remove current_offset variable.
1118 (xtensa_fix_short_loop_frags): Likewise.
1119 (min_bytes_to_other_loop_end): Remove current_offset argument.
1121 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1123 * config/tc-z80.c (z80_optimize_expr): Removed.
1124 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1126 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1128 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1129 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1130 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1131 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1132 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1133 at90can64, at90usb646, at90usb647, at90usb1286 and
1135 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1137 2006-04-07 Paul Brook <paul@codesourcery.com>
1139 * config/tc-arm.c (parse_operands): Set default error message.
1141 2006-04-07 Paul Brook <paul@codesourcery.com>
1143 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1145 2006-04-07 Paul Brook <paul@codesourcery.com>
1147 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1149 2006-04-07 Paul Brook <paul@codesourcery.com>
1151 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1152 (move_or_literal_pool): Handle Thumb-2 instructions.
1153 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1155 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1158 * config/tc-i386.c (match_template): Move 64-bit operand tests
1161 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1163 * po/Make-in: Add install-html target.
1164 * Makefile.am: Add install-html and install-html-recursive targets.
1165 * Makefile.in: Regenerate.
1166 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1167 * configure: Regenerate.
1168 * doc/Makefile.am: Add install-html and install-html-am targets.
1169 * doc/Makefile.in: Regenerate.
1171 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1173 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1176 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1177 Daniel Jacobowitz <dan@codesourcery.com>
1179 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1180 (GOTT_BASE, GOTT_INDEX): New.
1181 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1182 GOTT_INDEX when generating VxWorks PIC.
1183 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1184 use the generic *-*-vxworks* stanza instead.
1186 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1189 * frags.c (frag_offset_fixed_p): New function.
1190 * frags.h (frag_offset_fixed_p): Declare.
1191 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1192 (resolve_expression): Likewise.
1194 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1196 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1197 of the same length but different numbers of slots.
1199 2006-03-30 Andreas Schwab <schwab@suse.de>
1201 * configure.in: Fix help string for --enable-targets option.
1202 * configure: Regenerate.
1204 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1206 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1207 (m68k_ip): ... here. Use for all chips. Protect against buffer
1208 overrun and avoid excessive copying.
1210 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1211 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1212 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1213 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1214 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1215 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1216 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1217 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1218 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1219 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1220 (struct m68k_cpu): Change chip field to control_regs.
1221 (current_chip): Remove.
1222 (control_regs): New.
1223 (m68k_archs, m68k_extensions): Adjust.
1224 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1225 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1226 (find_cf_chip): Reimplement for new organization of cpu table.
1227 (select_control_regs): Remove.
1229 (struct save_opts): Save control regs, not chip.
1230 (s_save, s_restore): Adjust.
1231 (m68k_lookup_cpu): Give deprecated warning when necessary.
1232 (m68k_init_arch): Adjust.
1233 (md_show_usage): Adjust for new cpu table organization.
1235 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1237 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1238 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1239 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1241 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1242 (any_gotrel): New rule.
1243 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1244 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1246 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1247 (bfin_pic_ptr): New function.
1248 (md_pseudo_table): Add it for ".picptr".
1249 (OPTION_FDPIC): New macro.
1250 (md_longopts): Add -mfdpic.
1251 (md_parse_option): Handle it.
1252 (md_begin): Set BFD flags.
1253 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1254 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1256 * Makefile.am (bfin-parse.o): Update dependencies.
1257 (DEPTC_bfin_elf): Likewise.
1258 * Makefile.in: Regenerate.
1260 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1262 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1263 mcfemac instead of mcfmac.
1265 2006-03-23 Michael Matz <matz@suse.de>
1267 * config/tc-i386.c (type_names): Correct placement of 'static'.
1268 (reloc): Map some more relocs to their 64 bit counterpart when
1270 (output_insn): Work around breakage if DEBUG386 is defined.
1271 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1272 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1273 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1274 different from i386.
1275 (output_imm): Ditto.
1276 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1278 (md_convert_frag): Jumps can now be larger than 2GB away, error
1280 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1281 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1283 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1284 Daniel Jacobowitz <dan@codesourcery.com>
1285 Phil Edwards <phil@codesourcery.com>
1286 Zack Weinberg <zack@codesourcery.com>
1287 Mark Mitchell <mark@codesourcery.com>
1288 Nathan Sidwell <nathan@codesourcery.com>
1290 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1291 (md_begin): Complain about -G being used for PIC. Don't change
1292 the text, data and bss alignments on VxWorks.
1293 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1294 generating VxWorks PIC.
1295 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1296 (macro): Likewise, but do not treat la $25 specially for
1297 VxWorks PIC, and do not handle jal.
1298 (OPTION_MVXWORKS_PIC): New macro.
1299 (md_longopts): Add -mvxworks-pic.
1300 (md_parse_option): Don't complain about using PIC and -G together here.
1301 Handle OPTION_MVXWORKS_PIC.
1302 (md_estimate_size_before_relax): Always use the first relaxation
1303 sequence on VxWorks.
1304 * config/tc-mips.h (VXWORKS_PIC): New.
1306 2006-03-21 Paul Brook <paul@codesourcery.com>
1308 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1310 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1312 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1313 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1314 (get_loop_align_size): New.
1315 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1316 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1317 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1318 (get_noop_aligned_address): Use get_loop_align_size.
1319 (get_aligned_diff): Likewise.
1321 2006-03-21 Paul Brook <paul@codesourcery.com>
1323 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1325 2006-03-20 Paul Brook <paul@codesourcery.com>
1327 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1328 (do_t_branch): Encode branches inside IT blocks as unconditional.
1329 (do_t_cps): New function.
1330 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1331 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1332 (opcode_lookup): Allow conditional suffixes on all instructions in
1334 (md_assemble): Advance condexec state before checking for errors.
1335 (insns): Use do_t_cps.
1337 2006-03-20 Paul Brook <paul@codesourcery.com>
1339 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1340 outputting the insn.
1342 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1344 * config/tc-vax.c: Update copyright year.
1345 * config/tc-vax.h: Likewise.
1347 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1349 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1351 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1353 2006-03-17 Paul Brook <paul@codesourcery.com>
1355 * config/tc-arm.c (insns): Add ldm and stm.
1357 2006-03-17 Ben Elliston <bje@au.ibm.com>
1360 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1362 2006-03-16 Paul Brook <paul@codesourcery.com>
1364 * config/tc-arm.c (insns): Add "svc".
1366 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1368 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1369 flag and avoid double underscore prefixes.
1371 2006-03-10 Paul Brook <paul@codesourcery.com>
1373 * config/tc-arm.c (md_begin): Handle EABIv5.
1374 (arm_eabis): Add EF_ARM_EABI_VER5.
1375 * doc/c-arm.texi: Document -meabi=5.
1377 2006-03-10 Ben Elliston <bje@au.ibm.com>
1379 * app.c (do_scrub_chars): Simplify string handling.
1381 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1382 Daniel Jacobowitz <dan@codesourcery.com>
1383 Zack Weinberg <zack@codesourcery.com>
1384 Nathan Sidwell <nathan@codesourcery.com>
1385 Paul Brook <paul@codesourcery.com>
1386 Ricardo Anguiano <anguiano@codesourcery.com>
1387 Phil Edwards <phil@codesourcery.com>
1389 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1390 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1392 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1393 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1394 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1396 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1398 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1399 even when using the text-section-literals option.
1401 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1403 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1405 (m68k_ip): <case 'J'> Check we have some control regs.
1406 (md_parse_option): Allow raw arch switch.
1407 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1408 whether 68881 or cfloat was meant by -mfloat.
1409 (md_show_usage): Adjust extension display.
1410 (m68k_elf_final_processing): Adjust.
1412 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1414 * config/tc-avr.c (avr_mod_hash_value): New function.
1415 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1416 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1417 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1418 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1420 (tc_gen_reloc): Handle substractions of symbols, if possible do
1421 fixups, abort otherwise.
1422 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1423 tc_fix_adjustable): Define.
1425 2006-03-02 James E Wilson <wilson@specifix.com>
1427 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1428 change the template, then clear md.slot[curr].end_of_insn_group.
1430 2006-02-28 Jan Beulich <jbeulich@novell.com>
1432 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1434 2006-02-28 Jan Beulich <jbeulich@novell.com>
1437 * macro.c (getstring): Don't treat parentheses special anymore.
1438 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1439 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1442 2006-02-28 Mat <mat@csail.mit.edu>
1444 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1446 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1448 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1450 (CFI_signal_frame): Define.
1451 (cfi_pseudo_table): Add .cfi_signal_frame.
1452 (dot_cfi): Handle CFI_signal_frame.
1453 (output_cie): Handle cie->signal_frame.
1454 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1455 different. Copy signal_frame from FDE to newly created CIE.
1456 * doc/as.texinfo: Document .cfi_signal_frame.
1458 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1460 * doc/Makefile.am: Add html target.
1461 * doc/Makefile.in: Regenerate.
1462 * po/Make-in: Add html target.
1464 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1466 * config/tc-i386.c (output_insn): Support Intel Merom New
1469 * config/tc-i386.h (CpuMNI): New.
1470 (CpuUnknownFlags): Add CpuMNI.
1472 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1474 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1475 (hpriv_reg_table): New table for hyperprivileged registers.
1476 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1479 2006-02-24 DJ Delorie <dj@redhat.com>
1481 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1482 (tc_gen_reloc): Don't define.
1483 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1484 (OPTION_LINKRELAX): New.
1485 (md_longopts): Add it.
1487 (md_parse_options): Set it.
1488 (md_assemble): Emit relaxation relocs as needed.
1489 (md_convert_frag): Emit relaxation relocs as needed.
1490 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1491 (m32c_apply_fix): New.
1492 (tc_gen_reloc): New.
1493 (m32c_force_relocation): Force out jump relocs when relaxing.
1494 (m32c_fix_adjustable): Return false if relaxing.
1496 2006-02-24 Paul Brook <paul@codesourcery.com>
1498 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1499 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1500 (struct asm_barrier_opt): Define.
1501 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1502 (parse_psr): Accept V7M psr names.
1503 (parse_barrier): New function.
1504 (enum operand_parse_code): Add OP_oBARRIER.
1505 (parse_operands): Implement OP_oBARRIER.
1506 (do_barrier): New function.
1507 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1508 (do_t_cpsi): Add V7M restrictions.
1509 (do_t_mrs, do_t_msr): Validate V7M variants.
1510 (md_assemble): Check for NULL variants.
1511 (v7m_psrs, barrier_opt_names): New tables.
1512 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1513 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1514 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1515 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1516 (struct cpu_arch_ver_table): Define.
1517 (cpu_arch_ver): New.
1518 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1519 Tag_CPU_arch_profile.
1520 * doc/c-arm.texi: Document new cpu and arch options.
1522 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1524 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1526 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1528 * config/tc-ia64.c: Update copyright years.
1530 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1532 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1535 2005-02-22 Paul Brook <paul@codesourcery.com>
1537 * config/tc-arm.c (do_pld): Remove incorrect write to
1539 (encode_thumb32_addr_mode): Use correct operand.
1541 2006-02-21 Paul Brook <paul@codesourcery.com>
1543 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1545 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1546 Anil Paranjape <anilp1@kpitcummins.com>
1547 Shilin Shakti <shilins@kpitcummins.com>
1549 * Makefile.am: Add xc16x related entry.
1550 * Makefile.in: Regenerate.
1551 * configure.in: Added xc16x related entry.
1552 * configure: Regenerate.
1553 * config/tc-xc16x.h: New file
1554 * config/tc-xc16x.c: New file
1555 * doc/c-xc16x.texi: New file for xc16x
1556 * doc/all.texi: Entry for xc16x
1557 * doc/Makefile.texi: Added c-xc16x.texi
1558 * NEWS: Announce the support for the new target.
1560 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1562 * configure.tgt: set emulation for mips-*-netbsd*
1564 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1566 * config.in: Rebuilt.
1568 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1570 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1571 from 1, not 0, in error messages.
1572 (md_assemble): Simplify special-case check for ENTRY instructions.
1573 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1574 operand in error message.
1576 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1578 * configure.tgt (arm-*-linux-gnueabi*): Change to
1581 2006-02-10 Nick Clifton <nickc@redhat.com>
1583 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1584 32-bit value is propagated into the upper bits of a 64-bit long.
1586 * config/tc-arc.c (init_opcode_tables): Fix cast.
1587 (arc_extoper, md_operand): Likewise.
1589 2006-02-09 David Heine <dlheine@tensilica.com>
1591 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1592 each relaxation step.
1594 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1596 * configure.in (CHECK_DECLS): Add vsnprintf.
1597 * configure: Regenerate.
1598 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1599 include/declare here, but...
1600 * as.h: Move code detecting VARARGS idiom to the top.
1601 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1602 (vsnprintf): Declare if not already declared.
1604 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1606 * as.c (close_output_file): New.
1607 (main): Register close_output_file with xatexit before
1608 dump_statistics. Don't call output_file_close.
1610 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1612 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1613 mcf5329_control_regs): New.
1614 (not_current_architecture, selected_arch, selected_cpu): New.
1615 (m68k_archs, m68k_extensions): New.
1616 (archs): Renamed to ...
1617 (m68k_cpus): ... here. Adjust.
1619 (md_pseudo_table): Add arch and cpu directives.
1620 (find_cf_chip, m68k_ip): Adjust table scanning.
1621 (no_68851, no_68881): Remove.
1622 (md_assemble): Lazily initialize.
1623 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1624 (md_init_after_args): Move functionality to m68k_init_arch.
1625 (mri_chip): Adjust table scanning.
1626 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1627 options with saner parsing.
1628 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1629 m68k_init_arch): New.
1630 (s_m68k_cpu, s_m68k_arch): New.
1631 (md_show_usage): Adjust.
1632 (m68k_elf_final_processing): Set CF EF flags.
1633 * config/tc-m68k.h (m68k_init_after_args): Remove.
1634 (tc_init_after_args): Remove.
1635 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1636 (M68k-Directives): Document .arch and .cpu directives.
1638 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1640 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1641 synonyms for equ and defl.
1642 (z80_cons_fix_new): New function.
1643 (emit_byte): Disallow relative jumps to absolute locations.
1644 (emit_data): Only handle defb, prototype changed, because defb is
1645 now handled as pseudo-op rather than an instruction.
1646 (instab): Entries for defb,defw,db,dw moved from here...
1647 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1648 Add entries for def24,def32,d24,d32.
1649 (md_assemble): Improved error handling.
1650 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1651 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1652 (z80_cons_fix_new): Declare.
1653 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1654 (def24,d24,def32,d32): New pseudo-ops.
1656 2006-02-02 Paul Brook <paul@codesourcery.com>
1658 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1660 2005-02-02 Paul Brook <paul@codesourcery.com>
1662 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1663 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1664 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1665 T2_OPCODE_RSB): Define.
1666 (thumb32_negate_data_op): New function.
1667 (md_apply_fix): Use it.
1669 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1671 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1673 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1674 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1676 (relaxation_requirements): Add pfinish_frag argument and use it to
1677 replace setting tinsn->record_fix fields.
1678 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1679 and vinsn_to_insnbuf. Remove references to record_fix and
1680 slot_sub_symbols fields.
1681 (xtensa_mark_narrow_branches): Delete unused code.
1682 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1684 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1686 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1687 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1688 of the record_fix field. Simplify error messages for unexpected
1690 (set_expr_symbol_offset_diff): Delete.
1692 2006-01-31 Paul Brook <paul@codesourcery.com>
1694 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1696 2006-01-31 Paul Brook <paul@codesourcery.com>
1697 Richard Earnshaw <rearnsha@arm.com>
1699 * config/tc-arm.c: Use arm_feature_set.
1700 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1701 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1702 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1705 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1706 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1707 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1708 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1710 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1711 (arm_opts): Move old cpu/arch options from here...
1712 (arm_legacy_opts): ... to here.
1713 (md_parse_option): Search arm_legacy_opts.
1714 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1715 (arm_float_abis, arm_eabis): Make const.
1717 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1719 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1721 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1723 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1724 in load immediate intruction.
1726 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1728 * config/bfin-parse.y (value_match): Use correct conversion
1729 specifications in template string for __FILE__ and __LINE__.
1733 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1735 Introduce TLS descriptors for i386 and x86_64.
1736 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1737 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1738 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1739 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1740 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1742 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1743 (lex_got): Handle @tlsdesc and @tlscall.
1744 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1746 2006-01-11 Nick Clifton <nickc@redhat.com>
1748 Fixes for building on 64-bit hosts:
1749 * config/tc-avr.c (mod_index): New union to allow conversion
1750 between pointers and integers.
1751 (md_begin, avr_ldi_expression): Use it.
1752 * config/tc-i370.c (md_assemble): Add cast for argument to print
1754 * config/tc-tic54x.c (subsym_substitute): Likewise.
1755 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1756 opindex field of fr_cgen structure into a pointer so that it can
1757 be stored in a frag.
1758 * config/tc-mn10300.c (md_assemble): Likewise.
1759 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1761 * config/tc-v850.c: Replace uses of (int) casts with correct
1764 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1767 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1769 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1772 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1773 a local-label reference.
1775 For older changes see ChangeLog-2005
1781 version-control: never