gas: Extend .symver directive
[deliverable/binutils-gdb.git] / gas / ChangeLog
1 2020-04-21 H.J. Lu <hongjiu.lu@intel.com>
2
3 PR gas/23840
4 PR gas/25295
5 * NEWS: Mention .symver extension.
6 * config/obj-elf.c (obj_elf_find_and_add_versioned_name): New
7 function.
8 (obj_elf_symver): Call obj_elf_find_and_add_versioned_name to
9 add a version name. Add local, hidden and remove visibility
10 support.
11 (elf_frob_symbol): Handle the list of version names. Update the
12 original symbol to local, hidden or remove it from the symbol
13 table.
14 (elf_frob_file_before_adjust): Handle the list of version names.
15 * config/obj-elf.h (elf_visibility): New.
16 (elf_versioned_name_list): Likewise.
17 (elf_obj_sy): Change local to bitfield. Add rename, bad_version
18 and visibility. Change versioned_name pointer to struct
19 elf_versioned_name_list.
20 * doc/as.texi: Update .symver directive.
21 * testsuite/gas/symver/symver.exp: Run all *.d tests. Add more
22 error checking tests.
23 * testsuite/gas/symver/symver6.d: New file.
24 * testsuite/gas/symver/symver7.d: Likewise.
25 * testsuite/gas/symver/symver7.s: Likewise.
26 * testsuite/gas/symver/symver8.d: Likewise.
27 * testsuite/gas/symver/symver8.s: Likewise.
28 * testsuite/gas/symver/symver9.s: Likewise.
29 * testsuite/gas/symver/symver9a.d: Likewise.
30 * testsuite/gas/symver/symver9b.d: Likewise.
31 * testsuite/gas/symver/symver10.s: Likewise.
32 * testsuite/gas/symver/symver10a.d: Likewise.
33 * testsuite/gas/symver/symver10b.d: Likewise.
34 * testsuite/gas/symver/symver11.d: Likewise.
35 * testsuite/gas/symver/symver11.s: Likewise.
36 * testsuite/gas/symver/symver12.d: Likewise.
37 * testsuite/gas/symver/symver12.s: Likewise.
38 * testsuite/gas/symver/symver13.d: Likewise.
39 * testsuite/gas/symver/symver13.s: Likewise.
40 * testsuite/gas/symver/symver14.d: Likewise.
41 * testsuite/gas/symver/symver14.l: Likewise.
42 * testsuite/gas/symver/symver15.d: Likewise.
43 * testsuite/gas/symver/symver15.l: Likewise.
44 * testsuite/gas/symver/symver6.l: Removed.
45 * testsuite/gas/symver/symver6.s: Updated.
46
47 2020-04-20 Sudakshina Das <sudi.das@arm.com>
48
49 * config/tc-aarch64.c (parse_barrier_psb): Update error messages
50 to include TSB.
51 * testsuite/gas/aarch64/system-2.d: Update -march and new tsb tests.
52 * testsuite/gas/aarch64/system-2.s: Add new tsb tests.
53 * testsuite/gas/aarch64/system.d: Update.
54
55 2020-04-20 Sudakshina Das <sudi.das@arm.com>
56
57 * testsuite/gas/aarch64/bti.d: Update -march option.
58 * testsuite/gas/aarch64/illegal-bti.d: Remove.
59 * testsuite/gas/aarch64/illegal-bti.l: Remove.
60 * testsuite/gas/aarch64/illegal-ras-1.l: Remove esb.
61 * testsuite/gas/aarch64/illegal-ras-1.s: Remove esb.
62
63 2020-04-17 Alan Modra <amodra@gmail.com>
64
65 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Allow assignment to dot.
66
67 2020-04-16 Gagan Singh Sidhu <broly@mac.com>
68 Nick Clifton <nickc@redhat.com>
69
70 PR 25803
71 * config/obj-elf.c (obj_elf_type): Reject ifunc symbols on MIPS
72 targets.
73 * testsuite/gas/elf/elf.exp: Add MIPS targets to the list to skip
74 for the type-2 test.
75 * testsuite/gas/elf/type-noifunc.e: Update to allow for MIPS
76 targets running this test.
77
78 2020-02-16 David Faust <david.faust@oracle.com>
79
80 * testsuite/gas/bpf/bpf.exp: Run jump32 tests.
81 * testsuite/gas/bpf/jump32.s: New file.
82 * testsuite/gas/bpf/jump32.d: Likewise.
83
84 2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
85
86 * doc/c-i386.texi: Correct -mlfence-before-indirect-branch=
87 documentation.
88
89 2020-04-08 Gunther Nikl <gnikl@justmail.de>
90
91 * config/tc-moxie.h (MD_PCREL_FROM_SECTION): Delete define.
92 (md_pcrel_from): Remove prototytpe.
93 * config/tc-m32c.h (MD_PCREL_FROM_SECTION): Delete duplicate
94 define.
95 (md_pcrel_from_section): Remove duplicate prototype.
96 * tc.h (md_pcrel_from_section): Add prototype.
97 * config/tc-aarch64.h (md_pcrel_from_section): Remove prototype.
98 * config/tc-arc.h (md_pcrel_from_section): Likewise.
99 * config/tc-arm.h (md_pcrel_from_section): Likewise.
100 * config/tc-avr.h (md_pcrel_from_section): Likewise.
101 * config/tc-bfin.h (md_pcrel_from_section): Likewise.
102 * config/tc-bpf.h (md_pcrel_from_section): Likewise.
103 * config/tc-csky.h (md_pcrel_from_section): Likewise.
104 * config/tc-d10v.h (md_pcrel_from_section): Likewise.
105 * config/tc-d30v.h (md_pcrel_from_section): Likewise.
106 * config/tc-epiphany.h (md_pcrel_from_section): Likewise.
107 * config/tc-fr30.h (md_pcrel_from_section): Likewise.
108 * config/tc-frv.h (md_pcrel_from_section): Likewise.
109 * config/tc-iq2000.h (md_pcrel_from_section): Likewise.
110 * config/tc-lm32.h (md_pcrel_from_section): Likewise.
111 * config/tc-m32c.h (md_pcrel_from_section): Likewise.
112 * config/tc-m32r.h (md_pcrel_from_section): Likewise.
113 * config/tc-mcore.h (md_pcrel_from_section): Likewise.
114 * config/tc-mep.h (md_pcrel_from_section): Likewise.
115 * config/tc-metag.h (md_pcrel_from_section): Likewise.
116 * config/tc-microblaze.h (md_pcrel_from_section): Likewise.
117 * config/tc-mmix.h (md_pcrel_from_section): Likewise.
118 * config/tc-moxie.h (md_pcrel_from_section): Likewise.
119 * config/tc-msp430.h (md_pcrel_from_section): Likewise.
120 * config/tc-mt.h (md_pcrel_from_section): Likewise.
121 * config/tc-or1k.h (md_pcrel_from_section): Likewise.
122 * config/tc-ppc.h (md_pcrel_from_section): Likewise.
123 * config/tc-rl78.h (md_pcrel_from_section): Likewise.
124 * config/tc-rx.h (md_pcrel_from_section): Likewise.
125 * config/tc-s390.h (md_pcrel_from_section): Likewise.
126 * config/tc-sh.h (md_pcrel_from_section): Likewise.
127 * config/tc-xc16x.h (md_pcrel_from_section): Likewise.
128 * config/tc-xstormy16.h (md_pcrel_from_section): Likewise.
129 * config/tc-microblaze.h (md_begin, md_assemble, md_undefined_symbol,
130 md_show_usage, md_convert_frag, md_operand, md_number_to_chars,
131 md_estimate_size_before_relax, md_section_align, tc_gen_reloc,
132 md_apply_fix3): Delete prototypes.
133
134 2020-04-07 H.J. Lu <hongjiu.lu@intel.com>
135
136 * NEWS: Mention support for Intel SERIALIZE and TSXLDTRK
137 instructions.
138
139 2020-04-07 H.J. Lu <hongjiu.lu@intel.com>
140
141 * doc/c-z80.texi: Fix @xref warnings.
142
143 2020-04-07 Lili Cui <lili.cui@intel.com>
144
145 * config/tc-i386.c (cpu_arch): Add .TSXLDTRK.
146 (cpu_noarch): Likewise.
147 * doc/c-i386.texi: Document TSXLDTRK.
148 * testsuite/gas/i386/i386.exp: Run TSXLDTRK tests.
149 * testsuite/gas/i386/tsxldtrk.d: Likewise.
150 * testsuite/gas/i386/tsxldtrk.s: Likewise.
151 * testsuite/gas/i386/x86-64-tsxldtrk.d: Likewise.
152
153 2020-04-02 Lili Cui <lili.cui@intel.com>
154
155 * config/tc-i386.c (cpu_arch): Add .serialize.
156 (cpu_noarch): Likewise.
157 * doc/c-i386.texi: Document serialize.
158 * testsuite/gas/i386/i386.exp: Run serialize tests
159 * testsuite/gas/i386/serialize.d: Likewise.
160 * testsuite/gas/i386/x86-64-serialize.d: Likewise.
161 * testsuite/gas/i386/serialize.s: Likewise.
162
163 2020-04-02 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
164
165 * testsuite/gas/elf/section12a.d: Use notarget instead of xfail.
166 * testsuite/gas/elf/section12b.d: Likewise.
167 * testsuite/gas/elf/section16a.d: Likewise.
168 * testsuite/gas/elf/section16b.d: Likewise.
169
170 2020-04-02 Gunther Nikl <gnikl@justmail.de>
171
172 * config/tc-m68k.c (m68k_ip): Fix range check for index register
173 with a suppressed address register.
174
175 2020-04-01 H.J. Lu <hongjiu.lu@intel.com>
176
177 PR gas/25756
178 * config/tc-i386.h (TC_FORCE_RELOCATION_ABS): New.
179 * testsuite/gas/i386/localpic.s: Add a test for relocation
180 against local absolute symbol.
181 * testsuite/gas/i386/x86-64-localpic.s: Likewise.
182 * testsuite/gas/i386/localpic.d: Updated.
183 * testsuite/gas/i386/x86-64-localpic.d: Likewise.
184 * testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise.
185
186 2020-04-01 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
187
188 PR gas/25732
189 * testsuite/gas/i386/solaris/x86-64-branch-2.d: New file.
190 * testsuite/gas/i386/solaris/x86-64-branch-3.d: New file.
191 * testsuite/gas/i386/solaris/x86-64-jump.d: Incorporate changes to
192 testsuite/gas/i386/x86-64-jump.d.
193 * gas/testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d:
194 Incorporate changes to
195 gas/testsuite/gas/i386/x86-64-mpx-branch-1.d.
196 * testsuite/gas/i386/solaris/x86-64-mpx-branch-2.d : Incorporate
197 changes to testsuite/gas/i386/x86-64-mpx-branch-2.d.
198 * testsuite/gas/i386/x86-64-branch-2.d: Skip on *-*-solaris*.
199 * testsuite/gas/i386/x86-64-branch-3.d: Likewise.
200
201 2020-03-31 Maciej W. Rozycki <macro@linux-mips.org>
202
203 PR 25611
204 PR 25614
205 * dwarf2dbg.c: Do not include "bignum.h".
206
207 2020-03-30 Nelson Chu <nelson.chu@sifive.com>
208
209 * testsuite/gas/riscv/alias-csr.d: Move this to priv-reg-pseudo.
210 * testsuite/gas/riscv/alias-csr.s: Likewise.
211 * testsuite/gas/riscv/no-aliases-csr.d: Move this
212 to priv-reg-pseudo-noalias.
213 * testsuite/gas/riscv/bad-csr.d: Rename to priv-reg-fail-nonexistent.
214 * testsuite/gas/riscv/bad-csr.l: Likewise.
215 * testsuite/gas/riscv/bad-csr.s: Likewise.
216 * testsuite/gas/riscv/satp.d: Removed. Already included in priv-reg.
217 * testsuite/gas/riscv/satp.s: Likewise.
218 * testsuite/gas/riscv/priv-reg-pseudo.d: New testcase for all pseudo
219 csr instruction, including alias-csr testcase.
220 * testsuite/gas/riscv/priv-reg-pseudo.s: Likewise.
221 * testsuite/gas/riscv/priv-reg-pseudo-noalias.d: New testcase for all
222 pseudo instruction with objdump -Mno-aliases.
223 * testsuite/gas/riscv/priv-reg-fail-nonexistent.d: New testcase.
224 * testsuite/gas/riscv/priv-reg-fail-nonexistent.l: Likewise.
225 * testsuite/gas/riscv/priv-reg-fail-nonexistent.s: Likewise.
226 * testsuite/gas/riscv/priv-reg.d: Update CSR to 1.11.
227 * testsuite/gas/riscv/priv-reg.s: Likewise.
228 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
229 * testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
230 * testsuite/gas/riscv/csr-dw-regnums.s: Likewise.
231
232 2020-03-25 J.W. Jagersma <jwjagersma@gmail.com>
233
234 * config/obj-coff.c (obj_coff_section): Set the bss flag on
235 sections with the "b" attribute.
236
237 2020-03-22 Alan Modra <amodra@gmail.com>
238
239 * testsuite/gas/s12z/truncated.d: Update expected output.
240
241 2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
242
243 PR 25690
244 * config/tc-z80.c (md_pseudo_table): Add xdef anf xref pseudo ops.
245 * doc/c-z80.texi: Update documentation.
246
247 2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
248
249 PR 25641
250 PR 25668
251 PR 25633
252 Fix disassembling ED+A4/AC/B4/BC opcodes.
253 Fix assembling lines containing colonless label and instruction
254 with first operand inside parentheses.
255 Fix registration of unsupported by target CPU registers.
256 * config/tc-z80.c: See above.
257 * config/tc-z80.h: See above.
258 * testsuite/gas/z80/colonless.d: Update test.
259 * testsuite/gas/z80/colonless.s: Likewise.
260 * testsuite/gas/z80/ez80_adl_all.d: Likewise.
261 * testsuite/gas/z80/ez80_unsup_regs.d: Likewise.
262 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
263 * testsuite/gas/z80/gbz80_unsup_regs.d: Likewise.
264 * testsuite/gas/z80/r800_unsup_regs.d: Likewise.
265 * testsuite/gas/z80/unsup_regs.s: Likewise.
266 * testsuite/gas/z80/z180_unsup_regs.d: Likewise.
267 * testsuite/gas/z80/z80.exp: Likewise.
268 * testsuite/gas/z80/z80_strict_unsup_regs.d: Likewise.
269 * testsuite/gas/z80/z80_unsup_regs.d: Likewise.
270 * testsuite/gas/z80/z80n_unsup_regs.d: Likewise.
271
272 2020-03-13 Andre Vieira <andre.simoesdiasvieira@arm.com>
273
274 PR 25660
275 * config/tc-arm.c (operand_parse_code): Add OP_RNSDMQR and OP_oRNSDMQ.
276 (parse_operands): Handle new operand codes.
277 (do_neon_dyadic_long): Make shape check accept the scalar variants.
278 (asm_opcode_insns): Fix operand codes for vaddl and vsubl.
279 * testsuite/gas/arm/mve-vaddsub-it.s: New test.
280 * testsuite/gas/arm/mve-vaddsub-it.d: New test.
281 * testsuite/gas/arm/mve-vaddsub-it-bad.s: New test.
282 * testsuite/gas/arm/mve-vaddsub-it-bad.l: New test.
283 * testsuite/gas/arm/mve-vaddsub-it-bad.d: New test.
284 * testsuite/gas/arm/nomve-vaddsub-it.d: New test.
285
286 2020-03-11 H.J. Lu <hongjiu.lu@intel.com>
287
288 * NEWS: Mention x86 assembler options for CVE-2020-0551.
289
290 2020-03-11 H.J. Lu <hongjiu.lu@intel.com>
291
292 * testsuite/gas/i386/i386.exp: Run new tests.
293 * testsuite/gas/i386/lfence-byte.d: New file.
294 * testsuite/gas/i386/lfence-byte.e: Likewise.
295 * testsuite/gas/i386/lfence-byte.s: Likewise.
296 * testsuite/gas/i386/lfence-indbr-a.d: Likewise.
297 * testsuite/gas/i386/lfence-indbr-b.d: Likewise.
298 * testsuite/gas/i386/lfence-indbr-c.d: Likewise.
299 * testsuite/gas/i386/lfence-indbr.e: Likewise.
300 * testsuite/gas/i386/lfence-indbr.s: Likewise.
301 * testsuite/gas/i386/lfence-load.d: Likewise.
302 * testsuite/gas/i386/lfence-load.s: Likewise.
303 * testsuite/gas/i386/lfence-ret-a.d: Likewise.
304 * testsuite/gas/i386/lfence-ret-b.d: Likewise.
305 * testsuite/gas/i386/lfence-ret.s: Likewise.
306 * testsuite/gas/i386/x86-64-lfence-byte.d: Likewise.
307 * testsuite/gas/i386/x86-64-lfence-byte.e: Likewise.
308 * testsuite/gas/i386/x86-64-lfence-byte.s: Likewise.
309 * testsuite/gas/i386/x86-64-lfence-indbr-a.d: Likewise.
310 * testsuite/gas/i386/x86-64-lfence-indbr-b.d: Likewise.
311 * testsuite/gas/i386/x86-64-lfence-indbr-c.d: Likewise.
312 * testsuite/gas/i386/x86-64-lfence-indbr.e: Likewise.
313 * testsuite/gas/i386/x86-64-lfence-indbr.s: Likewise.
314 * testsuite/gas/i386/x86-64-lfence-load.d: Likewise.
315 * testsuite/gas/i386/x86-64-lfence-load.s: Likewise.
316 * testsuite/gas/i386/x86-64-lfence-ret-a.d: Likewise.
317 * testsuite/gas/i386/x86-64-lfence-ret-b.d: Likewise.
318
319 2020-03-11 H.J. Lu <hongjiu.lu@intel.com>
320
321 * config/tc-i386.c (lfence_after_load): New.
322 (lfence_before_indirect_branch_kind): New.
323 (lfence_before_indirect_branch): New.
324 (lfence_before_ret_kind): New.
325 (lfence_before_ret): New.
326 (last_insn): New.
327 (load_insn_p): New.
328 (insert_lfence_after): New.
329 (insert_lfence_before): New.
330 (md_assemble): Call insert_lfence_before and insert_lfence_after.
331 Set last_insn.
332 (OPTION_MLFENCE_AFTER_LOAD): New.
333 (OPTION_MLFENCE_BEFORE_INDIRECT_BRANCH): New.
334 (OPTION_MLFENCE_BEFORE_RET): New.
335 (md_longopts): Add -mlfence-after-load=,
336 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
337 (md_parse_option): Handle -mlfence-after-load=,
338 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
339 (md_show_usage): Display -mlfence-after-load=,
340 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
341 (i386_cons_align): New.
342 * config/tc-i386.h (i386_cons_align): New.
343 (md_cons_align): New.
344 * doc/c-i386.texi: Document -mlfence-after-load=,
345 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
346
347 2020-03-11 Nick Clifton <nickc@redhat.com>
348
349 PR 25611
350 PR 25614
351 * dwarf2dbg.c (DWARF2_FILE_TIME_NAME): Default to -1.
352 (DWARF2_FILE_SIZE_NAME): Default to -1.
353 (DWARF2_LINE_VERSION): Default to the current dwarf level or 3,
354 whichever is higher.
355 (DWARF2_LINE_MAX_OPS_PER_INSN): Provide a default value of 1.
356 (NUM_MD5_BYTES): Define.
357 (struct file entry): Add md5 field.
358 (get_filenum): Delete and replace with...
359 (get_basename): New function.
360 (get_directory_table_entry): New function.
361 (allocate_filenum): New function.
362 (allocate_filename_to_slot): New function.
363 (dwarf2_where): Use new functions.
364 (dwarf2_directive_filename): Add support for extended .file
365 pseudo-op.
366 (dwarf2_directive_loc): Allow the use of file number zero with
367 DWARF 5 or higher.
368 (out_file_list): Rename to...
369 (out_dir_and_file_list): Add DWARF 5 support.
370 (out_debug_line): Emit extra values into the section header for
371 DWARF 5.
372 (out_debug_str): Allow for file 0 to be used with DWARF 5.
373 * doc/as.texi (.file): Update the description of this pseudo-op.
374 * testsuite/gas/elf-dwarf-5-file0.s: Add more lines.
375 * testsuite/gas/elf-dwarf-5-file0.d: Update expected dump output.
376 * testsuite/gas/lns/lns-diag-1.l: Update expected error message.
377 * NEWS: Mention the new feature.
378
379 2020-03-10 Alan Modra <amodra@gmail.com>
380
381 * config/tc-csky.c (get_operand_value): Rewrite 1 << 31 expressions
382 to avoid signed overflow.
383 * config/tc-mcore.c (md_assemble): Likewise.
384 * config/tc-mips.c (gpr_read_mask, gpr_write_mask): Likewise.
385 * config/tc-nds32.c (SET_ADDEND): Likewise.
386 * config/tc-nios2.c (nios2_assemble_arg_R): Likewise.
387
388 2020-03-09 Jan Beulich <jbeulich@suse.com>
389
390 * testsuite/gas/i386/avx.s: Add long-form VCMP[PS][SD] pseudos.
391 * testsuite/gas/i386/avx.d, testsuite/gas/i386/avx-16bit.d,
392 testsuite/gas/i386/avx-intel.d: Adjust expectations.
393
394 2020-03-07 Alan Modra <amodra@gmail.com>
395
396 * testsuite/gas/elf/dwarf-5-file0.s: Don't start directives in
397 first column.
398
399 2020-03-06 Nick Clifton <nickc@redhat.com>
400
401 PR 25614
402 * dwarf2dbg.c (dwarf2_directive_filename): Allow a file number of
403 0 if the dwarf_level is 5 or more. Complain if a filename follows
404 a file 0.
405 * testsuite/gas/elf/dwarf-5-file0.s: New test.
406 * testsuite/gas/elf/dwarf-5-file0.d: New test driver.
407 * testsuite/gas/elf/elf.exp: Run the new test.
408
409 PR 25612
410 * config/tc-ia64.h (DWARF2_VERISION): Fix typo.
411 * doc/as.texi: Fix another typo.
412
413 2020-03-06 Nick Clifton <nickc@redhat.com>
414
415 PR 25612
416 * as.c (dwarf_level): Define.
417 (show_usage): Add --gdwarf-3, --gdwarf-4 and --gdwarf-5.
418 (parse_args): Add support for the new options.
419 as.h (dwarf_level): Prototype.
420 * dwarf2dbg.c (DWARF2_VERSION): Use dwarf_level as default version
421 value.
422 * config/tc-ia64.h (DWARF2_VERISION): Update definition.
423 (DWARF2_LINE_VERSION): Remove definition.
424 * doc/as.texi: Document the new options.
425
426 2020-03-06 Nick Clifton <nickc@redhat.com>
427
428 PR 25572
429 * as.c (main): Allow matching input and outputs when they are
430 not regular files.
431
432 2020-03-06 Jan Beulich <jbeulich@suse.com>
433
434 * config/tc-i386.c (match_mem_size): Generalize broadcast special
435 casing.
436 (check_VecOperands): Zap xmmword/ymmword/zmmword when more than
437 one of byte/word/dword/qword is set alongside a SIMD register in
438 a template's operand.
439
440 2020-03-06 Jan Beulich <jbeulich@suse.com>
441
442 * config/tc-i386.c (match_template): Extend code in logic
443 rejecting certain suffixes in certain modes to also cover mask
444 register use and VecSIB. Drop special casing of broadcast. Skip
445 immediates in the check.
446
447 2020-03-06 Jan Beulich <jbeulich@suse.com>
448
449 * config/tc-i386.c (match_template): Fold duplicate code in
450 logic rejecting certain suffixes in certain modes. Drop
451 pointless "else".
452
453 2020-03-06 Jan Beulich <jbeulich@suse.com>
454
455 * config/tc-i386.c (process_suffix): Exlucde !vexw insns
456 alongside !norex64 ones.
457 * testsuite/gas/i386/x86-64-avx512bw.s: Test VPEXTR* and VPINSR*
458 with both 32- and 64-bit GPR operands.
459 * testsuite/gas/i386/x86-64-avx512f.s: Test VEXTRACTPS with both
460 32- and 64-bit GPR operands.
461 * testsuite/gas/i386/x86-64-avx512bw-intel.d,
462 testsuite/gas/i386/x86-64-avx512bw.d,
463 testsuite/gas/i386/x86-64-avx512f-intel.d,
464 testsuite/gas/i386/x86-64-avx512f.d: Adjust expectations.
465
466 2020-03-06 Jan Beulich <jbeulich@suse.com>
467
468 * config/tc-i386.c (md_assemble): Drop use of rex64.
469 (process_suffix): For REX.W for 64-bit CRC32.
470
471 2020-03-06 Jan Beulich <jbeulich@suse.com>
472
473 * config/tc-i386.c (i386_addressing_mode): For 32-bit
474 addressing for MPX insns without base/index.
475 * testsuite/gas/i386/mpx-16bit.s,
476 * testsuite/gas/i386/mpx-16bit.d: New.
477 * testsuite/gas/i386/i386.exp: Run new test.
478
479 2020-03-06 Jan Beulich <jbeulich@suse.com>
480
481 * testsuite/gas/i386/adx.s, testsuite/gas/i386/cet.s,
482 testsuite/gas/i386/ept.s, testsuite/gas/i386/fsgs.s,
483 testsuite/gas/i386/invpcid.s, testsuite/gas/i386/movdir.s,
484 testsuite/gas/i386/ptwrite.s, testsuite/gas/i386/vmx.s,
485 * testsuite/gas/i386/code16.s: Add CR, DR, and TR access cases
486 as well as a BSWAP one.
487 * testsuite/gas/i386/rdpid.s: Add 16-bit case.
488 * testsuite/gas/i386/sse2-16bit.s: Cover more insns.
489 * testsuite/gas/i386/adx-intel.d, testsuite/gas/i386/adx.d,
490 testsuite/gas/i386/cet-intel.d, testsuite/gas/i386/cet.d,
491 testsuite/gas/i386/code16.d, testsuite/gas/i386/ept-intel.d,
492 testsuite/gas/i386/ept.d, testsuite/gas/i386/fsgs-intel.d,
493 testsuite/gas/i386/fsgs.d, testsuite/gas/i386/invpcid-intel.d,
494 testsuite/gas/i386/invpcid.d, testsuite/gas/i386/movdir-intel.d,
495 testsuite/gas/i386/movdir.d, testsuite/gas/i386/ptwrite-intel.d,
496 testsuite/gas/i386/ptwrite.d, testsuite/gas/i386/rdpid-intel.d,
497 testsuite/gas/i386/rdpid.d, testsuite/gas/i386/sse2-16bit.d,
498 testsuite/gas/i386/vmx.d: Adjust expectations.
499
500 2020-03-06 Jan Beulich <jbeulich@suse.com>
501
502 * config/tc-i386.c (md_assemble): Also exclude tpause and umwait
503 from having their operands swapped.
504 * testsuite/gas/i386/waitpkg.s,
505 testsuite/gas/i386/x86-64-waitpkg.s: Add tpause and umwait
506 3-operand cases as well as testing of 16-bit code generation.
507 * testsuite/gas/i386/waitpkg.d,
508 testsuite/gas/i386/waitpkg-intel.d,
509 testsuite/gas/i386/x86-64-waitpkg.d,
510 testsuite/gas/i386/x86-64-waitpkg-intel.d: Adjust expectations.
511
512 2020-03-04 Nelson Chu <nelson.chu@sifive.com>
513
514 * config/tc-riscv.c (percent_op_utype): Support the modifier
515 %got_pcrel_hi.
516 * doc/c-riscv.texi: Add documentation.
517 * testsuite/gas/riscv/no-relax-reloc.d: Add test case for the new
518 modifier %got_pcrel_hi.
519 * testsuite/gas/riscv/no-relax-reloc.s: Likewise.
520 * testsuite/gas/riscv/relax-reloc.d: Likewise.
521 * testsuite/gas/riscv/relax-reloc.s: Likewise.
522
523 * doc/c-riscv.texi (relocation modifiers): Add documentation.
524 (RISC-V-Formats): Update the section name from "Instruction Formats"
525 to "RISC-V Instruction Formats".
526
527 2020-03-04 Alexandre Oliva <oliva@adacore.com>
528
529 * config/tc-arm.c (md_apply_fix): Warn if a PC-relative load is
530 detected in a section which does not have at least 4 byte
531 alignment.
532 * testsuite/gas/arm/armv8-ar-it-bad.s: Add alignment directive.
533 * testsuite/gas/arm/ldr-t.s: Likewise.
534 * testsuite/gas/arm/sp-pc-usage-t.s: Likewise.
535 * testsuite/gas/arm/sp-pc-usage-t.d: Finish test at end of
536 disassembly, ignoring any NOPs that may have been inserted because
537 of section alignment.
538 * testsuite/gas/arm/ldr-t.d: Likewise.
539
540 2020-03-04 Jan Beulich <jbeulich@suse.com>
541
542 * config/tc-i386.c (cpu_arch): Add .sev_es entry.
543 * doc/c-i386.texi: Mention sev_es.
544 * testsuite/gas/i386/arch-13.s: Add SEV-ES case.
545 * testsuite/gas/i386/arch-13.d: Extend -march=. Adjust
546 expectations.
547 * testsuite/gas/i386/arch-13-znver1.d,
548 testsuite/gas/i386/arch-13-znver2.d: Extend -march=.
549
550 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
551
552 * config/tc-i386.c (match_template): Replace ignoresize and
553 defaultsize with mnemonicsize.
554 (process_suffix): Likewise.
555
556 2020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
557
558 PR 25627
559 * config/tc-z80.c (emit_ld_rr_m): Fix invalid compilation of
560 instruction LD IY,(HL).
561 * testsuite/gas/z80/ez80_adl_all.d: Update expected disassembly.
562 * testsuite/gas/z80/ez80_adl_all.s: Add tests of the instruction.
563 * testsuite/gas/z80/ez80_z80_all.d: Update expected disassembly.
564 * testsuite/gas/z80/ez80_z80_all.s: Add tests of the instruction.
565
566 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
567
568 PR gas/25622
569 * testsuite/gas/i386/i386.exp: Run x86-64-default-suffix and
570 x86-64-default-suffix-avx.
571 * testsuite/gas/i386/noreg64.s: Remove cvtsi2sd, cvtsi2ss,
572 vcvtsi2sd, vcvtsi2ss, vcvtusi2sd and vcvtusi2ss entries.
573 * testsuite/gas/i386/noreg64.d: Updated.
574 * testsuite/gas/i386/noreg64.l: Likewise.
575 * testsuite/gas/i386/x86-64-default-suffix-avx.d: New file.
576 * testsuite/gas/i386/x86-64-default-suffix.d: Likewise.
577 * testsuite/gas/i386/x86-64-default-suffix.s: Likewise.
578
579 2020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
580
581 PR 25604
582 * config/tc-z80.c (contains_register): Prevent an illegal memory
583 access when checking an expression for a register name.
584
585 2020-03-03 Alan Modra <amodra@gmail.com>
586
587 * config/obj-coff.h: Remove vestiges of coff-m68k and pe-mips
588 support.
589
590 2020-03-02 Alan Modra <amodra@gmail.com>
591
592 * config/tc-m32r.c (md_begin): Set SEC_SMALL_DATA on .scommon section.
593 * config/tc-mips.c (s_change_sec): Set SEC_SMALL_DATA for .sdata
594 and .sbss sections.
595 * config/tc-score.c: Delete !BFD_ASSEMBLER code throughout.
596 (s3_s_change_sec): Set SEC_SMALL_DATA for .sbss section.
597 (s3_s_score_lcomm): Likewise.
598 * config/tc-score7.c: Similarly.
599 * read.c (bss_alloc): Set SEC_SMALL_DATA for .sbss section.
600
601 2020-02-28 YunQiang Su <syq@debian.org>
602
603 PR gas/25539
604 * config/tc-mips.c (fix_loongson3_llsc): Compare label value
605 to handle multi-labels.
606 (has_label_name): New.
607
608 2020-02-26 Matthew Malcomson <matthew.malcomson@arm.com>
609
610 * config/tc-arm.c (enum pred_instruction_type): Remove
611 NEUTRAL_IT_NO_VPT_INSN predication type.
612 (cxn_handle_predication): Modify to require condition suffixes.
613 (handle_pred_state): Remove NEUTRAL_IT_NO_VPT_INSN cases.
614 * testsuite/gas/arm/cde-scalar.s: Update test.
615 * testsuite/gas/arm/cde-warnings.l: Update test.
616 * testsuite/gas/arm/cde-warnings.s: Update test.
617
618 2020-02-26 Alan Modra <amodra@gmail.com>
619
620 * config/tc-arm.c (reg_expected_msgs[REG_TYPE_RNB]): Don't use
621 N_() on empty string.
622
623 2020-02-26 Alan Modra <amodra@gmail.com>
624
625 * read.c (read_a_source_file): Call strncpy with length one
626 less than size of original_case_string.
627
628 2020-02-26 Alan Modra <amodra@gmail.com>
629
630 * config/obj-elf.c: Indent labels correctly.
631 * config/obj-macho.c: Likewise.
632 * config/tc-aarch64.c: Likewise.
633 * config/tc-alpha.c: Likewise.
634 * config/tc-arm.c: Likewise.
635 * config/tc-cr16.c: Likewise.
636 * config/tc-crx.c: Likewise.
637 * config/tc-frv.c: Likewise.
638 * config/tc-i386-intel.c: Likewise.
639 * config/tc-i386.c: Likewise.
640 * config/tc-ia64.c: Likewise.
641 * config/tc-mn10200.c: Likewise.
642 * config/tc-mn10300.c: Likewise.
643 * config/tc-nds32.c: Likewise.
644 * config/tc-riscv.c: Likewise.
645 * config/tc-s12z.c: Likewise.
646 * config/tc-xtensa.c: Likewise.
647 * config/tc-z80.c: Likewise.
648 * read.c: Likewise.
649 * symbols.c: Likewise.
650 * write.c: Likewise.
651
652 2020-02-20 Nelson Chu <nelson.chu@sifive.com>
653
654 * config/tc-riscv.c (riscv_ip): New boolean insn_with_csr to indicate
655 we are assembling instruction with CSR. Call riscv_csr_read_only_check
656 after parsing all arguments.
657 (enum csr_insn_type): New enum is used to classify the CSR instruction.
658 (riscv_csr_insn_type, riscv_csr_read_only_check): New functions. These
659 are used to check if we write a read-only CSR by the CSR instruction.
660 * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: New testcase. Test
661 all CSR for the read-only CSR checking.
662 * testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
663 * testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
664 * testsuite/gas/riscv/priv-reg-fail-read-only-02.s: New testcase. Test
665 all CSR instructions for the read-only CSR checking.
666 * testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
667 * testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
668
669 * config/tc-riscv.c (struct riscv_set_options): New field csr_check.
670 (riscv_opts): Initialize it.
671 (reg_lookup_internal): Check the `riscv_opts.csr_check`
672 before doing the CSR checking.
673 (enum options): Add OPTION_CSR_CHECK and OPTION_NO_CSR_CHECK.
674 (md_longopts): Add mcsr-check and mno-csr-check.
675 (md_parse_option): Handle new enum option values.
676 (s_riscv_option): Handle new long options.
677 * doc/c-riscv.texi: Add description for the new .option and assembler
678 options.
679 * testsuite/gas/riscv/priv-reg-fail-fext.d: Add `-mcsr-check` to enable
680 the CSR checking.
681 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
682
683 * config/tc-riscv.c (csr_extra_hash): New.
684 (enum riscv_csr_class): New enum. Used to decide
685 whether or not this CSR is legal in the current ISA string.
686 (struct riscv_csr_extra): New structure to hold all extra information
687 of CSR.
688 (riscv_init_csr_hashes): New. According to the DECLARE_CSR and
689 DECLARE_CSR_ALIAS, insert CSR extra information into csr_extra_hash.
690 Call hash_reg_name to insert CSR address into reg_names_hash.
691 (reg_csr_lookup_internal, riscv_csr_class_check): New functions.
692 Decide whether the CSR is valid according to the csr_extra_hash.
693 (reg_lookup_internal): Call reg_csr_lookup_internal for CSRs.
694 (init_opcode_hash): Update 'if (hash_error != NULL)' as hash_error is
695 not a boolean. This is same as riscv_init_csr_hash, so keep the
696 consistent usage.
697 (md_begin): Call riscv_init_csr_hashes for each DECLARE_CSR.
698 * testsuite/gas/riscv/csr-dw-regnums.d: Add -march=rv32if option.
699 * testsuite/gas/riscv/priv-reg.d: Add f-ext by -march option.
700 * testsuite/gas/riscv/priv-reg-fail-fext.d: New testcase. The source
701 file is `priv-reg.s`, and the ISA is rv32i without f-ext, so the
702 f-ext CSR are not allowed.
703 * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.
704 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: New testcase. The
705 source file is `priv-reg.s`, and the ISA is rv64if, so the
706 rv32-only CSR are not allowed.
707 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
708
709 2020-02-21 Alan Modra <amodra@gmail.com>
710
711 * config/tc-pdp11.c (md_apply_fix): Handle BFD_RELOC_32.
712 (tc_gen_reloc): Only give a BAD_CASE assertion on pcrel relocs.
713
714 2020-02-21 Alan Modra <amodra@gmail.com>
715
716 PR 25569
717 * config/obj-aout.c (obj_aout_frob_file_before_fix): Don't loop
718 on section size adjustment, instead perform another write if
719 exec header size is larger than section size.
720
721 2020-02-19 Nelson Chu <nelson.chu@sifive.com>
722
723 * doc/c-riscv.texi: Add the doc entries for -march-attr/
724 -mno-arch-attr command line options.
725
726 2020-02-19 Nelson Chu <nelson.chu@sifive.com>
727
728 * testsuite/gas/riscv/c-add-addi.d: New testcase.
729 * testsuite/gas/riscv/c-add-addi.s: Likewise.
730
731 2020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
732
733 PR 25576
734 * config/tc-z80.c (md_parse_option): Do not use an underscore
735 prefix for local labels in SDCC compatability mode.
736 (z80_start_line_hook): Remove SDCC dollar label support.
737 * testsuite/gas/z80/sdcc.d: Update expected disassembly.
738 * testsuite/gas/z80/sdcc.s: Likewise.
739
740 2020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
741
742 PR 25517
743 * config/tc-z80.c: Add -march option.
744 * doc/as.texi: Update Z80 documentation.
745 * doc/c-z80.texi: Likewise.
746 * testsuite/gas/z80/ez80_adl_all.d: Update command line.
747 * testsuite/gas/z80/ez80_adl_suf.d: Likewise.
748 * testsuite/gas/z80/ez80_pref_dis.d: Likewise.
749 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
750 * testsuite/gas/z80/ez80_z80_suf.d: Likewise.
751 * testsuite/gas/z80/gbz80_all.d: Likewise.
752 * testsuite/gas/z80/r800_extra.d: Likewise.
753 * testsuite/gas/z80/r800_ii8.d: Likewise.
754 * testsuite/gas/z80/r800_z80_doc.d: Likewise.
755 * testsuite/gas/z80/sdcc.d: Likewise.
756 * testsuite/gas/z80/z180.d: Likewise.
757 * testsuite/gas/z80/z180_z80_doc.d: Likewise.
758 * testsuite/gas/z80/z80_doc.d: Likewise.
759 * testsuite/gas/z80/z80_ii8.d: Likewise.
760 * testsuite/gas/z80/z80_in_f_c.d: Likewise.
761 * testsuite/gas/z80/z80_op_ii_ld.d: Likewise.
762 * testsuite/gas/z80/z80_out_c_0.d: Likewise.
763 * testsuite/gas/z80/z80_sli.d: Likewise.
764 * testsuite/gas/z80/z80n_all.d: Likewise.
765 * testsuite/gas/z80/z80n_reloc.d: Likewise.
766
767 2020-02-19 H.J. Lu <hongjiu.lu@intel.com>
768
769 * config/tc-i386.c (output_insn): Mark cvtpi2ps and cvtpi2pd
770 with GNU_PROPERTY_X86_FEATURE_2_MMX.
771 * testsuite/gas/i386/i386.exp: Run property-3 and
772 x86-64-property-3.
773 * testsuite/gas/i386/property-3.d: New file.
774 * testsuite/gas/i386/property-3.s: Likewise.
775 * testsuite/gas/i386/x86-64-property-3.d: Likewise.
776
777 2020-02-17 H.J. Lu <hongjiu.lu@intel.com>
778
779 * config/tc-i386.c (cpu_arch): Add .popcnt.
780 * doc/c-i386.texi: Remove abm and .abm. Add popcnt and .popcnt.
781 Add a tab before @samp{.sse4a}.
782
783 2020-02-17 Jan Beulich <jbeulich@suse.com>
784
785 * config/tc-i386.c (process_suffix): Don't try to guess a suffix
786 for AddrPrefixOpReg templates. Combine the two pieces of
787 addrprefixopreg handling. Reject 16-bit address reg in 64-bit
788 mode.
789
790 2020-02-17 Jan Beulich <jbeulich@suse.com>
791
792 PR gas/14439
793 * config/tc-i386.c (md_assemble): Also suppress operand
794 swapping for MONITOR{,X} and MWAIT{,X}.
795 * testsuite/gas/i386/sse3.s, testsuite/gas/i386/x86-64-sse3.s:
796 Add Intel syntax monitor/mwait tests.
797 * testsuite/gas/i386/sse3.d, testsuite/gas/i386/x86-64-sse3.d:
798 Adjust expectations.
799 *testsuite/gas/i386/sse3-intel.d,
800 testsuite/gas/i386/x86-64-sse3-intel.d: New.
801 * testsuite/gas/i386/i386.exp: Run new tests.
802
803 2020-02-17 Jan Beulich <jbeulich@suse.com>
804
805 PR gas/6518
806 * config/tc-i386.c (process_suffix): Re-work Intel-syntax
807 [XYZ]MMWord memory operand ambiguity recognition logic (largely
808 re-indentation).
809 * testsuite/gas/i386/avx512dq-inval.s: Add vcvtqq2ps/vcvtuqq2ps
810 cases.
811 * testsuite/gas/i386/inval-avx512f.s: Also test vcvtneps2bf16.
812 * testsuite/gas/i386/avx512dq-inval.l,
813 testsuite/gas/i386/inval-avx.l,
814 testsuite/gas/i386/inval-avx512f.l: Adjust expectations.
815 * testsuite/gas/i386/avx512vl-ambig.s,
816 testsuite/gas/i386/avx512vl-ambig.l: New.
817 * testsuite/gas/i386/i386.exp: Run new test.
818
819 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
820
821 * config/tc-i386.c (cpu_arch): Add .sse4a and nosse4a. Restore
822 nosse4.
823 * doc/c-i386.texi: Document sse4a and nosse4a.
824
825 2020-02-14 H.J. Lu <hongjiu.lu@intel.com>
826
827 * doc/c-i386.texi: Remove the old movsx and movzx documentation
828 for AT&T syntax.
829
830 2020-02-14 Jan Beulich <jbeulich@suse.com>
831
832 PR gas/25438
833 * config/tc-i386.c (md_assemble): Move movsx/movzx special
834 casing ...
835 (process_suffix): ... here. Consider just the first operand
836 initially.
837 (check_long_reg): Drop opcode 0x63 special case again.
838 * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,
839 testsuite/gas/i386/ilp32/x86-64.s, testsuite/gas/i386/x86_64.s:
840 Move ambiguous operand size tests ...
841 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
842 testsuite/gas/i386/noreg64.s: ... here.
843 * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d
844 testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,
845 testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
846 testsuite/gas/i386/movx16.l, testsuite/gas/i386/movx32.l,
847 testsuite/gas/i386/movx64.l, testsuite/gas/i386/noreg16.d,
848 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
849 testsuite/gas/i386/x86-64-movsxd.d,
850 testsuite/gas/i386/x86-64-movsxd-intel.d,
851 testsuite/gas/i386/x86_64.d, testsuite/gas/i386/x86_64-intel.d:
852 Adjust expectations.
853 * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,
854 testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,
855 testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.
856 * testsuite/gas/i386/i386.exp: Run new tests.
857
858 2020-02-14 Jan Beulich <jbeulich@suse.com>
859
860 * config/tc-i386.c (process_operands): Also skip segment
861 override prefix emission if it matches an already present one.
862 * testsuite/gas/i386/prefix32.s: Add double segment override
863 cases.
864 * testsuite/gas/i386/prefix32.l: Adjust expectations.
865
866 2020-02-14 Jan Beulich <jbeulich@suse.com>
867
868 * config/tc-i386.c (process_operands): Drop ineffectual segment
869 overrides when optimizing.
870 * testsuite/gas/i386/lea-optimize.d: New.
871 * testsuite/gas/i386/i386.exp: Run new test.
872
873 2020-02-14 Jan Beulich <jbeulich@suse.com>
874
875 * config/tc-i386.c (process_operands): Also check insn prefix
876 for ineffectual segment override warning. Don't cover possible
877 VEX/EVEX encoded insns there.
878 * testsuite/gas/i386/lea.s, testsuite/gas/i386/lea.d,
879 testsuite/gas/i386/lea.e: New.
880 * testsuite/gas/i386/i386.exp: Run new test.
881
882 2020-02-14 H.J. Lu <hongjiu.lu@intel.com>
883
884 PR gas/25438
885 * doc/c-i386.texi: Document movsx, movsxd and movzx for AT&T
886 syntax.
887
888 2020-02-13 Fangrui Song <maskray@google.com>
889 H.J. Lu <hongjiu.lu@intel.com>
890
891 PR gas/25551
892 * config/tc-i386.c (tc_i386_fix_adjustable): Don't check
893 BFD_RELOC_386_PLT32 nor BFD_RELOC_X86_64_PLT32.
894 * testsuite/gas/i386/i386.exp: Run relax-5 and x86-64-relax-4.
895 * testsuite/gas/i386/relax-5.d: New file.
896 * testsuite/gas/i386/relax-5.s: Likewise.
897 * testsuite/gas/i386/x86-64-relax-4.d: Likewise.
898 * testsuite/gas/i386/x86-64-relax-4.s: Likewise.
899
900 2020-02-13 Jan Beulich <jbeulich@suse.com>
901
902 * config/tc-i386.c (cpu_noarch): Use CPU_ANY_SSE4_FLAGS in
903 "nosse4" entry.
904
905 2020-02-12 Jan Beulich <jbeulich@suse.com>
906
907 * config/tc-i386.c (avx512): New (at file scope), moved from
908 (check_VecOperands): ... here.
909 (process_suffix): Add [XYZ]MMword operand size handling.
910 * testsuite/gas/i386/avx512dq-inval.s: Add VFPCLASS tests.
911 * testsuite/gas/i386/noavx512-2.s: Add Intel syntax VFPCLASS
912 tests.
913 * testsuite/gas/i386/avx512dq-inval.l,
914 testsuite/gas/i386/noavx512-2.l: Adjust expectations.
915
916 2020-02-12 Jan Beulich <jbeulich@suse.com>
917
918 PR gas/24546
919 * config/tc-i386.c (match_template): Apply AMD64 check to 64-bit
920 code only.
921 * config/tc-i386-intel.c (i386_intel_operand): Also handle
922 CALL/JMP in O_tbyte_ptr case.
923 * doc/c-i386.texi: Mention far call and full pointer load ISA
924 differences.
925 * testsuite/gas/i386/x86-64-branch-3.s,
926 testsuite/gas/i386/x86-64-intel64.s: Add 64-bit far call cases.
927 * testsuite/gas/i386/x86-64-branch-3.d,
928 testsuite/gas/i386/x86-64-intel64.d: Adjust expectations.
929 * testsuite/gas/i386/x86-64-branch-5.l,
930 testsuite/gas/i386/x86-64-branch-5.s: New.
931 * testsuite/gas/i386/i386.exp: Run new test.
932
933 2020-02-12 Jan Beulich <jbeulich@suse.com>
934
935 PR gas/25438
936 * config/tc-i386.c (REGISTER_WARNINGS): Delete.
937 (check_byte_reg): Skip only source operand of CRC32. Drop Non-
938 64-bit-only warning.
939 (check_word_reg): Consistently error on mismatching register
940 size and suffix.
941 * testsuite/gas/i386/general.s: Replace dword GPR with word one
942 for movw. Replace suffix / GPR for orb.
943 * testsuite/gas/i386/inval.s: Add tests for movw with dword and
944 byte GPRs as well as ones for inb/outb with a word accumulator.
945 * testsuite/gas/i386/general.l, testsuite/gas/i386/intelbad.l,
946 testsuite/gas/i386/inval.l: Adjust expectations.
947
948 2020-02-12 Jan Beulich <jbeulich@suse.com>
949
950 * config/tc-i386.c (operand_type_register_match): Also fall
951 through initial two if()-s when the template allows for a GPR
952 operand. Adjust comment.
953
954 2020-02-11 Jan Beulich <jbeulich@suse.com>
955
956 (struct _i386_insn): New field "short_form".
957 (optimize_encoding): Drop setting of shortform field.
958 (process_suffix): Set i.short_form. Replace shortform use.
959 (process_operands): Replace shortform use.
960
961 2020-02-11 Matthew Malcomson <matthew.malcomson@arm.com>
962
963 * config/tc-arm.c (vcx_handle_register_arguments): Remove `for`
964 loop initial declaration.
965
966 2020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
967
968 * config/tc-arm.c (NEON_MAX_TYPE_ELS): Increment to account for
969 instructions that can have 5 arguments.
970 (enum operand_parse_code): Add new operands.
971 (parse_operands): Account for new operands.
972 (S5): New macro.
973 (enum neon_shape_el): Introduce P suffixes for coprocessor.
974 (neon_select_shape): Account for P suffix.
975 (LOW1): Move macro to global position.
976 (HI4): Move macro to global position.
977 (vcx_assign_vec_d): New.
978 (vcx_assign_vec_m): New.
979 (vcx_assign_vec_n): New.
980 (enum vcx_reg_type): New.
981 (vcx_get_reg_type): New.
982 (vcx_size_pos): New.
983 (vcx_vec_pos): New.
984 (vcx_handle_shape): New.
985 (vcx_ensure_register_in_range): New.
986 (vcx_handle_register_arguments): New.
987 (vcx_handle_insn_block): New.
988 (vcx_handle_common_checks): New.
989 (do_vcx1): New.
990 (do_vcx2): New.
991 (do_vcx3): New.
992 * testsuite/gas/arm/cde-missing-fp.d: New test.
993 * testsuite/gas/arm/cde-missing-fp.l: New test.
994 * testsuite/gas/arm/cde-missing-mve.d: New test.
995 * testsuite/gas/arm/cde-missing-mve.l: New test.
996 * testsuite/gas/arm/cde-mve-or-neon.d: New test.
997 * testsuite/gas/arm/cde-mve-or-neon.s: New test.
998 * testsuite/gas/arm/cde-mve.s: New test.
999 * testsuite/gas/arm/cde-warnings.l:
1000 * testsuite/gas/arm/cde-warnings.s:
1001 * testsuite/gas/arm/cde.d:
1002 * testsuite/gas/arm/cde.s:
1003
1004 2020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
1005 Matthew Malcomson <matthew.malcomson@arm.com>
1006
1007 * config/tc-arm.c (arm_ext_cde*): New feature sets for each
1008 CDE coprocessor that can be enabled.
1009 (enum pred_instruction_type): New pred type.
1010 (BAD_NO_VPT): New error message.
1011 (BAD_CDE): New error message.
1012 (BAD_CDE_COPROC): New error message.
1013 (enum operand_parse_code): Add new immediate operands.
1014 (parse_operands): Account for new immediate operands.
1015 (check_cde_operand): New.
1016 (cde_coproc_enabled): New.
1017 (cde_coproc_pos): New.
1018 (cde_handle_coproc): New.
1019 (cxn_handle_predication): New.
1020 (do_custom_instruction_1): New.
1021 (do_custom_instruction_2): New.
1022 (do_custom_instruction_3): New.
1023 (do_cx1): New.
1024 (do_cx1a): New.
1025 (do_cx1d): New.
1026 (do_cx1da): New.
1027 (do_cx2): New.
1028 (do_cx2a): New.
1029 (do_cx2d): New.
1030 (do_cx2da): New.
1031 (do_cx3): New.
1032 (do_cx3a): New.
1033 (do_cx3d): New.
1034 (do_cx3da): New.
1035 (handle_pred_state): Define new IT block behaviour.
1036 (insns): Add newn CX*{,d}{,a} instructions.
1037 (CDE_EXTENSIONS,armv8m_main_ext_table,armv8_1m_main_ext_table):
1038 Define new cdecp extension strings.
1039 * doc/c-arm.texi: Document new cdecp extension arguments.
1040 * testsuite/gas/arm/cde-scalar.d: New test.
1041 * testsuite/gas/arm/cde-scalar.s: New test.
1042 * testsuite/gas/arm/cde-warnings.d: New test.
1043 * testsuite/gas/arm/cde-warnings.l: New test.
1044 * testsuite/gas/arm/cde-warnings.s: New test.
1045 * testsuite/gas/arm/cde.d: New test.
1046 * testsuite/gas/arm/cde.s: New test.
1047
1048 2020-02-10 H.J. Lu <hongjiu.lu@intel.com>
1049
1050 PR gas/25516
1051 * config/tc-i386.c (intel64): Renamed to ...
1052 (isa64): This.
1053 (match_template): Accept Intel64 only instruction by default.
1054 (i386_displacement): Updated.
1055 (md_parse_option): Updated.
1056 * c-i386.texi: Update -mamd64/-mintel64 documentation.
1057 * testsuite/gas/i386/i386.exp: Run x86-64-sysenter. Pass
1058 -mamd64 to x86-64-sysenter-amd.
1059 * testsuite/gas/i386/x86-64-sysenter.d: New file.
1060
1061 2020-02-10 Alan Modra <amodra@gmail.com>
1062
1063 * config/obj-elf.c (obj_elf_change_section): Error for section
1064 type, attr or entsize changes in assembly.
1065 * testsuite/gas/elf/elf.exp: Pass -Z to gas for section5 test.
1066 * testsuite/gas/elf/section5.l: Update.
1067
1068 2020-02-10 Alan Modra <amodra@gmail.com>
1069
1070 * output-file.c (output_file_close): Do a normal close when
1071 flag_always_generate_output.
1072 * write.c (write_object_file): Don't stop output when
1073 flag_always_generate_output.
1074
1075 2020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
1076
1077 PR 25469
1078 * config/tc-z80.c: Add -gbz80 command line option to generate code
1079 for the GameBoy Z80. Add support for generating DWARF.
1080 * config/tc-z80.h: Add support for DWARF debug information
1081 generation.
1082 * doc/c-z80.texi: Document new command line option.
1083 * testsuite/gas/z80/gbz80_all.d: New file.
1084 * testsuite/gas/z80/gbz80_all.s: New file.
1085 * testsuite/gas/z80/z80.exp: Run the new tests.
1086 * testsuite/gas/z80/z80n_all.d: New file.
1087 * testsuite/gas/z80/z80n_all.s: New file.
1088 * testsuite/gas/z80/z80n_reloc.d: New file.
1089
1090 2020-02-06 H.J. Lu <hongjiu.lu@intel.com>
1091
1092 PR gas/25381
1093 * config/obj-elf.c (get_section): Also check
1094 linked_to_symbol_name.
1095 (obj_elf_change_section): Also set map_head.linked_to_symbol_name.
1096 (obj_elf_parse_section_letters): Handle the 'o' flag.
1097 (build_group_lists): Renamed to ...
1098 (build_additional_section_info): This. Set elf_linked_to_section
1099 from map_head.linked_to_symbol_name.
1100 (elf_adjust_symtab): Updated.
1101 * config/obj-elf.h (elf_section_match): Add linked_to_symbol_name.
1102 * doc/as.texi: Document the 'o' flag.
1103 * testsuite/gas/elf/elf.exp: Run PR gas/25381 tests.
1104 * testsuite/gas/elf/section18.d: New file.
1105 * testsuite/gas/elf/section18.s: Likewise.
1106 * testsuite/gas/elf/section19.d: Likewise.
1107 * testsuite/gas/elf/section19.s: Likewise.
1108 * testsuite/gas/elf/section20.d: Likewise.
1109 * testsuite/gas/elf/section20.s: Likewise.
1110 * testsuite/gas/elf/section21.d: Likewise.
1111 * testsuite/gas/elf/section21.l: Likewise.
1112 * testsuite/gas/elf/section21.s: Likewise.
1113
1114 2020-02-06 H.J. Lu <hongjiu.lu@intel.com>
1115
1116 * NEWS: Mention x86 assembler options to align branches for
1117 binutils 2.34.
1118
1119 2020-02-06 H.J. Lu <hongjiu.lu@intel.com>
1120
1121 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique
1122 only for ELF targets.
1123 * testsuite/gas/i386/unique.d: Don't xfail.
1124 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1125
1126 2020-02-06 Alan Modra <amodra@gmail.com>
1127
1128 * testsuite/gas/i386/unique.d: xfail for non-elf targets.
1129 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1130
1131 2020-02-06 Alan Modra <amodra@gmail.com>
1132
1133 * testsuite/gas/elf/section12a.d: Use supports_gnu_osabi in
1134 xfail, and rename test.
1135 * testsuite/gas/elf/section12b.d: Likewise.
1136 * testsuite/gas/elf/section16a.d: Likewise.
1137 * testsuite/gas/elf/section16b.d: Likewise.
1138
1139 2020-02-02 H.J. Lu <hongjiu.lu@intel.com>
1140
1141 PR gas/25380
1142 * config/obj-elf.c (section_match): Removed.
1143 (get_section): Also match SEC_ASSEMBLER_SECTION_ID and
1144 section_id.
1145 (obj_elf_change_section): Replace info and group_name arguments
1146 with match_p. Also update the section ID and flags from match_p.
1147 (obj_elf_section): Handle "unique,N". Update call to
1148 obj_elf_change_section.
1149 * config/obj-elf.h (elf_section_match): New.
1150 (obj_elf_change_section): Updated.
1151 * config/tc-arm.c (start_unwind_section): Update call to
1152 obj_elf_change_section.
1153 * config/tc-ia64.c (obj_elf_vms_common): Likewise.
1154 * config/tc-microblaze.c (microblaze_s_data): Likewise.
1155 (microblaze_s_sdata): Likewise.
1156 (microblaze_s_rdata): Likewise.
1157 (microblaze_s_bss): Likewise.
1158 * config/tc-mips.c (s_change_section): Likewise.
1159 * config/tc-msp430.c (msp430_profiler): Likewise.
1160 * config/tc-rx.c (parse_rx_section): Likewise.
1161 * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
1162 * doc/as.texi: Document "unique,N" in .section directive.
1163 * testsuite/gas/elf/elf.exp: Run "unique,N" tests.
1164 * testsuite/gas/elf/section15.d: New file.
1165 * testsuite/gas/elf/section15.s: Likewise.
1166 * testsuite/gas/elf/section16.s: Likewise.
1167 * testsuite/gas/elf/section16a.d: Likewise.
1168 * testsuite/gas/elf/section16b.d: Likewise.
1169 * testsuite/gas/elf/section17.d: Likewise.
1170 * testsuite/gas/elf/section17.l: Likewise.
1171 * testsuite/gas/elf/section17.s: Likewise.
1172 * testsuite/gas/i386/unique.d: Likewise.
1173 * testsuite/gas/i386/unique.s: Likewise.
1174 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1175 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.
1176
1177 2020-02-02 H.J. Lu <hongjiu.lu@intel.com>
1178
1179 * testsuite/gas/elf/section13.s: Replace @nobits with %nobits.
1180
1181 2020-02-01 Anthony Green <green@moxielogic.com>
1182
1183 * config/tc-moxie.c (md_begin): Don't force big-endian mode.
1184
1185 2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
1186
1187 * config/tc-nios2.c (nios2_cons): Handle %gotoff as well as
1188 %tls_ldo.
1189
1190 2020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
1191
1192 PR gas/25472
1193 * config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
1194 (armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
1195 +mve.
1196 * testsuite/gas/arm/mve_dsp.d: New test.
1197
1198 2020-01-31 Nick Clifton <nickc@redhat.com>
1199
1200 * config/tc-s390.c (s390_elf_suffix): Return ELF_SUFFIX_NONE
1201 rather than BFD_RELOC_NONE.
1202
1203 2020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
1204
1205 * config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
1206 to support VLDMIA instruction for MVE.
1207 (fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
1208 instruction for MVE.
1209 (fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
1210 instruction for MVE.
1211 (fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
1212 instruction for MVE.
1213 * testsuite/gas/arm/mve-ldst.d: New test.
1214 * testsuite/gas/arm/mve-ldst.s: Likewise.
1215
1216 2020-01-31 Nick Clifton <nickc@redhat.com>
1217
1218 * po/fr.po: Updated French translation.
1219 * po/ru.po: Updated Russian translation.
1220
1221 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
1222
1223 * testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
1224 .s for the movprfx.
1225 * testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
1226 * testsuite/gas/aarch64/sve-movprfx_28.d,
1227 * testsuite/gas/aarch64/sve-movprfx_28.l,
1228 * testsuite/gas/aarch64/sve-movprfx_28.s: New test.
1229
1230 2020-01-30 Jan Beulich <jbeulich@suse.com>
1231
1232 * config/tc-i386.c (output_disp): Tighten base_opcode check.
1233 * testsuite/gas/i386/got.s: Add LSL, MOVLPS, and BNDCN cases.
1234 * testsuite/gas/i386/got-no-relax.d, testsuite/gas/i386/got.d:
1235 Adjust expectations.
1236
1237 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
1238
1239 * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'.
1240 * testsuite/gas/bpf/alu-be.d: Likewise.
1241 * testsuite/gas/bpf/alu32.d: Likewise for `neg32'.
1242 * testsuite/gas/bpf/alu32-be.d: Likewise.
1243
1244 2020-01-30 Jan Beulich <jbeulich@suse.com>
1245
1246 * testsuite/gas/i386/x86-64-branch-2.s,
1247 testsuite/gas/i386/x86-64-branch-4.s,
1248 testsuite/gas/i386/x86-64-branch.s: Add RETW cases.
1249 * testsuite/gas/i386/ilp32/x86-64-branch.d,
1250 testsuite/gas/i386/x86-64-branch-2.d,
1251 testsuite/gas/i386/x86-64-branch-4.l,
1252 testsuite/gas/i386/x86-64-branch.d: Adjust expectations.
1253
1254 2020-01-30 Jan Beulich <jbeulich@suse.com>
1255
1256 * config/tc-i386.c (process_suffix): .
1257 testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
1258 testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
1259 Add LRETQ case.
1260 testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
1261 suffix.
1262 testsuite/gas/i386/x86_64.s: Add RETF cases.
1263 * testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
1264 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
1265 testsuite/gas/i386/x86-64-opcode.d,
1266 testsuite/gas/i386/x86-64-suffix-intel.d,
1267 testsuite/gas/i386/x86-64-suffix.d,
1268 testsuite/gas/i386/x86_64-intel.d
1269 testsuite/gas/i386/x86_64.d: Adjust expectations.
1270 * testsuite/gas/i386/x86-64-suffix.e,
1271 testsuite/gas/i386/x86_64.e: New.
1272
1273 2020-01-30 Jan Beulich <jbeulich@suse.com>
1274
1275 * config/tc-i386.c (process_suffix): Redo and move FLDENV et al
1276 special case.
1277
1278 2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
1279
1280 PR binutils/25445
1281 * config/tc-i386.c (check_long_reg): Also convert to QWORD for
1282 movsxd.
1283 * doc/c-i386.texi: Add a node for AMD64 vs. Intel64 ISA
1284 differences. Document movslq and movsxd.
1285 * testsuite/gas/i386/i386.exp: Run PR binutils/25445 tests.
1286 * testsuite/gas/i386/x86-64-movsxd-intel.d: New file.
1287 * testsuite/gas/i386/x86-64-movsxd-intel64-intel.d: Likewise.
1288 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.l: Likewise.
1289 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.s: Likewise.
1290 * testsuite/gas/i386/x86-64-movsxd-intel64.d: Likewise.
1291 * testsuite/gas/i386/x86-64-movsxd-intel64.s: Likewise.
1292 * testsuite/gas/i386/x86-64-movsxd-inval.l: Likewise.
1293 * testsuite/gas/i386/x86-64-movsxd-inval.s: Likewise.
1294 * testsuite/gas/i386/x86-64-movsxd.d: Likewise.
1295 * testsuite/gas/i386/x86-64-movsxd.s: Likewise.
1296
1297 2020-01-27 Alan Modra <amodra@gmail.com>
1298
1299 * testsuite/gas/all/gas.exp: Replace case statements with switch
1300 statements.
1301 * testsuite/gas/elf/elf.exp: Likewise.
1302 * testsuite/gas/macros/macros.exp: Likewise.
1303 * testsuite/lib/gas-defs.exp: Likewise.
1304
1305 2020-01-27 Tamar Christina <tamar.christina@arm.com>
1306
1307 PR 25403
1308 * testsuite/gas/aarch64/armv8_4-a.d: Add cfinv.
1309 * testsuite/gas/aarch64/armv8_4-a.s: Likewise.
1310
1311 2020-01-22 Maxim Blinov <maxim.blinov@embecosm.com>
1312
1313 * testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and
1314 s exts must be known, so rename *ok* to *fail*.
1315 * testsuite/gas/riscv/march-ok-sx.d: Likewise.
1316 * testsuite/gas/riscv/march-ok-s-with-version: Likewise.
1317 * testsuite/gas/riscv/march-fail-s.l: Expected error messages for
1318 above change.
1319 * testsuite/gas/riscv/march-fail-sx.l: Likewise.
1320 * testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise.
1321
1322 2020-01-22 H.J. Lu <hongjiu.lu@intel.com>
1323
1324 PR gas/25438
1325 * config/tc-i386.c (check_long_reg): Always disallow double word
1326 suffix in mnemonic with word general register.
1327 * testsuite/gas/i386/general.s: Replace word general register
1328 with double word general register for movl.
1329 * testsuite/gas/i386/inval.s: Add tests for movl with word general
1330 register.
1331 * testsuite/gas/i386/general.l: Updated.
1332 * testsuite/gas/i386/inval.l: Likewise.
1333
1334 2020-01-22 Alan Modra <amodra@gmail.com>
1335
1336 * config/tc-ppc.c (parse_tls_arg): Handle tls arg for
1337 __tls_get_addr_desc and __tls_get_addr_opt.
1338
1339 2020-01-21 Jan Beulich <jbeulich@suse.com>
1340
1341 * testsuite/gas/i386/inval-crc32.s,
1342 testsuite/gas/i386/x86-64-inval-crc32.s: Add alignment directive.
1343 * testsuite/gas/i386/inval-crc32.l,
1344 testsuite/gas/i386/x86-64-inval-crc32.l: Adjust expectations.
1345
1346 2020-01-21 Jan Beulich <jbeulich@suse.com>
1347
1348 * config/tc-i386.c (process_suffix): Merge CRC32 handling into
1349 generic code path. Deal with No_lSuf being set in a template.
1350 * testsuite/gas/i386/inval-crc32.l,
1351 testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s)
1352 instead of error(s) when operand size is ambiguous.
1353 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1354 testsuite/gas/i386/noreg64.s: Add CRC32 tests.
1355 * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l,
1356 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l,
1357 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l:
1358 Adjust expectations.
1359
1360 2020-01-21 Jan Beulich <jbeulich@suse.com>
1361
1362 * config/tc-i386.c (process_suffix): Drop SYSRET special case
1363 and an intel_syntax check. Re-write lack-of-suffix processing
1364 logic.
1365 * doc/c-i386.texi: Document operand size defaults for suffix-
1366 less AT&T syntax insns.
1367 * testsuite/gas/i386/bundle.s, testsuite/gas/i386/lock-1.s,
1368 testsuite/gas/i386/opcode.s, testsuite/gas/i386/sse3.s,
1369 testsuite/gas/i386/x86-64-avx-scalar.s,
1370 testsuite/gas/i386/x86-64-avx.s,
1371 testsuite/gas/i386/x86-64-bundle.s,
1372 testsuite/gas/i386/x86-64-intel64.s,
1373 testsuite/gas/i386/x86-64-lock-1.s,
1374 testsuite/gas/i386/x86-64-opcode.s,
1375 testsuite/gas/i386/x86-64-sse2avx.s,
1376 testsuite/gas/i386/x86-64-sse3.s: Add missing suffixes.
1377 * testsuite/gas/i386/nops.s, testsuite/gas/i386/sse-noavx.s,
1378 testsuite/gas/i386/x86-64-nops.s,
1379 testsuite/gas/i386/x86-64-ptwrite.s,
1380 testsuite/gas/i386/x86-64-simd.s,
1381 testsuite/gas/i386/x86-64-sse-noavx.s,
1382 testsuite/gas/i386/x86-64-suffix.s: Drop bogus suffix-less
1383 insns.
1384 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1385 testsuite/gas/i386/noreg64.s: Add further tests.
1386 * testsuite/gas/i386/ilp32/x86-64-nops.d,
1387 testsuite/gas/i386/nops.d, testsuite/gas/i386/noreg16.d,
1388 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
1389 testsuite/gas/i386/sse-noavx.d,
1390 testsuite/gas/i386/x86-64-intel64.d,
1391 testsuite/gas/i386/x86-64-nops.d,
1392 testsuite/gas/i386/x86-64-opcode.d,
1393 testsuite/gas/i386/x86-64-ptwrite-intel.d,
1394 testsuite/gas/i386/x86-64-ptwrite.d,
1395 testsuite/gas/i386/x86-64-simd-intel.d,
1396 testsuite/gas/i386/x86-64-simd-suffix.d,
1397 testsuite/gas/i386/x86-64-simd.d,
1398 testsuite/gas/i386/x86-64-sse-noavx.d
1399 testsuite/gas/i386/x86-64-suffix.d,
1400 testsuite/gas/i386/x86-64-suffix-intel.d: Adjust expectations.
1401 * testsuite/gas/i386/noreg16.l, testsuite/gas/i386/noreg32.l,
1402 testsuite/gas/i386/noreg64.l: New.
1403 * testsuite/gas/i386/i386.exp: Run new tests.
1404
1405 2020-01-21 Jan Beulich <jbeulich@suse.com>
1406
1407 * testsuite/gas/i386/avx512_bf16_vl.s,
1408 testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Add broadcast forms
1409 of VCVTNEPS2BF16{X,Y}. Add operand-size less Intel syntax
1410 broadcast forms of VCVTNEPS2BF16.
1411 * testsuite/gas/i386/avx512_bf16_vl.d,
1412 testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Adjust expectations.
1413
1414 2020-01-20 Nick Clifton <nickc@redhat.com>
1415
1416 * po/uk.po: Updated Ukranian translation.
1417
1418 2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
1419
1420 PR ld/25416
1421 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
1422 for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
1423 x32 object.
1424 * testsuite/gas/i386/ilp32/x32-tls.d: Updated.
1425 * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
1426 R_X86_64_GOTPC32_TLSDESC relocation.
1427
1428 2020-01-18 Nick Clifton <nickc@redhat.com>
1429
1430 * configure: Regenerate.
1431 * po/gas.pot: Regenerate.
1432
1433 2020-01-18 Nick Clifton <nickc@redhat.com>
1434
1435 Binutils 2.34 branch created.
1436
1437 2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
1438
1439 * config/tc-i386.c (_i386_insn): Replace vex_encoding_vex2
1440 with vex_encoding_vex.
1441 (parse_insn): Likewise.
1442 * doc/c-i386.texi: Replace {vex2} with {vex}. Update {vex}
1443 and {vex3} documentation.
1444 * testsuite/gas/i386/pseudos.s: Replace 3 {vex2} tests with
1445 {vex}.
1446 * testsuite/gas/i386/x86-64-pseudos.s: Likewise.
1447
1448 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
1449
1450 PR 25376
1451 * config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
1452 (armv8_1m_main_ext_table): Use CORE_HIGH for mve.
1453 * testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
1454 * testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
1455 * testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
1456 * testsuite/arm/armv8_1-m-fpu-mve-2.d: New.
1457
1458 2020-01-16 Jan Beulich <jbeulich@suse.com>
1459
1460 * config/tc-i386.c (match_template): Drop found_cpu_match local
1461 variable.
1462
1463 2020-01-16 Jan Beulich <jbeulich@suse.com>
1464
1465 * testsuite/gas/i386/avx512dq-inval.l,
1466 testsuite/gas/i386/avx512dq-inval.s: New.
1467 * testsuite/gas/i386/i386.exp: Run new test.
1468
1469 2020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1470
1471 * config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
1472 relocations when the target is 430X, except when extracting part of an
1473 expression.
1474 (msp430_srcoperand): Adjust comment.
1475 Initialize the expp member of the msp430_operand_s struct as
1476 appropriate.
1477 (msp430_dstoperand): Likewise.
1478 * testsuite/gas/msp430/msp430.exp: Run new test.
1479 * testsuite/gas/msp430/reloc-lo-430x.d: New test.
1480 * testsuite/gas/msp430/reloc-lo-430x.s: New test.
1481
1482 2020-01-15 Alan Modra <amodra@gmail.com>
1483
1484 * configure.tgt: Add sparc-*-freebsd case.
1485
1486 2020-01-14 Lili Cui <lili.cui@intel.com>
1487
1488 * testsuite/gas/i386/align-branch-1a.d: Updated for Darwin.
1489 * testsuite/gas/i386/align-branch-1b.d: Likewise.
1490 * testsuite/gas/i386/align-branch-1c.d: Likewise.
1491 * testsuite/gas/i386/align-branch-1d.d: Likewise.
1492 * testsuite/gas/i386/align-branch-1e.d: Likewise.
1493 * testsuite/gas/i386/align-branch-1f.d: Likewise.
1494 * testsuite/gas/i386/align-branch-1g.d: Likewise.
1495 * testsuite/gas/i386/align-branch-1h.d: Likewise.
1496 * testsuite/gas/i386/align-branch-1i.d: Likewise.
1497 * testsuite/gas/i386/align-branch-5.d: Likewise.
1498 * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
1499 * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
1500 * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
1501 * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
1502 * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
1503 * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
1504 * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
1505 * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
1506 * testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise.
1507 * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
1508 * testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a,
1509 x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin.
1510
1511 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
1512
1513 PR 25377
1514 * config/tc-z80.c: Add support for half precision, single
1515 precision and double precision floating point values.
1516 * config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes.
1517 * doc/as.texi: Add new z80 command line options.
1518 * doc/c-z80.texi: Document new z80 command line options.
1519 * testsuite/gas/z80/ez80_pref_dis.s: New test.
1520 * testsuite/gas/z80/ez80_pref_dis.d: New test driver.
1521 * testsuite/gas/z80/z80.exp: Run the new test.
1522 * testsuite/gas/z80/fp_math48.d: Use correct command line option.
1523 * testsuite/gas/z80/fp_zeda32.d: Likewise.
1524 * testsuite/gas/z80/strings.d: Update expected output.
1525
1526 2020-01-13 Matthew Malcomson <matthew.malcomson@arm.com>
1527
1528 * config/tc-aarch64.c (f64mm, f32mm): Add sve as a feature
1529 dependency.
1530
1531 2020-01-13 Claudiu Zissulescu <claziss@gmail.com>
1532
1533 * config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change
1534 the CPU.
1535 * config/tc-arc.h: Add header if/defs.
1536 * testsuite/gas/arc/pseudos.d: Improve matching pattern.
1537
1538 2020-01-13 Alan Modra <amodra@gmail.com>
1539
1540 * testsuite/gas/wasm32/allinsn.d: Update expected output.
1541
1542 2020-01-13 Alan Modra <amodra@gmail.com>
1543
1544 * config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
1545 insertion.
1546
1547 2020-01-10 Alan Modra <amodra@gmail.com>
1548
1549 * testsuite/gas/elf/pr14891.s: Don't start directives in first column.
1550 * testsuite/gas/elf/pr21661.d: Don't run on hpux.
1551
1552 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1553
1554 PR 25224
1555 * config/tc-z80.c (emit_ld_m_rr): Use integer types when checking
1556 opcode byte values.
1557 (emit_ld_r_r): Likewise.
1558 (emit_ld_rr_m): Likewise.
1559 (emit_ld_rr_nn): Likewise.
1560
1561 2020-01-09 Jan Beulich <jbeulich@suse.com>
1562
1563 * config/tc-i386.c (optimize_encoding): Add
1564 is_any_vex_encoding() invocations. Drop respective
1565 i.tm.extension_opcode == None checks.
1566
1567 2020-01-09 Jan Beulich <jbeulich@suse.com>
1568
1569 * config/tc-i386.c (md_assemble): Check RegRex is clear during
1570 REX transformations. Correct comment indentation.
1571
1572 2020-01-09 Jan Beulich <jbeulich@suse.com>
1573
1574 * config/tc-i386.c (optimize_encoding): Generalize register
1575 transformation for TEST optimization.
1576
1577 2020-01-09 Jan Beulich <jbeulich@suse.com>
1578
1579 * testsuite/gas/i386/x86-64-sysenter-amd.s,
1580 testsuite/gas/i386/x86-64-sysenter-amd.d,
1581 testsuite/gas/i386/x86-64-sysenter-amd.l,
1582 testsuite/gas/i386/x86-64-sysenter-intel.d,
1583 testsuite/gas/i386/x86-64-sysenter-mixed.d: New.
1584 * testsuite/gas/i386/i386.exp: Run new tests.
1585
1586 2020-01-08 Nick Clifton <nickc@redhat.com>
1587
1588 PR 25284
1589 * doc/as.texi (Align): Document the fact that all arguments can be
1590 omitted.
1591 (Balign): Likewise.
1592 (P2align): Likewise.
1593
1594 2020-01-08 Nick Clifton <nickc@redhat.com>
1595
1596 PR 14891
1597 * config/obj-elf.c (obj_elf_section): Fail if the section name is
1598 already defined as a different symbol type.
1599 * testsuite/gas/elf/pr14891.s: New test source file.
1600 * testsuite/gas/elf/pr14891.d: New test driver.
1601 * testsuite/gas/elf/pr14891.s: New test expected error output.
1602 * testsuite/gas/elf/elf.exp: Run the new test.
1603
1604 2020-01-08 Alan Modra <amodra@gmail.com>
1605
1606 * config/tc-z8k.c (md_begin): Make idx unsigned.
1607 (get_specific): Likewise for this_index.
1608
1609 2020-01-07 Claudiu Zissulescu <claziss@synopsys.com>
1610
1611 * onfig/tc-arc.c (parse_reloc_symbol): New function.
1612 (tokenize_arguments): Clean up, use parse_reloc_symbol function.
1613 (md_operand): Set X_md to absent.
1614 (arc_parse_name): Check for X_md.
1615
1616 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1617
1618 PR 25311
1619 * as.h (TC_STRING_ESCAPES): Provide a default definition.
1620 * app.c (do_scrub_chars): Use TC_STRING_ESCAPES instead of
1621 NO_STRING_ESCAPES.
1622 * read.c (next_char_of_string): Likewise.
1623 * config/tc-ppc.h (TC_STRING_ESCAPES): Define.
1624 * config/tc-z80.h (TC_STRING_ESCAPES): Define.
1625
1626 2020-01-03 Nick Clifton <nickc@redhat.com>
1627
1628 * po/sv.po: Updated Swedish translation.
1629
1630 2020-01-03 Jan Beulich <jbeulich@suse.com>
1631
1632 * testsuite/gas/aarch64/f64mm.s: Scale index of LD1RO{H,W,D}.
1633 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1634
1635 2020-01-03 Jan Beulich <jbeulich@suse.com>
1636
1637 * testsuite/gas/aarch64/i8mm.s: Add 128-bit form tests for
1638 by-element usdot. Add 64-bit form tests for by-element sudot.
1639 * testsuite/gas/aarch64/i8mm.d: Adjust expectations.
1640
1641 2020-01-03 Jan Beulich <jbeulich@suse.com>
1642
1643 * testsuite/gas/aarch64/f64mm.s: Drop 'i' from uzip<n>.
1644 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1645
1646 2020-01-03 Jan Beulich <jbeulich@suse.com>
1647
1648 * testsuite/gas/aarch64/f64mm.d,
1649 testsuite/gas/aarch64/sve-movprfx-mm.d: Adjust expectations.
1650
1651 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
1652
1653 * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add
1654 support for assembler code generated by SDCC. Add new relocation
1655 types. Add z80-elf target support.
1656 * config/tc-z80.h: Add z80-elf target support. Enable dollar local
1657 labels. Local labels starts from ".L".
1658 * NEWS: Mention the new support.
1659 * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
1660 * testsuite/gas/all/fwdexp.s: Likewise.
1661 * testsuite/gas/all/cond.l: Likewise.
1662 * testsuite/gas/all/cond.s: Likewise.
1663 * testsuite/gas/all/fwdexp.d: Likewise.
1664 * testsuite/gas/all/fwdexp.s: Likewise.
1665 * testsuite/gas/elf/section2.e-mips: Likewise.
1666 * testsuite/gas/elf/section2.l: Likewise.
1667 * testsuite/gas/elf/section2.s: Likewise.
1668 * testsuite/gas/macros/app1.d: Likewise.
1669 * testsuite/gas/macros/app1.s: Likewise.
1670 * testsuite/gas/macros/app2.d: Likewise.
1671 * testsuite/gas/macros/app2.s: Likewise.
1672 * testsuite/gas/macros/app3.d: Likewise.
1673 * testsuite/gas/macros/app3.s: Likewise.
1674 * testsuite/gas/macros/app4.d: Likewise.
1675 * testsuite/gas/macros/app4.s: Likewise.
1676 * testsuite/gas/macros/app4b.s: Likewise.
1677 * testsuite/gas/z80/suffix.d: Fix failure on ELF target.
1678 * testsuite/gas/z80/z80.exp: Add new tests
1679 * testsuite/gas/z80/dollar.d: New file.
1680 * testsuite/gas/z80/dollar.s: New file.
1681 * testsuite/gas/z80/ez80_adl_all.d: New file.
1682 * testsuite/gas/z80/ez80_adl_all.s: New file.
1683 * testsuite/gas/z80/ez80_adl_suf.d: New file.
1684 * testsuite/gas/z80/ez80_isuf.s: New file.
1685 * testsuite/gas/z80/ez80_z80_all.d: New file.
1686 * testsuite/gas/z80/ez80_z80_all.s: New file.
1687 * testsuite/gas/z80/ez80_z80_suf.d: New file.
1688 * testsuite/gas/z80/r800_extra.d: New file.
1689 * testsuite/gas/z80/r800_extra.s: New file.
1690 * testsuite/gas/z80/r800_ii8.d: New file.
1691 * testsuite/gas/z80/r800_z80_doc.d: New file.
1692 * testsuite/gas/z80/z180.d: New file.
1693 * testsuite/gas/z80/z180.s: New file.
1694 * testsuite/gas/z80/z180_z80_doc.d: New file.
1695 * testsuite/gas/z80/z80_doc.d: New file.
1696 * testsuite/gas/z80/z80_doc.s: New file.
1697 * testsuite/gas/z80/z80_ii8.d: New file.
1698 * testsuite/gas/z80/z80_ii8.s: New file.
1699 * testsuite/gas/z80/z80_in_f_c.d: New file.
1700 * testsuite/gas/z80/z80_in_f_c.s: New file.
1701 * testsuite/gas/z80/z80_op_ii_ld.d: New file.
1702 * testsuite/gas/z80/z80_op_ii_ld.s: New file.
1703 * testsuite/gas/z80/z80_out_c_0.d: New file.
1704 * testsuite/gas/z80/z80_out_c_0.s: New file.
1705 * testsuite/gas/z80/z80_reloc.d: New file.
1706 * testsuite/gas/z80/z80_reloc.s: New file.
1707 * testsuite/gas/z80/z80_sli.d: New file.
1708 * testsuite/gas/z80/z80_sli.s: New file.
1709
1710 2020-01-02 Szabolcs Nagy <szabolcs.nagy@arm.com>
1711
1712 * config/tc-arm.c (parse_reg_list): Use REG_TYPE_RN instead of
1713 REGLIST_RN.
1714
1715 2020-01-01 Alan Modra <amodra@gmail.com>
1716
1717 Update year range in copyright notice of all files.
1718
1719 For older changes see ChangeLog-2019
1720 \f
1721 Copyright (C) 2020 Free Software Foundation, Inc.
1722
1723 Copying and distribution of this file, with or without modification,
1724 are permitted in any medium without royalty provided the copyright
1725 notice and this notice are preserved.
1726
1727 Local Variables:
1728 mode: change-log
1729 left-margin: 8
1730 fill-column: 74
1731 version-control: never
1732 End:
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