1 2006-08-04 Richard Sandiford <richard@codesourcery.com>
3 * config/tc-sh.c (apply_full_field_fix): New function.
4 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
5 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
6 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
7 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
9 2006-08-03 Nick Clifton <nickc@redhat.com>
12 * config.in: Regenerate.
14 2006-08-03 Joseph Myers <joseph@codesourcery.com>
16 * config/tc-arm.c (parse_operands): Handle invalid register name
19 2006-08-03 Joseph Myers <joseph@codesourcery.com>
21 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
22 (parse_operands): Handle it.
23 (insns): Use it for tmcr and tmrc.
25 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
28 * config/tc-i386.c (md_parse_option): Treat any target starting
29 with elf64_x86_64 as a viable target for the -64 switch.
30 (i386_target_format): For 64-bit ELF flavoured output use
32 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
34 2006-08-02 Nick Clifton <nickc@redhat.com>
37 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
39 * configure.in: Run BFD_BINARY_FOPEN.
40 * configure: Regenerate.
41 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
44 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
46 * config/tc-i386.c (md_assemble): Don't update
49 2006-08-01 Thiemo Seufer <ths@mips.com>
51 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
53 2006-08-01 Thiemo Seufer <ths@mips.com>
55 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
56 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
57 BFD_RELOC_32 and BFD_RELOC_16.
58 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
59 md_convert_frag, md_obj_end): Fix comment formatting.
61 2006-07-31 Thiemo Seufer <ths@mips.com>
63 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
64 handling for BFD_RELOC_MIPS16_JMP.
66 2006-07-24 Andreas Schwab <schwab@suse.de>
69 * read.c (read_a_source_file): Ignore unknown text after line
70 comment character. Fix misleading comment.
72 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
74 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
75 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
76 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
77 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
78 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
79 doc/c-z80.texi, doc/internals.texi: Fix some typos.
81 2006-07-21 Nick Clifton <nickc@redhat.com>
83 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
86 2006-07-20 Thiemo Seufer <ths@mips.com>
87 Nigel Stephens <nigel@mips.com>
89 * config/tc-mips.c (md_parse_option): Don't infer optimisation
90 options from debug options.
92 2006-07-20 Thiemo Seufer <ths@mips.com>
94 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
95 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
97 2006-07-19 Paul Brook <paul@codesourcery.com>
99 * config/tc-arm.c (insns): Fix rbit Arm opcode.
101 2006-07-18 Paul Brook <paul@codesourcery.com>
103 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
104 (md_convert_frag): Use correct reloc for add_pc. Use
105 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
106 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
107 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
109 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
111 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
112 when file and line unknown.
114 2006-07-17 Thiemo Seufer <ths@mips.com>
116 * read.c (s_struct): Use IS_ELF.
117 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
118 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
119 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
120 s_mips_mask): Likewise.
122 2006-07-16 Thiemo Seufer <ths@mips.com>
123 David Ung <davidu@mips.com>
125 * read.c (s_struct): Handle ELF section changing.
126 * config/tc-mips.c (s_align): Leave enabling auto-align to the
128 (s_change_sec): Try section changing only if we output ELF.
130 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
132 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
134 (smallest_imm_type): Remove Cpu086.
135 (i386_target_format): Likewise.
137 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
140 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
141 Michael Meissner <michael.meissner@amd.com>
143 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
144 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
145 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
147 (i386_align_code): Ditto.
148 (md_assemble_code): Add support for insertq/extrq instructions,
149 swapping as needed for intel syntax.
150 (swap_imm_operands): New function to swap immediate operands.
151 (swap_operands): Deal with 4 operand instructions.
152 (build_modrm_byte): Add support for insertq instruction.
154 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
156 * config/tc-i386.h (Size64): Fix a typo in comment.
158 2006-07-12 Nick Clifton <nickc@redhat.com>
160 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
161 fixup_segment() to repeat a range check on a value that has
162 already been checked here.
164 2006-07-07 James E Wilson <wilson@specifix.com>
166 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
168 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
169 Nick Clifton <nickc@redhat.com>
172 * doc/as.texi: Fix spelling typo: branchs => branches.
173 * doc/c-m68hc11.texi: Likewise.
174 * config/tc-m68hc11.c: Likewise.
175 Support old spelling of command line switch for backwards
178 2006-07-04 Thiemo Seufer <ths@mips.com>
179 David Ung <davidu@mips.com>
181 * config/tc-mips.c (s_is_linkonce): New function.
182 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
183 weak, external, and linkonce symbols.
184 (pic_need_relax): Use s_is_linkonce.
186 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
188 * doc/as.texinfo (Org): Remove space.
189 (P2align): Add "@var{abs-expr},".
191 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
193 * config/tc-i386.c (cpu_arch_tune_set): New.
194 (cpu_arch_isa): Likewise.
195 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
196 nops with short or long nop sequences based on -march=/.arch
198 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
199 set cpu_arch_tune and cpu_arch_tune_flags.
200 (md_parse_option): For -march=, set cpu_arch_isa and set
201 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
202 0. Set cpu_arch_tune_set to 1 for -mtune=.
203 (i386_target_format): Don't set cpu_arch_tune.
205 2006-06-23 Nigel Stephens <nigel@mips.com>
207 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
208 generated .sbss.* and .gnu.linkonce.sb.*.
210 2006-06-23 Thiemo Seufer <ths@mips.com>
211 David Ung <davidu@mips.com>
213 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
215 * config/tc-mips.c (label_list): Define per-segment label_list.
216 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
217 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
218 mips_from_file_after_relocs, mips_define_label): Use per-segment
221 2006-06-22 Thiemo Seufer <ths@mips.com>
223 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
224 (append_insn): Use it.
225 (md_apply_fix): Whitespace formatting.
226 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
227 mips16_extended_frag): Remove register specifier.
228 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
231 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
233 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
234 a directive saving VFP registers for ARMv6 or later.
235 (s_arm_unwind_save): Add parameter arch_v6 and call
236 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
238 (md_pseudo_table): Add entry for new "vsave" directive.
239 * doc/c-arm.texi: Correct error in example for "save"
240 directive (fstmdf -> fstmdx). Also document "vsave" directive.
242 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
243 Anatoly Sokolov <aesok@post.ru>
245 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
246 and atmega644p devices. Rename atmega164/atmega324 devices to
247 atmega164p/atmega324p.
248 * doc/c-avr.texi: Document new mcu and arch options.
250 2006-06-17 Nick Clifton <nickc@redhat.com>
252 * config/tc-arm.c (enum parse_operand_result): Move outside of
253 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
255 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
257 * config/tc-i386.h (processor_type): New.
258 (arch_entry): Add type.
260 * config/tc-i386.c (cpu_arch_tune): New.
261 (cpu_arch_tune_flags): Likewise.
262 (cpu_arch_isa_flags): Likewise.
264 (set_cpu_arch): Also update cpu_arch_isa_flags.
265 (md_assemble): Update cpu_arch_isa_flags.
267 (OPTION_MTUNE): Likewise.
268 (md_longopts): Add -march= and -mtune=.
269 (md_parse_option): Support -march= and -mtune=.
270 (md_show_usage): Add -march=CPU/-mtune=CPU.
271 (i386_target_format): Also update cpu_arch_isa_flags,
272 cpu_arch_tune and cpu_arch_tune_flags.
274 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
276 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
278 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
280 * config/tc-arm.c (enum parse_operand_result): New.
281 (struct group_reloc_table_entry): New.
282 (enum group_reloc_type): New.
283 (group_reloc_table): New array.
284 (find_group_reloc_table_entry): New function.
285 (parse_shifter_operand_group_reloc): New function.
286 (parse_address_main): New function, incorporating code
287 from the old parse_address function. To be used via...
288 (parse_address): wrapper for parse_address_main; and
289 (parse_address_group_reloc): new function, likewise.
290 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
291 OP_ADDRGLDRS, OP_ADDRGLDC.
292 (parse_operands): Support for these new operand codes.
293 New macro po_misc_or_fail_no_backtrack.
294 (encode_arm_cp_address): Preserve group relocations.
295 (insns): Modify to use the above operand codes where group
296 relocations are permitted.
297 (md_apply_fix): Handle the group relocations
298 ALU_PC_G0_NC through LDC_SB_G2.
299 (tc_gen_reloc): Likewise.
300 (arm_force_relocation): Leave group relocations for the linker.
301 (arm_fix_adjustable): Likewise.
303 2006-06-15 Julian Brown <julian@codesourcery.com>
305 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
306 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
309 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
311 * config/tc-i386.c (process_suffix): Don't add rex64 for
314 2006-06-09 Thiemo Seufer <ths@mips.com>
316 * config/tc-mips.c (mips_ip): Maintain argument count.
318 2006-06-09 Alan Modra <amodra@bigpond.net.au>
320 * config/tc-iq2000.c: Include sb.h.
322 2006-06-08 Nigel Stephens <nigel@mips.com>
324 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
325 aliases for better compatibility with SGI tools.
327 2006-06-08 Alan Modra <amodra@bigpond.net.au>
329 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
330 * Makefile.am (GASLIBS): Expand @BFDLIB@.
332 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
333 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
334 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
336 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
337 * Makefile.in: Regenerate.
338 * doc/Makefile.in: Regenerate.
339 * configure: Regenerate.
341 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
343 * po/Make-in (pdf, ps): New dummy targets.
345 2006-06-07 Julian Brown <julian@codesourcery.com>
347 * config/tc-arm.c (stdarg.h): include.
348 (arm_it): Add uncond_value field. Add isvec and issingle to operand
350 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
351 REG_TYPE_NSDQ (single, double or quad vector reg).
352 (reg_expected_msgs): Update.
353 (BAD_FPU): Add macro for unsupported FPU instruction error.
354 (parse_neon_type): Support 'd' as an alias for .f64.
355 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
357 (parse_vfp_reg_list): Don't update first arg on error.
358 (parse_neon_mov): Support extra syntax for VFP moves.
359 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
360 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
361 (parse_operands): Support isvec, issingle operands fields, new parse
363 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
365 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
366 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
367 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
368 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
370 (neon_shape): Redefine in terms of above.
371 (neon_shape_class): New enumeration, table of shape classes.
372 (neon_shape_el): New enumeration. One element of a shape.
373 (neon_shape_el_size): Register widths of above, where appropriate.
374 (neon_shape_info): New struct. Info for shape table.
375 (neon_shape_tab): New array.
376 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
377 (neon_check_shape): Rewrite as...
378 (neon_select_shape): New function to classify instruction shapes,
379 driven by new table neon_shape_tab array.
380 (neon_quad): New function. Return 1 if shape should set Q flag in
381 instructions (or equivalent), 0 otherwise.
382 (type_chk_of_el_type): Support F64.
383 (el_type_of_type_chk): Likewise.
384 (neon_check_type): Add support for VFP type checking (VFP data
385 elements fill their containing registers).
386 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
387 in thumb mode for VFP instructions.
388 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
389 and encode the current instruction as if it were that opcode.
390 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
391 arguments, call function in PFN.
392 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
393 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
394 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
395 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
396 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
397 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
398 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
399 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
400 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
401 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
402 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
403 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
404 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
405 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
406 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
408 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
409 between VFP and Neon turns out to belong to Neon. Perform
410 architecture check and fill in condition field if appropriate.
411 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
412 (do_neon_cvt): Add support for VFP variants of instructions.
413 (neon_cvt_flavour): Extend to cover VFP conversions.
414 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
416 (do_neon_ldr_str): Handle single-precision VFP load/store.
417 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
418 NS_NULL not NS_IGNORE.
419 (opcode_tag): Add OT_csuffixF for operands which either take a
420 conditional suffix, or have 0xF in the condition field.
421 (md_assemble): Add support for OT_csuffixF.
422 (NCE): Replace macro with...
423 (NCE_tag, NCE, NCEF): New macros.
424 (nCE): Replace macro with...
425 (nCE_tag, nCE, nCEF): New macros.
426 (insns): Add support for VFP insns or VFP versions of insns msr,
427 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
428 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
429 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
430 VFP/Neon insns together.
432 2006-06-07 Alan Modra <amodra@bigpond.net.au>
433 Ladislav Michl <ladis@linux-mips.org>
435 * app.c: Don't include headers already included by as.h.
437 * atof-generic.c: Likewise.
439 * dwarf2dbg.c: Likewise.
441 * input-file.c: Likewise.
442 * input-scrub.c: Likewise.
444 * output-file.c: Likewise.
447 * config/bfin-lex.l: Likewise.
448 * config/obj-coff.h: Likewise.
449 * config/obj-elf.h: Likewise.
450 * config/obj-som.h: Likewise.
451 * config/tc-arc.c: Likewise.
452 * config/tc-arm.c: Likewise.
453 * config/tc-avr.c: Likewise.
454 * config/tc-bfin.c: Likewise.
455 * config/tc-cris.c: Likewise.
456 * config/tc-d10v.c: Likewise.
457 * config/tc-d30v.c: Likewise.
458 * config/tc-dlx.h: Likewise.
459 * config/tc-fr30.c: Likewise.
460 * config/tc-frv.c: Likewise.
461 * config/tc-h8300.c: Likewise.
462 * config/tc-hppa.c: Likewise.
463 * config/tc-i370.c: Likewise.
464 * config/tc-i860.c: Likewise.
465 * config/tc-i960.c: Likewise.
466 * config/tc-ip2k.c: Likewise.
467 * config/tc-iq2000.c: Likewise.
468 * config/tc-m32c.c: Likewise.
469 * config/tc-m32r.c: Likewise.
470 * config/tc-maxq.c: Likewise.
471 * config/tc-mcore.c: Likewise.
472 * config/tc-mips.c: Likewise.
473 * config/tc-mmix.c: Likewise.
474 * config/tc-mn10200.c: Likewise.
475 * config/tc-mn10300.c: Likewise.
476 * config/tc-msp430.c: Likewise.
477 * config/tc-mt.c: Likewise.
478 * config/tc-ns32k.c: Likewise.
479 * config/tc-openrisc.c: Likewise.
480 * config/tc-ppc.c: Likewise.
481 * config/tc-s390.c: Likewise.
482 * config/tc-sh.c: Likewise.
483 * config/tc-sh64.c: Likewise.
484 * config/tc-sparc.c: Likewise.
485 * config/tc-tic30.c: Likewise.
486 * config/tc-tic4x.c: Likewise.
487 * config/tc-tic54x.c: Likewise.
488 * config/tc-v850.c: Likewise.
489 * config/tc-vax.c: Likewise.
490 * config/tc-xc16x.c: Likewise.
491 * config/tc-xstormy16.c: Likewise.
492 * config/tc-xtensa.c: Likewise.
493 * config/tc-z80.c: Likewise.
494 * config/tc-z8k.c: Likewise.
495 * macro.h: Don't include sb.h or ansidecl.h.
496 * sb.h: Don't include stdio.h or ansidecl.h.
497 * cond.c: Include sb.h.
498 * itbl-lex.l: Include as.h instead of other system headers.
499 * itbl-parse.y: Likewise.
500 * itbl-ops.c: Similarly.
501 * itbl-ops.h: Don't include as.h or ansidecl.h.
502 * config/bfin-defs.h: Don't include bfd.h or as.h.
503 * config/bfin-parse.y: Include as.h instead of other system headers.
505 2006-06-06 Ben Elliston <bje@au.ibm.com>
506 Anton Blanchard <anton@samba.org>
508 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
509 (md_show_usage): Document it.
510 (ppc_setup_opcodes): Test power6 opcode flag bits.
511 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
513 2006-06-06 Thiemo Seufer <ths@mips.com>
514 Chao-ying Fu <fu@mips.com>
516 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
517 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
518 (macro_build): Update comment.
519 (mips_ip): Allow DSP64 instructions for MIPS64R2.
520 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
522 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
523 MIPS_CPU_ASE_MDMX flags for sb1.
525 2006-06-05 Thiemo Seufer <ths@mips.com>
527 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
529 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
530 (mips_ip): Make overflowed/underflowed constant arguments in DSP
531 and MT instructions a fatal error. Use INSERT_OPERAND where
532 appropriate. Improve warnings for break and wait code overflows.
533 Use symbolic constant of OP_MASK_COPZ.
534 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
536 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
538 * po/Make-in (top_builddir): Define.
540 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
542 * doc/Makefile.am (TEXI2DVI): Define.
543 * doc/Makefile.in: Regenerate.
544 * doc/c-arc.texi: Fix typo.
546 2006-06-01 Alan Modra <amodra@bigpond.net.au>
548 * config/obj-ieee.c: Delete.
549 * config/obj-ieee.h: Delete.
550 * Makefile.am (OBJ_FORMATS): Remove ieee.
551 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
552 (obj-ieee.o): Remove rule.
553 * Makefile.in: Regenerate.
554 * configure.in (atof): Remove tahoe.
555 (OBJ_MAYBE_IEEE): Don't define.
556 * configure: Regenerate.
557 * config.in: Regenerate.
558 * doc/Makefile.in: Regenerate.
559 * po/POTFILES.in: Regenerate.
561 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
563 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
564 and LIBINTL_DEP everywhere.
566 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
567 * acinclude.m4: Include new gettext macros.
568 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
569 Remove local code for po/Makefile.
570 * Makefile.in, configure, doc/Makefile.in: Regenerated.
572 2006-05-30 Nick Clifton <nickc@redhat.com>
574 * po/es.po: Updated Spanish translation.
576 2006-05-06 Denis Chertykov <denisc@overta.ru>
578 * doc/c-avr.texi: New file.
579 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
580 * doc/all.texi: Set AVR
581 * doc/as.texinfo: Include c-avr.texi
583 2006-05-28 Jie Zhang <jie.zhang@analog.com>
585 * config/bfin-parse.y (check_macfunc): Loose the condition of
586 calling check_multiply_halfregs ().
588 2006-05-25 Jie Zhang <jie.zhang@analog.com>
590 * config/bfin-parse.y (asm_1): Better check and deal with
591 vector and scalar Multiply 16-Bit Operands instructions.
593 2006-05-24 Nick Clifton <nickc@redhat.com>
595 * config/tc-hppa.c: Convert to ISO C90 format.
596 * config/tc-hppa.h: Likewise.
598 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
599 Randolph Chung <randolph@tausq.org>
601 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
602 is_tls_ieoff, is_tls_leoff): Define.
603 (fix_new_hppa): Handle TLS.
604 (cons_fix_new_hppa): Likewise.
606 (md_apply_fix): Handle TLS relocs.
607 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
609 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
611 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
613 2006-05-23 Thiemo Seufer <ths@mips.com>
614 David Ung <davidu@mips.com>
615 Nigel Stephens <nigel@mips.com>
618 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
619 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
620 ISA_HAS_MXHC1): New macros.
621 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
622 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
623 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
624 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
625 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
626 (mips_after_parse_args): Change default handling of float register
627 size to account for 32bit code with 64bit FP. Better sanity checking
628 of ISA/ASE/ABI option combinations.
629 (s_mipsset): Support switching of GPR and FPR sizes via
630 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
632 (mips_elf_final_processing): We should record the use of 64bit FP
633 registers in 32bit code but we don't, because ELF header flags are
635 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
636 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
637 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
638 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
639 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
640 missing -march options. Document .set arch=CPU. Move .set smartmips
641 to ASE page. Use @code for .set FOO examples.
643 2006-05-23 Jie Zhang <jie.zhang@analog.com>
645 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
648 2006-05-23 Jie Zhang <jie.zhang@analog.com>
650 * config/bfin-defs.h (bfin_equals): Remove declaration.
651 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
652 * config/tc-bfin.c (bfin_name_is_register): Remove.
653 (bfin_equals): Remove.
654 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
655 (bfin_name_is_register): Remove declaration.
657 2006-05-19 Thiemo Seufer <ths@mips.com>
658 Nigel Stephens <nigel@mips.com>
660 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
661 (mips_oddfpreg_ok): New function.
664 2006-05-19 Thiemo Seufer <ths@mips.com>
665 David Ung <davidu@mips.com>
667 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
668 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
669 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
670 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
671 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
672 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
673 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
674 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
675 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
676 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
677 reg_names_o32, reg_names_n32n64): Define register classes.
678 (reg_lookup): New function, use register classes.
679 (md_begin): Reserve register names in the symbol table. Simplify
681 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
683 (mips16_ip): Use reg_lookup.
684 (tc_get_register): Likewise.
685 (tc_mips_regname_to_dw2regnum): New function.
687 2006-05-19 Thiemo Seufer <ths@mips.com>
689 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
690 Un-constify string argument.
691 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
693 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
695 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
697 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
699 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
701 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
704 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
706 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
707 cfloat/m68881 to correct architecture before using it.
709 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
711 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
714 2006-05-15 Paul Brook <paul@codesourcery.com>
716 * config/tc-arm.c (arm_adjust_symtab): Use
717 bfd_is_arm_special_symbol_name.
719 2006-05-15 Bob Wilson <bob.wilson@acm.org>
721 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
722 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
723 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
724 Handle errors from calls to xtensa_opcode_is_* functions.
726 2006-05-14 Thiemo Seufer <ths@mips.com>
728 * config/tc-mips.c (macro_build): Test for currently active
730 (mips16_ip): Reject invalid opcodes.
732 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
734 * doc/as.texinfo: Rename "Index" to "AS Index",
735 and "ABORT" to "ABORT (COFF)".
737 2006-05-11 Paul Brook <paul@codesourcery.com>
739 * config/tc-arm.c (parse_half): New function.
740 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
741 (parse_operands): Ditto.
742 (do_mov16): Reject invalid relocations.
743 (do_t_mov16): Ditto. Use Thumb reloc numbers.
744 (insns): Replace Iffff with HALF.
745 (md_apply_fix): Add MOVW and MOVT relocs.
746 (tc_gen_reloc): Ditto.
747 * doc/c-arm.texi: Document relocation operators
749 2006-05-11 Paul Brook <paul@codesourcery.com>
751 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
753 2006-05-11 Thiemo Seufer <ths@mips.com>
755 * config/tc-mips.c (append_insn): Don't check the range of j or
758 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
760 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
761 relocs against external symbols for WinCE targets.
762 (md_apply_fix): Likewise.
764 2006-05-09 David Ung <davidu@mips.com>
766 * config/tc-mips.c (append_insn): Only warn about an out-of-range
769 2006-05-09 Nick Clifton <nickc@redhat.com>
771 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
772 against symbols which are not going to be placed into the symbol
775 2006-05-09 Ben Elliston <bje@au.ibm.com>
777 * expr.c (operand): Remove `if (0 && ..)' statement and
778 subsequently unused target_op label. Collapse `if (1 || ..)'
780 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
781 separately above the switch.
783 2006-05-08 Nick Clifton <nickc@redhat.com>
786 * config/tc-msp430.c (line_separator_character): Define as |.
788 2006-05-08 Thiemo Seufer <ths@mips.com>
789 Nigel Stephens <nigel@mips.com>
790 David Ung <davidu@mips.com>
792 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
793 (mips_opts): Likewise.
794 (file_ase_smartmips): New variable.
795 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
796 (macro_build): Handle SmartMIPS instructions.
798 (md_longopts): Add argument handling for smartmips.
799 (md_parse_options, mips_after_parse_args): Likewise.
800 (s_mipsset): Add .set smartmips support.
801 (md_show_usage): Document -msmartmips/-mno-smartmips.
802 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
804 * doc/c-mips.texi: Likewise.
806 2006-05-08 Alan Modra <amodra@bigpond.net.au>
808 * write.c (relax_segment): Add pass count arg. Don't error on
809 negative org/space on first two passes.
810 (relax_seg_info): New struct.
811 (relax_seg, write_object_file): Adjust.
812 * write.h (relax_segment): Update prototype.
814 2006-05-05 Julian Brown <julian@codesourcery.com>
816 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
818 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
819 architecture version checks.
820 (insns): Allow overlapping instructions to be used in VFP mode.
822 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
825 * config/obj-elf.c (obj_elf_change_section): Allow user
826 specified SHF_ALPHA_GPREL.
828 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
830 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
831 for PMEM related expressions.
833 2006-05-05 Nick Clifton <nickc@redhat.com>
836 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
837 insertion of a directory separator character into a string at a
838 given offset. Uses heuristics to decide when to use a backslash
839 character rather than a forward-slash character.
840 (dwarf2_directive_loc): Use the macro.
841 (out_debug_info): Likewise.
843 2006-05-05 Thiemo Seufer <ths@mips.com>
844 David Ung <davidu@mips.com>
846 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
848 (macro): Add new case M_CACHE_AB.
850 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
852 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
853 (opcode_lookup): Issue a warning for opcode with
854 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
855 identical to OT_cinfix3.
856 (TxC3w, TC3w, tC3w): New.
857 (insns): Use tC3w and TC3w for comparison instructions with
860 2006-05-04 Alan Modra <amodra@bigpond.net.au>
862 * subsegs.h (struct frchain): Delete frch_seg.
863 (frchain_root): Delete.
864 (seg_info): Define as macro.
865 * subsegs.c (frchain_root): Delete.
866 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
867 (subsegs_begin, subseg_change): Adjust for above.
868 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
869 rather than to one big list.
870 (subseg_get): Don't special case abs, und sections.
871 (subseg_new, subseg_force_new): Don't set frchainP here.
873 (subsegs_print_statistics): Adjust frag chain control list traversal.
874 * debug.c (dmp_frags): Likewise.
875 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
876 at frchain_root. Make use of known frchain ordering.
877 (last_frag_for_seg): Likewise.
878 (get_frag_fix): Likewise. Add seg param.
879 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
880 * write.c (chain_frchains_together_1): Adjust for struct frchain.
881 (SUB_SEGMENT_ALIGN): Likewise.
882 (subsegs_finish): Adjust frchain list traversal.
883 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
884 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
885 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
886 (xtensa_fix_b_j_loop_end_frags): Likewise.
887 (xtensa_fix_close_loop_end_frags): Likewise.
888 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
889 (retrieve_segment_info): Delete frch_seg initialisation.
891 2006-05-03 Alan Modra <amodra@bigpond.net.au>
893 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
894 * config/obj-elf.h (obj_sec_set_private_data): Delete.
895 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
896 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
898 2006-05-02 Joseph Myers <joseph@codesourcery.com>
900 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
902 (md_apply_fix3): Multiply offset by 4 here for
903 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
905 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
906 Jan Beulich <jbeulich@novell.com>
908 * config/tc-i386.c (output_invalid_buf): Change size for
910 * config/tc-tic30.c (output_invalid_buf): Likewise.
912 * config/tc-i386.c (output_invalid): Cast none-ascii char to
914 * config/tc-tic30.c (output_invalid): Likewise.
916 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
918 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
919 (TEXI2POD): Use AM_MAKEINFOFLAGS.
920 (asconfig.texi): Don't set top_srcdir.
921 * doc/as.texinfo: Don't use top_srcdir.
922 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
924 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
926 * config/tc-i386.c (output_invalid_buf): Change size to 16.
927 * config/tc-tic30.c (output_invalid_buf): Likewise.
929 * config/tc-i386.c (output_invalid): Use snprintf instead of
931 * config/tc-ia64.c (declare_register_set): Likewise.
932 (emit_one_bundle): Likewise.
933 (check_dependencies): Likewise.
934 * config/tc-tic30.c (output_invalid): Likewise.
936 2006-05-02 Paul Brook <paul@codesourcery.com>
938 * config/tc-arm.c (arm_optimize_expr): New function.
939 * config/tc-arm.h (md_optimize_expr): Define
940 (arm_optimize_expr): Add prototype.
941 (TC_FORCE_RELOCATION_SUB_SAME): Define.
943 2006-05-02 Ben Elliston <bje@au.ibm.com>
945 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
948 * sb.h (sb_list_vector): Move to sb.c.
949 * sb.c (free_list): Use type of sb_list_vector directly.
950 (sb_build): Fix off-by-one error in assertion about `size'.
952 2006-05-01 Ben Elliston <bje@au.ibm.com>
954 * listing.c (listing_listing): Remove useless loop.
955 * macro.c (macro_expand): Remove is_positional local variable.
956 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
957 and simplify surrounding expressions, where possible.
958 (assign_symbol): Likewise.
959 (s_weakref): Likewise.
960 * symbols.c (colon): Likewise.
962 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
964 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
966 2006-04-30 Thiemo Seufer <ths@mips.com>
967 David Ung <davidu@mips.com>
969 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
970 (mips_immed): New table that records various handling of udi
971 instruction patterns.
972 (mips_ip): Adds udi handling.
974 2006-04-28 Alan Modra <amodra@bigpond.net.au>
976 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
977 of list rather than beginning.
979 2006-04-26 Julian Brown <julian@codesourcery.com>
981 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
982 (is_quarter_float): Rename from above. Simplify slightly.
983 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
985 (parse_neon_mov): Parse floating-point constants.
986 (neon_qfloat_bits): Fix encoding.
987 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
988 preference to integer encoding when using the F32 type.
990 2006-04-26 Julian Brown <julian@codesourcery.com>
992 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
993 zero-initialising structures containing it will lead to invalid types).
994 (arm_it): Add vectype to each operand.
995 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
997 (neon_typed_alias): New structure. Extra information for typed
999 (reg_entry): Add neon type info field.
1000 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1001 Break out alternative syntax for coprocessor registers, etc. into...
1002 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1003 out from arm_reg_parse.
1004 (parse_neon_type): Move. Return SUCCESS/FAIL.
1005 (first_error): New function. Call to ensure first error which occurs is
1007 (parse_neon_operand_type): Parse exactly one type.
1008 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1009 (parse_typed_reg_or_scalar): New function. Handle core of both
1010 arm_typed_reg_parse and parse_scalar.
1011 (arm_typed_reg_parse): Parse a register with an optional type.
1012 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1014 (parse_scalar): Parse a Neon scalar with optional type.
1015 (parse_reg_list): Use first_error.
1016 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1017 (neon_alias_types_same): New function. Return true if two (alias) types
1019 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1021 (insert_reg_alias): Return new reg_entry not void.
1022 (insert_neon_reg_alias): New function. Insert type/index information as
1023 well as register for alias.
1024 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1025 make typed register aliases accordingly.
1026 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1028 (s_unreq): Delete type information if present.
1029 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1030 (s_arm_unwind_save_mmxwcg): Likewise.
1031 (s_arm_unwind_movsp): Likewise.
1032 (s_arm_unwind_setfp): Likewise.
1033 (parse_shift): Likewise.
1034 (parse_shifter_operand): Likewise.
1035 (parse_address): Likewise.
1036 (parse_tb): Likewise.
1037 (tc_arm_regname_to_dw2regnum): Likewise.
1038 (md_pseudo_table): Add dn, qn.
1039 (parse_neon_mov): Handle typed operands.
1040 (parse_operands): Likewise.
1041 (neon_type_mask): Add N_SIZ.
1042 (N_ALLMODS): New macro.
1043 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1044 (el_type_of_type_chk): Add some safeguards.
1045 (modify_types_allowed): Fix logic bug.
1046 (neon_check_type): Handle operands with types.
1047 (neon_three_same): Remove redundant optional arg handling.
1048 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1049 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1050 (do_neon_step): Adjust accordingly.
1051 (neon_cmode_for_logic_imm): Use first_error.
1052 (do_neon_bitfield): Call neon_check_type.
1053 (neon_dyadic): Rename to...
1054 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1055 to allow modification of type of the destination.
1056 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1057 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1058 (do_neon_compare): Make destination be an untyped bitfield.
1059 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1060 (neon_mul_mac): Return early in case of errors.
1061 (neon_move_immediate): Use first_error.
1062 (neon_mac_reg_scalar_long): Fix type to include scalar.
1063 (do_neon_dup): Likewise.
1064 (do_neon_mov): Likewise (in several places).
1065 (do_neon_tbl_tbx): Fix type.
1066 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1067 (do_neon_ld_dup): Exit early in case of errors and/or use
1069 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1070 Handle .dn/.qn directives.
1071 (REGDEF): Add zero for reg_entry neon field.
1073 2006-04-26 Julian Brown <julian@codesourcery.com>
1075 * config/tc-arm.c (limits.h): Include.
1076 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1077 (fpu_vfp_v3_or_neon_ext): Declare constants.
1078 (neon_el_type): New enumeration of types for Neon vector elements.
1079 (neon_type_el): New struct. Define type and size of a vector element.
1080 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1082 (neon_type): Define struct. The type of an instruction.
1083 (arm_it): Add 'vectype' for the current instruction.
1084 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1085 (vfp_sp_reg_pos): Rename to...
1086 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1088 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1089 (Neon D or Q register).
1090 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1092 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1093 (my_get_expression): Allow above constant as argument to accept
1094 64-bit constants with optional prefix.
1095 (arm_reg_parse): Add extra argument to return the specific type of
1096 register in when either a D or Q register (REG_TYPE_NDQ) is
1097 requested. Can be NULL.
1098 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1099 (parse_reg_list): Update for new arm_reg_parse args.
1100 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1101 (parse_neon_el_struct_list): New function. Parse element/structure
1102 register lists for VLD<n>/VST<n> instructions.
1103 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1104 (s_arm_unwind_save_mmxwr): Likewise.
1105 (s_arm_unwind_save_mmxwcg): Likewise.
1106 (s_arm_unwind_movsp): Likewise.
1107 (s_arm_unwind_setfp): Likewise.
1108 (parse_big_immediate): New function. Parse an immediate, which may be
1109 64 bits wide. Put results in inst.operands[i].
1110 (parse_shift): Update for new arm_reg_parse args.
1111 (parse_address): Likewise. Add parsing of alignment specifiers.
1112 (parse_neon_mov): Parse the operands of a VMOV instruction.
1113 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1114 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1115 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1116 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1117 (parse_operands): Handle new codes above.
1118 (encode_arm_vfp_sp_reg): Rename to...
1119 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1120 selected VFP version only supports D0-D15.
1121 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1122 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1123 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1124 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1125 encode_arm_vfp_reg name, and allow 32 D regs.
1126 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1127 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1129 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1130 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1131 constant-load and conversion insns introduced with VFPv3.
1132 (neon_tab_entry): New struct.
1133 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1134 those which are the targets of pseudo-instructions.
1135 (neon_opc): Enumerate opcodes, use as indices into...
1136 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1137 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1138 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1139 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1141 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1143 (neon_type_mask): New. Compact type representation for type checking.
1144 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1145 permitted type combinations.
1146 (N_IGNORE_TYPE): New macro.
1147 (neon_check_shape): New function. Check an instruction shape for
1148 multiple alternatives. Return the specific shape for the current
1150 (neon_modify_type_size): New function. Modify a vector type and size,
1151 depending on the bit mask in argument 1.
1152 (neon_type_promote): New function. Convert a given "key" type (of an
1153 operand) into the correct type for a different operand, based on a bit
1155 (type_chk_of_el_type): New function. Convert a type and size into the
1156 compact representation used for type checking.
1157 (el_type_of_type_ckh): New function. Reverse of above (only when a
1158 single bit is set in the bit mask).
1159 (modify_types_allowed): New function. Alter a mask of allowed types
1160 based on a bit mask of modifications.
1161 (neon_check_type): New function. Check the type of the current
1162 instruction against the variable argument list. The "key" type of the
1163 instruction is returned.
1164 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1165 a Neon data-processing instruction depending on whether we're in ARM
1166 mode or Thumb-2 mode.
1167 (neon_logbits): New function.
1168 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1169 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1170 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1171 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1172 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1173 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1174 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1175 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1176 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1177 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1178 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1179 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1180 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1181 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1182 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1183 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1184 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1185 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1186 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1187 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1188 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1189 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1190 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1191 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1192 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1194 (parse_neon_type): New function. Parse Neon type specifier.
1195 (opcode_lookup): Allow parsing of Neon type specifiers.
1196 (REGNUM2, REGSETH, REGSET2): New macros.
1197 (reg_names): Add new VFPv3 and Neon registers.
1198 (NUF, nUF, NCE, nCE): New macros for opcode table.
1199 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1200 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1201 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1202 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1203 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1204 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1205 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1206 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1207 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1208 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1209 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1210 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1211 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1212 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1214 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1215 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1216 (arm_option_cpu_value): Add vfp3 and neon.
1217 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1220 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1222 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1223 syntax instead of hardcoded opcodes with ".w18" suffixes.
1224 (wide_branch_opcode): New.
1225 (build_transition): Use it to check for wide branch opcodes with
1226 either ".w18" or ".w15" suffixes.
1228 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1230 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1231 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1232 frag's is_literal flag.
1234 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1236 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1238 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1240 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1241 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1242 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1243 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1244 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1246 2005-04-20 Paul Brook <paul@codesourcery.com>
1248 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1250 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1252 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1254 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1255 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1256 Make some cpus unsupported on ELF. Run "make dep-am".
1257 * Makefile.in: Regenerate.
1259 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1261 * configure.in (--enable-targets): Indent help message.
1262 * configure: Regenerate.
1264 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1267 * config/tc-i386.c (i386_immediate): Check illegal immediate
1270 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1272 * config/tc-i386.c: Formatting.
1273 (output_disp, output_imm): ISO C90 params.
1275 * frags.c (frag_offset_fixed_p): Constify args.
1276 * frags.h (frag_offset_fixed_p): Ditto.
1278 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1279 (COFF_MAGIC): Delete.
1281 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1283 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1285 * po/POTFILES.in: Regenerated.
1287 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1289 * doc/as.texinfo: Mention that some .type syntaxes are not
1290 supported on all architectures.
1292 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1294 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1295 instructions when such transformations have been disabled.
1297 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1299 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1300 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1301 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1302 decoding the loop instructions. Remove current_offset variable.
1303 (xtensa_fix_short_loop_frags): Likewise.
1304 (min_bytes_to_other_loop_end): Remove current_offset argument.
1306 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1308 * config/tc-z80.c (z80_optimize_expr): Removed.
1309 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1311 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1313 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1314 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1315 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1316 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1317 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1318 at90can64, at90usb646, at90usb647, at90usb1286 and
1320 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1322 2006-04-07 Paul Brook <paul@codesourcery.com>
1324 * config/tc-arm.c (parse_operands): Set default error message.
1326 2006-04-07 Paul Brook <paul@codesourcery.com>
1328 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1330 2006-04-07 Paul Brook <paul@codesourcery.com>
1332 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1334 2006-04-07 Paul Brook <paul@codesourcery.com>
1336 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1337 (move_or_literal_pool): Handle Thumb-2 instructions.
1338 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1340 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1343 * config/tc-i386.c (match_template): Move 64-bit operand tests
1346 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1348 * po/Make-in: Add install-html target.
1349 * Makefile.am: Add install-html and install-html-recursive targets.
1350 * Makefile.in: Regenerate.
1351 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1352 * configure: Regenerate.
1353 * doc/Makefile.am: Add install-html and install-html-am targets.
1354 * doc/Makefile.in: Regenerate.
1356 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1358 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1361 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1362 Daniel Jacobowitz <dan@codesourcery.com>
1364 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1365 (GOTT_BASE, GOTT_INDEX): New.
1366 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1367 GOTT_INDEX when generating VxWorks PIC.
1368 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1369 use the generic *-*-vxworks* stanza instead.
1371 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1374 * frags.c (frag_offset_fixed_p): New function.
1375 * frags.h (frag_offset_fixed_p): Declare.
1376 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1377 (resolve_expression): Likewise.
1379 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1381 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1382 of the same length but different numbers of slots.
1384 2006-03-30 Andreas Schwab <schwab@suse.de>
1386 * configure.in: Fix help string for --enable-targets option.
1387 * configure: Regenerate.
1389 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1391 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1392 (m68k_ip): ... here. Use for all chips. Protect against buffer
1393 overrun and avoid excessive copying.
1395 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1396 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1397 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1398 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1399 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1400 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1401 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1402 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1403 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1404 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1405 (struct m68k_cpu): Change chip field to control_regs.
1406 (current_chip): Remove.
1407 (control_regs): New.
1408 (m68k_archs, m68k_extensions): Adjust.
1409 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1410 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1411 (find_cf_chip): Reimplement for new organization of cpu table.
1412 (select_control_regs): Remove.
1414 (struct save_opts): Save control regs, not chip.
1415 (s_save, s_restore): Adjust.
1416 (m68k_lookup_cpu): Give deprecated warning when necessary.
1417 (m68k_init_arch): Adjust.
1418 (md_show_usage): Adjust for new cpu table organization.
1420 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1422 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1423 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1424 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1426 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1427 (any_gotrel): New rule.
1428 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1429 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1431 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1432 (bfin_pic_ptr): New function.
1433 (md_pseudo_table): Add it for ".picptr".
1434 (OPTION_FDPIC): New macro.
1435 (md_longopts): Add -mfdpic.
1436 (md_parse_option): Handle it.
1437 (md_begin): Set BFD flags.
1438 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1439 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1441 * Makefile.am (bfin-parse.o): Update dependencies.
1442 (DEPTC_bfin_elf): Likewise.
1443 * Makefile.in: Regenerate.
1445 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1447 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1448 mcfemac instead of mcfmac.
1450 2006-03-23 Michael Matz <matz@suse.de>
1452 * config/tc-i386.c (type_names): Correct placement of 'static'.
1453 (reloc): Map some more relocs to their 64 bit counterpart when
1455 (output_insn): Work around breakage if DEBUG386 is defined.
1456 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1457 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1458 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1459 different from i386.
1460 (output_imm): Ditto.
1461 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1463 (md_convert_frag): Jumps can now be larger than 2GB away, error
1465 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1466 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1468 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1469 Daniel Jacobowitz <dan@codesourcery.com>
1470 Phil Edwards <phil@codesourcery.com>
1471 Zack Weinberg <zack@codesourcery.com>
1472 Mark Mitchell <mark@codesourcery.com>
1473 Nathan Sidwell <nathan@codesourcery.com>
1475 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1476 (md_begin): Complain about -G being used for PIC. Don't change
1477 the text, data and bss alignments on VxWorks.
1478 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1479 generating VxWorks PIC.
1480 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1481 (macro): Likewise, but do not treat la $25 specially for
1482 VxWorks PIC, and do not handle jal.
1483 (OPTION_MVXWORKS_PIC): New macro.
1484 (md_longopts): Add -mvxworks-pic.
1485 (md_parse_option): Don't complain about using PIC and -G together here.
1486 Handle OPTION_MVXWORKS_PIC.
1487 (md_estimate_size_before_relax): Always use the first relaxation
1488 sequence on VxWorks.
1489 * config/tc-mips.h (VXWORKS_PIC): New.
1491 2006-03-21 Paul Brook <paul@codesourcery.com>
1493 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1495 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1497 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1498 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1499 (get_loop_align_size): New.
1500 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1501 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1502 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1503 (get_noop_aligned_address): Use get_loop_align_size.
1504 (get_aligned_diff): Likewise.
1506 2006-03-21 Paul Brook <paul@codesourcery.com>
1508 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1510 2006-03-20 Paul Brook <paul@codesourcery.com>
1512 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1513 (do_t_branch): Encode branches inside IT blocks as unconditional.
1514 (do_t_cps): New function.
1515 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1516 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1517 (opcode_lookup): Allow conditional suffixes on all instructions in
1519 (md_assemble): Advance condexec state before checking for errors.
1520 (insns): Use do_t_cps.
1522 2006-03-20 Paul Brook <paul@codesourcery.com>
1524 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1525 outputting the insn.
1527 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1529 * config/tc-vax.c: Update copyright year.
1530 * config/tc-vax.h: Likewise.
1532 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1534 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1536 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1538 2006-03-17 Paul Brook <paul@codesourcery.com>
1540 * config/tc-arm.c (insns): Add ldm and stm.
1542 2006-03-17 Ben Elliston <bje@au.ibm.com>
1545 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1547 2006-03-16 Paul Brook <paul@codesourcery.com>
1549 * config/tc-arm.c (insns): Add "svc".
1551 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1553 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1554 flag and avoid double underscore prefixes.
1556 2006-03-10 Paul Brook <paul@codesourcery.com>
1558 * config/tc-arm.c (md_begin): Handle EABIv5.
1559 (arm_eabis): Add EF_ARM_EABI_VER5.
1560 * doc/c-arm.texi: Document -meabi=5.
1562 2006-03-10 Ben Elliston <bje@au.ibm.com>
1564 * app.c (do_scrub_chars): Simplify string handling.
1566 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1567 Daniel Jacobowitz <dan@codesourcery.com>
1568 Zack Weinberg <zack@codesourcery.com>
1569 Nathan Sidwell <nathan@codesourcery.com>
1570 Paul Brook <paul@codesourcery.com>
1571 Ricardo Anguiano <anguiano@codesourcery.com>
1572 Phil Edwards <phil@codesourcery.com>
1574 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1575 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1577 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1578 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1579 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1581 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1583 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1584 even when using the text-section-literals option.
1586 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1588 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1590 (m68k_ip): <case 'J'> Check we have some control regs.
1591 (md_parse_option): Allow raw arch switch.
1592 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1593 whether 68881 or cfloat was meant by -mfloat.
1594 (md_show_usage): Adjust extension display.
1595 (m68k_elf_final_processing): Adjust.
1597 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1599 * config/tc-avr.c (avr_mod_hash_value): New function.
1600 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1601 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1602 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1603 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1605 (tc_gen_reloc): Handle substractions of symbols, if possible do
1606 fixups, abort otherwise.
1607 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1608 tc_fix_adjustable): Define.
1610 2006-03-02 James E Wilson <wilson@specifix.com>
1612 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1613 change the template, then clear md.slot[curr].end_of_insn_group.
1615 2006-02-28 Jan Beulich <jbeulich@novell.com>
1617 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1619 2006-02-28 Jan Beulich <jbeulich@novell.com>
1622 * macro.c (getstring): Don't treat parentheses special anymore.
1623 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1624 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1627 2006-02-28 Mat <mat@csail.mit.edu>
1629 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1631 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1633 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1635 (CFI_signal_frame): Define.
1636 (cfi_pseudo_table): Add .cfi_signal_frame.
1637 (dot_cfi): Handle CFI_signal_frame.
1638 (output_cie): Handle cie->signal_frame.
1639 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1640 different. Copy signal_frame from FDE to newly created CIE.
1641 * doc/as.texinfo: Document .cfi_signal_frame.
1643 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1645 * doc/Makefile.am: Add html target.
1646 * doc/Makefile.in: Regenerate.
1647 * po/Make-in: Add html target.
1649 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1651 * config/tc-i386.c (output_insn): Support Intel Merom New
1654 * config/tc-i386.h (CpuMNI): New.
1655 (CpuUnknownFlags): Add CpuMNI.
1657 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1659 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1660 (hpriv_reg_table): New table for hyperprivileged registers.
1661 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1664 2006-02-24 DJ Delorie <dj@redhat.com>
1666 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1667 (tc_gen_reloc): Don't define.
1668 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1669 (OPTION_LINKRELAX): New.
1670 (md_longopts): Add it.
1672 (md_parse_options): Set it.
1673 (md_assemble): Emit relaxation relocs as needed.
1674 (md_convert_frag): Emit relaxation relocs as needed.
1675 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1676 (m32c_apply_fix): New.
1677 (tc_gen_reloc): New.
1678 (m32c_force_relocation): Force out jump relocs when relaxing.
1679 (m32c_fix_adjustable): Return false if relaxing.
1681 2006-02-24 Paul Brook <paul@codesourcery.com>
1683 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1684 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1685 (struct asm_barrier_opt): Define.
1686 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1687 (parse_psr): Accept V7M psr names.
1688 (parse_barrier): New function.
1689 (enum operand_parse_code): Add OP_oBARRIER.
1690 (parse_operands): Implement OP_oBARRIER.
1691 (do_barrier): New function.
1692 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1693 (do_t_cpsi): Add V7M restrictions.
1694 (do_t_mrs, do_t_msr): Validate V7M variants.
1695 (md_assemble): Check for NULL variants.
1696 (v7m_psrs, barrier_opt_names): New tables.
1697 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1698 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1699 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1700 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1701 (struct cpu_arch_ver_table): Define.
1702 (cpu_arch_ver): New.
1703 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1704 Tag_CPU_arch_profile.
1705 * doc/c-arm.texi: Document new cpu and arch options.
1707 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1709 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1711 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1713 * config/tc-ia64.c: Update copyright years.
1715 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1717 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1720 2005-02-22 Paul Brook <paul@codesourcery.com>
1722 * config/tc-arm.c (do_pld): Remove incorrect write to
1724 (encode_thumb32_addr_mode): Use correct operand.
1726 2006-02-21 Paul Brook <paul@codesourcery.com>
1728 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1730 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1731 Anil Paranjape <anilp1@kpitcummins.com>
1732 Shilin Shakti <shilins@kpitcummins.com>
1734 * Makefile.am: Add xc16x related entry.
1735 * Makefile.in: Regenerate.
1736 * configure.in: Added xc16x related entry.
1737 * configure: Regenerate.
1738 * config/tc-xc16x.h: New file
1739 * config/tc-xc16x.c: New file
1740 * doc/c-xc16x.texi: New file for xc16x
1741 * doc/all.texi: Entry for xc16x
1742 * doc/Makefile.texi: Added c-xc16x.texi
1743 * NEWS: Announce the support for the new target.
1745 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1747 * configure.tgt: set emulation for mips-*-netbsd*
1749 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1751 * config.in: Rebuilt.
1753 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1755 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1756 from 1, not 0, in error messages.
1757 (md_assemble): Simplify special-case check for ENTRY instructions.
1758 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1759 operand in error message.
1761 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1763 * configure.tgt (arm-*-linux-gnueabi*): Change to
1766 2006-02-10 Nick Clifton <nickc@redhat.com>
1768 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1769 32-bit value is propagated into the upper bits of a 64-bit long.
1771 * config/tc-arc.c (init_opcode_tables): Fix cast.
1772 (arc_extoper, md_operand): Likewise.
1774 2006-02-09 David Heine <dlheine@tensilica.com>
1776 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1777 each relaxation step.
1779 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1781 * configure.in (CHECK_DECLS): Add vsnprintf.
1782 * configure: Regenerate.
1783 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1784 include/declare here, but...
1785 * as.h: Move code detecting VARARGS idiom to the top.
1786 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1787 (vsnprintf): Declare if not already declared.
1789 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1791 * as.c (close_output_file): New.
1792 (main): Register close_output_file with xatexit before
1793 dump_statistics. Don't call output_file_close.
1795 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1797 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1798 mcf5329_control_regs): New.
1799 (not_current_architecture, selected_arch, selected_cpu): New.
1800 (m68k_archs, m68k_extensions): New.
1801 (archs): Renamed to ...
1802 (m68k_cpus): ... here. Adjust.
1804 (md_pseudo_table): Add arch and cpu directives.
1805 (find_cf_chip, m68k_ip): Adjust table scanning.
1806 (no_68851, no_68881): Remove.
1807 (md_assemble): Lazily initialize.
1808 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1809 (md_init_after_args): Move functionality to m68k_init_arch.
1810 (mri_chip): Adjust table scanning.
1811 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1812 options with saner parsing.
1813 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1814 m68k_init_arch): New.
1815 (s_m68k_cpu, s_m68k_arch): New.
1816 (md_show_usage): Adjust.
1817 (m68k_elf_final_processing): Set CF EF flags.
1818 * config/tc-m68k.h (m68k_init_after_args): Remove.
1819 (tc_init_after_args): Remove.
1820 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1821 (M68k-Directives): Document .arch and .cpu directives.
1823 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1825 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1826 synonyms for equ and defl.
1827 (z80_cons_fix_new): New function.
1828 (emit_byte): Disallow relative jumps to absolute locations.
1829 (emit_data): Only handle defb, prototype changed, because defb is
1830 now handled as pseudo-op rather than an instruction.
1831 (instab): Entries for defb,defw,db,dw moved from here...
1832 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1833 Add entries for def24,def32,d24,d32.
1834 (md_assemble): Improved error handling.
1835 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1836 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1837 (z80_cons_fix_new): Declare.
1838 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1839 (def24,d24,def32,d32): New pseudo-ops.
1841 2006-02-02 Paul Brook <paul@codesourcery.com>
1843 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1845 2005-02-02 Paul Brook <paul@codesourcery.com>
1847 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1848 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1849 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1850 T2_OPCODE_RSB): Define.
1851 (thumb32_negate_data_op): New function.
1852 (md_apply_fix): Use it.
1854 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1856 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1858 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1859 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1861 (relaxation_requirements): Add pfinish_frag argument and use it to
1862 replace setting tinsn->record_fix fields.
1863 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1864 and vinsn_to_insnbuf. Remove references to record_fix and
1865 slot_sub_symbols fields.
1866 (xtensa_mark_narrow_branches): Delete unused code.
1867 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1869 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1871 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1872 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1873 of the record_fix field. Simplify error messages for unexpected
1875 (set_expr_symbol_offset_diff): Delete.
1877 2006-01-31 Paul Brook <paul@codesourcery.com>
1879 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1881 2006-01-31 Paul Brook <paul@codesourcery.com>
1882 Richard Earnshaw <rearnsha@arm.com>
1884 * config/tc-arm.c: Use arm_feature_set.
1885 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1886 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1887 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1890 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1891 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1892 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1893 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1895 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1896 (arm_opts): Move old cpu/arch options from here...
1897 (arm_legacy_opts): ... to here.
1898 (md_parse_option): Search arm_legacy_opts.
1899 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1900 (arm_float_abis, arm_eabis): Make const.
1902 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1904 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1906 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1908 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1909 in load immediate intruction.
1911 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1913 * config/bfin-parse.y (value_match): Use correct conversion
1914 specifications in template string for __FILE__ and __LINE__.
1918 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1920 Introduce TLS descriptors for i386 and x86_64.
1921 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1922 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1923 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1924 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1925 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1927 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1928 (lex_got): Handle @tlsdesc and @tlscall.
1929 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1931 2006-01-11 Nick Clifton <nickc@redhat.com>
1933 Fixes for building on 64-bit hosts:
1934 * config/tc-avr.c (mod_index): New union to allow conversion
1935 between pointers and integers.
1936 (md_begin, avr_ldi_expression): Use it.
1937 * config/tc-i370.c (md_assemble): Add cast for argument to print
1939 * config/tc-tic54x.c (subsym_substitute): Likewise.
1940 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1941 opindex field of fr_cgen structure into a pointer so that it can
1942 be stored in a frag.
1943 * config/tc-mn10300.c (md_assemble): Likewise.
1944 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1946 * config/tc-v850.c: Replace uses of (int) casts with correct
1949 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1952 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1954 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1957 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1958 a local-label reference.
1960 For older changes see ChangeLog-2005
1966 version-control: never