1 2006-09-16 Paul Brook <paul@codesourcery.com>
3 * config/tc-arm.c (thumb32_negate_data_op): Consistently use
4 unsigned int to avoid 64-bit host problems.
6 2006-09-15 Bernd Schmidt <bernd.schmidt@analog.com>
8 * config/bfin-parse.y (binary): Do some more constant folding for
11 2006-09-13 Jan Beulich <jbeulich@novell.com>
13 * input-file.c (input_file_give_next_buffer): Demote as_bad to
16 2006-09-13 Alan Modra <amodra@bigpond.net.au>
19 * config/tc-sh (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number
22 2006-09-13 Alan Modra <amodra@bigpond.net.au>
24 * input-file.c (input_file_open): Replace as_perror with as_bad
25 so that gas exits with error on file errors. Correct error
27 (input_file_get, input_file_give_next_buffer): Likewise.
28 * input-file.h: Update comment.
30 2006-09-11 Tomas Frydrych <dr.tomas@yahoo.co.uk>
33 * config/tc-arm.c (parse_typed_reg_or_scalar): Accept wCg class
34 registers as a sub-class of wC registers.
36 2006-09-11 Alan Modra <amodra@bigpond.net.au>
39 * config/tc-mips.h (enum dwarf2_format): Forward declare.
40 (DWARF2_CIE_DATA_ALIGNMENT): Wrap negative number in parens.
41 * config/tc-alpha.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
42 * config/tc-arm.h (DWARF2_CIE_DATA_ALIGNMENT): Likewise.
44 2006-09-08 Nick Clifton <nickc@redhat.com>
47 * doc/as.texinfo (Macro): Improve documentation about separating
48 macro arguments from following text.
50 2006-09-08 Paul Brook <paul@codesourcery.com>
52 * config/tc-arm.c (insns): Allow ARM IT pseudo-insn on all cores.
54 2006-09-07 Paul Brook <paul@codesourcery.com>
56 * config/tc-arm.c (parse_operands): Mark operand as present.
58 2006-09-04 Paul Brook <paul@codesourcery.com>
60 * config/tc-arm.c (do_neon_dyadic_if_i): Remove.
61 (do_neon_dyadic_if_i_d): Avoid setting U bit.
62 (do_neon_mac_maybe_scalar): Ditto.
63 (do_neon_dyadic_narrow): Force operand type to NT_integer.
64 (insns): Remove out of date comments.
66 2006-08-29 Nick Clifton <nickc@redhat.com>
68 * read.c (s_align): Initialize the 'stopc' variable to prevent
69 compiler complaints about it being used without being
71 (s_comm_internal, s_mri_common, s_fail, s_globl, s_space,
72 s_float_space, s_struct, cons_worker, equals): Likewise.
74 2006-08-29 Malcolm Parsons <malcolm.parsons@gmail.com>
76 * ecoff.c (ecoff_directive_val): Fix message typo.
77 * config/tc-ns32k.c (convert_iif): Likewise.
78 * config/tc-sh64.c (shmedia_check_limits): Likewise.
80 2006-08-25 Sterling Augustine <sterling@tensilica.com>
81 Bob Wilson <bob.wilson@acm.org>
83 * config/tc-xtensa.c (xtensa_mark_literal_pool_location): Do not check
84 the state of the absolute_literals directive. Remove align frag at
85 the start of the literal pool position.
87 2006-08-25 Bob Wilson <bob.wilson@acm.org>
89 * doc/c-xtensa.texi: Add @group commands in examples.
91 2006-08-24 Bob Wilson <bob.wilson@acm.org>
93 * config/tc-xtensa.c (FINI_LITERAL_SECTION_NAME): Delete.
94 (INIT_LITERAL_SECTION_NAME): Delete.
95 (lit_state struct): Remove segment names, init_lit_seg, and
96 fini_lit_seg. Add lit_prefix and current_text_seg.
97 (init_literal_head_h, init_literal_head): Delete.
98 (fini_literal_head_h, fini_literal_head): Delete.
99 (xtensa_begin_directive): Move argument parsing to
100 xtensa_literal_prefix function.
101 (xtensa_end_directive): Deallocate lit_prefix field of lit_state.
102 (xtensa_literal_prefix): Parse the directive argument here and
103 record it in the lit_prefix field. Remove code to derive literal
106 (get_is_linkonce_section): Use linkonce_len. Check for any
107 ".gnu.linkonce.*" section, not just text sections.
108 (md_begin): Remove initialization of deleted lit_state fields.
109 (xtensa_reorder_segments, xtensa_post_relax_hook): Remove references
110 to init_literal_head and fini_literal_head.
111 (xtensa_move_literals): Likewise. Skip literals for .init and .fini
112 when traversing literal_head list.
113 (match_section_group): New.
114 (cache_literal_section): Rewrite to determine the literal section
115 name on the fly, create the section and return it.
116 (xtensa_switch_to_literal_fragment): Adjust for cache_literal_section.
117 (xtensa_switch_to_non_abs_literal_fragment): Likewise.
118 (xtensa_create_property_segments, xtensa_create_xproperty_segments):
119 Use xtensa_get_property_section from bfd.
120 (retrieve_xtensa_section): Delete.
121 * doc/c-xtensa.texi (Xtensa Options): Fix --text-section-literals
122 description to refer to plural literal sections and add xref to
123 the Literal Directive section.
124 (Literal Directive): Describe new rules for deriving literal section
125 names. Add footnote for special case of .init/.fini with
126 --text-section-literals.
127 (Literal Prefix Directive): Replace old naming rules with xref to the
128 Literal Directive section.
130 2006-08-21 Joseph Myers <joseph@codesourcery.com>
132 * config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
133 merging with previous long opcode.
135 2006-08-22 Pedro Alves <pedro_alves@portugalmail.pt>
137 * Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
138 * Makefile.in: Regenerate.
139 * config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were
142 2006-08-16 Julian Brown <julian@codesourcery.com>
144 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
145 to use ARM instructions on non-ARM-supporting cores.
146 (autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
147 mode automatically based on cpu variant.
148 (md_begin): Call above function.
150 2006-08-16 Julian Brown <julian@codesourcery.com>
152 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
153 recognized in non-unified syntax mode.
155 2006-08-15 Thiemo Seufer <ths@mips.com>
156 Nigel Stephens <nigel@mips.com>
157 David Ung <davidu@mips.com>
159 * configure.tgt: Handle mips*-sde-elf*.
161 2006-08-12 Thiemo Seufer <ths@networkno.de>
163 * config/tc-mips.c (mips16_ip): Fix argument register handling
164 for restore instruction.
166 2006-08-08 Bob Wilson <bob.wilson@acm.org>
168 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
170 (out_fixed_inc_line_addr): New.
171 (process_entries): Use out_fixed_inc_line_addr when
172 DWARF2_USE_FIXED_ADVANCE_PC is set.
173 * config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
175 2006-08-08 DJ Delorie <dj@redhat.com>
177 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
178 vs full symbols so that we never have more than one pointer value
179 for any given symbol in our symbol table.
181 2006-08-08 Sterling Augustine <sterling@tensilica.com>
183 * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg
184 and emit DW_AT_ranges when code in compilation unit is not
186 (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in
188 (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
189 (out_debug_ranges): New function to emit .debug_ranges section
190 when code is not contiguous.
192 2006-08-08 Nick Clifton <nickc@redhat.com>
194 * config/tc-arm.c (WARN_DEPRECATED): Enable.
196 2006-08-05 Pedro Alves <pedro_alves@portugalmail.pt>
198 * config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF
200 (pe_directive_secrel) [TE_PE]: New function.
201 (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file,
202 loc, loc_mark_labels.
203 [TE_PE]: Handle secrel32.
204 (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn
206 (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
207 (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
208 (md_section_align): Only round section sizes here for AOUT
210 (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
211 (tc_pe_dwarf2_emit_offset): New function.
212 (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
213 (cons_fix_new_arm): Handle O_secrel.
214 * config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH,
215 DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out
216 of OBJ_ELF only block.
217 [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare
218 tc_pe_dwarf2_emit_offset.
220 2006-08-04 Richard Sandiford <richard@codesourcery.com>
222 * config/tc-sh.c (apply_full_field_fix): New function.
223 (md_apply_fix): Use it instead of md_number_to_chars. Do not fill
224 in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
225 (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
226 * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.
228 2006-08-03 Nick Clifton <nickc@redhat.com>
231 * config.in: Regenerate.
233 2006-08-03 Joseph Myers <joseph@codesourcery.com>
235 * config/tc-arm.c (parse_operands): Handle invalid register name
238 2006-08-03 Joseph Myers <joseph@codesourcery.com>
240 * config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
241 (parse_operands): Handle it.
242 (insns): Use it for tmcr and tmrc.
244 2006-08-02 Petr Salinger <Petr.Salinger@seznam.cz>
247 * config/tc-i386.c (md_parse_option): Treat any target starting
248 with elf64_x86_64 as a viable target for the -64 switch.
249 (i386_target_format): For 64-bit ELF flavoured output use
251 * config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
253 2006-08-02 Nick Clifton <nickc@redhat.com>
256 * acinclude.m4 (BFD_BINARY_FOPEN): Import this function from
258 * configure.in: Run BFD_BINARY_FOPEN.
259 * configure: Regenerate.
260 * as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header
263 2006-08-01 H.J. Lu <hongjiu.lu@intel.com>
265 * config/tc-i386.c (md_assemble): Don't update
268 2006-08-01 Thiemo Seufer <ths@mips.com>
270 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime.
272 2006-08-01 Thiemo Seufer <ths@mips.com>
274 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
275 (md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
276 BFD_RELOC_32 and BFD_RELOC_16.
277 (s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
278 md_convert_frag, md_obj_end): Fix comment formatting.
280 2006-07-31 Thiemo Seufer <ths@mips.com>
282 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
283 handling for BFD_RELOC_MIPS16_JMP.
285 2006-07-24 Andreas Schwab <schwab@suse.de>
288 * read.c (read_a_source_file): Ignore unknown text after line
289 comment character. Fix misleading comment.
291 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
293 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
294 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
295 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
296 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
297 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
298 doc/c-z80.texi, doc/internals.texi: Fix some typos.
300 2006-07-21 Nick Clifton <nickc@redhat.com>
302 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
305 2006-07-20 Thiemo Seufer <ths@mips.com>
306 Nigel Stephens <nigel@mips.com>
308 * config/tc-mips.c (md_parse_option): Don't infer optimisation
309 options from debug options.
311 2006-07-20 Thiemo Seufer <ths@mips.com>
313 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
314 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
316 2006-07-19 Paul Brook <paul@codesourcery.com>
318 * config/tc-arm.c (insns): Fix rbit Arm opcode.
320 2006-07-18 Paul Brook <paul@codesourcery.com>
322 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
323 (md_convert_frag): Use correct reloc for add_pc. Use
324 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
325 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
326 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
328 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
330 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
331 when file and line unknown.
333 2006-07-17 Thiemo Seufer <ths@mips.com>
335 * read.c (s_struct): Use IS_ELF.
336 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
337 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
338 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
339 s_mips_mask): Likewise.
341 2006-07-16 Thiemo Seufer <ths@mips.com>
342 David Ung <davidu@mips.com>
344 * read.c (s_struct): Handle ELF section changing.
345 * config/tc-mips.c (s_align): Leave enabling auto-align to the
347 (s_change_sec): Try section changing only if we output ELF.
349 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
351 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
353 (smallest_imm_type): Remove Cpu086.
354 (i386_target_format): Likewise.
356 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
359 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
360 Michael Meissner <michael.meissner@amd.com>
362 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
363 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
364 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
366 (i386_align_code): Ditto.
367 (md_assemble_code): Add support for insertq/extrq instructions,
368 swapping as needed for intel syntax.
369 (swap_imm_operands): New function to swap immediate operands.
370 (swap_operands): Deal with 4 operand instructions.
371 (build_modrm_byte): Add support for insertq instruction.
373 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
375 * config/tc-i386.h (Size64): Fix a typo in comment.
377 2006-07-12 Nick Clifton <nickc@redhat.com>
379 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
380 fixup_segment() to repeat a range check on a value that has
381 already been checked here.
383 2006-07-07 James E Wilson <wilson@specifix.com>
385 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
387 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
388 Nick Clifton <nickc@redhat.com>
391 * doc/as.texi: Fix spelling typo: branchs => branches.
392 * doc/c-m68hc11.texi: Likewise.
393 * config/tc-m68hc11.c: Likewise.
394 Support old spelling of command line switch for backwards
397 2006-07-04 Thiemo Seufer <ths@mips.com>
398 David Ung <davidu@mips.com>
400 * config/tc-mips.c (s_is_linkonce): New function.
401 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
402 weak, external, and linkonce symbols.
403 (pic_need_relax): Use s_is_linkonce.
405 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
407 * doc/as.texinfo (Org): Remove space.
408 (P2align): Add "@var{abs-expr},".
410 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
412 * config/tc-i386.c (cpu_arch_tune_set): New.
413 (cpu_arch_isa): Likewise.
414 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
415 nops with short or long nop sequences based on -march=/.arch
417 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
418 set cpu_arch_tune and cpu_arch_tune_flags.
419 (md_parse_option): For -march=, set cpu_arch_isa and set
420 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
421 0. Set cpu_arch_tune_set to 1 for -mtune=.
422 (i386_target_format): Don't set cpu_arch_tune.
424 2006-06-23 Nigel Stephens <nigel@mips.com>
426 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
427 generated .sbss.* and .gnu.linkonce.sb.*.
429 2006-06-23 Thiemo Seufer <ths@mips.com>
430 David Ung <davidu@mips.com>
432 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
434 * config/tc-mips.c (label_list): Define per-segment label_list.
435 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
436 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
437 mips_from_file_after_relocs, mips_define_label): Use per-segment
440 2006-06-22 Thiemo Seufer <ths@mips.com>
442 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
443 (append_insn): Use it.
444 (md_apply_fix): Whitespace formatting.
445 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
446 mips16_extended_frag): Remove register specifier.
447 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
450 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
452 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
453 a directive saving VFP registers for ARMv6 or later.
454 (s_arm_unwind_save): Add parameter arch_v6 and call
455 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
457 (md_pseudo_table): Add entry for new "vsave" directive.
458 * doc/c-arm.texi: Correct error in example for "save"
459 directive (fstmdf -> fstmdx). Also document "vsave" directive.
461 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
462 Anatoly Sokolov <aesok@post.ru>
464 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
465 and atmega644p devices. Rename atmega164/atmega324 devices to
466 atmega164p/atmega324p.
467 * doc/c-avr.texi: Document new mcu and arch options.
469 2006-06-17 Nick Clifton <nickc@redhat.com>
471 * config/tc-arm.c (enum parse_operand_result): Move outside of
472 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
474 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
476 * config/tc-i386.h (processor_type): New.
477 (arch_entry): Add type.
479 * config/tc-i386.c (cpu_arch_tune): New.
480 (cpu_arch_tune_flags): Likewise.
481 (cpu_arch_isa_flags): Likewise.
483 (set_cpu_arch): Also update cpu_arch_isa_flags.
484 (md_assemble): Update cpu_arch_isa_flags.
486 (OPTION_MTUNE): Likewise.
487 (md_longopts): Add -march= and -mtune=.
488 (md_parse_option): Support -march= and -mtune=.
489 (md_show_usage): Add -march=CPU/-mtune=CPU.
490 (i386_target_format): Also update cpu_arch_isa_flags,
491 cpu_arch_tune and cpu_arch_tune_flags.
493 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
495 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
497 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
499 * config/tc-arm.c (enum parse_operand_result): New.
500 (struct group_reloc_table_entry): New.
501 (enum group_reloc_type): New.
502 (group_reloc_table): New array.
503 (find_group_reloc_table_entry): New function.
504 (parse_shifter_operand_group_reloc): New function.
505 (parse_address_main): New function, incorporating code
506 from the old parse_address function. To be used via...
507 (parse_address): wrapper for parse_address_main; and
508 (parse_address_group_reloc): new function, likewise.
509 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
510 OP_ADDRGLDRS, OP_ADDRGLDC.
511 (parse_operands): Support for these new operand codes.
512 New macro po_misc_or_fail_no_backtrack.
513 (encode_arm_cp_address): Preserve group relocations.
514 (insns): Modify to use the above operand codes where group
515 relocations are permitted.
516 (md_apply_fix): Handle the group relocations
517 ALU_PC_G0_NC through LDC_SB_G2.
518 (tc_gen_reloc): Likewise.
519 (arm_force_relocation): Leave group relocations for the linker.
520 (arm_fix_adjustable): Likewise.
522 2006-06-15 Julian Brown <julian@codesourcery.com>
524 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
525 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
528 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
530 * config/tc-i386.c (process_suffix): Don't add rex64 for
533 2006-06-09 Thiemo Seufer <ths@mips.com>
535 * config/tc-mips.c (mips_ip): Maintain argument count.
537 2006-06-09 Alan Modra <amodra@bigpond.net.au>
539 * config/tc-iq2000.c: Include sb.h.
541 2006-06-08 Nigel Stephens <nigel@mips.com>
543 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
544 aliases for better compatibility with SGI tools.
546 2006-06-08 Alan Modra <amodra@bigpond.net.au>
548 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
549 * Makefile.am (GASLIBS): Expand @BFDLIB@.
551 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
552 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
553 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
555 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
556 * Makefile.in: Regenerate.
557 * doc/Makefile.in: Regenerate.
558 * configure: Regenerate.
560 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
562 * po/Make-in (pdf, ps): New dummy targets.
564 2006-06-07 Julian Brown <julian@codesourcery.com>
566 * config/tc-arm.c (stdarg.h): include.
567 (arm_it): Add uncond_value field. Add isvec and issingle to operand
569 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
570 REG_TYPE_NSDQ (single, double or quad vector reg).
571 (reg_expected_msgs): Update.
572 (BAD_FPU): Add macro for unsupported FPU instruction error.
573 (parse_neon_type): Support 'd' as an alias for .f64.
574 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
576 (parse_vfp_reg_list): Don't update first arg on error.
577 (parse_neon_mov): Support extra syntax for VFP moves.
578 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
579 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
580 (parse_operands): Support isvec, issingle operands fields, new parse
582 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
584 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
585 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
586 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
587 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
589 (neon_shape): Redefine in terms of above.
590 (neon_shape_class): New enumeration, table of shape classes.
591 (neon_shape_el): New enumeration. One element of a shape.
592 (neon_shape_el_size): Register widths of above, where appropriate.
593 (neon_shape_info): New struct. Info for shape table.
594 (neon_shape_tab): New array.
595 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
596 (neon_check_shape): Rewrite as...
597 (neon_select_shape): New function to classify instruction shapes,
598 driven by new table neon_shape_tab array.
599 (neon_quad): New function. Return 1 if shape should set Q flag in
600 instructions (or equivalent), 0 otherwise.
601 (type_chk_of_el_type): Support F64.
602 (el_type_of_type_chk): Likewise.
603 (neon_check_type): Add support for VFP type checking (VFP data
604 elements fill their containing registers).
605 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
606 in thumb mode for VFP instructions.
607 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
608 and encode the current instruction as if it were that opcode.
609 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
610 arguments, call function in PFN.
611 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
612 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
613 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
614 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
615 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
616 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
617 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
618 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
619 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
620 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
621 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
622 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
623 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
624 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
625 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
627 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
628 between VFP and Neon turns out to belong to Neon. Perform
629 architecture check and fill in condition field if appropriate.
630 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
631 (do_neon_cvt): Add support for VFP variants of instructions.
632 (neon_cvt_flavour): Extend to cover VFP conversions.
633 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
635 (do_neon_ldr_str): Handle single-precision VFP load/store.
636 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
637 NS_NULL not NS_IGNORE.
638 (opcode_tag): Add OT_csuffixF for operands which either take a
639 conditional suffix, or have 0xF in the condition field.
640 (md_assemble): Add support for OT_csuffixF.
641 (NCE): Replace macro with...
642 (NCE_tag, NCE, NCEF): New macros.
643 (nCE): Replace macro with...
644 (nCE_tag, nCE, nCEF): New macros.
645 (insns): Add support for VFP insns or VFP versions of insns msr,
646 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
647 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
648 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
649 VFP/Neon insns together.
651 2006-06-07 Alan Modra <amodra@bigpond.net.au>
652 Ladislav Michl <ladis@linux-mips.org>
654 * app.c: Don't include headers already included by as.h.
656 * atof-generic.c: Likewise.
658 * dwarf2dbg.c: Likewise.
660 * input-file.c: Likewise.
661 * input-scrub.c: Likewise.
663 * output-file.c: Likewise.
666 * config/bfin-lex.l: Likewise.
667 * config/obj-coff.h: Likewise.
668 * config/obj-elf.h: Likewise.
669 * config/obj-som.h: Likewise.
670 * config/tc-arc.c: Likewise.
671 * config/tc-arm.c: Likewise.
672 * config/tc-avr.c: Likewise.
673 * config/tc-bfin.c: Likewise.
674 * config/tc-cris.c: Likewise.
675 * config/tc-d10v.c: Likewise.
676 * config/tc-d30v.c: Likewise.
677 * config/tc-dlx.h: Likewise.
678 * config/tc-fr30.c: Likewise.
679 * config/tc-frv.c: Likewise.
680 * config/tc-h8300.c: Likewise.
681 * config/tc-hppa.c: Likewise.
682 * config/tc-i370.c: Likewise.
683 * config/tc-i860.c: Likewise.
684 * config/tc-i960.c: Likewise.
685 * config/tc-ip2k.c: Likewise.
686 * config/tc-iq2000.c: Likewise.
687 * config/tc-m32c.c: Likewise.
688 * config/tc-m32r.c: Likewise.
689 * config/tc-maxq.c: Likewise.
690 * config/tc-mcore.c: Likewise.
691 * config/tc-mips.c: Likewise.
692 * config/tc-mmix.c: Likewise.
693 * config/tc-mn10200.c: Likewise.
694 * config/tc-mn10300.c: Likewise.
695 * config/tc-msp430.c: Likewise.
696 * config/tc-mt.c: Likewise.
697 * config/tc-ns32k.c: Likewise.
698 * config/tc-openrisc.c: Likewise.
699 * config/tc-ppc.c: Likewise.
700 * config/tc-s390.c: Likewise.
701 * config/tc-sh.c: Likewise.
702 * config/tc-sh64.c: Likewise.
703 * config/tc-sparc.c: Likewise.
704 * config/tc-tic30.c: Likewise.
705 * config/tc-tic4x.c: Likewise.
706 * config/tc-tic54x.c: Likewise.
707 * config/tc-v850.c: Likewise.
708 * config/tc-vax.c: Likewise.
709 * config/tc-xc16x.c: Likewise.
710 * config/tc-xstormy16.c: Likewise.
711 * config/tc-xtensa.c: Likewise.
712 * config/tc-z80.c: Likewise.
713 * config/tc-z8k.c: Likewise.
714 * macro.h: Don't include sb.h or ansidecl.h.
715 * sb.h: Don't include stdio.h or ansidecl.h.
716 * cond.c: Include sb.h.
717 * itbl-lex.l: Include as.h instead of other system headers.
718 * itbl-parse.y: Likewise.
719 * itbl-ops.c: Similarly.
720 * itbl-ops.h: Don't include as.h or ansidecl.h.
721 * config/bfin-defs.h: Don't include bfd.h or as.h.
722 * config/bfin-parse.y: Include as.h instead of other system headers.
724 2006-06-06 Ben Elliston <bje@au.ibm.com>
725 Anton Blanchard <anton@samba.org>
727 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
728 (md_show_usage): Document it.
729 (ppc_setup_opcodes): Test power6 opcode flag bits.
730 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
732 2006-06-06 Thiemo Seufer <ths@mips.com>
733 Chao-ying Fu <fu@mips.com>
735 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
736 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
737 (macro_build): Update comment.
738 (mips_ip): Allow DSP64 instructions for MIPS64R2.
739 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
741 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
742 MIPS_CPU_ASE_MDMX flags for sb1.
744 2006-06-05 Thiemo Seufer <ths@mips.com>
746 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
748 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
749 (mips_ip): Make overflowed/underflowed constant arguments in DSP
750 and MT instructions a fatal error. Use INSERT_OPERAND where
751 appropriate. Improve warnings for break and wait code overflows.
752 Use symbolic constant of OP_MASK_COPZ.
753 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
755 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
757 * po/Make-in (top_builddir): Define.
759 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
761 * doc/Makefile.am (TEXI2DVI): Define.
762 * doc/Makefile.in: Regenerate.
763 * doc/c-arc.texi: Fix typo.
765 2006-06-01 Alan Modra <amodra@bigpond.net.au>
767 * config/obj-ieee.c: Delete.
768 * config/obj-ieee.h: Delete.
769 * Makefile.am (OBJ_FORMATS): Remove ieee.
770 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
771 (obj-ieee.o): Remove rule.
772 * Makefile.in: Regenerate.
773 * configure.in (atof): Remove tahoe.
774 (OBJ_MAYBE_IEEE): Don't define.
775 * configure: Regenerate.
776 * config.in: Regenerate.
777 * doc/Makefile.in: Regenerate.
778 * po/POTFILES.in: Regenerate.
780 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
782 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
783 and LIBINTL_DEP everywhere.
785 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
786 * acinclude.m4: Include new gettext macros.
787 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
788 Remove local code for po/Makefile.
789 * Makefile.in, configure, doc/Makefile.in: Regenerated.
791 2006-05-30 Nick Clifton <nickc@redhat.com>
793 * po/es.po: Updated Spanish translation.
795 2006-05-06 Denis Chertykov <denisc@overta.ru>
797 * doc/c-avr.texi: New file.
798 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
799 * doc/all.texi: Set AVR
800 * doc/as.texinfo: Include c-avr.texi
802 2006-05-28 Jie Zhang <jie.zhang@analog.com>
804 * config/bfin-parse.y (check_macfunc): Loose the condition of
805 calling check_multiply_halfregs ().
807 2006-05-25 Jie Zhang <jie.zhang@analog.com>
809 * config/bfin-parse.y (asm_1): Better check and deal with
810 vector and scalar Multiply 16-Bit Operands instructions.
812 2006-05-24 Nick Clifton <nickc@redhat.com>
814 * config/tc-hppa.c: Convert to ISO C90 format.
815 * config/tc-hppa.h: Likewise.
817 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
818 Randolph Chung <randolph@tausq.org>
820 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
821 is_tls_ieoff, is_tls_leoff): Define.
822 (fix_new_hppa): Handle TLS.
823 (cons_fix_new_hppa): Likewise.
825 (md_apply_fix): Handle TLS relocs.
826 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
828 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
830 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
832 2006-05-23 Thiemo Seufer <ths@mips.com>
833 David Ung <davidu@mips.com>
834 Nigel Stephens <nigel@mips.com>
837 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
838 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
839 ISA_HAS_MXHC1): New macros.
840 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
841 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
842 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
843 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
844 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
845 (mips_after_parse_args): Change default handling of float register
846 size to account for 32bit code with 64bit FP. Better sanity checking
847 of ISA/ASE/ABI option combinations.
848 (s_mipsset): Support switching of GPR and FPR sizes via
849 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
851 (mips_elf_final_processing): We should record the use of 64bit FP
852 registers in 32bit code but we don't, because ELF header flags are
854 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
855 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
856 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
857 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
858 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
859 missing -march options. Document .set arch=CPU. Move .set smartmips
860 to ASE page. Use @code for .set FOO examples.
862 2006-05-23 Jie Zhang <jie.zhang@analog.com>
864 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
867 2006-05-23 Jie Zhang <jie.zhang@analog.com>
869 * config/bfin-defs.h (bfin_equals): Remove declaration.
870 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
871 * config/tc-bfin.c (bfin_name_is_register): Remove.
872 (bfin_equals): Remove.
873 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
874 (bfin_name_is_register): Remove declaration.
876 2006-05-19 Thiemo Seufer <ths@mips.com>
877 Nigel Stephens <nigel@mips.com>
879 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
880 (mips_oddfpreg_ok): New function.
883 2006-05-19 Thiemo Seufer <ths@mips.com>
884 David Ung <davidu@mips.com>
886 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
887 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
888 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
889 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
890 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
891 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
892 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
893 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
894 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
895 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
896 reg_names_o32, reg_names_n32n64): Define register classes.
897 (reg_lookup): New function, use register classes.
898 (md_begin): Reserve register names in the symbol table. Simplify
900 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
902 (mips16_ip): Use reg_lookup.
903 (tc_get_register): Likewise.
904 (tc_mips_regname_to_dw2regnum): New function.
906 2006-05-19 Thiemo Seufer <ths@mips.com>
908 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
909 Un-constify string argument.
910 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
912 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
914 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
916 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
918 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
920 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
923 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
925 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
926 cfloat/m68881 to correct architecture before using it.
928 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
930 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
933 2006-05-15 Paul Brook <paul@codesourcery.com>
935 * config/tc-arm.c (arm_adjust_symtab): Use
936 bfd_is_arm_special_symbol_name.
938 2006-05-15 Bob Wilson <bob.wilson@acm.org>
940 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
941 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
942 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
943 Handle errors from calls to xtensa_opcode_is_* functions.
945 2006-05-14 Thiemo Seufer <ths@mips.com>
947 * config/tc-mips.c (macro_build): Test for currently active
949 (mips16_ip): Reject invalid opcodes.
951 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
953 * doc/as.texinfo: Rename "Index" to "AS Index",
954 and "ABORT" to "ABORT (COFF)".
956 2006-05-11 Paul Brook <paul@codesourcery.com>
958 * config/tc-arm.c (parse_half): New function.
959 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
960 (parse_operands): Ditto.
961 (do_mov16): Reject invalid relocations.
962 (do_t_mov16): Ditto. Use Thumb reloc numbers.
963 (insns): Replace Iffff with HALF.
964 (md_apply_fix): Add MOVW and MOVT relocs.
965 (tc_gen_reloc): Ditto.
966 * doc/c-arm.texi: Document relocation operators
968 2006-05-11 Paul Brook <paul@codesourcery.com>
970 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
972 2006-05-11 Thiemo Seufer <ths@mips.com>
974 * config/tc-mips.c (append_insn): Don't check the range of j or
977 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
979 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
980 relocs against external symbols for WinCE targets.
981 (md_apply_fix): Likewise.
983 2006-05-09 David Ung <davidu@mips.com>
985 * config/tc-mips.c (append_insn): Only warn about an out-of-range
988 2006-05-09 Nick Clifton <nickc@redhat.com>
990 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
991 against symbols which are not going to be placed into the symbol
994 2006-05-09 Ben Elliston <bje@au.ibm.com>
996 * expr.c (operand): Remove `if (0 && ..)' statement and
997 subsequently unused target_op label. Collapse `if (1 || ..)'
999 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
1000 separately above the switch.
1002 2006-05-08 Nick Clifton <nickc@redhat.com>
1005 * config/tc-msp430.c (line_separator_character): Define as |.
1007 2006-05-08 Thiemo Seufer <ths@mips.com>
1008 Nigel Stephens <nigel@mips.com>
1009 David Ung <davidu@mips.com>
1011 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
1012 (mips_opts): Likewise.
1013 (file_ase_smartmips): New variable.
1014 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
1015 (macro_build): Handle SmartMIPS instructions.
1016 (mips_ip): Likewise.
1017 (md_longopts): Add argument handling for smartmips.
1018 (md_parse_options, mips_after_parse_args): Likewise.
1019 (s_mipsset): Add .set smartmips support.
1020 (md_show_usage): Document -msmartmips/-mno-smartmips.
1021 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
1023 * doc/c-mips.texi: Likewise.
1025 2006-05-08 Alan Modra <amodra@bigpond.net.au>
1027 * write.c (relax_segment): Add pass count arg. Don't error on
1028 negative org/space on first two passes.
1029 (relax_seg_info): New struct.
1030 (relax_seg, write_object_file): Adjust.
1031 * write.h (relax_segment): Update prototype.
1033 2006-05-05 Julian Brown <julian@codesourcery.com>
1035 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
1037 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
1038 architecture version checks.
1039 (insns): Allow overlapping instructions to be used in VFP mode.
1041 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
1044 * config/obj-elf.c (obj_elf_change_section): Allow user
1045 specified SHF_ALPHA_GPREL.
1047 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
1049 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
1050 for PMEM related expressions.
1052 2006-05-05 Nick Clifton <nickc@redhat.com>
1055 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
1056 insertion of a directory separator character into a string at a
1057 given offset. Uses heuristics to decide when to use a backslash
1058 character rather than a forward-slash character.
1059 (dwarf2_directive_loc): Use the macro.
1060 (out_debug_info): Likewise.
1062 2006-05-05 Thiemo Seufer <ths@mips.com>
1063 David Ung <davidu@mips.com>
1065 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
1067 (macro): Add new case M_CACHE_AB.
1069 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
1071 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
1072 (opcode_lookup): Issue a warning for opcode with
1073 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
1074 identical to OT_cinfix3.
1075 (TxC3w, TC3w, tC3w): New.
1076 (insns): Use tC3w and TC3w for comparison instructions with
1079 2006-05-04 Alan Modra <amodra@bigpond.net.au>
1081 * subsegs.h (struct frchain): Delete frch_seg.
1082 (frchain_root): Delete.
1083 (seg_info): Define as macro.
1084 * subsegs.c (frchain_root): Delete.
1085 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
1086 (subsegs_begin, subseg_change): Adjust for above.
1087 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
1088 rather than to one big list.
1089 (subseg_get): Don't special case abs, und sections.
1090 (subseg_new, subseg_force_new): Don't set frchainP here.
1092 (subsegs_print_statistics): Adjust frag chain control list traversal.
1093 * debug.c (dmp_frags): Likewise.
1094 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
1095 at frchain_root. Make use of known frchain ordering.
1096 (last_frag_for_seg): Likewise.
1097 (get_frag_fix): Likewise. Add seg param.
1098 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
1099 * write.c (chain_frchains_together_1): Adjust for struct frchain.
1100 (SUB_SEGMENT_ALIGN): Likewise.
1101 (subsegs_finish): Adjust frchain list traversal.
1102 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
1103 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
1104 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
1105 (xtensa_fix_b_j_loop_end_frags): Likewise.
1106 (xtensa_fix_close_loop_end_frags): Likewise.
1107 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
1108 (retrieve_segment_info): Delete frch_seg initialisation.
1110 2006-05-03 Alan Modra <amodra@bigpond.net.au>
1112 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
1113 * config/obj-elf.h (obj_sec_set_private_data): Delete.
1114 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
1115 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
1117 2006-05-02 Joseph Myers <joseph@codesourcery.com>
1119 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
1121 (md_apply_fix3): Multiply offset by 4 here for
1122 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
1124 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1125 Jan Beulich <jbeulich@novell.com>
1127 * config/tc-i386.c (output_invalid_buf): Change size for
1129 * config/tc-tic30.c (output_invalid_buf): Likewise.
1131 * config/tc-i386.c (output_invalid): Cast none-ascii char to
1133 * config/tc-tic30.c (output_invalid): Likewise.
1135 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
1137 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
1138 (TEXI2POD): Use AM_MAKEINFOFLAGS.
1139 (asconfig.texi): Don't set top_srcdir.
1140 * doc/as.texinfo: Don't use top_srcdir.
1141 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
1143 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
1145 * config/tc-i386.c (output_invalid_buf): Change size to 16.
1146 * config/tc-tic30.c (output_invalid_buf): Likewise.
1148 * config/tc-i386.c (output_invalid): Use snprintf instead of
1150 * config/tc-ia64.c (declare_register_set): Likewise.
1151 (emit_one_bundle): Likewise.
1152 (check_dependencies): Likewise.
1153 * config/tc-tic30.c (output_invalid): Likewise.
1155 2006-05-02 Paul Brook <paul@codesourcery.com>
1157 * config/tc-arm.c (arm_optimize_expr): New function.
1158 * config/tc-arm.h (md_optimize_expr): Define
1159 (arm_optimize_expr): Add prototype.
1160 (TC_FORCE_RELOCATION_SUB_SAME): Define.
1162 2006-05-02 Ben Elliston <bje@au.ibm.com>
1164 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
1167 * sb.h (sb_list_vector): Move to sb.c.
1168 * sb.c (free_list): Use type of sb_list_vector directly.
1169 (sb_build): Fix off-by-one error in assertion about `size'.
1171 2006-05-01 Ben Elliston <bje@au.ibm.com>
1173 * listing.c (listing_listing): Remove useless loop.
1174 * macro.c (macro_expand): Remove is_positional local variable.
1175 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
1176 and simplify surrounding expressions, where possible.
1177 (assign_symbol): Likewise.
1178 (s_weakref): Likewise.
1179 * symbols.c (colon): Likewise.
1181 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
1183 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
1185 2006-04-30 Thiemo Seufer <ths@mips.com>
1186 David Ung <davidu@mips.com>
1188 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
1189 (mips_immed): New table that records various handling of udi
1190 instruction patterns.
1191 (mips_ip): Adds udi handling.
1193 2006-04-28 Alan Modra <amodra@bigpond.net.au>
1195 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
1196 of list rather than beginning.
1198 2006-04-26 Julian Brown <julian@codesourcery.com>
1200 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
1201 (is_quarter_float): Rename from above. Simplify slightly.
1202 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
1204 (parse_neon_mov): Parse floating-point constants.
1205 (neon_qfloat_bits): Fix encoding.
1206 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
1207 preference to integer encoding when using the F32 type.
1209 2006-04-26 Julian Brown <julian@codesourcery.com>
1211 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
1212 zero-initialising structures containing it will lead to invalid types).
1213 (arm_it): Add vectype to each operand.
1214 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
1216 (neon_typed_alias): New structure. Extra information for typed
1218 (reg_entry): Add neon type info field.
1219 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
1220 Break out alternative syntax for coprocessor registers, etc. into...
1221 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
1222 out from arm_reg_parse.
1223 (parse_neon_type): Move. Return SUCCESS/FAIL.
1224 (first_error): New function. Call to ensure first error which occurs is
1226 (parse_neon_operand_type): Parse exactly one type.
1227 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
1228 (parse_typed_reg_or_scalar): New function. Handle core of both
1229 arm_typed_reg_parse and parse_scalar.
1230 (arm_typed_reg_parse): Parse a register with an optional type.
1231 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
1233 (parse_scalar): Parse a Neon scalar with optional type.
1234 (parse_reg_list): Use first_error.
1235 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
1236 (neon_alias_types_same): New function. Return true if two (alias) types
1238 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
1240 (insert_reg_alias): Return new reg_entry not void.
1241 (insert_neon_reg_alias): New function. Insert type/index information as
1242 well as register for alias.
1243 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
1244 make typed register aliases accordingly.
1245 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
1247 (s_unreq): Delete type information if present.
1248 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
1249 (s_arm_unwind_save_mmxwcg): Likewise.
1250 (s_arm_unwind_movsp): Likewise.
1251 (s_arm_unwind_setfp): Likewise.
1252 (parse_shift): Likewise.
1253 (parse_shifter_operand): Likewise.
1254 (parse_address): Likewise.
1255 (parse_tb): Likewise.
1256 (tc_arm_regname_to_dw2regnum): Likewise.
1257 (md_pseudo_table): Add dn, qn.
1258 (parse_neon_mov): Handle typed operands.
1259 (parse_operands): Likewise.
1260 (neon_type_mask): Add N_SIZ.
1261 (N_ALLMODS): New macro.
1262 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
1263 (el_type_of_type_chk): Add some safeguards.
1264 (modify_types_allowed): Fix logic bug.
1265 (neon_check_type): Handle operands with types.
1266 (neon_three_same): Remove redundant optional arg handling.
1267 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
1268 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
1269 (do_neon_step): Adjust accordingly.
1270 (neon_cmode_for_logic_imm): Use first_error.
1271 (do_neon_bitfield): Call neon_check_type.
1272 (neon_dyadic): Rename to...
1273 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
1274 to allow modification of type of the destination.
1275 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1276 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
1277 (do_neon_compare): Make destination be an untyped bitfield.
1278 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1279 (neon_mul_mac): Return early in case of errors.
1280 (neon_move_immediate): Use first_error.
1281 (neon_mac_reg_scalar_long): Fix type to include scalar.
1282 (do_neon_dup): Likewise.
1283 (do_neon_mov): Likewise (in several places).
1284 (do_neon_tbl_tbx): Fix type.
1285 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1286 (do_neon_ld_dup): Exit early in case of errors and/or use
1288 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1289 Handle .dn/.qn directives.
1290 (REGDEF): Add zero for reg_entry neon field.
1292 2006-04-26 Julian Brown <julian@codesourcery.com>
1294 * config/tc-arm.c (limits.h): Include.
1295 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1296 (fpu_vfp_v3_or_neon_ext): Declare constants.
1297 (neon_el_type): New enumeration of types for Neon vector elements.
1298 (neon_type_el): New struct. Define type and size of a vector element.
1299 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1301 (neon_type): Define struct. The type of an instruction.
1302 (arm_it): Add 'vectype' for the current instruction.
1303 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1304 (vfp_sp_reg_pos): Rename to...
1305 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1307 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1308 (Neon D or Q register).
1309 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1311 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1312 (my_get_expression): Allow above constant as argument to accept
1313 64-bit constants with optional prefix.
1314 (arm_reg_parse): Add extra argument to return the specific type of
1315 register in when either a D or Q register (REG_TYPE_NDQ) is
1316 requested. Can be NULL.
1317 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1318 (parse_reg_list): Update for new arm_reg_parse args.
1319 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1320 (parse_neon_el_struct_list): New function. Parse element/structure
1321 register lists for VLD<n>/VST<n> instructions.
1322 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1323 (s_arm_unwind_save_mmxwr): Likewise.
1324 (s_arm_unwind_save_mmxwcg): Likewise.
1325 (s_arm_unwind_movsp): Likewise.
1326 (s_arm_unwind_setfp): Likewise.
1327 (parse_big_immediate): New function. Parse an immediate, which may be
1328 64 bits wide. Put results in inst.operands[i].
1329 (parse_shift): Update for new arm_reg_parse args.
1330 (parse_address): Likewise. Add parsing of alignment specifiers.
1331 (parse_neon_mov): Parse the operands of a VMOV instruction.
1332 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1333 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1334 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1335 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1336 (parse_operands): Handle new codes above.
1337 (encode_arm_vfp_sp_reg): Rename to...
1338 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1339 selected VFP version only supports D0-D15.
1340 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1341 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1342 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1343 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1344 encode_arm_vfp_reg name, and allow 32 D regs.
1345 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1346 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1348 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1349 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1350 constant-load and conversion insns introduced with VFPv3.
1351 (neon_tab_entry): New struct.
1352 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1353 those which are the targets of pseudo-instructions.
1354 (neon_opc): Enumerate opcodes, use as indices into...
1355 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1356 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1357 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1358 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1360 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1362 (neon_type_mask): New. Compact type representation for type checking.
1363 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1364 permitted type combinations.
1365 (N_IGNORE_TYPE): New macro.
1366 (neon_check_shape): New function. Check an instruction shape for
1367 multiple alternatives. Return the specific shape for the current
1369 (neon_modify_type_size): New function. Modify a vector type and size,
1370 depending on the bit mask in argument 1.
1371 (neon_type_promote): New function. Convert a given "key" type (of an
1372 operand) into the correct type for a different operand, based on a bit
1374 (type_chk_of_el_type): New function. Convert a type and size into the
1375 compact representation used for type checking.
1376 (el_type_of_type_ckh): New function. Reverse of above (only when a
1377 single bit is set in the bit mask).
1378 (modify_types_allowed): New function. Alter a mask of allowed types
1379 based on a bit mask of modifications.
1380 (neon_check_type): New function. Check the type of the current
1381 instruction against the variable argument list. The "key" type of the
1382 instruction is returned.
1383 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1384 a Neon data-processing instruction depending on whether we're in ARM
1385 mode or Thumb-2 mode.
1386 (neon_logbits): New function.
1387 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1388 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1389 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1390 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1391 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1392 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1393 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1394 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1395 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1396 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1397 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1398 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1399 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1400 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1401 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1402 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1403 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1404 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1405 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1406 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1407 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1408 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1409 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1410 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1411 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1413 (parse_neon_type): New function. Parse Neon type specifier.
1414 (opcode_lookup): Allow parsing of Neon type specifiers.
1415 (REGNUM2, REGSETH, REGSET2): New macros.
1416 (reg_names): Add new VFPv3 and Neon registers.
1417 (NUF, nUF, NCE, nCE): New macros for opcode table.
1418 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1419 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1420 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1421 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1422 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1423 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1424 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1425 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1426 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1427 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1428 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1429 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1430 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1431 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1433 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1434 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1435 (arm_option_cpu_value): Add vfp3 and neon.
1436 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1439 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1441 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1442 syntax instead of hardcoded opcodes with ".w18" suffixes.
1443 (wide_branch_opcode): New.
1444 (build_transition): Use it to check for wide branch opcodes with
1445 either ".w18" or ".w15" suffixes.
1447 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1449 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1450 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1451 frag's is_literal flag.
1453 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1455 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1457 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1459 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1460 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1461 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1462 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1463 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1465 2005-04-20 Paul Brook <paul@codesourcery.com>
1467 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1469 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1471 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1473 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1474 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1475 Make some cpus unsupported on ELF. Run "make dep-am".
1476 * Makefile.in: Regenerate.
1478 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1480 * configure.in (--enable-targets): Indent help message.
1481 * configure: Regenerate.
1483 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1486 * config/tc-i386.c (i386_immediate): Check illegal immediate
1489 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1491 * config/tc-i386.c: Formatting.
1492 (output_disp, output_imm): ISO C90 params.
1494 * frags.c (frag_offset_fixed_p): Constify args.
1495 * frags.h (frag_offset_fixed_p): Ditto.
1497 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1498 (COFF_MAGIC): Delete.
1500 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1502 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1504 * po/POTFILES.in: Regenerated.
1506 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1508 * doc/as.texinfo: Mention that some .type syntaxes are not
1509 supported on all architectures.
1511 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1513 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1514 instructions when such transformations have been disabled.
1516 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1518 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1519 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1520 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1521 decoding the loop instructions. Remove current_offset variable.
1522 (xtensa_fix_short_loop_frags): Likewise.
1523 (min_bytes_to_other_loop_end): Remove current_offset argument.
1525 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1527 * config/tc-z80.c (z80_optimize_expr): Removed.
1528 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1530 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1532 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1533 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1534 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1535 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1536 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1537 at90can64, at90usb646, at90usb647, at90usb1286 and
1539 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1541 2006-04-07 Paul Brook <paul@codesourcery.com>
1543 * config/tc-arm.c (parse_operands): Set default error message.
1545 2006-04-07 Paul Brook <paul@codesourcery.com>
1547 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1549 2006-04-07 Paul Brook <paul@codesourcery.com>
1551 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1553 2006-04-07 Paul Brook <paul@codesourcery.com>
1555 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1556 (move_or_literal_pool): Handle Thumb-2 instructions.
1557 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1559 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1562 * config/tc-i386.c (match_template): Move 64-bit operand tests
1565 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1567 * po/Make-in: Add install-html target.
1568 * Makefile.am: Add install-html and install-html-recursive targets.
1569 * Makefile.in: Regenerate.
1570 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1571 * configure: Regenerate.
1572 * doc/Makefile.am: Add install-html and install-html-am targets.
1573 * doc/Makefile.in: Regenerate.
1575 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1577 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1580 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1581 Daniel Jacobowitz <dan@codesourcery.com>
1583 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1584 (GOTT_BASE, GOTT_INDEX): New.
1585 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1586 GOTT_INDEX when generating VxWorks PIC.
1587 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1588 use the generic *-*-vxworks* stanza instead.
1590 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1593 * frags.c (frag_offset_fixed_p): New function.
1594 * frags.h (frag_offset_fixed_p): Declare.
1595 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1596 (resolve_expression): Likewise.
1598 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1600 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1601 of the same length but different numbers of slots.
1603 2006-03-30 Andreas Schwab <schwab@suse.de>
1605 * configure.in: Fix help string for --enable-targets option.
1606 * configure: Regenerate.
1608 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1610 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1611 (m68k_ip): ... here. Use for all chips. Protect against buffer
1612 overrun and avoid excessive copying.
1614 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1615 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1616 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1617 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1618 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1619 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1620 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1621 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1622 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1623 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1624 (struct m68k_cpu): Change chip field to control_regs.
1625 (current_chip): Remove.
1626 (control_regs): New.
1627 (m68k_archs, m68k_extensions): Adjust.
1628 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1629 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1630 (find_cf_chip): Reimplement for new organization of cpu table.
1631 (select_control_regs): Remove.
1633 (struct save_opts): Save control regs, not chip.
1634 (s_save, s_restore): Adjust.
1635 (m68k_lookup_cpu): Give deprecated warning when necessary.
1636 (m68k_init_arch): Adjust.
1637 (md_show_usage): Adjust for new cpu table organization.
1639 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1641 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1642 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1643 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1645 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1646 (any_gotrel): New rule.
1647 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1648 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1650 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1651 (bfin_pic_ptr): New function.
1652 (md_pseudo_table): Add it for ".picptr".
1653 (OPTION_FDPIC): New macro.
1654 (md_longopts): Add -mfdpic.
1655 (md_parse_option): Handle it.
1656 (md_begin): Set BFD flags.
1657 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1658 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1660 * Makefile.am (bfin-parse.o): Update dependencies.
1661 (DEPTC_bfin_elf): Likewise.
1662 * Makefile.in: Regenerate.
1664 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1666 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1667 mcfemac instead of mcfmac.
1669 2006-03-23 Michael Matz <matz@suse.de>
1671 * config/tc-i386.c (type_names): Correct placement of 'static'.
1672 (reloc): Map some more relocs to their 64 bit counterpart when
1674 (output_insn): Work around breakage if DEBUG386 is defined.
1675 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1676 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1677 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1678 different from i386.
1679 (output_imm): Ditto.
1680 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1682 (md_convert_frag): Jumps can now be larger than 2GB away, error
1684 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1685 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1687 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1688 Daniel Jacobowitz <dan@codesourcery.com>
1689 Phil Edwards <phil@codesourcery.com>
1690 Zack Weinberg <zack@codesourcery.com>
1691 Mark Mitchell <mark@codesourcery.com>
1692 Nathan Sidwell <nathan@codesourcery.com>
1694 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1695 (md_begin): Complain about -G being used for PIC. Don't change
1696 the text, data and bss alignments on VxWorks.
1697 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1698 generating VxWorks PIC.
1699 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1700 (macro): Likewise, but do not treat la $25 specially for
1701 VxWorks PIC, and do not handle jal.
1702 (OPTION_MVXWORKS_PIC): New macro.
1703 (md_longopts): Add -mvxworks-pic.
1704 (md_parse_option): Don't complain about using PIC and -G together here.
1705 Handle OPTION_MVXWORKS_PIC.
1706 (md_estimate_size_before_relax): Always use the first relaxation
1707 sequence on VxWorks.
1708 * config/tc-mips.h (VXWORKS_PIC): New.
1710 2006-03-21 Paul Brook <paul@codesourcery.com>
1712 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1714 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1716 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1717 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1718 (get_loop_align_size): New.
1719 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1720 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1721 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1722 (get_noop_aligned_address): Use get_loop_align_size.
1723 (get_aligned_diff): Likewise.
1725 2006-03-21 Paul Brook <paul@codesourcery.com>
1727 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1729 2006-03-20 Paul Brook <paul@codesourcery.com>
1731 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1732 (do_t_branch): Encode branches inside IT blocks as unconditional.
1733 (do_t_cps): New function.
1734 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1735 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1736 (opcode_lookup): Allow conditional suffixes on all instructions in
1738 (md_assemble): Advance condexec state before checking for errors.
1739 (insns): Use do_t_cps.
1741 2006-03-20 Paul Brook <paul@codesourcery.com>
1743 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1744 outputting the insn.
1746 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1748 * config/tc-vax.c: Update copyright year.
1749 * config/tc-vax.h: Likewise.
1751 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1753 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1755 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1757 2006-03-17 Paul Brook <paul@codesourcery.com>
1759 * config/tc-arm.c (insns): Add ldm and stm.
1761 2006-03-17 Ben Elliston <bje@au.ibm.com>
1764 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1766 2006-03-16 Paul Brook <paul@codesourcery.com>
1768 * config/tc-arm.c (insns): Add "svc".
1770 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1772 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1773 flag and avoid double underscore prefixes.
1775 2006-03-10 Paul Brook <paul@codesourcery.com>
1777 * config/tc-arm.c (md_begin): Handle EABIv5.
1778 (arm_eabis): Add EF_ARM_EABI_VER5.
1779 * doc/c-arm.texi: Document -meabi=5.
1781 2006-03-10 Ben Elliston <bje@au.ibm.com>
1783 * app.c (do_scrub_chars): Simplify string handling.
1785 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1786 Daniel Jacobowitz <dan@codesourcery.com>
1787 Zack Weinberg <zack@codesourcery.com>
1788 Nathan Sidwell <nathan@codesourcery.com>
1789 Paul Brook <paul@codesourcery.com>
1790 Ricardo Anguiano <anguiano@codesourcery.com>
1791 Phil Edwards <phil@codesourcery.com>
1793 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1794 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1796 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1797 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1798 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1800 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1802 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1803 even when using the text-section-literals option.
1805 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1807 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1809 (m68k_ip): <case 'J'> Check we have some control regs.
1810 (md_parse_option): Allow raw arch switch.
1811 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1812 whether 68881 or cfloat was meant by -mfloat.
1813 (md_show_usage): Adjust extension display.
1814 (m68k_elf_final_processing): Adjust.
1816 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1818 * config/tc-avr.c (avr_mod_hash_value): New function.
1819 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1820 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1821 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1822 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1824 (tc_gen_reloc): Handle substractions of symbols, if possible do
1825 fixups, abort otherwise.
1826 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1827 tc_fix_adjustable): Define.
1829 2006-03-02 James E Wilson <wilson@specifix.com>
1831 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1832 change the template, then clear md.slot[curr].end_of_insn_group.
1834 2006-02-28 Jan Beulich <jbeulich@novell.com>
1836 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1838 2006-02-28 Jan Beulich <jbeulich@novell.com>
1841 * macro.c (getstring): Don't treat parentheses special anymore.
1842 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1843 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1846 2006-02-28 Mat <mat@csail.mit.edu>
1848 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1850 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1852 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1854 (CFI_signal_frame): Define.
1855 (cfi_pseudo_table): Add .cfi_signal_frame.
1856 (dot_cfi): Handle CFI_signal_frame.
1857 (output_cie): Handle cie->signal_frame.
1858 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1859 different. Copy signal_frame from FDE to newly created CIE.
1860 * doc/as.texinfo: Document .cfi_signal_frame.
1862 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1864 * doc/Makefile.am: Add html target.
1865 * doc/Makefile.in: Regenerate.
1866 * po/Make-in: Add html target.
1868 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1870 * config/tc-i386.c (output_insn): Support Intel Merom New
1873 * config/tc-i386.h (CpuMNI): New.
1874 (CpuUnknownFlags): Add CpuMNI.
1876 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1878 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1879 (hpriv_reg_table): New table for hyperprivileged registers.
1880 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1883 2006-02-24 DJ Delorie <dj@redhat.com>
1885 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1886 (tc_gen_reloc): Don't define.
1887 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1888 (OPTION_LINKRELAX): New.
1889 (md_longopts): Add it.
1891 (md_parse_options): Set it.
1892 (md_assemble): Emit relaxation relocs as needed.
1893 (md_convert_frag): Emit relaxation relocs as needed.
1894 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1895 (m32c_apply_fix): New.
1896 (tc_gen_reloc): New.
1897 (m32c_force_relocation): Force out jump relocs when relaxing.
1898 (m32c_fix_adjustable): Return false if relaxing.
1900 2006-02-24 Paul Brook <paul@codesourcery.com>
1902 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1903 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1904 (struct asm_barrier_opt): Define.
1905 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1906 (parse_psr): Accept V7M psr names.
1907 (parse_barrier): New function.
1908 (enum operand_parse_code): Add OP_oBARRIER.
1909 (parse_operands): Implement OP_oBARRIER.
1910 (do_barrier): New function.
1911 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1912 (do_t_cpsi): Add V7M restrictions.
1913 (do_t_mrs, do_t_msr): Validate V7M variants.
1914 (md_assemble): Check for NULL variants.
1915 (v7m_psrs, barrier_opt_names): New tables.
1916 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1917 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1918 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1919 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1920 (struct cpu_arch_ver_table): Define.
1921 (cpu_arch_ver): New.
1922 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1923 Tag_CPU_arch_profile.
1924 * doc/c-arm.texi: Document new cpu and arch options.
1926 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1928 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1930 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1932 * config/tc-ia64.c: Update copyright years.
1934 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1936 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1939 2005-02-22 Paul Brook <paul@codesourcery.com>
1941 * config/tc-arm.c (do_pld): Remove incorrect write to
1943 (encode_thumb32_addr_mode): Use correct operand.
1945 2006-02-21 Paul Brook <paul@codesourcery.com>
1947 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1949 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1950 Anil Paranjape <anilp1@kpitcummins.com>
1951 Shilin Shakti <shilins@kpitcummins.com>
1953 * Makefile.am: Add xc16x related entry.
1954 * Makefile.in: Regenerate.
1955 * configure.in: Added xc16x related entry.
1956 * configure: Regenerate.
1957 * config/tc-xc16x.h: New file
1958 * config/tc-xc16x.c: New file
1959 * doc/c-xc16x.texi: New file for xc16x
1960 * doc/all.texi: Entry for xc16x
1961 * doc/Makefile.texi: Added c-xc16x.texi
1962 * NEWS: Announce the support for the new target.
1964 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1966 * configure.tgt: set emulation for mips-*-netbsd*
1968 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1970 * config.in: Rebuilt.
1972 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1974 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1975 from 1, not 0, in error messages.
1976 (md_assemble): Simplify special-case check for ENTRY instructions.
1977 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1978 operand in error message.
1980 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1982 * configure.tgt (arm-*-linux-gnueabi*): Change to
1985 2006-02-10 Nick Clifton <nickc@redhat.com>
1987 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1988 32-bit value is propagated into the upper bits of a 64-bit long.
1990 * config/tc-arc.c (init_opcode_tables): Fix cast.
1991 (arc_extoper, md_operand): Likewise.
1993 2006-02-09 David Heine <dlheine@tensilica.com>
1995 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1996 each relaxation step.
1998 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
2000 * configure.in (CHECK_DECLS): Add vsnprintf.
2001 * configure: Regenerate.
2002 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
2003 include/declare here, but...
2004 * as.h: Move code detecting VARARGS idiom to the top.
2005 (errno.h, stdarg.h, varargs.h, va_list): ...here.
2006 (vsnprintf): Declare if not already declared.
2008 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
2010 * as.c (close_output_file): New.
2011 (main): Register close_output_file with xatexit before
2012 dump_statistics. Don't call output_file_close.
2014 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
2016 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
2017 mcf5329_control_regs): New.
2018 (not_current_architecture, selected_arch, selected_cpu): New.
2019 (m68k_archs, m68k_extensions): New.
2020 (archs): Renamed to ...
2021 (m68k_cpus): ... here. Adjust.
2023 (md_pseudo_table): Add arch and cpu directives.
2024 (find_cf_chip, m68k_ip): Adjust table scanning.
2025 (no_68851, no_68881): Remove.
2026 (md_assemble): Lazily initialize.
2027 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
2028 (md_init_after_args): Move functionality to m68k_init_arch.
2029 (mri_chip): Adjust table scanning.
2030 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
2031 options with saner parsing.
2032 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
2033 m68k_init_arch): New.
2034 (s_m68k_cpu, s_m68k_arch): New.
2035 (md_show_usage): Adjust.
2036 (m68k_elf_final_processing): Set CF EF flags.
2037 * config/tc-m68k.h (m68k_init_after_args): Remove.
2038 (tc_init_after_args): Remove.
2039 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
2040 (M68k-Directives): Document .arch and .cpu directives.
2042 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
2044 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
2045 synonyms for equ and defl.
2046 (z80_cons_fix_new): New function.
2047 (emit_byte): Disallow relative jumps to absolute locations.
2048 (emit_data): Only handle defb, prototype changed, because defb is
2049 now handled as pseudo-op rather than an instruction.
2050 (instab): Entries for defb,defw,db,dw moved from here...
2051 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
2052 Add entries for def24,def32,d24,d32.
2053 (md_assemble): Improved error handling.
2054 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
2055 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
2056 (z80_cons_fix_new): Declare.
2057 * doc/c-z80.texi (defb, db): Mention warning on overflow.
2058 (def24,d24,def32,d32): New pseudo-ops.
2060 2006-02-02 Paul Brook <paul@codesourcery.com>
2062 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
2064 2005-02-02 Paul Brook <paul@codesourcery.com>
2066 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
2067 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
2068 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
2069 T2_OPCODE_RSB): Define.
2070 (thumb32_negate_data_op): New function.
2071 (md_apply_fix): Use it.
2073 2006-01-31 Bob Wilson <bob.wilson@acm.org>
2075 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
2077 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
2078 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
2080 (relaxation_requirements): Add pfinish_frag argument and use it to
2081 replace setting tinsn->record_fix fields.
2082 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
2083 and vinsn_to_insnbuf. Remove references to record_fix and
2084 slot_sub_symbols fields.
2085 (xtensa_mark_narrow_branches): Delete unused code.
2086 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
2088 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
2090 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
2091 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
2092 of the record_fix field. Simplify error messages for unexpected
2094 (set_expr_symbol_offset_diff): Delete.
2096 2006-01-31 Paul Brook <paul@codesourcery.com>
2098 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
2100 2006-01-31 Paul Brook <paul@codesourcery.com>
2101 Richard Earnshaw <rearnsha@arm.com>
2103 * config/tc-arm.c: Use arm_feature_set.
2104 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
2105 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
2106 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
2109 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
2110 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
2111 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
2112 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
2114 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
2115 (arm_opts): Move old cpu/arch options from here...
2116 (arm_legacy_opts): ... to here.
2117 (md_parse_option): Search arm_legacy_opts.
2118 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
2119 (arm_float_abis, arm_eabis): Make const.
2121 2006-01-25 Bob Wilson <bob.wilson@acm.org>
2123 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
2125 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2127 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
2128 in load immediate intruction.
2130 2006-01-21 Jie Zhang <jie.zhang@analog.com>
2132 * config/bfin-parse.y (value_match): Use correct conversion
2133 specifications in template string for __FILE__ and __LINE__.
2137 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
2139 Introduce TLS descriptors for i386 and x86_64.
2140 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
2141 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
2142 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
2143 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
2144 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
2146 (build_modrm_byte): Set up zero modrm for TLS desc calls.
2147 (lex_got): Handle @tlsdesc and @tlscall.
2148 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
2150 2006-01-11 Nick Clifton <nickc@redhat.com>
2152 Fixes for building on 64-bit hosts:
2153 * config/tc-avr.c (mod_index): New union to allow conversion
2154 between pointers and integers.
2155 (md_begin, avr_ldi_expression): Use it.
2156 * config/tc-i370.c (md_assemble): Add cast for argument to print
2158 * config/tc-tic54x.c (subsym_substitute): Likewise.
2159 * config/tc-mn10200.c (md_assemble): Use a union to convert the
2160 opindex field of fr_cgen structure into a pointer so that it can
2161 be stored in a frag.
2162 * config/tc-mn10300.c (md_assemble): Likewise.
2163 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
2165 * config/tc-v850.c: Replace uses of (int) casts with correct
2168 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
2171 * symbols.c (snapshot_symbol): Don't change a defined symbol.
2173 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
2176 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
2177 a local-label reference.
2179 For older changes see ChangeLog-2005
2185 version-control: never