gas/ChangeLog

   1 2006-04-30  Thiemo Seufer  <ths@mips.com>
   2             David Ung  <davidu@mips.com>
   3
   4         * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
   5         (mips_immed): New table that records various handling of udi
   6         instruction patterns.
   7         (mips_ip): Adds udi handling.
   8
   9 2006-04-28  Alan Modra  <amodra@bigpond.net.au>
  10
  11         * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
  12         of list rather than beginning.
  13
  14 2006-04-26  Julian Brown  <julian@codesourcery.com>
  15
  16         * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
  17         (is_quarter_float): Rename from above. Simplify slightly.
  18         (parse_qfloat_immediate): Parse a "quarter precision" floating-point
  19         number.
  20         (parse_neon_mov): Parse floating-point constants.
  21         (neon_qfloat_bits): Fix encoding.
  22         (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
  23         preference to integer encoding when using the F32 type.
  24
  25 2006-04-26  Julian Brown  <julian@codesourcery.com>
  26
  27         * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
  28         zero-initialising structures containing it will lead to invalid types).
  29         (arm_it): Add vectype to each operand.
  30         (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
  31         defined field.
  32         (neon_typed_alias): New structure. Extra information for typed
  33         register aliases.
  34         (reg_entry): Add neon type info field.
  35         (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
  36         Break out alternative syntax for coprocessor registers, etc. into...
  37         (arm_reg_alt_syntax): New function. Alternate syntax handling broken
  38         out from arm_reg_parse.
  39         (parse_neon_type): Move. Return SUCCESS/FAIL.
  40         (first_error): New function. Call to ensure first error which occurs is
  41         reported.
  42         (parse_neon_operand_type): Parse exactly one type.
  43         (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
  44         (parse_typed_reg_or_scalar): New function. Handle core of both
  45         arm_typed_reg_parse and parse_scalar.
  46         (arm_typed_reg_parse): Parse a register with an optional type.
  47         (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
  48         result.
  49         (parse_scalar): Parse a Neon scalar with optional type.
  50         (parse_reg_list): Use first_error.
  51         (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
  52         (neon_alias_types_same): New function. Return true if two (alias) types
  53         are the same.
  54         (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
  55         of elements.
  56         (insert_reg_alias): Return new reg_entry not void.
  57         (insert_neon_reg_alias): New function. Insert type/index information as
  58         well as register for alias.
  59         (create_neon_reg_alias): New function. Parse .dn/.qn directives and
  60         make typed register aliases accordingly.
  61         (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
  62         of line.
  63         (s_unreq): Delete type information if present.
  64         (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
  65         (s_arm_unwind_save_mmxwcg): Likewise.
  66         (s_arm_unwind_movsp): Likewise.
  67         (s_arm_unwind_setfp): Likewise.
  68         (parse_shift): Likewise.
  69         (parse_shifter_operand): Likewise.
  70         (parse_address): Likewise.
  71         (parse_tb): Likewise.
  72         (tc_arm_regname_to_dw2regnum): Likewise.
  73         (md_pseudo_table): Add dn, qn.
  74         (parse_neon_mov): Handle typed operands.
  75         (parse_operands): Likewise.
  76         (neon_type_mask): Add N_SIZ.
  77         (N_ALLMODS): New macro.
  78         (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
  79         (el_type_of_type_chk): Add some safeguards.
  80         (modify_types_allowed): Fix logic bug.
  81         (neon_check_type): Handle operands with types.
  82         (neon_three_same): Remove redundant optional arg handling.
  83         (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
  84         (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
  85         (do_neon_step): Adjust accordingly.
  86         (neon_cmode_for_logic_imm): Use first_error.
  87         (do_neon_bitfield): Call neon_check_type.
  88         (neon_dyadic): Rename to...
  89         (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
  90         to allow modification of type of the destination.
  91         (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
  92         (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
  93         (do_neon_compare): Make destination be an untyped bitfield.
  94         (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
  95         (neon_mul_mac): Return early in case of errors.
  96         (neon_move_immediate): Use first_error.
  97         (neon_mac_reg_scalar_long): Fix type to include scalar.
  98         (do_neon_dup): Likewise.
  99         (do_neon_mov): Likewise (in several places).
 100         (do_neon_tbl_tbx): Fix type.
 101         (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
 102         (do_neon_ld_dup): Exit early in case of errors and/or use
 103         first_error.
 104         (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
 105         Handle .dn/.qn directives.
 106         (REGDEF): Add zero for reg_entry neon field.
 107
 108 2006-04-26  Julian Brown  <julian@codesourcery.com>
 109
 110         * config/tc-arm.c (limits.h): Include.
 111         (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
 112         (fpu_vfp_v3_or_neon_ext): Declare constants.
 113         (neon_el_type): New enumeration of types for Neon vector elements.
 114         (neon_type_el): New struct. Define type and size of a vector element.
 115         (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
 116         instruction.
 117         (neon_type): Define struct. The type of an instruction.
 118         (arm_it): Add 'vectype' for the current instruction.
 119         (isscalar, immisalign, regisimm, isquad): New predicates for operands.
 120         (vfp_sp_reg_pos): Rename to...
 121         (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
 122         tags.
 123         (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
 124         (Neon D or Q register).
 125         (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
 126         register.
 127         (GE_OPT_PREFIX_BIG): Define constant, for use in...
 128         (my_get_expression): Allow above constant as argument to accept
 129         64-bit constants with optional prefix.
 130         (arm_reg_parse): Add extra argument to return the specific type of
 131         register in when either a D or Q register (REG_TYPE_NDQ) is
 132         requested. Can be NULL.
 133         (parse_scalar): New function. Parse Neon scalar (vector reg and index).
 134         (parse_reg_list): Update for new arm_reg_parse args.
 135         (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
 136         (parse_neon_el_struct_list): New function. Parse element/structure
 137         register lists for VLD<n>/VST<n> instructions.
 138         (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
 139         (s_arm_unwind_save_mmxwr): Likewise.
 140         (s_arm_unwind_save_mmxwcg): Likewise.
 141         (s_arm_unwind_movsp): Likewise.
 142         (s_arm_unwind_setfp): Likewise.
 143         (parse_big_immediate): New function. Parse an immediate, which may be
 144         64 bits wide. Put results in inst.operands[i].
 145         (parse_shift): Update for new arm_reg_parse args.
 146         (parse_address): Likewise. Add parsing of alignment specifiers.
 147         (parse_neon_mov): Parse the operands of a VMOV instruction.
 148         (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
 149         OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
 150         OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
 151         OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
 152         (parse_operands): Handle new codes above.
 153         (encode_arm_vfp_sp_reg): Rename to...
 154         (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
 155         selected VFP version only supports D0-D15.
 156         (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
 157         (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
 158         (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
 159         (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
 160         encode_arm_vfp_reg name, and allow 32 D regs.
 161         (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
 162         (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
 163         regs.
 164         (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
 165         (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
 166         constant-load and conversion insns introduced with VFPv3.
 167         (neon_tab_entry): New struct.
 168         (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
 169         those which are the targets of pseudo-instructions.
 170         (neon_opc): Enumerate opcodes, use as indices into...
 171         (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
 172         (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
 173         (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
 174         (NEON_ENC_DUP): Define meaningful helper macros to look up values in
 175         neon_enc_tab.
 176         (neon_shape): Enumerate shapes (permitted register widths, etc.) for
 177         Neon instructions.
 178         (neon_type_mask): New. Compact type representation for type checking.
 179         (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
 180         permitted type combinations.
 181         (N_IGNORE_TYPE): New macro.
 182         (neon_check_shape): New function. Check an instruction shape for
 183         multiple alternatives. Return the specific shape for the current
 184         instruction.
 185         (neon_modify_type_size): New function. Modify a vector type and size,
 186         depending on the bit mask in argument 1.
 187         (neon_type_promote): New function. Convert a given "key" type (of an
 188         operand) into the correct type for a different operand, based on a bit
 189         mask.
 190         (type_chk_of_el_type): New function. Convert a type and size into the
 191         compact representation used for type checking.
 192         (el_type_of_type_ckh): New function. Reverse of above (only when a
 193         single bit is set in the bit mask).
 194         (modify_types_allowed): New function. Alter a mask of allowed types
 195         based on a bit mask of modifications.
 196         (neon_check_type): New function. Check the type of the current
 197         instruction against the variable argument list. The "key" type of the
 198         instruction is returned.
 199         (neon_dp_fixup): New function. Fill in and modify instruction bits for
 200         a Neon data-processing instruction depending on whether we're in ARM
 201         mode or Thumb-2 mode.
 202         (neon_logbits): New function.
 203         (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
 204         (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
 205         (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
 206         (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
 207         (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
 208         (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
 209         (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
 210         (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
 211         (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
 212         (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
 213         (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
 214         (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
 215         (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
 216         (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
 217         (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
 218         (neon_move_immediate, do_neon_mvn, neon_mixed_length)
 219         (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
 220         (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
 221         (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
 222         (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
 223         (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
 224         (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
 225         (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
 226         (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
 227         (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
 228         helpers.
 229         (parse_neon_type): New function. Parse Neon type specifier.
 230         (opcode_lookup): Allow parsing of Neon type specifiers.
 231         (REGNUM2, REGSETH, REGSET2): New macros.
 232         (reg_names): Add new VFPv3 and Neon registers.
 233         (NUF, nUF, NCE, nCE): New macros for opcode table.
 234         (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
 235         fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
 236         fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
 237         Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
 238         vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
 239         vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
 240         vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
 241         vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr,  v{r}sra, vsli,
 242         vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
 243         vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
 244         vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
 245         vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
 246         vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
 247         vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
 248         fto[us][lh][sd].
 249         (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
 250         (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
 251         (arm_option_cpu_value): Add vfp3 and neon.
 252         (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
 253         VFPv1 attribute.
 254
 255 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 256
 257         * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
 258         syntax instead of hardcoded opcodes with ".w18" suffixes.
 259         (wide_branch_opcode): New.
 260         (build_transition): Use it to check for wide branch opcodes with
 261         either ".w18" or ".w15" suffixes.
 262
 263 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 264
 265         * config/tc-xtensa.c (xtensa_create_literal_symbol,
 266         xg_assemble_literal, xg_assemble_literal_space): Do not set the
 267         frag's is_literal flag.
 268
 269 2006-04-25  Bob Wilson  <bob.wilson@acm.org>
 270
 271         * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
 272
 273 2006-04-23  Kazu Hirata  <kazu@codesourcery.com>
 274
 275         * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
 276         config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
 277         config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
 278         config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
 279         config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
 280
 281 2005-04-20  Paul Brook  <paul@codesourcery.com>
 282
 283         * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
 284         all targets.
 285         (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
 286
 287 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 288
 289         * Makefile.am (CPU_TYPES): Add maxq and mt.  Sort.
 290         (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
 291         Make some cpus unsupported on ELF.  Run "make dep-am".
 292         * Makefile.in: Regenerate.
 293
 294 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 295
 296         * configure.in (--enable-targets): Indent help message.
 297         * configure: Regenerate.
 298
 299 2006-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 300
 301         PR gas/2533
 302         * config/tc-i386.c (i386_immediate): Check illegal immediate
 303         register operand.
 304
 305 2006-04-18  Alan Modra  <amodra@bigpond.net.au>
 306
 307         * config/tc-i386.c: Formatting.
 308         (output_disp, output_imm): ISO C90 params.
 309
 310         * frags.c (frag_offset_fixed_p): Constify args.
 311         * frags.h (frag_offset_fixed_p): Ditto.
 312
 313         * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
 314         (COFF_MAGIC): Delete.
 315
 316         * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
 317
 318 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 319
 320         * po/POTFILES.in: Regenerated.
 321
 322 2006-04-16  Mark Mitchell  <mark@codesourcery.com>
 323
 324         * doc/as.texinfo: Mention that some .type syntaxes are not
 325         supported on all architectures.
 326
 327 2006-04-14  Sterling Augustine  <sterling@tensilica.com>
 328
 329         * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
 330         instructions when such transformations have been disabled.
 331
 332 2006-04-10  Sterling Augustine  <sterling@tensilica.com>
 333
 334         * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
 335         symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
 336         (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
 337         decoding the loop instructions.  Remove current_offset variable.
 338         (xtensa_fix_short_loop_frags): Likewise.
 339         (min_bytes_to_other_loop_end): Remove current_offset argument.
 340
 341 2006-04-09  Arnold Metselaar  <arnold.metselaar@planet.nl>
 342
 343         * config/tc-z80.c (z80_optimize_expr): Removed.
 344         * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
 345
 346 2006-04-07  Joerg Wunsch <j.gnu@uriah.heep.sax.de>
 347
 348         * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
 349         attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
 350         attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
 351         atmega644, atmega329, atmega3290, atmega649, atmega6490,
 352         atmega406, atmega640, atmega1280, atmega1281, at90can32,
 353         at90can64, at90usb646, at90usb647, at90usb1286 and
 354         at90usb1287.
 355         Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
 356
 357 2006-04-07  Paul Brook  <paul@codesourcery.com>
 358
 359         * config/tc-arm.c (parse_operands): Set default error message.
 360
 361 2006-04-07  Paul Brook  <paul@codesourcery.com>
 362
 363         * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
 364
 365 2006-04-07  Paul Brook  <paul@codesourcery.com>
 366
 367         * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
 368
 369 2006-04-07  Paul Brook  <paul@codesourcery.com>
 370
 371         * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
 372         (move_or_literal_pool): Handle Thumb-2 instructions.
 373         (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
 374
 375 2006-04-07  Alan Modra  <amodra@bigpond.net.au>
 376
 377         PR 2512.
 378         * config/tc-i386.c (match_template): Move 64-bit operand tests
 379         inside loop.
 380
 381 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 382
 383         * po/Make-in: Add install-html target.
 384         * Makefile.am: Add install-html and install-html-recursive targets.
 385         * Makefile.in: Regenerate.
 386         * configure.in: AC_SUBST datarootdir, docdir, htmldir.
 387         * configure: Regenerate.
 388         * doc/Makefile.am: Add install-html and install-html-am targets.
 389         * doc/Makefile.in: Regenerate.
 390
 391 2006-04-06  Alan Modra  <amodra@bigpond.net.au>
 392
 393         * frags.c (frag_offset_fixed_p): Reinitialise offset before
 394         second scan.
 395
 396 2006-04-05  Richard Sandiford  <richard@codesourcery.com>
 397             Daniel Jacobowitz  <dan@codesourcery.com>
 398
 399         * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
 400         (GOTT_BASE, GOTT_INDEX): New.
 401         (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
 402         GOTT_INDEX when generating VxWorks PIC.
 403         * configure.tgt (sparc*-*-vxworks*): Remove this special case;
 404         use the generic *-*-vxworks* stanza instead.
 405
 406 2006-04-04  Alan Modra  <amodra@bigpond.net.au>
 407
 408         PR 997
 409         * frags.c (frag_offset_fixed_p): New function.
 410         * frags.h (frag_offset_fixed_p): Declare.
 411         * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
 412         (resolve_expression): Likewise.
 413
 414 2006-04-03  Sterling Augustine  <sterling@tensilica.com>
 415
 416         * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
 417         of the same length but different numbers of slots.
 418
 419 2006-03-30  Andreas Schwab  <schwab@suse.de>
 420
 421         * configure.in: Fix help string for --enable-targets option.
 422         * configure: Regenerate.
 423
 424 2006-03-28  Nathan Sidwell  <nathan@codesourcery.com>
 425
 426         * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
 427         (m68k_ip): ... here.  Use for all chips.  Protect against buffer
 428         overrun and avoid excessive copying.
 429
 430         * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
 431         m68020_control_regs, m68040_control_regs, m68060_control_regs,
 432         mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
 433         mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
 434         mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
 435         (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
 436         mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
 437         mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
 438         mcf5282_ctrl, mcfv4e_ctrl): ... these.
 439         (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
 440         (struct m68k_cpu): Change chip field to control_regs.
 441         (current_chip): Remove.
 442         (control_regs): New.
 443         (m68k_archs, m68k_extensions): Adjust.
 444         (m68k_cpus): Reorder to be in cpu number order.  Adjust.
 445         (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
 446         (find_cf_chip): Reimplement for new organization of cpu table.
 447         (select_control_regs): Remove.
 448         (mri_chip): Adjust.
 449         (struct save_opts): Save control regs, not chip.
 450         (s_save, s_restore): Adjust.
 451         (m68k_lookup_cpu): Give deprecated warning when necessary.
 452         (m68k_init_arch): Adjust.
 453         (md_show_usage): Adjust for new cpu table organization.
 454
 455 2006-03-25  Bernd Schmidt  <bernd.schmidt@analog.com>
 456
 457         * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
 458         * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
 459         * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
 460         "elf/bfin.h".
 461         (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
 462         (any_gotrel): New rule.
 463         (got): Use it, and create Expr_Node_GOT_Reloc nodes.
 464         * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
 465         "elf/bfin.h".
 466         (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
 467         (bfin_pic_ptr): New function.
 468         (md_pseudo_table): Add it for ".picptr".
 469         (OPTION_FDPIC): New macro.
 470         (md_longopts): Add -mfdpic.
 471         (md_parse_option): Handle it.
 472         (md_begin): Set BFD flags.
 473         (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
 474         (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
 475         us for GOT relocs.
 476         * Makefile.am (bfin-parse.o): Update dependencies.
 477         (DEPTC_bfin_elf): Likewise.
 478         * Makefile.in: Regenerate.
 479
 480 2006-03-25  Richard Sandiford  <richard@codesourcery.com>
 481
 482         * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
 483         mcfemac instead of mcfmac.
 484
 485 2006-03-23  Michael Matz  <matz@suse.de>
 486
 487         * config/tc-i386.c (type_names): Correct placement of 'static'.
 488         (reloc): Map some more relocs to their 64 bit counterpart when
 489         size is 8.
 490         (output_insn): Work around breakage if DEBUG386 is defined.
 491         (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
 492         needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
 493         BFD_RELOC_X86_64_GOTPC32.  Also x86-64 handles pcrel addressing
 494         different from i386.
 495         (output_imm): Ditto.
 496         (lex_got): Recognize @PLTOFF and @GOTPLT.  Make @GOT accept also
 497         Imm64.
 498         (md_convert_frag): Jumps can now be larger than 2GB away, error
 499         out in that case.
 500         (tc_gen_reloc): New relocs are passed through.  BFD_RELOC_64
 501         and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
 502
 503 2006-03-22  Richard Sandiford  <richard@codesourcery.com>
 504             Daniel Jacobowitz  <dan@codesourcery.com>
 505             Phil Edwards  <phil@codesourcery.com>
 506             Zack Weinberg  <zack@codesourcery.com>
 507             Mark Mitchell  <mark@codesourcery.com>
 508             Nathan Sidwell  <nathan@codesourcery.com>
 509
 510         * config/tc-mips.c (mips_target_format): Handle vxworks targets.
 511         (md_begin): Complain about -G being used for PIC.  Don't change
 512         the text, data and bss alignments on VxWorks.
 513         (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
 514         generating VxWorks PIC.
 515         (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
 516         (macro): Likewise, but do not treat la $25 specially for
 517         VxWorks PIC, and do not handle jal.
 518         (OPTION_MVXWORKS_PIC): New macro.
 519         (md_longopts): Add -mvxworks-pic.
 520         (md_parse_option): Don't complain about using PIC and -G together here.
 521         Handle OPTION_MVXWORKS_PIC.
 522         (md_estimate_size_before_relax): Always use the first relaxation
 523         sequence on VxWorks.
 524         * config/tc-mips.h (VXWORKS_PIC): New.
 525
 526 2006-03-21  Paul Brook  <paul@codesourcery.com>
 527
 528         * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
 529
 530 2006-03-21  Sterling Augustine  <sterling@tensilica.com>
 531
 532         * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
 533         (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
 534         (get_loop_align_size): New.
 535         (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
 536         (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
 537         (get_text_align_power): Rewrite to handle inputs in the range 2-8.
 538         (get_noop_aligned_address): Use get_loop_align_size.
 539         (get_aligned_diff): Likewise.
 540
 541 2006-03-21  Paul Brook  <paul@codesourcery.com>
 542
 543         * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
 544
 545 2006-03-20  Paul Brook  <paul@codesourcery.com>
 546
 547         * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
 548         (do_t_branch): Encode branches inside IT blocks as unconditional.
 549         (do_t_cps): New function.
 550         (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
 551         do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
 552         (opcode_lookup): Allow conditional suffixes on all instructions in
 553         Thumb mode.
 554         (md_assemble): Advance condexec state before checking for errors.
 555         (insns): Use do_t_cps.
 556
 557 2006-03-20  Paul Brook  <paul@codesourcery.com>
 558
 559         * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
 560         outputting the insn.
 561
 562 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 563
 564         * config/tc-vax.c: Update copyright year.
 565         * config/tc-vax.h: Likewise.
 566
 567 2006-03-18  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 568
 569         * config/tc-vax.c (md_chars_to_number): Used only locally, so
 570         make it static.
 571         * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
 572
 573 2006-03-17  Paul Brook  <paul@codesourcery.com>
 574
 575         * config/tc-arm.c (insns): Add ldm and stm.
 576
 577 2006-03-17  Ben Elliston  <bje@au.ibm.com>
 578
 579         PR gas/2446
 580         * doc/as.texinfo (Ident): Document this directive more thoroughly.
 581
 582 2006-03-16  Paul Brook  <paul@codesourcery.com>
 583
 584         * config/tc-arm.c (insns): Add "svc".
 585
 586 2006-03-13  Bob Wilson  <bob.wilson@acm.org>
 587
 588         * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
 589         flag and avoid double underscore prefixes.
 590
 591 2006-03-10  Paul Brook  <paul@codesourcery.com>
 592
 593         * config/tc-arm.c (md_begin): Handle EABIv5.
 594         (arm_eabis): Add EF_ARM_EABI_VER5.
 595         * doc/c-arm.texi: Document -meabi=5.
 596
 597 2006-03-10  Ben Elliston  <bje@au.ibm.com>
 598
 599         * app.c (do_scrub_chars): Simplify string handling.
 600
 601 2006-03-07  Richard Sandiford  <richard@codesourcery.com>
 602             Daniel Jacobowitz  <dan@codesourcery.com>
 603             Zack Weinberg  <zack@codesourcery.com>
 604             Nathan Sidwell  <nathan@codesourcery.com>
 605             Paul Brook  <paul@codesourcery.com>
 606             Ricardo Anguiano  <anguiano@codesourcery.com>
 607             Phil Edwards  <phil@codesourcery.com>
 608
 609         * config/tc-arm.c (md_apply_fix): Install a value of zero into a
 610         BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
 611         R_ARM_ABS12 reloc.
 612         (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
 613         relocs, but adjust by md_pcrel_from_section.  Create R_ARM_ABS12
 614         relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
 615
 616 2006-03-06  Bob Wilson  <bob.wilson@acm.org>
 617
 618         * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
 619         even when using the text-section-literals option.
 620
 621 2006-03-06  Nathan Sidwell  <nathan@codesourcery.com>
 622
 623         * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
 624         and cf.
 625         (m68k_ip): <case 'J'> Check we have some control regs.
 626         (md_parse_option): Allow raw arch switch.
 627         (m68k_init_arch): Better detection of arch/cpu mismatch.  Detect
 628         whether 68881 or cfloat was meant by -mfloat.
 629         (md_show_usage): Adjust extension display.
 630         (m68k_elf_final_processing): Adjust.
 631
 632 2006-03-03  Bjoern Haase  <bjoern.m.haase@web.de>
 633
 634         * config/tc-avr.c (avr_mod_hash_value): New function.
 635         (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
 636         BFD_RELOC_MS8_LDI for hlo8() and hhi8()
 637         (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
 638         instead of int avr_ldi_expression: use avr_mod_hash_value instead
 639         of (int).
 640         (tc_gen_reloc): Handle substractions of symbols, if possible do
 641         fixups, abort otherwise.
 642         * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
 643         tc_fix_adjustable): Define.
 644
 645 2006-03-02  James E Wilson  <wilson@specifix.com>
 646
 647         * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
 648         change the template, then clear md.slot[curr].end_of_insn_group.
 649
 650 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 651
 652         * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
 653
 654 2006-02-28  Jan Beulich  <jbeulich@novell.com>
 655
 656         PR/1070
 657         * macro.c (getstring): Don't treat parentheses special anymore.
 658         (get_any_string): Don't consider '(' and ')' as quoting anymore.
 659         Special-case '(', ')', '[', and ']' when dealing with non-quoting
 660         characters.
 661
 662 2006-02-28  Mat <mat@csail.mit.edu>
 663
 664         * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
 665
 666 2006-02-27  Jakub Jelinek  <jakub@redhat.com>
 667
 668         * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
 669         field.
 670         (CFI_signal_frame): Define.
 671         (cfi_pseudo_table): Add .cfi_signal_frame.
 672         (dot_cfi): Handle CFI_signal_frame.
 673         (output_cie): Handle cie->signal_frame.
 674         (select_cie_for_fde): Don't share CIE if signal_frame flag is
 675         different.  Copy signal_frame from FDE to newly created CIE.
 676         * doc/as.texinfo: Document .cfi_signal_frame.
 677
 678 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 679
 680         * doc/Makefile.am: Add html target.
 681         * doc/Makefile.in: Regenerate.
 682         * po/Make-in: Add html target.
 683
 684 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 685
 686         * config/tc-i386.c (output_insn): Support Intel Merom New
 687         Instructions.
 688
 689         * config/tc-i386.h (CpuMNI): New.
 690         (CpuUnknownFlags): Add CpuMNI.
 691
 692 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 693
 694         * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
 695         (hpriv_reg_table): New table for hyperprivileged registers.
 696         (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
 697         register encoding.
 698
 699 2006-02-24  DJ Delorie  <dj@redhat.com>
 700
 701         * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
 702         (tc_gen_reloc): Don't define.
 703         * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
 704         (OPTION_LINKRELAX): New.
 705         (md_longopts): Add it.
 706         (m32c_relax): New.
 707         (md_parse_options): Set it.
 708         (md_assemble): Emit relaxation relocs as needed.
 709         (md_convert_frag): Emit relaxation relocs as needed.
 710         (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
 711         (m32c_apply_fix): New.
 712         (tc_gen_reloc): New.
 713         (m32c_force_relocation): Force out jump relocs when relaxing.
 714         (m32c_fix_adjustable): Return false if relaxing.
 715
 716 2006-02-24  Paul Brook  <paul@codesourcery.com>
 717
 718         * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
 719         arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
 720         (struct asm_barrier_opt): Define.
 721         (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
 722         (parse_psr): Accept V7M psr names.
 723         (parse_barrier): New function.
 724         (enum operand_parse_code): Add OP_oBARRIER.
 725         (parse_operands): Implement OP_oBARRIER.
 726         (do_barrier): New function.
 727         (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
 728         (do_t_cpsi): Add V7M restrictions.
 729         (do_t_mrs, do_t_msr): Validate V7M variants.
 730         (md_assemble): Check for NULL variants.
 731         (v7m_psrs, barrier_opt_names): New tables.
 732         (insns): Add V7 instructions.  Mark V6 instructions absent from V7M.
 733         (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
 734         (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
 735         (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
 736         (struct cpu_arch_ver_table): Define.
 737         (cpu_arch_ver): New.
 738         (aeabi_set_public_attributes): Use cpu_arch_ver.  Set
 739         Tag_CPU_arch_profile.
 740         * doc/c-arm.texi: Document new cpu and arch options.
 741
 742 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 743
 744         * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
 745
 746 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 747
 748         * config/tc-ia64.c: Update copyright years.
 749
 750 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 751
 752         * config/tc-ia64.c (specify_resource): Add the rule 17 from
 753         SDM 2.2.
 754
 755 2005-02-22  Paul Brook  <paul@codesourcery.com>
 756
 757         * config/tc-arm.c (do_pld): Remove incorrect write to
 758         inst.instruction.
 759         (encode_thumb32_addr_mode): Use correct operand.
 760
 761 2006-02-21  Paul Brook  <paul@codesourcery.com>
 762
 763         * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
 764
 765 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 766             Anil Paranjape   <anilp1@kpitcummins.com>
 767             Shilin Shakti    <shilins@kpitcummins.com>
 768
 769         * Makefile.am: Add xc16x related entry.
 770         * Makefile.in: Regenerate.
 771         * configure.in: Added xc16x related entry.
 772         * configure: Regenerate.
 773         * config/tc-xc16x.h: New file
 774         * config/tc-xc16x.c: New file
 775         * doc/c-xc16x.texi: New file for xc16x
 776         * doc/all.texi: Entry for xc16x
 777         * doc/Makefile.texi: Added c-xc16x.texi
 778         * NEWS: Announce the support for the new target.
 779
 780 2006-02-16  Nick Hudson  <nick.hudson@dsl.pipex.com>
 781
 782         * configure.tgt: set emulation for mips-*-netbsd*
 783
 784 2006-02-14  Jakub Jelinek  <jakub@redhat.com>
 785
 786         * config.in: Rebuilt.
 787
 788 2006-02-13  Bob Wilson  <bob.wilson@acm.org>
 789
 790         * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
 791         from 1, not 0, in error messages.
 792         (md_assemble): Simplify special-case check for ENTRY instructions.
 793         (tinsn_has_invalid_symbolic_operands): Do not include opcode and
 794         operand in error message.
 795
 796 2006-02-13  Joseph S. Myers  <joseph@codesourcery.com>
 797
 798         * configure.tgt (arm-*-linux-gnueabi*): Change to
 799         arm-*-linux-*eabi*.
 800
 801 2006-02-10  Nick Clifton  <nickc@redhat.com>
 802
 803         * config/tc-crx.c (check_range): Ensure that the sign bit of a
 804         32-bit value is propagated into the upper bits of a 64-bit long.
 805
 806         * config/tc-arc.c (init_opcode_tables): Fix cast.
 807         (arc_extoper, md_operand): Likewise.
 808
 809 2006-02-09  David Heine  <dlheine@tensilica.com>
 810
 811         * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
 812         each relaxation step.
 813
 814 2006-02-09  Eric Botcazou  <ebotcazou@libertysurf.fr>
 815
 816         * configure.in (CHECK_DECLS): Add vsnprintf.
 817         * configure: Regenerate.
 818         * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
 819         include/declare here, but...
 820         * as.h: Move code detecting VARARGS idiom to the top.
 821         (errno.h, stdarg.h, varargs.h, va_list): ...here.
 822         (vsnprintf): Declare if not already declared.
 823
 824 2006-02-08  H.J. Lu  <hongjiu.lu@intel.com>
 825
 826         * as.c (close_output_file): New.
 827         (main): Register close_output_file with xatexit before
 828         dump_statistics. Don't call output_file_close.
 829
 830 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 831
 832         * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
 833         mcf5329_control_regs): New.
 834         (not_current_architecture, selected_arch, selected_cpu): New.
 835         (m68k_archs, m68k_extensions): New.
 836         (archs): Renamed to ...
 837         (m68k_cpus): ... here.  Adjust.
 838         (n_arches): Remove.
 839         (md_pseudo_table): Add arch and cpu directives.
 840         (find_cf_chip, m68k_ip): Adjust table scanning.
 841         (no_68851, no_68881): Remove.
 842         (md_assemble): Lazily initialize.
 843         (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
 844         (md_init_after_args): Move functionality to m68k_init_arch.
 845         (mri_chip): Adjust table scanning.
 846         (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
 847         options with saner parsing.
 848         (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
 849         m68k_init_arch): New.
 850         (s_m68k_cpu, s_m68k_arch): New.
 851         (md_show_usage): Adjust.
 852         (m68k_elf_final_processing): Set CF EF flags.
 853         * config/tc-m68k.h (m68k_init_after_args): Remove.
 854         (tc_init_after_args): Remove.
 855         * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
 856         (M68k-Directives): Document .arch and .cpu directives.
 857
 858 2006-02-05  Arnold Metselaar  <arnold.metselaar@planet.nl>
 859
 860         * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
 861         synonyms for equ and defl.
 862         (z80_cons_fix_new): New function.
 863         (emit_byte): Disallow relative jumps to absolute locations.
 864         (emit_data): Only handle defb, prototype changed, because defb is
 865         now handled as pseudo-op rather than an instruction.
 866         (instab): Entries for defb,defw,db,dw moved from here...
 867         (md_pseudo_table): ... to here, use generic cons() for defw,dw.
 868         Add entries for def24,def32,d24,d32.
 869         (md_assemble): Improved error handling.
 870         (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
 871         * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
 872         (z80_cons_fix_new): Declare.
 873         * doc/c-z80.texi (defb, db): Mention warning on overflow.
 874         (def24,d24,def32,d32): New pseudo-ops.
 875
 876 2006-02-02  Paul Brook  <paul@codesourcery.com>
 877
 878         * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
 879
 880 2005-02-02  Paul Brook  <paul@codesourcery.com>
 881
 882         * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
 883         T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
 884         T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
 885         T2_OPCODE_RSB): Define.
 886         (thumb32_negate_data_op): New function.
 887         (md_apply_fix): Use it.
 888
 889 2006-01-31  Bob Wilson  <bob.wilson@acm.org>
 890
 891         * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
 892         fields.
 893         * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
 894         * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
 895         subtracted symbols.
 896         (relaxation_requirements): Add pfinish_frag argument and use it to
 897         replace setting tinsn->record_fix fields.
 898         (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
 899         and vinsn_to_insnbuf.  Remove references to record_fix and
 900         slot_sub_symbols fields.
 901         (xtensa_mark_narrow_branches): Delete unused code.
 902         (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
 903         a symbol.
 904         (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
 905         record_fix fields.
 906         (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
 907         (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
 908         of the record_fix field.  Simplify error messages for unexpected
 909         symbolic operands.
 910         (set_expr_symbol_offset_diff): Delete.
 911
 912 2006-01-31  Paul Brook  <paul@codesourcery.com>
 913
 914         * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
 915
 916 2006-01-31  Paul Brook  <paul@codesourcery.com>
 917         Richard Earnshaw <rearnsha@arm.com>
 918
 919         * config/tc-arm.c: Use arm_feature_set.
 920         (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
 921         arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
 922         fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
 923         New variables.
 924         (insns): Use them.
 925         (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
 926         md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
 927         arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
 928         s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
 929         feature flags.
 930         (arm_legacy_option_table, arm_option_cpu_value_table): New types.
 931         (arm_opts): Move old cpu/arch options from here...
 932         (arm_legacy_opts): ... to here.
 933         (md_parse_option): Search arm_legacy_opts.
 934         (arm_cpus, arm_archs, arm_extensions, arm_fpus)
 935         (arm_float_abis, arm_eabis): Make const.
 936
 937 2006-01-25  Bob Wilson  <bob.wilson@acm.org>
 938
 939         * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
 940
 941 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
 942
 943         * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
 944         in load immediate intruction.
 945
 946 2006-01-21  Jie Zhang  <jie.zhang@analog.com>
 947
 948         * config/bfin-parse.y (value_match): Use correct conversion
 949         specifications in template string for __FILE__ and __LINE__.
 950         (binary): Ditto.
 951         (unary): Ditto.
 952
 953 2006-01-18  Alexandre Oliva  <aoliva@redhat.com>
 954
 955         Introduce TLS descriptors for i386 and x86_64.
 956         * config/tc-i386.c (tc_i386_fix_adjustable): Handle
 957         BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
 958         BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
 959         (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
 960         BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
 961         displacement bits.
 962         (build_modrm_byte): Set up zero modrm for TLS desc calls.
 963         (lex_got): Handle @tlsdesc and @tlscall.
 964         (md_apply_fix, tc_gen_reloc): Handle the new relocations.
 965
 966 2006-01-11  Nick Clifton  <nickc@redhat.com>
 967
 968         Fixes for building on 64-bit hosts:
 969         * config/tc-avr.c (mod_index): New union to allow conversion
 970         between pointers and integers.
 971         (md_begin, avr_ldi_expression): Use it.
 972         * config/tc-i370.c (md_assemble): Add cast for argument to print
 973         statement.
 974         * config/tc-tic54x.c (subsym_substitute): Likewise.
 975         * config/tc-mn10200.c (md_assemble): Use a union to convert the
 976         opindex field of fr_cgen structure into a pointer so that it can
 977         be stored in a frag.
 978         * config/tc-mn10300.c (md_assemble): Likewise.
 979         * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
 980         types.
 981         * config/tc-v850.c: Replace uses of (int) casts with correct
 982         types.
 983
 984 2006-01-09  H.J. Lu  <hongjiu.lu@intel.com>
 985
 986         PR gas/2117
 987         * symbols.c (snapshot_symbol): Don't change a defined symbol.
 988
 989 2006-01-03  Hans-Peter Nilsson  <hp@bitrange.com>
 990
 991         PR gas/2101
 992         * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
 993         a local-label reference.
 994
 995 For older changes see ChangeLog-2005
 996 \f
 997 Local Variables:
 998 mode: change-log
 999 left-margin: 8
1000 fill-column: 74
1001 version-control: never
1002 End: