1 2006-07-31 Thiemo Seufer <ths@mips.com>
3 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
4 handling for BFD_RELOC_MIPS16_JMP.
6 2006-07-24 Andreas Schwab <schwab@suse.de>
9 * read.c (read_a_source_file): Ignore unknown text after line
10 comment character. Fix misleading comment.
12 2006-07-24 Ralk Wildenhues <Ralf.Wildenhues@gmx.de>
14 * doc/all.texi, doc/as.texinfo, doc/c-arc.texi, doc/c-arm.texi,
15 doc/c-avr.texi, doc/c-bfin.texi, doc/c-i386.texi,
16 doc/c-i960.texi, doc/c-m32r.texi, doc/c-m68k.texi,
17 doc/c-mmix.texi, doc/c-pdp11.texi, doc/c-ppc.texi,
18 doc/c-tic54x.texi, doc/c-v850.texi, doc/c-xtensa.texi,
19 doc/c-z80.texi, doc/internals.texi: Fix some typos.
21 2006-07-21 Nick Clifton <nickc@redhat.com>
23 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the
26 2006-07-20 Thiemo Seufer <ths@mips.com>
27 Nigel Stephens <nigel@mips.com>
29 * config/tc-mips.c (md_parse_option): Don't infer optimisation
30 options from debug options.
32 2006-07-20 Thiemo Seufer <ths@mips.com>
34 * config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
35 (tc_gen_reloc): Handle mips16 jumps to section symbol offsets.
37 2006-07-19 Paul Brook <paul@codesourcery.com>
39 * config/tc-arm.c (insns): Fix rbit Arm opcode.
41 2006-07-18 Paul Brook <paul@codesourcery.com>
43 * tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
44 (md_convert_frag): Use correct reloc for add_pc. Use
45 BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
46 (md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
47 (arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
49 2006-07-17 Mat Hostetter <mat@lcs.mit.edu>
51 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
52 when file and line unknown.
54 2006-07-17 Thiemo Seufer <ths@mips.com>
56 * read.c (s_struct): Use IS_ELF.
57 * config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
58 md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
59 tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
60 s_mips_mask): Likewise.
62 2006-07-16 Thiemo Seufer <ths@mips.com>
63 David Ung <davidu@mips.com>
65 * read.c (s_struct): Handle ELF section changing.
66 * config/tc-mips.c (s_align): Leave enabling auto-align to the
68 (s_change_sec): Try section changing only if we output ELF.
70 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
72 * config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
74 (smallest_imm_type): Remove Cpu086.
75 (i386_target_format): Likewise.
77 * config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
80 2006-07-13 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
81 Michael Meissner <michael.meissner@amd.com>
83 * config/tc-i386.h (PROCESSOR_AMDFAM10): New processor_type.
84 (CpuSSE4a, CpuABM, CpuAmdFam10): New Cpu directives.
85 * config/tc-i386.c (cpu_arch): Add support for AmdFam10
87 (i386_align_code): Ditto.
88 (md_assemble_code): Add support for insertq/extrq instructions,
89 swapping as needed for intel syntax.
90 (swap_imm_operands): New function to swap immediate operands.
91 (swap_operands): Deal with 4 operand instructions.
92 (build_modrm_byte): Add support for insertq instruction.
94 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
96 * config/tc-i386.h (Size64): Fix a typo in comment.
98 2006-07-12 Nick Clifton <nickc@redhat.com>
100 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
101 fixup_segment() to repeat a range check on a value that has
102 already been checked here.
104 2006-07-07 James E Wilson <wilson@specifix.com>
106 * config/tc-mips.c (mips_cpu_info_table): Add sb1a.
108 2006-07-06 Mohammed Adnène Trojette <adn@diwi.org>
109 Nick Clifton <nickc@redhat.com>
112 * doc/as.texi: Fix spelling typo: branchs => branches.
113 * doc/c-m68hc11.texi: Likewise.
114 * config/tc-m68hc11.c: Likewise.
115 Support old spelling of command line switch for backwards
118 2006-07-04 Thiemo Seufer <ths@mips.com>
119 David Ung <davidu@mips.com>
121 * config/tc-mips.c (s_is_linkonce): New function.
122 (mips16_mark_labels): Don't adjust mips16 symbol addresses for
123 weak, external, and linkonce symbols.
124 (pic_need_relax): Use s_is_linkonce.
126 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
128 * doc/as.texinfo (Org): Remove space.
129 (P2align): Add "@var{abs-expr},".
131 2006-06-23 H.J. Lu <hongjiu.lu@intel.com>
133 * config/tc-i386.c (cpu_arch_tune_set): New.
134 (cpu_arch_isa): Likewise.
135 (i386_align_code): Use xchg %ax,%ax for 2 byte nop. Optimize
136 nops with short or long nop sequences based on -march=/.arch
138 (set_cpu_arch): Set cpu_arch_isa. If cpu_arch_tune_set is 0,
139 set cpu_arch_tune and cpu_arch_tune_flags.
140 (md_parse_option): For -march=, set cpu_arch_isa and set
141 cpu_arch_tune and cpu_arch_tune_flags if cpu_arch_tune_set is
142 0. Set cpu_arch_tune_set to 1 for -mtune=.
143 (i386_target_format): Don't set cpu_arch_tune.
145 2006-06-23 Nigel Stephens <nigel@mips.com>
147 * config/tc-mips.c (nopic_need_relax): Handle -fdata-sections
148 generated .sbss.* and .gnu.linkonce.sb.*.
150 2006-06-23 Thiemo Seufer <ths@mips.com>
151 David Ung <davidu@mips.com>
153 * config/tc-mips.h (TC_SEGMENT_INFO_TYPE): Declare per-segment
155 * config/tc-mips.c (label_list): Define per-segment label_list.
156 (mips_clear_insn_labels, mips_move_labels, mips16_mark_labels,
157 append_insn, s_align, s_cons, s_float_cons, s_gpword, s_gpdword,
158 mips_from_file_after_relocs, mips_define_label): Use per-segment
161 2006-06-22 Thiemo Seufer <ths@mips.com>
163 * config/tc-mips.c (ISA_SUPPORTS_MIPS16E): New macro.
164 (append_insn): Use it.
165 (md_apply_fix): Whitespace formatting.
166 (md_begin, append_insn, macro, macro2, mips16_immed, mips_align,
167 mips16_extended_frag): Remove register specifier.
168 (md_convert_frag): Likewise. Use TRUE ans FALSE instead of numeric
171 2006-06-21 Mark Shinwell <shinwell@codesourcery.com>
173 * config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
174 a directive saving VFP registers for ARMv6 or later.
175 (s_arm_unwind_save): Add parameter arch_v6 and call
176 s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
178 (md_pseudo_table): Add entry for new "vsave" directive.
179 * doc/c-arm.texi: Correct error in example for "save"
180 directive (fstmdf -> fstmdx). Also document "vsave" directive.
182 2006-06-18 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
183 Anatoly Sokolov <aesok@post.ru>
185 * config/tc-avr.c (mcu_types): Add support for atmega165p, atmega169p
186 and atmega644p devices. Rename atmega164/atmega324 devices to
187 atmega164p/atmega324p.
188 * doc/c-avr.texi: Document new mcu and arch options.
190 2006-06-17 Nick Clifton <nickc@redhat.com>
192 * config/tc-arm.c (enum parse_operand_result): Move outside of
193 #ifdef OBJ_ELF so that non-ELF targeted ARM ports can build.
195 2006-06-16 H.J. Lu <hongjiu.lu@intel.com>
197 * config/tc-i386.h (processor_type): New.
198 (arch_entry): Add type.
200 * config/tc-i386.c (cpu_arch_tune): New.
201 (cpu_arch_tune_flags): Likewise.
202 (cpu_arch_isa_flags): Likewise.
204 (set_cpu_arch): Also update cpu_arch_isa_flags.
205 (md_assemble): Update cpu_arch_isa_flags.
207 (OPTION_MTUNE): Likewise.
208 (md_longopts): Add -march= and -mtune=.
209 (md_parse_option): Support -march= and -mtune=.
210 (md_show_usage): Add -march=CPU/-mtune=CPU.
211 (i386_target_format): Also update cpu_arch_isa_flags,
212 cpu_arch_tune and cpu_arch_tune_flags.
214 * doc/as.texinfo: Add -march=CPU/-mtune=CPU.
216 * doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
218 2006-06-15 Mark Shinwell <shinwell@codesourcery.com>
220 * config/tc-arm.c (enum parse_operand_result): New.
221 (struct group_reloc_table_entry): New.
222 (enum group_reloc_type): New.
223 (group_reloc_table): New array.
224 (find_group_reloc_table_entry): New function.
225 (parse_shifter_operand_group_reloc): New function.
226 (parse_address_main): New function, incorporating code
227 from the old parse_address function. To be used via...
228 (parse_address): wrapper for parse_address_main; and
229 (parse_address_group_reloc): new function, likewise.
230 (enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
231 OP_ADDRGLDRS, OP_ADDRGLDC.
232 (parse_operands): Support for these new operand codes.
233 New macro po_misc_or_fail_no_backtrack.
234 (encode_arm_cp_address): Preserve group relocations.
235 (insns): Modify to use the above operand codes where group
236 relocations are permitted.
237 (md_apply_fix): Handle the group relocations
238 ALU_PC_G0_NC through LDC_SB_G2.
239 (tc_gen_reloc): Likewise.
240 (arm_force_relocation): Leave group relocations for the linker.
241 (arm_fix_adjustable): Likewise.
243 2006-06-15 Julian Brown <julian@codesourcery.com>
245 * config/tc-arm.c (do_vfp_nsyn_ldr_str): Remove, fold into...
246 (do_neon_ldr_str): Always defer to VFP encoding routines, which handle
249 2006-06-12 H.J. Lu <hongjiu.lu@intel.com>
251 * config/tc-i386.c (process_suffix): Don't add rex64 for
254 2006-06-09 Thiemo Seufer <ths@mips.com>
256 * config/tc-mips.c (mips_ip): Maintain argument count.
258 2006-06-09 Alan Modra <amodra@bigpond.net.au>
260 * config/tc-iq2000.c: Include sb.h.
262 2006-06-08 Nigel Stephens <nigel@mips.com>
264 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
265 aliases for better compatibility with SGI tools.
267 2006-06-08 Alan Modra <amodra@bigpond.net.au>
269 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
270 * Makefile.am (GASLIBS): Expand @BFDLIB@.
272 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
273 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
274 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
276 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
277 * Makefile.in: Regenerate.
278 * doc/Makefile.in: Regenerate.
279 * configure: Regenerate.
281 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
283 * po/Make-in (pdf, ps): New dummy targets.
285 2006-06-07 Julian Brown <julian@codesourcery.com>
287 * config/tc-arm.c (stdarg.h): include.
288 (arm_it): Add uncond_value field. Add isvec and issingle to operand
290 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
291 REG_TYPE_NSDQ (single, double or quad vector reg).
292 (reg_expected_msgs): Update.
293 (BAD_FPU): Add macro for unsupported FPU instruction error.
294 (parse_neon_type): Support 'd' as an alias for .f64.
295 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
297 (parse_vfp_reg_list): Don't update first arg on error.
298 (parse_neon_mov): Support extra syntax for VFP moves.
299 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
300 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
301 (parse_operands): Support isvec, issingle operands fields, new parse
303 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
305 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
306 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
307 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
308 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
310 (neon_shape): Redefine in terms of above.
311 (neon_shape_class): New enumeration, table of shape classes.
312 (neon_shape_el): New enumeration. One element of a shape.
313 (neon_shape_el_size): Register widths of above, where appropriate.
314 (neon_shape_info): New struct. Info for shape table.
315 (neon_shape_tab): New array.
316 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
317 (neon_check_shape): Rewrite as...
318 (neon_select_shape): New function to classify instruction shapes,
319 driven by new table neon_shape_tab array.
320 (neon_quad): New function. Return 1 if shape should set Q flag in
321 instructions (or equivalent), 0 otherwise.
322 (type_chk_of_el_type): Support F64.
323 (el_type_of_type_chk): Likewise.
324 (neon_check_type): Add support for VFP type checking (VFP data
325 elements fill their containing registers).
326 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
327 in thumb mode for VFP instructions.
328 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
329 and encode the current instruction as if it were that opcode.
330 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
331 arguments, call function in PFN.
332 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
333 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
334 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
335 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
336 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
337 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
338 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
339 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
340 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
341 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
342 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
343 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
344 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
345 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
346 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
348 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
349 between VFP and Neon turns out to belong to Neon. Perform
350 architecture check and fill in condition field if appropriate.
351 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
352 (do_neon_cvt): Add support for VFP variants of instructions.
353 (neon_cvt_flavour): Extend to cover VFP conversions.
354 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
356 (do_neon_ldr_str): Handle single-precision VFP load/store.
357 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
358 NS_NULL not NS_IGNORE.
359 (opcode_tag): Add OT_csuffixF for operands which either take a
360 conditional suffix, or have 0xF in the condition field.
361 (md_assemble): Add support for OT_csuffixF.
362 (NCE): Replace macro with...
363 (NCE_tag, NCE, NCEF): New macros.
364 (nCE): Replace macro with...
365 (nCE_tag, nCE, nCEF): New macros.
366 (insns): Add support for VFP insns or VFP versions of insns msr,
367 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
368 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
369 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
370 VFP/Neon insns together.
372 2006-06-07 Alan Modra <amodra@bigpond.net.au>
373 Ladislav Michl <ladis@linux-mips.org>
375 * app.c: Don't include headers already included by as.h.
377 * atof-generic.c: Likewise.
379 * dwarf2dbg.c: Likewise.
381 * input-file.c: Likewise.
382 * input-scrub.c: Likewise.
384 * output-file.c: Likewise.
387 * config/bfin-lex.l: Likewise.
388 * config/obj-coff.h: Likewise.
389 * config/obj-elf.h: Likewise.
390 * config/obj-som.h: Likewise.
391 * config/tc-arc.c: Likewise.
392 * config/tc-arm.c: Likewise.
393 * config/tc-avr.c: Likewise.
394 * config/tc-bfin.c: Likewise.
395 * config/tc-cris.c: Likewise.
396 * config/tc-d10v.c: Likewise.
397 * config/tc-d30v.c: Likewise.
398 * config/tc-dlx.h: Likewise.
399 * config/tc-fr30.c: Likewise.
400 * config/tc-frv.c: Likewise.
401 * config/tc-h8300.c: Likewise.
402 * config/tc-hppa.c: Likewise.
403 * config/tc-i370.c: Likewise.
404 * config/tc-i860.c: Likewise.
405 * config/tc-i960.c: Likewise.
406 * config/tc-ip2k.c: Likewise.
407 * config/tc-iq2000.c: Likewise.
408 * config/tc-m32c.c: Likewise.
409 * config/tc-m32r.c: Likewise.
410 * config/tc-maxq.c: Likewise.
411 * config/tc-mcore.c: Likewise.
412 * config/tc-mips.c: Likewise.
413 * config/tc-mmix.c: Likewise.
414 * config/tc-mn10200.c: Likewise.
415 * config/tc-mn10300.c: Likewise.
416 * config/tc-msp430.c: Likewise.
417 * config/tc-mt.c: Likewise.
418 * config/tc-ns32k.c: Likewise.
419 * config/tc-openrisc.c: Likewise.
420 * config/tc-ppc.c: Likewise.
421 * config/tc-s390.c: Likewise.
422 * config/tc-sh.c: Likewise.
423 * config/tc-sh64.c: Likewise.
424 * config/tc-sparc.c: Likewise.
425 * config/tc-tic30.c: Likewise.
426 * config/tc-tic4x.c: Likewise.
427 * config/tc-tic54x.c: Likewise.
428 * config/tc-v850.c: Likewise.
429 * config/tc-vax.c: Likewise.
430 * config/tc-xc16x.c: Likewise.
431 * config/tc-xstormy16.c: Likewise.
432 * config/tc-xtensa.c: Likewise.
433 * config/tc-z80.c: Likewise.
434 * config/tc-z8k.c: Likewise.
435 * macro.h: Don't include sb.h or ansidecl.h.
436 * sb.h: Don't include stdio.h or ansidecl.h.
437 * cond.c: Include sb.h.
438 * itbl-lex.l: Include as.h instead of other system headers.
439 * itbl-parse.y: Likewise.
440 * itbl-ops.c: Similarly.
441 * itbl-ops.h: Don't include as.h or ansidecl.h.
442 * config/bfin-defs.h: Don't include bfd.h or as.h.
443 * config/bfin-parse.y: Include as.h instead of other system headers.
445 2006-06-06 Ben Elliston <bje@au.ibm.com>
446 Anton Blanchard <anton@samba.org>
448 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
449 (md_show_usage): Document it.
450 (ppc_setup_opcodes): Test power6 opcode flag bits.
451 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
453 2006-06-06 Thiemo Seufer <ths@mips.com>
454 Chao-ying Fu <fu@mips.com>
456 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
457 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
458 (macro_build): Update comment.
459 (mips_ip): Allow DSP64 instructions for MIPS64R2.
460 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
462 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
463 MIPS_CPU_ASE_MDMX flags for sb1.
465 2006-06-05 Thiemo Seufer <ths@mips.com>
467 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
469 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
470 (mips_ip): Make overflowed/underflowed constant arguments in DSP
471 and MT instructions a fatal error. Use INSERT_OPERAND where
472 appropriate. Improve warnings for break and wait code overflows.
473 Use symbolic constant of OP_MASK_COPZ.
474 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
476 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
478 * po/Make-in (top_builddir): Define.
480 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
482 * doc/Makefile.am (TEXI2DVI): Define.
483 * doc/Makefile.in: Regenerate.
484 * doc/c-arc.texi: Fix typo.
486 2006-06-01 Alan Modra <amodra@bigpond.net.au>
488 * config/obj-ieee.c: Delete.
489 * config/obj-ieee.h: Delete.
490 * Makefile.am (OBJ_FORMATS): Remove ieee.
491 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
492 (obj-ieee.o): Remove rule.
493 * Makefile.in: Regenerate.
494 * configure.in (atof): Remove tahoe.
495 (OBJ_MAYBE_IEEE): Don't define.
496 * configure: Regenerate.
497 * config.in: Regenerate.
498 * doc/Makefile.in: Regenerate.
499 * po/POTFILES.in: Regenerate.
501 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
503 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
504 and LIBINTL_DEP everywhere.
506 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
507 * acinclude.m4: Include new gettext macros.
508 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
509 Remove local code for po/Makefile.
510 * Makefile.in, configure, doc/Makefile.in: Regenerated.
512 2006-05-30 Nick Clifton <nickc@redhat.com>
514 * po/es.po: Updated Spanish translation.
516 2006-05-06 Denis Chertykov <denisc@overta.ru>
518 * doc/c-avr.texi: New file.
519 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
520 * doc/all.texi: Set AVR
521 * doc/as.texinfo: Include c-avr.texi
523 2006-05-28 Jie Zhang <jie.zhang@analog.com>
525 * config/bfin-parse.y (check_macfunc): Loose the condition of
526 calling check_multiply_halfregs ().
528 2006-05-25 Jie Zhang <jie.zhang@analog.com>
530 * config/bfin-parse.y (asm_1): Better check and deal with
531 vector and scalar Multiply 16-Bit Operands instructions.
533 2006-05-24 Nick Clifton <nickc@redhat.com>
535 * config/tc-hppa.c: Convert to ISO C90 format.
536 * config/tc-hppa.h: Likewise.
538 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
539 Randolph Chung <randolph@tausq.org>
541 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
542 is_tls_ieoff, is_tls_leoff): Define.
543 (fix_new_hppa): Handle TLS.
544 (cons_fix_new_hppa): Likewise.
546 (md_apply_fix): Handle TLS relocs.
547 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
549 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
551 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
553 2006-05-23 Thiemo Seufer <ths@mips.com>
554 David Ung <davidu@mips.com>
555 Nigel Stephens <nigel@mips.com>
558 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
559 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
560 ISA_HAS_MXHC1): New macros.
561 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
562 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
563 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
564 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
565 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
566 (mips_after_parse_args): Change default handling of float register
567 size to account for 32bit code with 64bit FP. Better sanity checking
568 of ISA/ASE/ABI option combinations.
569 (s_mipsset): Support switching of GPR and FPR sizes via
570 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
572 (mips_elf_final_processing): We should record the use of 64bit FP
573 registers in 32bit code but we don't, because ELF header flags are
575 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
576 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
577 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
578 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
579 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
580 missing -march options. Document .set arch=CPU. Move .set smartmips
581 to ASE page. Use @code for .set FOO examples.
583 2006-05-23 Jie Zhang <jie.zhang@analog.com>
585 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
588 2006-05-23 Jie Zhang <jie.zhang@analog.com>
590 * config/bfin-defs.h (bfin_equals): Remove declaration.
591 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
592 * config/tc-bfin.c (bfin_name_is_register): Remove.
593 (bfin_equals): Remove.
594 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
595 (bfin_name_is_register): Remove declaration.
597 2006-05-19 Thiemo Seufer <ths@mips.com>
598 Nigel Stephens <nigel@mips.com>
600 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
601 (mips_oddfpreg_ok): New function.
604 2006-05-19 Thiemo Seufer <ths@mips.com>
605 David Ung <davidu@mips.com>
607 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
608 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
609 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
610 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
611 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
612 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
613 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
614 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
615 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
616 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
617 reg_names_o32, reg_names_n32n64): Define register classes.
618 (reg_lookup): New function, use register classes.
619 (md_begin): Reserve register names in the symbol table. Simplify
621 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
623 (mips16_ip): Use reg_lookup.
624 (tc_get_register): Likewise.
625 (tc_mips_regname_to_dw2regnum): New function.
627 2006-05-19 Thiemo Seufer <ths@mips.com>
629 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
630 Un-constify string argument.
631 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
633 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
635 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
637 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
639 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
641 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
644 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
646 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
647 cfloat/m68881 to correct architecture before using it.
649 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
651 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
654 2006-05-15 Paul Brook <paul@codesourcery.com>
656 * config/tc-arm.c (arm_adjust_symtab): Use
657 bfd_is_arm_special_symbol_name.
659 2006-05-15 Bob Wilson <bob.wilson@acm.org>
661 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
662 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
663 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
664 Handle errors from calls to xtensa_opcode_is_* functions.
666 2006-05-14 Thiemo Seufer <ths@mips.com>
668 * config/tc-mips.c (macro_build): Test for currently active
670 (mips16_ip): Reject invalid opcodes.
672 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
674 * doc/as.texinfo: Rename "Index" to "AS Index",
675 and "ABORT" to "ABORT (COFF)".
677 2006-05-11 Paul Brook <paul@codesourcery.com>
679 * config/tc-arm.c (parse_half): New function.
680 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
681 (parse_operands): Ditto.
682 (do_mov16): Reject invalid relocations.
683 (do_t_mov16): Ditto. Use Thumb reloc numbers.
684 (insns): Replace Iffff with HALF.
685 (md_apply_fix): Add MOVW and MOVT relocs.
686 (tc_gen_reloc): Ditto.
687 * doc/c-arm.texi: Document relocation operators
689 2006-05-11 Paul Brook <paul@codesourcery.com>
691 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
693 2006-05-11 Thiemo Seufer <ths@mips.com>
695 * config/tc-mips.c (append_insn): Don't check the range of j or
698 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
700 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
701 relocs against external symbols for WinCE targets.
702 (md_apply_fix): Likewise.
704 2006-05-09 David Ung <davidu@mips.com>
706 * config/tc-mips.c (append_insn): Only warn about an out-of-range
709 2006-05-09 Nick Clifton <nickc@redhat.com>
711 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
712 against symbols which are not going to be placed into the symbol
715 2006-05-09 Ben Elliston <bje@au.ibm.com>
717 * expr.c (operand): Remove `if (0 && ..)' statement and
718 subsequently unused target_op label. Collapse `if (1 || ..)'
720 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
721 separately above the switch.
723 2006-05-08 Nick Clifton <nickc@redhat.com>
726 * config/tc-msp430.c (line_separator_character): Define as |.
728 2006-05-08 Thiemo Seufer <ths@mips.com>
729 Nigel Stephens <nigel@mips.com>
730 David Ung <davidu@mips.com>
732 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
733 (mips_opts): Likewise.
734 (file_ase_smartmips): New variable.
735 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
736 (macro_build): Handle SmartMIPS instructions.
738 (md_longopts): Add argument handling for smartmips.
739 (md_parse_options, mips_after_parse_args): Likewise.
740 (s_mipsset): Add .set smartmips support.
741 (md_show_usage): Document -msmartmips/-mno-smartmips.
742 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
744 * doc/c-mips.texi: Likewise.
746 2006-05-08 Alan Modra <amodra@bigpond.net.au>
748 * write.c (relax_segment): Add pass count arg. Don't error on
749 negative org/space on first two passes.
750 (relax_seg_info): New struct.
751 (relax_seg, write_object_file): Adjust.
752 * write.h (relax_segment): Update prototype.
754 2006-05-05 Julian Brown <julian@codesourcery.com>
756 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
758 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
759 architecture version checks.
760 (insns): Allow overlapping instructions to be used in VFP mode.
762 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
765 * config/obj-elf.c (obj_elf_change_section): Allow user
766 specified SHF_ALPHA_GPREL.
768 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
770 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
771 for PMEM related expressions.
773 2006-05-05 Nick Clifton <nickc@redhat.com>
776 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
777 insertion of a directory separator character into a string at a
778 given offset. Uses heuristics to decide when to use a backslash
779 character rather than a forward-slash character.
780 (dwarf2_directive_loc): Use the macro.
781 (out_debug_info): Likewise.
783 2006-05-05 Thiemo Seufer <ths@mips.com>
784 David Ung <davidu@mips.com>
786 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
788 (macro): Add new case M_CACHE_AB.
790 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
792 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
793 (opcode_lookup): Issue a warning for opcode with
794 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
795 identical to OT_cinfix3.
796 (TxC3w, TC3w, tC3w): New.
797 (insns): Use tC3w and TC3w for comparison instructions with
800 2006-05-04 Alan Modra <amodra@bigpond.net.au>
802 * subsegs.h (struct frchain): Delete frch_seg.
803 (frchain_root): Delete.
804 (seg_info): Define as macro.
805 * subsegs.c (frchain_root): Delete.
806 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
807 (subsegs_begin, subseg_change): Adjust for above.
808 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
809 rather than to one big list.
810 (subseg_get): Don't special case abs, und sections.
811 (subseg_new, subseg_force_new): Don't set frchainP here.
813 (subsegs_print_statistics): Adjust frag chain control list traversal.
814 * debug.c (dmp_frags): Likewise.
815 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
816 at frchain_root. Make use of known frchain ordering.
817 (last_frag_for_seg): Likewise.
818 (get_frag_fix): Likewise. Add seg param.
819 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
820 * write.c (chain_frchains_together_1): Adjust for struct frchain.
821 (SUB_SEGMENT_ALIGN): Likewise.
822 (subsegs_finish): Adjust frchain list traversal.
823 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
824 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
825 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
826 (xtensa_fix_b_j_loop_end_frags): Likewise.
827 (xtensa_fix_close_loop_end_frags): Likewise.
828 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
829 (retrieve_segment_info): Delete frch_seg initialisation.
831 2006-05-03 Alan Modra <amodra@bigpond.net.au>
833 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
834 * config/obj-elf.h (obj_sec_set_private_data): Delete.
835 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
836 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
838 2006-05-02 Joseph Myers <joseph@codesourcery.com>
840 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
842 (md_apply_fix3): Multiply offset by 4 here for
843 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
845 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
846 Jan Beulich <jbeulich@novell.com>
848 * config/tc-i386.c (output_invalid_buf): Change size for
850 * config/tc-tic30.c (output_invalid_buf): Likewise.
852 * config/tc-i386.c (output_invalid): Cast none-ascii char to
854 * config/tc-tic30.c (output_invalid): Likewise.
856 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
858 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
859 (TEXI2POD): Use AM_MAKEINFOFLAGS.
860 (asconfig.texi): Don't set top_srcdir.
861 * doc/as.texinfo: Don't use top_srcdir.
862 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
864 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
866 * config/tc-i386.c (output_invalid_buf): Change size to 16.
867 * config/tc-tic30.c (output_invalid_buf): Likewise.
869 * config/tc-i386.c (output_invalid): Use snprintf instead of
871 * config/tc-ia64.c (declare_register_set): Likewise.
872 (emit_one_bundle): Likewise.
873 (check_dependencies): Likewise.
874 * config/tc-tic30.c (output_invalid): Likewise.
876 2006-05-02 Paul Brook <paul@codesourcery.com>
878 * config/tc-arm.c (arm_optimize_expr): New function.
879 * config/tc-arm.h (md_optimize_expr): Define
880 (arm_optimize_expr): Add prototype.
881 (TC_FORCE_RELOCATION_SUB_SAME): Define.
883 2006-05-02 Ben Elliston <bje@au.ibm.com>
885 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
888 * sb.h (sb_list_vector): Move to sb.c.
889 * sb.c (free_list): Use type of sb_list_vector directly.
890 (sb_build): Fix off-by-one error in assertion about `size'.
892 2006-05-01 Ben Elliston <bje@au.ibm.com>
894 * listing.c (listing_listing): Remove useless loop.
895 * macro.c (macro_expand): Remove is_positional local variable.
896 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
897 and simplify surrounding expressions, where possible.
898 (assign_symbol): Likewise.
899 (s_weakref): Likewise.
900 * symbols.c (colon): Likewise.
902 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
904 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
906 2006-04-30 Thiemo Seufer <ths@mips.com>
907 David Ung <davidu@mips.com>
909 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
910 (mips_immed): New table that records various handling of udi
911 instruction patterns.
912 (mips_ip): Adds udi handling.
914 2006-04-28 Alan Modra <amodra@bigpond.net.au>
916 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
917 of list rather than beginning.
919 2006-04-26 Julian Brown <julian@codesourcery.com>
921 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
922 (is_quarter_float): Rename from above. Simplify slightly.
923 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
925 (parse_neon_mov): Parse floating-point constants.
926 (neon_qfloat_bits): Fix encoding.
927 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
928 preference to integer encoding when using the F32 type.
930 2006-04-26 Julian Brown <julian@codesourcery.com>
932 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
933 zero-initialising structures containing it will lead to invalid types).
934 (arm_it): Add vectype to each operand.
935 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
937 (neon_typed_alias): New structure. Extra information for typed
939 (reg_entry): Add neon type info field.
940 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
941 Break out alternative syntax for coprocessor registers, etc. into...
942 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
943 out from arm_reg_parse.
944 (parse_neon_type): Move. Return SUCCESS/FAIL.
945 (first_error): New function. Call to ensure first error which occurs is
947 (parse_neon_operand_type): Parse exactly one type.
948 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
949 (parse_typed_reg_or_scalar): New function. Handle core of both
950 arm_typed_reg_parse and parse_scalar.
951 (arm_typed_reg_parse): Parse a register with an optional type.
952 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
954 (parse_scalar): Parse a Neon scalar with optional type.
955 (parse_reg_list): Use first_error.
956 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
957 (neon_alias_types_same): New function. Return true if two (alias) types
959 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
961 (insert_reg_alias): Return new reg_entry not void.
962 (insert_neon_reg_alias): New function. Insert type/index information as
963 well as register for alias.
964 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
965 make typed register aliases accordingly.
966 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
968 (s_unreq): Delete type information if present.
969 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
970 (s_arm_unwind_save_mmxwcg): Likewise.
971 (s_arm_unwind_movsp): Likewise.
972 (s_arm_unwind_setfp): Likewise.
973 (parse_shift): Likewise.
974 (parse_shifter_operand): Likewise.
975 (parse_address): Likewise.
976 (parse_tb): Likewise.
977 (tc_arm_regname_to_dw2regnum): Likewise.
978 (md_pseudo_table): Add dn, qn.
979 (parse_neon_mov): Handle typed operands.
980 (parse_operands): Likewise.
981 (neon_type_mask): Add N_SIZ.
982 (N_ALLMODS): New macro.
983 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
984 (el_type_of_type_chk): Add some safeguards.
985 (modify_types_allowed): Fix logic bug.
986 (neon_check_type): Handle operands with types.
987 (neon_three_same): Remove redundant optional arg handling.
988 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
989 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
990 (do_neon_step): Adjust accordingly.
991 (neon_cmode_for_logic_imm): Use first_error.
992 (do_neon_bitfield): Call neon_check_type.
993 (neon_dyadic): Rename to...
994 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
995 to allow modification of type of the destination.
996 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
997 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
998 (do_neon_compare): Make destination be an untyped bitfield.
999 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
1000 (neon_mul_mac): Return early in case of errors.
1001 (neon_move_immediate): Use first_error.
1002 (neon_mac_reg_scalar_long): Fix type to include scalar.
1003 (do_neon_dup): Likewise.
1004 (do_neon_mov): Likewise (in several places).
1005 (do_neon_tbl_tbx): Fix type.
1006 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
1007 (do_neon_ld_dup): Exit early in case of errors and/or use
1009 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
1010 Handle .dn/.qn directives.
1011 (REGDEF): Add zero for reg_entry neon field.
1013 2006-04-26 Julian Brown <julian@codesourcery.com>
1015 * config/tc-arm.c (limits.h): Include.
1016 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
1017 (fpu_vfp_v3_or_neon_ext): Declare constants.
1018 (neon_el_type): New enumeration of types for Neon vector elements.
1019 (neon_type_el): New struct. Define type and size of a vector element.
1020 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
1022 (neon_type): Define struct. The type of an instruction.
1023 (arm_it): Add 'vectype' for the current instruction.
1024 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
1025 (vfp_sp_reg_pos): Rename to...
1026 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
1028 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
1029 (Neon D or Q register).
1030 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
1032 (GE_OPT_PREFIX_BIG): Define constant, for use in...
1033 (my_get_expression): Allow above constant as argument to accept
1034 64-bit constants with optional prefix.
1035 (arm_reg_parse): Add extra argument to return the specific type of
1036 register in when either a D or Q register (REG_TYPE_NDQ) is
1037 requested. Can be NULL.
1038 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
1039 (parse_reg_list): Update for new arm_reg_parse args.
1040 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
1041 (parse_neon_el_struct_list): New function. Parse element/structure
1042 register lists for VLD<n>/VST<n> instructions.
1043 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
1044 (s_arm_unwind_save_mmxwr): Likewise.
1045 (s_arm_unwind_save_mmxwcg): Likewise.
1046 (s_arm_unwind_movsp): Likewise.
1047 (s_arm_unwind_setfp): Likewise.
1048 (parse_big_immediate): New function. Parse an immediate, which may be
1049 64 bits wide. Put results in inst.operands[i].
1050 (parse_shift): Update for new arm_reg_parse args.
1051 (parse_address): Likewise. Add parsing of alignment specifiers.
1052 (parse_neon_mov): Parse the operands of a VMOV instruction.
1053 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
1054 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
1055 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
1056 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
1057 (parse_operands): Handle new codes above.
1058 (encode_arm_vfp_sp_reg): Rename to...
1059 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
1060 selected VFP version only supports D0-D15.
1061 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
1062 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
1063 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
1064 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
1065 encode_arm_vfp_reg name, and allow 32 D regs.
1066 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
1067 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
1069 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
1070 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
1071 constant-load and conversion insns introduced with VFPv3.
1072 (neon_tab_entry): New struct.
1073 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
1074 those which are the targets of pseudo-instructions.
1075 (neon_opc): Enumerate opcodes, use as indices into...
1076 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
1077 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
1078 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
1079 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
1081 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
1083 (neon_type_mask): New. Compact type representation for type checking.
1084 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
1085 permitted type combinations.
1086 (N_IGNORE_TYPE): New macro.
1087 (neon_check_shape): New function. Check an instruction shape for
1088 multiple alternatives. Return the specific shape for the current
1090 (neon_modify_type_size): New function. Modify a vector type and size,
1091 depending on the bit mask in argument 1.
1092 (neon_type_promote): New function. Convert a given "key" type (of an
1093 operand) into the correct type for a different operand, based on a bit
1095 (type_chk_of_el_type): New function. Convert a type and size into the
1096 compact representation used for type checking.
1097 (el_type_of_type_ckh): New function. Reverse of above (only when a
1098 single bit is set in the bit mask).
1099 (modify_types_allowed): New function. Alter a mask of allowed types
1100 based on a bit mask of modifications.
1101 (neon_check_type): New function. Check the type of the current
1102 instruction against the variable argument list. The "key" type of the
1103 instruction is returned.
1104 (neon_dp_fixup): New function. Fill in and modify instruction bits for
1105 a Neon data-processing instruction depending on whether we're in ARM
1106 mode or Thumb-2 mode.
1107 (neon_logbits): New function.
1108 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
1109 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
1110 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
1111 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
1112 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
1113 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
1114 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
1115 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
1116 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
1117 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
1118 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
1119 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
1120 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
1121 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
1122 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
1123 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
1124 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
1125 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
1126 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
1127 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
1128 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
1129 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
1130 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
1131 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
1132 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
1134 (parse_neon_type): New function. Parse Neon type specifier.
1135 (opcode_lookup): Allow parsing of Neon type specifiers.
1136 (REGNUM2, REGSETH, REGSET2): New macros.
1137 (reg_names): Add new VFPv3 and Neon registers.
1138 (NUF, nUF, NCE, nCE): New macros for opcode table.
1139 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
1140 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
1141 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
1142 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
1143 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
1144 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
1145 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
1146 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
1147 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
1148 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
1149 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
1150 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
1151 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
1152 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
1154 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
1155 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
1156 (arm_option_cpu_value): Add vfp3 and neon.
1157 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
1160 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1162 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
1163 syntax instead of hardcoded opcodes with ".w18" suffixes.
1164 (wide_branch_opcode): New.
1165 (build_transition): Use it to check for wide branch opcodes with
1166 either ".w18" or ".w15" suffixes.
1168 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1170 * config/tc-xtensa.c (xtensa_create_literal_symbol,
1171 xg_assemble_literal, xg_assemble_literal_space): Do not set the
1172 frag's is_literal flag.
1174 2006-04-25 Bob Wilson <bob.wilson@acm.org>
1176 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
1178 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
1180 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
1181 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
1182 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
1183 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
1184 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
1186 2005-04-20 Paul Brook <paul@codesourcery.com>
1188 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
1190 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
1192 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1194 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
1195 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
1196 Make some cpus unsupported on ELF. Run "make dep-am".
1197 * Makefile.in: Regenerate.
1199 2006-04-19 Alan Modra <amodra@bigpond.net.au>
1201 * configure.in (--enable-targets): Indent help message.
1202 * configure: Regenerate.
1204 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
1207 * config/tc-i386.c (i386_immediate): Check illegal immediate
1210 2006-04-18 Alan Modra <amodra@bigpond.net.au>
1212 * config/tc-i386.c: Formatting.
1213 (output_disp, output_imm): ISO C90 params.
1215 * frags.c (frag_offset_fixed_p): Constify args.
1216 * frags.h (frag_offset_fixed_p): Ditto.
1218 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
1219 (COFF_MAGIC): Delete.
1221 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
1223 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
1225 * po/POTFILES.in: Regenerated.
1227 2006-04-16 Mark Mitchell <mark@codesourcery.com>
1229 * doc/as.texinfo: Mention that some .type syntaxes are not
1230 supported on all architectures.
1232 2006-04-14 Sterling Augustine <sterling@tensilica.com>
1234 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
1235 instructions when such transformations have been disabled.
1237 2006-04-10 Sterling Augustine <sterling@tensilica.com>
1239 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
1240 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
1241 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
1242 decoding the loop instructions. Remove current_offset variable.
1243 (xtensa_fix_short_loop_frags): Likewise.
1244 (min_bytes_to_other_loop_end): Remove current_offset argument.
1246 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
1248 * config/tc-z80.c (z80_optimize_expr): Removed.
1249 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
1251 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
1253 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
1254 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
1255 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
1256 atmega644, atmega329, atmega3290, atmega649, atmega6490,
1257 atmega406, atmega640, atmega1280, atmega1281, at90can32,
1258 at90can64, at90usb646, at90usb647, at90usb1286 and
1260 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1262 2006-04-07 Paul Brook <paul@codesourcery.com>
1264 * config/tc-arm.c (parse_operands): Set default error message.
1266 2006-04-07 Paul Brook <paul@codesourcery.com>
1268 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1270 2006-04-07 Paul Brook <paul@codesourcery.com>
1272 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1274 2006-04-07 Paul Brook <paul@codesourcery.com>
1276 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1277 (move_or_literal_pool): Handle Thumb-2 instructions.
1278 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1280 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1283 * config/tc-i386.c (match_template): Move 64-bit operand tests
1286 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1288 * po/Make-in: Add install-html target.
1289 * Makefile.am: Add install-html and install-html-recursive targets.
1290 * Makefile.in: Regenerate.
1291 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1292 * configure: Regenerate.
1293 * doc/Makefile.am: Add install-html and install-html-am targets.
1294 * doc/Makefile.in: Regenerate.
1296 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1298 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1301 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1302 Daniel Jacobowitz <dan@codesourcery.com>
1304 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1305 (GOTT_BASE, GOTT_INDEX): New.
1306 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1307 GOTT_INDEX when generating VxWorks PIC.
1308 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1309 use the generic *-*-vxworks* stanza instead.
1311 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1314 * frags.c (frag_offset_fixed_p): New function.
1315 * frags.h (frag_offset_fixed_p): Declare.
1316 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1317 (resolve_expression): Likewise.
1319 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1321 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1322 of the same length but different numbers of slots.
1324 2006-03-30 Andreas Schwab <schwab@suse.de>
1326 * configure.in: Fix help string for --enable-targets option.
1327 * configure: Regenerate.
1329 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1331 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1332 (m68k_ip): ... here. Use for all chips. Protect against buffer
1333 overrun and avoid excessive copying.
1335 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1336 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1337 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1338 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1339 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1340 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1341 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1342 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1343 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1344 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1345 (struct m68k_cpu): Change chip field to control_regs.
1346 (current_chip): Remove.
1347 (control_regs): New.
1348 (m68k_archs, m68k_extensions): Adjust.
1349 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1350 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1351 (find_cf_chip): Reimplement for new organization of cpu table.
1352 (select_control_regs): Remove.
1354 (struct save_opts): Save control regs, not chip.
1355 (s_save, s_restore): Adjust.
1356 (m68k_lookup_cpu): Give deprecated warning when necessary.
1357 (m68k_init_arch): Adjust.
1358 (md_show_usage): Adjust for new cpu table organization.
1360 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1362 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1363 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1364 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1366 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1367 (any_gotrel): New rule.
1368 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1369 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1371 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1372 (bfin_pic_ptr): New function.
1373 (md_pseudo_table): Add it for ".picptr".
1374 (OPTION_FDPIC): New macro.
1375 (md_longopts): Add -mfdpic.
1376 (md_parse_option): Handle it.
1377 (md_begin): Set BFD flags.
1378 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1379 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1381 * Makefile.am (bfin-parse.o): Update dependencies.
1382 (DEPTC_bfin_elf): Likewise.
1383 * Makefile.in: Regenerate.
1385 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1387 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1388 mcfemac instead of mcfmac.
1390 2006-03-23 Michael Matz <matz@suse.de>
1392 * config/tc-i386.c (type_names): Correct placement of 'static'.
1393 (reloc): Map some more relocs to their 64 bit counterpart when
1395 (output_insn): Work around breakage if DEBUG386 is defined.
1396 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1397 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1398 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1399 different from i386.
1400 (output_imm): Ditto.
1401 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1403 (md_convert_frag): Jumps can now be larger than 2GB away, error
1405 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1406 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1408 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1409 Daniel Jacobowitz <dan@codesourcery.com>
1410 Phil Edwards <phil@codesourcery.com>
1411 Zack Weinberg <zack@codesourcery.com>
1412 Mark Mitchell <mark@codesourcery.com>
1413 Nathan Sidwell <nathan@codesourcery.com>
1415 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1416 (md_begin): Complain about -G being used for PIC. Don't change
1417 the text, data and bss alignments on VxWorks.
1418 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1419 generating VxWorks PIC.
1420 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1421 (macro): Likewise, but do not treat la $25 specially for
1422 VxWorks PIC, and do not handle jal.
1423 (OPTION_MVXWORKS_PIC): New macro.
1424 (md_longopts): Add -mvxworks-pic.
1425 (md_parse_option): Don't complain about using PIC and -G together here.
1426 Handle OPTION_MVXWORKS_PIC.
1427 (md_estimate_size_before_relax): Always use the first relaxation
1428 sequence on VxWorks.
1429 * config/tc-mips.h (VXWORKS_PIC): New.
1431 2006-03-21 Paul Brook <paul@codesourcery.com>
1433 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1435 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1437 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1438 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1439 (get_loop_align_size): New.
1440 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1441 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1442 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1443 (get_noop_aligned_address): Use get_loop_align_size.
1444 (get_aligned_diff): Likewise.
1446 2006-03-21 Paul Brook <paul@codesourcery.com>
1448 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1450 2006-03-20 Paul Brook <paul@codesourcery.com>
1452 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1453 (do_t_branch): Encode branches inside IT blocks as unconditional.
1454 (do_t_cps): New function.
1455 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1456 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1457 (opcode_lookup): Allow conditional suffixes on all instructions in
1459 (md_assemble): Advance condexec state before checking for errors.
1460 (insns): Use do_t_cps.
1462 2006-03-20 Paul Brook <paul@codesourcery.com>
1464 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1465 outputting the insn.
1467 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1469 * config/tc-vax.c: Update copyright year.
1470 * config/tc-vax.h: Likewise.
1472 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1474 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1476 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1478 2006-03-17 Paul Brook <paul@codesourcery.com>
1480 * config/tc-arm.c (insns): Add ldm and stm.
1482 2006-03-17 Ben Elliston <bje@au.ibm.com>
1485 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1487 2006-03-16 Paul Brook <paul@codesourcery.com>
1489 * config/tc-arm.c (insns): Add "svc".
1491 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1493 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1494 flag and avoid double underscore prefixes.
1496 2006-03-10 Paul Brook <paul@codesourcery.com>
1498 * config/tc-arm.c (md_begin): Handle EABIv5.
1499 (arm_eabis): Add EF_ARM_EABI_VER5.
1500 * doc/c-arm.texi: Document -meabi=5.
1502 2006-03-10 Ben Elliston <bje@au.ibm.com>
1504 * app.c (do_scrub_chars): Simplify string handling.
1506 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1507 Daniel Jacobowitz <dan@codesourcery.com>
1508 Zack Weinberg <zack@codesourcery.com>
1509 Nathan Sidwell <nathan@codesourcery.com>
1510 Paul Brook <paul@codesourcery.com>
1511 Ricardo Anguiano <anguiano@codesourcery.com>
1512 Phil Edwards <phil@codesourcery.com>
1514 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1515 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1517 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1518 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1519 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1521 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1523 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1524 even when using the text-section-literals option.
1526 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1528 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1530 (m68k_ip): <case 'J'> Check we have some control regs.
1531 (md_parse_option): Allow raw arch switch.
1532 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1533 whether 68881 or cfloat was meant by -mfloat.
1534 (md_show_usage): Adjust extension display.
1535 (m68k_elf_final_processing): Adjust.
1537 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1539 * config/tc-avr.c (avr_mod_hash_value): New function.
1540 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1541 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1542 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1543 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1545 (tc_gen_reloc): Handle substractions of symbols, if possible do
1546 fixups, abort otherwise.
1547 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1548 tc_fix_adjustable): Define.
1550 2006-03-02 James E Wilson <wilson@specifix.com>
1552 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1553 change the template, then clear md.slot[curr].end_of_insn_group.
1555 2006-02-28 Jan Beulich <jbeulich@novell.com>
1557 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1559 2006-02-28 Jan Beulich <jbeulich@novell.com>
1562 * macro.c (getstring): Don't treat parentheses special anymore.
1563 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1564 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1567 2006-02-28 Mat <mat@csail.mit.edu>
1569 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1571 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1573 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1575 (CFI_signal_frame): Define.
1576 (cfi_pseudo_table): Add .cfi_signal_frame.
1577 (dot_cfi): Handle CFI_signal_frame.
1578 (output_cie): Handle cie->signal_frame.
1579 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1580 different. Copy signal_frame from FDE to newly created CIE.
1581 * doc/as.texinfo: Document .cfi_signal_frame.
1583 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1585 * doc/Makefile.am: Add html target.
1586 * doc/Makefile.in: Regenerate.
1587 * po/Make-in: Add html target.
1589 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1591 * config/tc-i386.c (output_insn): Support Intel Merom New
1594 * config/tc-i386.h (CpuMNI): New.
1595 (CpuUnknownFlags): Add CpuMNI.
1597 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1599 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1600 (hpriv_reg_table): New table for hyperprivileged registers.
1601 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1604 2006-02-24 DJ Delorie <dj@redhat.com>
1606 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1607 (tc_gen_reloc): Don't define.
1608 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1609 (OPTION_LINKRELAX): New.
1610 (md_longopts): Add it.
1612 (md_parse_options): Set it.
1613 (md_assemble): Emit relaxation relocs as needed.
1614 (md_convert_frag): Emit relaxation relocs as needed.
1615 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1616 (m32c_apply_fix): New.
1617 (tc_gen_reloc): New.
1618 (m32c_force_relocation): Force out jump relocs when relaxing.
1619 (m32c_fix_adjustable): Return false if relaxing.
1621 2006-02-24 Paul Brook <paul@codesourcery.com>
1623 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1624 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1625 (struct asm_barrier_opt): Define.
1626 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1627 (parse_psr): Accept V7M psr names.
1628 (parse_barrier): New function.
1629 (enum operand_parse_code): Add OP_oBARRIER.
1630 (parse_operands): Implement OP_oBARRIER.
1631 (do_barrier): New function.
1632 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1633 (do_t_cpsi): Add V7M restrictions.
1634 (do_t_mrs, do_t_msr): Validate V7M variants.
1635 (md_assemble): Check for NULL variants.
1636 (v7m_psrs, barrier_opt_names): New tables.
1637 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1638 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1639 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1640 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1641 (struct cpu_arch_ver_table): Define.
1642 (cpu_arch_ver): New.
1643 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1644 Tag_CPU_arch_profile.
1645 * doc/c-arm.texi: Document new cpu and arch options.
1647 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1649 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1651 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1653 * config/tc-ia64.c: Update copyright years.
1655 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1657 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1660 2005-02-22 Paul Brook <paul@codesourcery.com>
1662 * config/tc-arm.c (do_pld): Remove incorrect write to
1664 (encode_thumb32_addr_mode): Use correct operand.
1666 2006-02-21 Paul Brook <paul@codesourcery.com>
1668 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1670 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1671 Anil Paranjape <anilp1@kpitcummins.com>
1672 Shilin Shakti <shilins@kpitcummins.com>
1674 * Makefile.am: Add xc16x related entry.
1675 * Makefile.in: Regenerate.
1676 * configure.in: Added xc16x related entry.
1677 * configure: Regenerate.
1678 * config/tc-xc16x.h: New file
1679 * config/tc-xc16x.c: New file
1680 * doc/c-xc16x.texi: New file for xc16x
1681 * doc/all.texi: Entry for xc16x
1682 * doc/Makefile.texi: Added c-xc16x.texi
1683 * NEWS: Announce the support for the new target.
1685 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1687 * configure.tgt: set emulation for mips-*-netbsd*
1689 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1691 * config.in: Rebuilt.
1693 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1695 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1696 from 1, not 0, in error messages.
1697 (md_assemble): Simplify special-case check for ENTRY instructions.
1698 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1699 operand in error message.
1701 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1703 * configure.tgt (arm-*-linux-gnueabi*): Change to
1706 2006-02-10 Nick Clifton <nickc@redhat.com>
1708 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1709 32-bit value is propagated into the upper bits of a 64-bit long.
1711 * config/tc-arc.c (init_opcode_tables): Fix cast.
1712 (arc_extoper, md_operand): Likewise.
1714 2006-02-09 David Heine <dlheine@tensilica.com>
1716 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1717 each relaxation step.
1719 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1721 * configure.in (CHECK_DECLS): Add vsnprintf.
1722 * configure: Regenerate.
1723 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1724 include/declare here, but...
1725 * as.h: Move code detecting VARARGS idiom to the top.
1726 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1727 (vsnprintf): Declare if not already declared.
1729 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1731 * as.c (close_output_file): New.
1732 (main): Register close_output_file with xatexit before
1733 dump_statistics. Don't call output_file_close.
1735 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1737 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1738 mcf5329_control_regs): New.
1739 (not_current_architecture, selected_arch, selected_cpu): New.
1740 (m68k_archs, m68k_extensions): New.
1741 (archs): Renamed to ...
1742 (m68k_cpus): ... here. Adjust.
1744 (md_pseudo_table): Add arch and cpu directives.
1745 (find_cf_chip, m68k_ip): Adjust table scanning.
1746 (no_68851, no_68881): Remove.
1747 (md_assemble): Lazily initialize.
1748 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1749 (md_init_after_args): Move functionality to m68k_init_arch.
1750 (mri_chip): Adjust table scanning.
1751 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1752 options with saner parsing.
1753 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1754 m68k_init_arch): New.
1755 (s_m68k_cpu, s_m68k_arch): New.
1756 (md_show_usage): Adjust.
1757 (m68k_elf_final_processing): Set CF EF flags.
1758 * config/tc-m68k.h (m68k_init_after_args): Remove.
1759 (tc_init_after_args): Remove.
1760 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1761 (M68k-Directives): Document .arch and .cpu directives.
1763 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1765 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1766 synonyms for equ and defl.
1767 (z80_cons_fix_new): New function.
1768 (emit_byte): Disallow relative jumps to absolute locations.
1769 (emit_data): Only handle defb, prototype changed, because defb is
1770 now handled as pseudo-op rather than an instruction.
1771 (instab): Entries for defb,defw,db,dw moved from here...
1772 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1773 Add entries for def24,def32,d24,d32.
1774 (md_assemble): Improved error handling.
1775 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1776 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1777 (z80_cons_fix_new): Declare.
1778 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1779 (def24,d24,def32,d32): New pseudo-ops.
1781 2006-02-02 Paul Brook <paul@codesourcery.com>
1783 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1785 2005-02-02 Paul Brook <paul@codesourcery.com>
1787 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1788 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1789 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1790 T2_OPCODE_RSB): Define.
1791 (thumb32_negate_data_op): New function.
1792 (md_apply_fix): Use it.
1794 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1796 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1798 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1799 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1801 (relaxation_requirements): Add pfinish_frag argument and use it to
1802 replace setting tinsn->record_fix fields.
1803 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1804 and vinsn_to_insnbuf. Remove references to record_fix and
1805 slot_sub_symbols fields.
1806 (xtensa_mark_narrow_branches): Delete unused code.
1807 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1809 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1811 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1812 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1813 of the record_fix field. Simplify error messages for unexpected
1815 (set_expr_symbol_offset_diff): Delete.
1817 2006-01-31 Paul Brook <paul@codesourcery.com>
1819 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1821 2006-01-31 Paul Brook <paul@codesourcery.com>
1822 Richard Earnshaw <rearnsha@arm.com>
1824 * config/tc-arm.c: Use arm_feature_set.
1825 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1826 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1827 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1830 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1831 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1832 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1833 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1835 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1836 (arm_opts): Move old cpu/arch options from here...
1837 (arm_legacy_opts): ... to here.
1838 (md_parse_option): Search arm_legacy_opts.
1839 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1840 (arm_float_abis, arm_eabis): Make const.
1842 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1844 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1846 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1848 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1849 in load immediate intruction.
1851 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1853 * config/bfin-parse.y (value_match): Use correct conversion
1854 specifications in template string for __FILE__ and __LINE__.
1858 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1860 Introduce TLS descriptors for i386 and x86_64.
1861 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1862 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1863 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1864 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1865 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1867 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1868 (lex_got): Handle @tlsdesc and @tlscall.
1869 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1871 2006-01-11 Nick Clifton <nickc@redhat.com>
1873 Fixes for building on 64-bit hosts:
1874 * config/tc-avr.c (mod_index): New union to allow conversion
1875 between pointers and integers.
1876 (md_begin, avr_ldi_expression): Use it.
1877 * config/tc-i370.c (md_assemble): Add cast for argument to print
1879 * config/tc-tic54x.c (subsym_substitute): Likewise.
1880 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1881 opindex field of fr_cgen structure into a pointer so that it can
1882 be stored in a frag.
1883 * config/tc-mn10300.c (md_assemble): Likewise.
1884 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1886 * config/tc-v850.c: Replace uses of (int) casts with correct
1889 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1892 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1894 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1897 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1898 a local-label reference.
1900 For older changes see ChangeLog-2005
1906 version-control: never