gas/ChangeLog

   1 2013-08-19  Richard Sandiford  <rdsandiford@googlemail.com>
   2
   3         * config/tc-mips.c (imm2_expr): Delete.
   4         (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
   5
   6 2013-08-19  Richard Sandiford  <rdsandiford@googlemail.com>
   7
   8         * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
   9         (macro): Remove M_DEXT and M_DINS handling.
  10
  11 2013-08-19  Richard Sandiford  <rdsandiford@googlemail.com>
  12
  13         * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
  14         lax_max with lax_match.
  15         (match_int_operand): Update accordingly.  Don't report an error
  16         for !lax_match-only cases.
  17         (match_insn): Replace more_alts with lax_match and use it to
  18         initialize the mips_arg_info field.  Add a complete_p parameter.
  19         Handle implicit VU0 suffixes here.
  20         (match_invalid_for_isa, match_insns, match_mips16_insns): New
  21         functions.
  22         (mips_ip, mips16_ip): Use them.
  23
  24 2013-08-19  Richard Sandiford  <rdsandiford@googlemail.com>
  25
  26         * config/tc-mips.c (match_expression):  Report uses of registers here.
  27         Add a "must be an immediate expression" error.  Handle elided offsets
  28         here rather than...
  29         (match_int_operand): ...here.
  30
  31 2013-08-19  Richard Sandiford  <rdsandiford@googlemail.com>
  32
  33         * config/tc-mips.c (mips_arg_info): Remove soft_match.
  34         (match_out_of_range, match_not_constant): New functions.
  35         (match_const_int): Remove fallback parameter and check for soft_match.
  36         Use match_not_constant.
  37         (match_mapped_int_operand, match_addiusp_operand)
  38         (match_perf_reg_operand, match_save_restore_list_operand)
  39         (match_mdmx_imm_reg_operand): Update accordingly.  Use
  40         match_out_of_range and set_insn_error* instead of as_bad.
  41         (match_int_operand): Likewise.  Use match_not_constant in the
  42         !allows_nonconst case.
  43         (match_float_constant): Report invalid float constants.
  44         (match_insn, match_mips16_insn): Remove soft_match code.  Rely on
  45         match_float_constant to check for invalid constants.  Fail the
  46         match if match_const_int or match_float_constant return false.
  47         (mips_ip): Update accordingly.
  48         (mips16_ip): Likewise.  Undo null termination of instruction name
  49         once lookup is complete.
  50
  51 2013-08-19  Richard Sandiford  <rdsandiford@googlemail.com>
  52
  53         * config/tc-mips.c (mips_insn_error_format): New enum.
  54         (mips_insn_error): New struct.
  55         (insn_error): Change to a mips_insn_error.
  56         (clear_insn_error, set_insn_error_format, set_insn_error)
  57         (set_insn_error_i, set_insn_error_ss, report_insn_error): New
  58         functions.
  59         (mips_parse_argument_token, md_assemble, match_insn)
  60         (match_mips16_insn): Use them instead of manipulating insn_error
  61         directly.
  62         (mips_ip, mips16_ip): Likewise.  Simplify control flow.
  63
  64 2013-08-19  Richard Sandiford  <rdsandiford@googlemail.com>
  65
  66         * config/tc-mips.c (normalize_constant_expr): Move further up file.
  67         (normalize_address_expr): Likewise.
  68         (match_insn, match_mips16_insn): New functions, split out from...
  69         (mips_ip, mips16_ip): ...here.
  70
  71 2013-08-19  Richard Sandiford  <rdsandiford@googlemail.com>
  72
  73         * config/tc-mips.c (operand_reg_mask, match_operand): Handle
  74         OP_OPTIONAL_REG.
  75         (mips_ip, mips16_ip): Use mips_optional_operand_p to check
  76         for optional operands.
  77
  78 2013-08-16  Alan Modra  <amodra@gmail.com>
  79
  80         * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
  81         modifiers generally.
  82
  83 2013-08-16  Alan Modra  <amodra@gmail.com>
  84
  85         * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
  86
  87 2013-08-14  David Edelsohn  <dje.gcc@gmail.com>
  88
  89         * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
  90         argument as alignment.
  91
  92 2013-08-09  Nick Clifton  <nickc@redhat.com>
  93
  94         * config/tc-rl78.c (elf_flags): New variable.
  95         (enum options): Add OPTION_G10.
  96         (md_longopts): Add mg10.
  97         (md_parse_option): Parse -mg10.
  98         (rl78_elf_final_processing): New function.
  99         * config/tc-rl78.c (tc_final_processing): Define.
 100         * doc/c-rl78.texi: Document -mg10 option.
 101
 102 2013-08-06  Jürgen Urban  <JuergenUrban@gmx.de>
 103
 104         * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
 105         suffixes to be elided too.
 106         (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
 107         (mips_ip): Assume .xyzw if no VU0 suffix is specified.  Allow +N
 108         to be omitted too.
 109
 110 2013-08-05  John Tytgat  <john@bass-software.com>
 111
 112         * po/POTFILES.in: Regenerate.
 113
 114 2013-08-05  Eric Botcazou  <ebotcazou@adacore.com>
 115             Konrad Eisele  <konrad@gaisler.com>
 116
 117         * config/tc-sparc.c (sparc_arch_types): Add leon.
 118         (sparc_arch): Move sparc4 around and add leon.
 119         (sparc_target_format): Document -Aleon.
 120         * doc/c-sparc.texi: Likewise.
 121
 122 2013-08-05  Richard Sandiford  <rdsandiford@googlemail.com>
 123
 124         * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
 125
 126 2013-08-04  Jürgen Urban  <JuergenUrban@gmx.de>
 127             Richard Sandiford  <rdsandiford@googlemail.com>
 128
 129         * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
 130         (RWARN): Bump to 0x8000000.
 131         (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
 132         (RTYPE_R5900_ACC): New register types.
 133         (RTYPE_MASK): Include them.
 134         (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
 135         macros.
 136         (reg_names): Include them.
 137         (mips_parse_register_1): New function, split out from...
 138         (mips_parse_register): ...here.  Add a channels_ptr parameter.
 139         Look for VU0 channel suffixes when nonnull.
 140         (reg_lookup): Update the call to mips_parse_register.
 141         (mips_parse_vu0_channels): New function.
 142         (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
 143         (mips_operand_token): Add a "channels" field to the union.
 144         Extend the comment above "ch" to OT_DOUBLE_CHAR.
 145         (mips_parse_base_start): Match -- and ++.  Handle channel suffixes.
 146         (mips_parse_argument_token): Handle channel suffixes here too.
 147         (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
 148         Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
 149         Handle '#' formats.
 150         (md_begin): Register $vfN and $vfI registers.
 151         (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
 152         (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
 153         OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
 154         (match_vu0_suffix_operand): New function.
 155         (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
 156         (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
 157         (mips_lookup_insn): New function.
 158         (mips_ip): Use it.  Allow "+K" operands to be elided at the end
 159         of an instruction.  Handle '#' sequences.
 160
 161 2013-08-03  Richard Sandiford  <rdsandiford@googlemail.com>
 162
 163         * config/tc-mips.c (macro, mips16_macro): Create an array of operand
 164         values and use it instead of sreg, treg, xreg, etc.
 165
 166 2013-08-03  Richard Sandiford  <rdsandiford@googlemail.com>
 167
 168         * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
 169         and mips_int_operand_max.
 170         (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
 171         Delete.
 172         (mips16_immed_operand, mips16_immed_in_range_p): New functions.
 173         (mips16_immed, mips16_extended_frag): Use them.  Use mips_int_operand
 174         instead of mips16_immed_operand.
 175
 176 2013-08-03  Richard Sandiford  <rdsandiford@googlemail.com>
 177
 178         * config/tc-mips.c (mips16_macro): Don't use move_register.
 179         (mips16_ip): Allow macros to use 'p'.
 180
 181 2013-08-01  Richard Sandiford  <rdsandiford@googlemail.com>
 182
 183         * config/tc-mips.c (MAX_OPERANDS): New macro.
 184         (mips_operand_array): New structure.
 185         (mips_operands, mips16_operands, micromips_operands): New arrays.
 186         (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
 187         (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
 188         (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
 189         (micromips_to_32_reg_q_map): Delete.
 190         (insn_operands, insn_opno, insn_extract_operand): New functions.
 191         (validate_mips_insn): Take a mips_operand_array as argument and
 192         use it to build up a list of operands.  Extend to handle INSN_MACRO
 193         and MIPS16.
 194         (validate_mips16_insn): New function.
 195         (validate_micromips_insn): Take a mips_operand_array as argument.
 196         Handle INSN_MACRO.
 197         (md_begin): Initialize mips_operands, mips16_operands and
 198         micromips_operands.  Call validate_mips_insn and
 199         validate_micromips_insn for macro instructions too.
 200         Call validate_mips16_insn for MIPS16 instructions.
 201         (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
 202         New functions.
 203         (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
 204         them.  Handle INSN_UDI.
 205         (get_append_method): Use gpr_read_mask.
 206
 207 2013-08-01  Richard Sandiford  <rdsandiford@googlemail.com>
 208
 209         * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
 210         flags for MIPS16 and non-MIPS16 instructions.
 211         (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
 212         (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
 213         (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
 214         (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
 215         and non-MIPS16 instructions.  Fix formatting.
 216
 217 2013-08-01  Richard Sandiford  <rdsandiford@googlemail.com>
 218
 219         * config/tc-mips.c (reg_needs_delay): Move later in file.
 220         Use gpr_write_mask.
 221         (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
 222
 223 2013-07-26  Sergey Guriev  <sergey.s.guriev@intel.com>
 224             Alexander Ivchenko  <alexander.ivchenko@intel.com>
 225             Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
 226             Sergey Lega  <sergey.s.lega@intel.com>
 227             Anna Tikhonova  <anna.tikhonova@intel.com>
 228             Ilya Tocar  <ilya.tocar@intel.com>
 229             Andrey Turetskiy  <andrey.turetskiy@intel.com>
 230             Ilya Verbin  <ilya.verbin@intel.com>
 231             Kirill Yukhin  <kirill.yukhin@intel.com>
 232             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 233
 234         * config/tc-i386-intel.c (O_zmmword_ptr): New.
 235         (i386_types): Add zmmword.
 236         (i386_intel_simplify_register): Allow regzmm.
 237         (i386_intel_simplify): Handle zmmwords.
 238         (i386_intel_operand): Handle RC/SAE, vector operations and
 239         zmmwords.
 240         * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
 241         (struct RC_Operation): New.
 242         (struct Mask_Operation): New.
 243         (struct Broadcast_Operation): New.
 244         (vex_prefix): Size of bytes increased to 4 to support EVEX
 245         encoding.
 246         (enum i386_error): Add new error codes: unsupported_broadcast,
 247         broadcast_not_on_src_operand, broadcast_needed,
 248         unsupported_masking, mask_not_on_destination, no_default_mask,
 249         unsupported_rc_sae, rc_sae_operand_not_last_imm,
 250         invalid_register_operand, try_vector_disp8.
 251         (struct _i386_insn): Add new fields vrex, need_vrex, mask,
 252         rounding, broadcast, memshift.
 253         (struct RC_name): New.
 254         (RC_NamesTable): New.
 255         (evexlig): New.
 256         (evexwig): New.
 257         (extra_symbol_chars): Add '{'.
 258         (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
 259         (i386_operand_type): Add regzmm, regmask and vec_disp8.
 260         (match_mem_size): Handle zmmwords.
 261         (operand_type_match): Handle zmm-registers.
 262         (mode_from_disp_size): Handle vec_disp8.
 263         (fits_in_vec_disp8): New.
 264         (md_begin): Handle {} properly.
 265         (type_names): Add "rZMM", "Mask reg" and "Vector d8".
 266         (build_vex_prefix): Handle vrex.
 267         (build_evex_prefix): New.
 268         (process_immext): Adjust to properly handle EVEX.
 269         (md_assemble): Add EVEX encoding support.
 270         (swap_2_operands): Correctly handle operands with masking,
 271         broadcasting or RC/SAE.
 272         (check_VecOperands): Support EVEX features.
 273         (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
 274         (match_template): Support regzmm and handle new error codes.
 275         (process_suffix): Handle zmmwords and zmm-registers.
 276         (check_byte_reg): Extend to zmm-registers.
 277         (process_operands): Extend to zmm-registers.
 278         (build_modrm_byte): Handle EVEX.
 279         (output_insn): Adjust to properly handle EVEX case.
 280         (disp_size): Handle vec_disp8.
 281         (output_disp): Support compressed disp8*N evex feature.
 282         (output_imm): Handle RC/SAE immediates properly.
 283         (check_VecOperations): New.
 284         (i386_immediate): Handle EVEX features.
 285         (i386_index_check): Handle zmmwords and zmm-registers.
 286         (RC_SAE_immediate): New.
 287         (i386_att_operand): Handle EVEX features.
 288         (parse_real_register): Add a check for ZMM/Mask registers.
 289         (OPTION_MEVEXLIG): New.
 290         (OPTION_MEVEXWIG): New.
 291         (md_longopts): Add mevexlig and mevexwig.
 292         (md_parse_option): Handle mevexlig and mevexwig options.
 293         (md_show_usage): Add description for mevexlig and mevexwig.
 294         * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
 295         avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
 296
 297 2013-07-25  Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 298
 299         * config/tc-i386.c (cpu_arch): Add .sha.
 300         * doc/c-i386.texi: Document sha/.sha.
 301
 302 2013-07-24  Anna Tikhonova  <anna.tikhonova@intel.com>
 303             Kirill Yukhin  <kirill.yukhin@intel.com>
 304             Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
 305
 306         * config/tc-i386.c (BND_PREFIX): New.
 307         (struct _i386_insn): Add new field bnd_prefix.
 308         (add_bnd_prefix): New.
 309         (cpu_arch): Add MPX.
 310         (i386_operand_type): Add regbnd.
 311         (md_assemble): Handle BND prefixes.
 312         (parse_insn): Likewise.
 313         (output_branch): Likewise.
 314         (output_jump): Likewise.
 315         (build_modrm_byte): Handle regbnd.
 316         (OPTION_MADD_BND_PREFIX): New.
 317         (md_longopts): Add entry for 'madd-bnd-prefix'.
 318         (md_parse_option): Handle madd-bnd-prefix option.
 319         (md_show_usage): Add description for madd-bnd-prefix
 320         option.
 321         * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
 322
 323 2013-07-24  Tristan Gingold  <gingold@adacore.com>
 324
 325         * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
 326         xcoff targets.
 327
 328 2013-07-24  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 329
 330         * config/tc-s390.c (s390_machine): Don't force the .machine
 331         argument to lower case.
 332
 333 2013-07-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 334
 335         * config/tc-arm.c (s_arm_arch_extension): Improve error message
 336         for invalid extension.
 337
 338 2013-07-19  Yufeng Zhang  <yufeng.zhang@arm.com>
 339
 340         * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
 341         (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
 342         (aarch64_abi): New variable.
 343         (ilp32_p): Change to be a macro.
 344         (aarch64_opts): Remove the support for option -milp32 and -mlp64.
 345         (struct aarch64_option_abi_value_table): New struct.
 346         (aarch64_abis): New table.
 347         (aarch64_parse_abi): New function.
 348         (aarch64_long_opts): Add entry for -mabi=.
 349         * doc/as.texinfo (Target AArch64 options): Document -mabi.
 350         * doc/c-aarch64.texi: Likewise.
 351
 352 2013-07-18  Jim Thomas  <thomas@cfht.hawaii.edu>
 353
 354         * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
 355         unsigned comparison.
 356
 357 2013-07-18  Sandeep Kumar Singh  <Sandeep.Singh2@kpitcummins.com>
 358
 359         * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
 360         RX610.
 361         * config/rx-parse.y: (rx_check_float_support): Add function to
 362         check floating point operation support for target RX100 and
 363         RX200.
 364         * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
 365         * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
 366         RX200, RX600, and RX610
 367
 368 2013-07-18  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
 369
 370         * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
 371
 372 2013-07-18  Vishnu K.S  <vishnu.k_s@atmel.com>
 373
 374         * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
 375         * doc/c-avr.texi: Likewise.
 376
 377 2013-07-15  Richard Sandiford  <rdsandiford@googlemail.com>
 378
 379         * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
 380         error with older GCCs.
 381         (mips16_macro_build): Dereference args.
 382
 383 2013-07-14  Richard Sandiford  <rdsandiford@googlemail.com>
 384
 385         * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
 386         New functions, split out from...
 387         (reg_lookup): ...here.  Remove itbl support.
 388         (reglist_lookup): Delete.
 389         (mips_operand_token_type): New enum.
 390         (mips_operand_token): New structure.
 391         (mips_operand_tokens): New variable.
 392         (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
 393         (mips_parse_arguments): New functions.
 394         (md_begin): Initialize mips_operand_tokens.
 395         (mips_arg_info): Add a token field.  Remove optional_reg field.
 396         (match_char, match_expression): New functions.
 397         (match_const_int): Use match_expression.  Remove "s" argument
 398         and return a boolean result.  Remove O_register handling.
 399         (match_regno, match_reg, match_reg_range): New functions.
 400         (match_int_operand, match_mapped_int_operand, match_msb_operand)
 401         (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
 402         (match_addiusp_operand, match_clo_clz_dest_operand)
 403         (match_lwm_swm_list_operand, match_entry_exit_operand)
 404         (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
 405         (match_tied_reg_operand): Remove "s" argument and return a boolean
 406         result.  Match tokens rather than text.  Update calls to
 407         match_const_int.  Rely on match_regno to call check_regno.
 408         (match_pcrel_operand, match_pc_operand): Replace "s" argument with
 409         "arg" argument.  Return a boolean result.
 410         (parse_float_constant): Replace with...
 411         (match_float_constant): ...this new function.
 412         (match_operand): Remove "s" argument and return a boolean result.
 413         Update calls to subfunctions.
 414         (mips_ip, mips16_ip): Call mips_parse_arguments.  Use match routines
 415         rather than string-parsing routines.  Update handling of optional
 416         registers for token scheme.
 417
 418 2013-07-14  Richard Sandiford  <rdsandiford@googlemail.com>
 419
 420         * config/tc-mips.c (parse_float_constant): Split out from...
 421         (mips_ip): ...here.
 422
 423 2013-07-14  Richard Sandiford  <rdsandiford@googlemail.com>
 424
 425         * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
 426         Delete.
 427
 428 2013-07-14  Richard Sandiford  <rdsandiford@googlemail.com>
 429
 430         * config/tc-mips.c (mips32_to_16_reg_map): Delete.
 431         (match_entry_exit_operand): New function.
 432         (match_save_restore_list_operand): Likewise.
 433         (match_operand): Use them.
 434         (check_absolute_expr): Delete.
 435         (mips16_ip): Rewrite main parsing loop to use mips_operands.
 436
 437 2013-07-14  Richard Sandiford  <rdsandiford@googlemail.com>
 438
 439         * config/tc-mips.c: Enable functions commented out in previous patch.
 440         (SKIP_SPACE_TABS): Move further up file.
 441         (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
 442         (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
 443         (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
 444         (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
 445         (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
 446         (micromips_imm_b_map, micromips_imm_c_map): Delete.
 447         (mips_lookup_reg_pair): Delete.
 448         (macro): Use report_bad_range and report_bad_field.
 449         (mips_immed, expr_const_in_range): Delete.
 450         (mips_ip): Rewrite main parsing loop to use new functions.
 451
 452 2013-07-14  Richard Sandiford  <rdsandiford@googlemail.com>
 453
 454         * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
 455         Change return type to bfd_boolean.
 456         (report_bad_range, report_bad_field): New functions.
 457         (mips_arg_info): New structure.
 458         (match_const_int, convert_reg_type, check_regno, match_int_operand)
 459         (match_mapped_int_operand, match_msb_operand, match_reg_operand)
 460         (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
 461         (match_addiusp_operand, match_clo_clz_dest_operand)
 462         (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
 463         (match_pc_operand, match_tied_reg_operand, match_operand)
 464         (check_completed_insn): New functions, commented out for now.
 465
 466 2013-07-14  Richard Sandiford  <rdsandiford@googlemail.com>
 467
 468         * config/tc-mips.c (insn_insert_operand): New function.
 469         (macro_build, mips16_macro_build): Put null character check
 470         in the for loop and convert continues to breaks.  Use operand
 471         structures to handle constant operands.
 472
 473 2013-07-14  Richard Sandiford  <rdsandiford@googlemail.com>
 474
 475         * config/tc-mips.c (validate_mips_insn): Move further up file.
 476         Add insn_bits and decode_operand arguments.  Use the mips_operand
 477         fields to work out which bits an operand occupies.  Detect double
 478         definitions.
 479         (validate_micromips_insn): Move further up file.  Call into
 480         validate_mips_insn.
 481
 482 2013-07-14  Richard Sandiford  <rdsandiford@googlemail.com>
 483
 484         * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
 485
 486 2013-07-14  Richard Sandiford  <rdsandiford@googlemail.com>
 487
 488         * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
 489         and "~".
 490         (macro): Update accordingly.
 491
 492 2013-07-14  Richard Sandiford  <rdsandiford@googlemail.com>
 493
 494         * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
 495         (imm_reloc): Delete.
 496         (md_assemble): Remove imm_reloc handling.
 497         (mips_ip): Update commentary.  Use offset_expr and offset_reloc
 498         rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
 499         Use a temporary array rather than imm_reloc when parsing
 500         constant expressions.  Remove imm_reloc initialization.
 501         (mips16_ip): Update commentary.  Use offset_expr and offset_reloc
 502         for the relaxable field.  Use a relax_char variable to track the
 503         type of this field.  Remove imm_reloc initialization.
 504
 505 2013-07-14  Richard Sandiford  <rdsandiford@googlemail.com>
 506
 507         * config/tc-mips.c (mips16_ip): Handle "I".
 508
 509 2013-07-12  Maciej W. Rozycki  <macro@codesourcery.com>
 510
 511         * config/tc-mips.c (mips_flag_nan2008): New variable.
 512         (options): Add OPTION_NAN enum value.
 513         (md_longopts): Handle it.
 514         (md_parse_option): Likewise.
 515         (s_nan): New function.
 516         (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
 517         (md_show_usage): Add -mnan.
 518
 519         * doc/as.texinfo (Overview): Add -mnan.
 520         * doc/c-mips.texi (MIPS Opts): Document -mnan.
 521         (MIPS NaN Encodings): New node.  Document .nan directive.
 522         (MIPS-Dependent): List the new node.
 523
 524 2013-07-09  Tristan Gingold  <gingold@adacore.com>
 525
 526         * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
 527
 528 2013-07-08  Richard Sandiford  <rdsandiford@googlemail.com>
 529
 530         * config/tc-mips.c (mips_ip): Unconditionally parse an expression
 531         for 'A' and assume that the constant has been elided if the result
 532         is an O_register.
 533
 534 2013-07-07  Richard Sandiford  <rdsandiford@googlemail.com>
 535
 536         * config/tc-mips.c (gprel16_reloc_p): New function.
 537         (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
 538         BFD_RELOC_UNUSED.
 539         (offset_high_part, small_offset_p): New functions.
 540         (nacro): Use them.  Remove *_OB and *_DOB cases.  For single-
 541         register load and store macros, handle the 16-bit offset case first.
 542         If a 16-bit offset is not suitable for the instruction we're
 543         generating, load it into the temporary register using
 544         ADDRESS_ADDI_INSN.  Make the M_LI_DD code fall through into the
 545         M_L_DAB code once the address has been constructed.  For double load
 546         and store macros, again handle the 16-bit offset case first.
 547         If the second register cannot be accessed from the same high
 548         part as the first, load it into AT using ADDRESS_ADDI_INSN.
 549         Fix the handling of LD in cases where the first register is the
 550         same as the base.  Also handle the case where the offset is
 551         not 16 bits and the second register cannot be accessed from the
 552         same high part as the first.  For unaligned loads and stores,
 553         fuse the offbits == 12 and old "ab" handling.  Apply this handling
 554         whenever the second offset needs a different high part from the first.
 555         Construct the offset using ADDRESS_ADDI_INSN where possible,
 556         for offbits == 16 as well as offbits == 12.  Use offset_reloc
 557         when constructing the individual loads and stores.
 558         (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
 559         and offset_reloc before matching against a particular opcode.
 560         Handle elided 'A' constants.  Allow 'A' constants to use
 561         relocation operators.
 562
 563 2013-07-07  Richard Sandiford  <rdsandiford@googlemail.com>
 564
 565         * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
 566         (mips_ip): Likewise.  Do not set is_mdmx for INSN_5400 instructions.
 567         Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
 568
 569 2013-07-07  Richard Sandiford  <rdsandiford@googlemail.com>
 570
 571         * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
 572         Require the msb to be <= 31 for "+s".  Check that the size is <= 31
 573         for both "+s" and "+S".
 574
 575 2013-07-07  Richard Sandiford  <rdsandiford@googlemail.com>
 576
 577         * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
 578         (mips_ip, mips16_ip): Handle "+i".
 579
 580 2013-07-07  Richard Sandiford  <rdsandiford@googlemail.com>
 581
 582         * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
 583         (micromips_to_32_reg_h_map): Rename to...
 584         (micromips_to_32_reg_h_map1): ...this.
 585         (micromips_to_32_reg_i_map): Rename to...
 586         (micromips_to_32_reg_h_map2): ...this.
 587         (mips_lookup_reg_pair): New function.
 588         (gpr_write_mask, macro): Adjust after above renaming.
 589         (validate_micromips_insn): Remove "mi" handling.
 590         (mips_ip): Likewise.  Parse both registers in a pair for "mh".
 591
 592 2013-07-07  Richard Sandiford  <rdsandiford@googlemail.com>
 593
 594         * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
 595         (mips_ip): Remove "+D" and "+T" handling.
 596
 597 2013-07-05  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 598
 599         * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
 600         relocs.
 601
 602 2013-07-03  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 603
 604         * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
 605
 606 2013-07-02  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 607
 608         * config/tc-aarch64.c (md_apply_fix): Reorder case values.
 609         (aarch64_force_relocation): Likewise.
 610
 611 2013-07-02  Alan Modra  <amodra@gmail.com>
 612
 613         * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
 614
 615 2013-06-26  Maciej W. Rozycki  <macro@codesourcery.com>
 616
 617         * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
 618         * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
 619         Replace @sc{mips16} with literal `MIPS16'.
 620         (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
 621
 622 2013-06-26  Yufeng Zhang  <yufeng.zhang@arm.com>
 623
 624         * config/tc-aarch64.c (reloc_table): Replace
 625         BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
 626         BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
 627         BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
 628         BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
 629         (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
 630         BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
 631         BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
 632         BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
 633         BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
 634         BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
 635         (aarch64_force_relocation): Likewise.
 636
 637 2013-06-26  Yufeng Zhang  <yufeng.zhang@arm.com>
 638
 639         * config/tc-aarch64.c (ilp32_p): New static variable.
 640         (elf64_aarch64_target_format): Return the target according to the
 641         value of 'ilp32_p'.
 642         (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
 643         (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
 644         (aarch64_dwarf2_addr_size): New function.
 645         * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
 646         (DWARF2_ADDR_SIZE): New define.
 647
 648 2013-06-26  Richard Sandiford  <rdsandiford@googlemail.com>
 649
 650         * doc/c-mips.texi: Use ISA instead of @sc{isa}.
 651
 652 2013-06-26  Richard Sandiford  <rdsandiford@googlemail.com>
 653
 654         * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
 655
 656 2013-06-25  Maciej W. Rozycki  <macro@codesourcery.com>
 657
 658         * config/tc-mips.c (mips_set_options): Add insn32 member.
 659         (mips_opts): Initialize it.
 660         (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
 661         (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
 662         (md_longopts): Add "minsn32" and "mno-insn32" options.
 663         (is_size_valid): Handle insn32 mode.
 664         (md_assemble): Pass instruction string down to macro.
 665         (brk_fmt): Add second dimension and insn32 mode initializers.
 666         (mfhl_fmt): Likewise.
 667         (BRK_FMT, MFHL_FMT): Handle insn32 mode.
 668         (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
 669         (macro_build_jalr, move_register): Handle insn32 mode.
 670         (macro_build_branch_rs): Likewise.
 671         (macro): Handle insn32 mode.
 672         <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
 673         (mips_ip): Handle insn32 mode.
 674         (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
 675         (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
 676         (mips_handle_align): Handle insn32 mode.
 677         (md_show_usage): Add -minsn32 and -mno-insn32.
 678
 679         * doc/as.texinfo (Target MIPS options): Add -minsn32 and
 680         -mno-insn32 options.
 681         (-minsn32, -mno-insn32): New options.
 682         * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
 683         options.
 684         (MIPS assembly options): New node.  Document .set insn32 and
 685         .set noinsn32.
 686         (MIPS-Dependent): List the new node.
 687
 688 2013-06-25  Nick Clifton  <nickc@redhat.com>
 689
 690         * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
 691         the PC in indirect addressing on 430xv2 parts.
 692         (msp430_operands): Add version test to hardware bug encoding
 693         restrictions.
 694
 695 2013-06-24  Roland McGrath  <mcgrathr@google.com>
 696
 697         * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
 698         so it skips whitespace before it.
 699         (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
 700
 701         * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
 702         (arm_reg_parse_multi): Skip whitespace first.
 703         (parse_reg_list): Likewise.
 704         (parse_vfp_reg_list): Likewise.
 705         (s_arm_unwind_save_mmxwcg): Likewise.
 706
 707 2013-06-24  Nick Clifton  <nickc@redhat.com>
 708
 709         PR gas/15623
 710         * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
 711
 712 2013-06-23  Richard Sandiford  <rdsandiford@googlemail.com>
 713
 714         * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
 715
 716 2013-06-23  Richard Sandiford  <rdsandiford@googlemail.com>
 717
 718         * config/tc-mips.c: Assert that offsetT and valueT are at least
 719         8 bytes in size.
 720         (GPR_SMIN, GPR_SMAX): New macros.
 721         (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
 722
 723 2013-06-22  Richard Sandiford  <rdsandiford@googlemail.com>
 724
 725         * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
 726         conditions.  Remove any code deselected by them.
 727         (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
 728
 729 2013-06-22  Richard Sandiford  <rdsandiford@googlemail.com>
 730
 731         * NEWS: Note removal of ECOFF support.
 732         * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
 733         * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
 734         (MULTI_CFILES): Remove config/e-mipsecoff.c.
 735         * Makefile.in: Regenerate.
 736         * configure.in: Remove MIPS ECOFF references.
 737         (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
 738         Delete cases.
 739         (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
 740         (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
 741         (mips-*-*): ...this single case.
 742         (mipsbecoff, mipslecoff, mipsecoff): Remove emulations.  Expect
 743         MIPS emulations to be e-mipself*.
 744         * configure: Regenerate.
 745         * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
 746         (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
 747         (mips-*-sysv*): Remove coff and ecoff cases.
 748         * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
 749         * ecoff.c: Remove reference to MIPS ECOFF.
 750         * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
 751         * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
 752         (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
 753         (mips_hi_fixup): Tweak comment.
 754         (append_insn): Require a howto.
 755         (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
 756
 757 2013-06-22  Richard Sandiford  <rdsandiford@googlemail.com>
 758
 759         * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
 760         Use "CPU" instead of "cpu".
 761         * doc/c-mips.texi: Likewise.
 762         (MIPS Opts): Rename to MIPS Options.
 763         (MIPS option stack): Rename to MIPS Option Stack.
 764         (MIPS ASE instruction generation overrides): Rename to
 765         MIPS ASE Instruction Generation Overrides (for now).
 766         (MIPS floating-point): Rename to MIPS Floating-Point.
 767
 768 2013-06-22  Richard Sandiford  <rdsandiford@googlemail.com>
 769
 770         * doc/c-mips.texi (MIPS Macros): New section.
 771         (MIPS Object): Replace with...
 772         (MIPS Small Data): ...this new section.
 773
 774 2013-06-22  Richard Sandiford  <rdsandiford@googlemail.com>
 775
 776         * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
 777         Capitalize name.  Use @kindex instead of @cindex for .set entries.
 778
 779 2013-06-22  Richard Sandiford  <rdsandiford@googlemail.com>
 780
 781         * doc/c-mips.texi (MIPS Stabs): Remove section.
 782
 783 2013-06-20  Richard Sandiford  <rdsandiford@googlemail.com>
 784
 785         * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
 786         (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
 787         (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
 788         (ISA_SUPPORTS_VIRT64_ASE): Delete.
 789         (mips_ase): New structure.
 790         (mips_ases): New table.
 791         (FP64_ASES): New macro.
 792         (mips_ase_groups): New array.
 793         (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
 794         (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
 795         functions.
 796         (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
 797         (md_parse_option): Use mips_ases and mips_set_ase instead of
 798         separate case statements for each ASE option.
 799         (mips_after_parse_args): Use FP64_ASES.  Use
 800         mips_check_isa_supports_ases to check the ASEs against
 801         other options.
 802         (s_mipsset): Use mips_ases and mips_set_ase instead of
 803         separate if statements for each ASE option.  Use
 804         mips_check_isa_supports_ases, even when a non-ASE option
 805         is specified.
 806
 807 2013-06-19  Greta Yorsh  <Greta.Yorsh@arm.com>
 808
 809         * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
 810
 811 2013-06-18  Richard Sandiford  <rdsandiford@googlemail.com>
 812
 813         * config/tc-mips.c (md_shortopts, options, md_longopts)
 814         (md_longopts_size): Move earlier in file.
 815
 816 2013-06-18  Richard Sandiford  <rdsandiford@googlemail.com>
 817
 818         * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
 819         with a single "ase" bitmask.
 820         (mips_opts): Update accordingly.
 821         (file_ase, file_ase_explicit): New variables.
 822         (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
 823         (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
 824         (ISA_HAS_ROR): Adjust for mips_set_options change.
 825         (is_opcode_valid): Take the base ase mask directly from mips_opts.
 826         (mips_ip): Adjust for mips_set_options change.
 827         (md_parse_option): Likewise.  Update file_ase_explicit.
 828         (mips_after_parse_args): Adjust for mips_set_options change.
 829         Use bitmask operations to select the default ASEs.  Set file_ase
 830         rather than individual per-ASE variables.
 831         (s_mipsset): Adjust for mips_set_options change.
 832         (mips_elf_final_processing): Test file_ase rather than
 833         file_ase_mdmx.  Remove commented-out code.
 834
 835 2013-06-18  Richard Sandiford  <rdsandiford@googlemail.com>
 836
 837         * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
 838         (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
 839         (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
 840         (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
 841         (mips_after_parse_args): Use the new "ase" field to choose
 842         the default ASEs.
 843         (mips_cpu_info_table): Move ASEs from the "flags" field to the
 844         "ase" field.
 845
 846 2013-06-18  Richard Earnshaw  <rearnsha@arm.com>
 847
 848         * config/tc-arm.c (symbol_preemptible): New function.
 849         (relax_branch): Use it.
 850
 851 2013-06-17  Catherine Moore  <clm@codesourcery.com>
 852             Maciej W. Rozycki  <macro@codesourcery.com>
 853             Chao-Ying Fu  <fu@mips.com>
 854
 855         * config/tc-mips.c (mips_set_options): Add ase_eva.
 856         (mips_set_options mips_opts): Add ase_eva.
 857         (file_ase_eva): Declare.
 858         (ISA_SUPPORTS_EVA_ASE): Define.
 859         (IS_SEXT_9BIT_NUM): Define.
 860         (MIPS_CPU_ASE_EVA): Define.
 861         (is_opcode_valid): Add support for ase_eva.
 862         (macro_build): Likewise.
 863         (macro): Likewise.
 864         (validate_mips_insn): Likewise.
 865         (validate_micromips_insn): Likewise.
 866         (mips_ip): Likewise.
 867         (options): Add OPTION_EVA and OPTION_NO_EVA.
 868         (md_longopts): Add -meva and -mno-eva.
 869         (md_parse_option): Process new options.
 870         (mips_after_parse_args): Check for valid EVA combinations.
 871         (s_mipsset): Likewise.
 872
 873 2013-06-14  Richard Sandiford  <rsandifo@linux.vnet.ibm.com>
 874
 875         * dwarf2dbg.h (dwarf2_move_insn): Declare.
 876         * dwarf2dbg.c (line_subseg): Add pmove_tail.
 877         (get_line_subseg): Add create_p argument.  Initialize pmove_tail.
 878         (dwarf2_gen_line_info_1): Update call accordingly.
 879         (dwarf2_move_insn): New function.
 880         * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
 881
 882 2013-06-14  Richard Sandiford  <rsandifo@linux.vnet.ibm.com>
 883
 884         Revert:
 885
 886         2011-09-05  Richard Sandiford  <rdsandiford@googlemail.com>
 887
 888         PR gas/13024
 889         * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
 890         (dwarf2_gen_line_info_1): Delete.
 891         (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
 892         (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
 893         (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
 894         (dwarf2_directive_loc): Push previous .locs instead of generating
 895         them immediately.
 896
 897 2013-06-13  Chao-ying Fu  <Chao-ying.Fu@imgtec.com>
 898
 899         * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
 900         (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
 901
 902 2013-06-13  Nick Clifton  <nickc@redhat.com>
 903
 904         PR gas/15602
 905         * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
 906         * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
 907         function.  Generates an error if the adjusted offset is out of a
 908         16-bit range.
 909
 910 2013-06-12  Sandra Loosemore  <sandra@codesourcery.com>
 911
 912         * config/tc-nios2.c (md_apply_fix):  Mask constant
 913         BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
 914
 915 2013-06-10  Maciej W. Rozycki  <macro@codesourcery.com>
 916
 917         * config/tc-mips.c (append_insn): Don't do branch relaxation for
 918         MIPS-3D instructions either.
 919         (md_convert_frag): Update the COPx branch mask accordingly.
 920
 921         * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
 922         option.
 923         * doc/as.texinfo (Overview): Add --relax-branch and
 924         --no-relax-branch.
 925         * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
 926         --no-relax-branch.
 927
 928 2013-06-09  Sandra Loosemore  <sandra@codesourcery.com>
 929
 930         * config/tc-nios2.c (nios2_parse_args):  Allow trap argument to
 931         omitted.
 932
 933 2013-06-08  Catherine Moore  <clm@codesourcery.com>
 934
 935         * config/tc-mips.c (is_opcode_valid):  Build ASE mask.
 936         (is_opcode_valid_16): Pass ase value to opcode_is_member.
 937         (append_insn): Change INSN_xxxx to ASE_xxxx.
 938
 939 2013-06-01  George Thomas <george.thomas@atmel.com>
 940
 941         * gas/config/tc-avr.c: Change ISA for devices with USB support to
 942         AVR_ISA_XMEGAU
 943
 944 2013-05-31  H.J. Lu  <hongjiu.lu@intel.com>
 945
 946         * config/tc-i386.c (md_begin): Don't align text/data/bss sections
 947         for ELF.
 948
 949 2013-05-31  Paul Brook  <paul@codesourcery.com>
 950
 951         * config/tc-mips.c (s_ehword): New.
 952
 953 2013-05-30  Paul Brook  <paul@codesourcery.com>
 954
 955         * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
 956
 957 2013-05-29  Maciej W. Rozycki  <macro@codesourcery.com>
 958
 959         * write.c (resolve_reloc_expr_symbols): On REL targets don't
 960         convert relocs who have no relocatable field either.  Rephrase
 961         the conditional so that the PC-relative check is only applied
 962         for REL targets.
 963
 964 2013-05-28  Chao-ying Fu  <Chao-ying.Fu@imgtec.com>
 965
 966         * config/tc-mips.c (macro) <ld>: Don't use $zero for address
 967         calculation.
 968
 969 2013-05-28  Yufeng Zhang  <yufeng.zhang@arm.com>
 970
 971         * config/tc-aarch64.c (reloc_table): Update to use
 972         BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
 973         BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
 974         (md_apply_fix): Likewise.
 975         (aarch64_force_relocation): Likewise.
 976
 977 2013-05-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 978
 979         * config/tc-arm.c (it_fsm_post_encode): Improve
 980         warning messages about deprecated IT block formats.
 981
 982 2013-05-28  Marcus Shawcroft  <marcus.shawcroft@arm.com>
 983
 984         * config/tc-aarch64.c (md_apply_fix): Move value range checking
 985         inside fx_done condition.
 986
 987 2013-05-22  Jürgen Urban  <JuergenUrban@gmx.de>
 988
 989         * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
 990
 991 2013-05-20  Peter Bergner <bergner@vnet.ibm.com>
 992
 993         * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
 994         and clean up warning when using PRINT_OPCODE_TABLE.
 995
 996 2013-05-20  Alan Modra  <amodra@gmail.com>
 997
 998         * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
 999         and data fixups performing shift/high adjust/sign extension on
1000         fieldval.  Sink fx_pcrel handling and checks.  Use fixP->fx_size
1001         when writing data fixups rather than recalculating size.
1002
1003 2013-05-16  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
1004
1005         * doc/c-msp430.texi: Fix typo.
1006
1007 2013-05-16  Tristan Gingold  <gingold@adacore.com>
1008
1009         * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1010         are also TOC symbols.
1011
1012 2013-05-16  Nick Clifton  <nickc@redhat.com>
1013
1014         * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1015         Add -mcpu command to specify core type.
1016         * doc/c-msp430.texi: Update documentation.
1017
1018 2013-05-09  Andrew Pinski  <apinski@cavium.com>
1019
1020         * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1021         (mips_opts): Update for the new field.
1022         (file_ase_virt): New variable.
1023         (ISA_SUPPORTS_VIRT_ASE): New macro.
1024         (ISA_SUPPORTS_VIRT64_ASE): New macro.
1025         (MIPS_CPU_ASE_VIRT): New define.
1026         (is_opcode_valid): Handle ase_virt.
1027         (macro_build): Handle "+J".
1028         (validate_mips_insn): Likewise.
1029         (mips_ip): Likewise.
1030         (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1031         (md_longopts): Add mvirt and mnovirt
1032         (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1033         (mips_after_parse_args): Handle ase_virt field.
1034         (s_mipsset): Handle "virt" and "novirt".
1035         (mips_elf_final_processing): Add a comment about virt ASE might need
1036         a new flag.
1037         (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1038         * doc/c-mips.texi: Document -mvirt and -mno-virt.
1039         Document ".set virt" and ".set novirt".
1040
1041 2013-05-09  Alan Modra  <amodra@gmail.com>
1042
1043         * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1044         control of operand flag bits.
1045
1046 2013-05-07  Alan Modra  <amodra@gmail.com>
1047
1048         * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1049         (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1050         (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1051         (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1052         (md_apply_fix): Set fx_no_overflow for assorted relocations.
1053         Shift and sign-extend fieldval for use by some VLE reloc
1054         operand->insert functions.
1055
1056 2013-05-06  Paul Brook  <paul@codesourcery.com>
1057             Catherine Moore  <clm@codesourcery.com>
1058
1059         * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1060         (limited_pcrel_reloc_p): Likewise.
1061         (md_apply_fix): Likewise.
1062         (tc_gen_reloc): Likewise.
1063
1064 2013-05-06  Richard Sandiford  <rdsandiford@googlemail.com>
1065
1066         * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1067         (mips_fix_adjustable): Adjust pc-relative check to use
1068         limited_pc_reloc_p.
1069
1070 2013-05-02  Richard Sandiford  <rdsandiford@googlemail.com>
1071
1072         * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1073         (s_mips_stab): Do not restrict to stabn only.
1074
1075 2013-05-02  Nick Clifton  <nickc@redhat.com>
1076
1077         * config/tc-msp430.c: Add support for the MSP430X architecture.
1078         Add code to insert a NOP instruction after any instruction that
1079         might change the interrupt state.
1080         Add support for the LARGE memory model.
1081         Add code to initialise the .MSP430.attributes section.
1082         * config/tc-msp430.h: Add support for the MSP430X architecture.
1083         * doc/c-msp430.texi: Document the new -mL and -mN command line
1084         options.
1085         * NEWS: Mention support for the MSP430X architecture.
1086
1087 2013-05-01  Maciej W. Rozycki  <macro@codesourcery.com>
1088
1089         * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1090         alpha*-*-linux*ecoff*.
1091
1092 2013-04-30  Chao-ying Fu  <Chao-ying.Fu@imgtec.com>
1093
1094         * config/tc-mips.c (mips_ip): Add sizelo.
1095         For "+C", "+G", and "+H", set sizelo and compare against it.
1096
1097 2013-04-29  Nick Clifton  <nickc@redhat.com>
1098
1099         * as.c (Options): Add -gdwarf-sections.
1100         (parse_args): Likewise.
1101         * as.h (flag_dwarf_sections): Declare.
1102         * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1103         (process_entries): When -gdwarf-sections is enabled generate
1104         fragmentary .debug_line sections.
1105         (out_debug_line): Set the section for the .debug_line section end
1106         symbol.
1107         * doc/as.texinfo: Document -gdwarf-sections.
1108         * NEWS: Mention -gdwarf-sections.
1109
1110 2013-04-26  Christian Groessler  <chris@groessler.org>
1111
1112         * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1113         according to the target parameter.  Don't call s_segm since s_segm
1114         calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1115         initialized yet.
1116         (md_begin): Call s_segm according to target parameter from command
1117         line.
1118
1119 2013-04-25  Alan Modra  <amodra@gmail.com>
1120
1121         * configure.in: Allow little-endian linux.
1122         * configure: Regenerate.
1123
1124 2013-04-24  Sandra Loosemore  <sandra@codesourcery.com>
1125
1126         * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1127         "fstatus" control register to "eccinj".
1128
1129 2013-04-19  Kai Tietz  <ktietz@redhat.com>
1130
1131         * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1132
1133 2013-04-15  Julian Brown  <julian@codesourcery.com>
1134
1135         * expr.c (add_to_result, subtract_from_result): Make global.
1136         * expr.h (add_to_result, subtract_from_result): Add prototypes.
1137         * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1138         subtract_from_result to handle extra bit of precision for .sleb128
1139         directive operands.
1140
1141 2013-04-10  Julian Brown  <julian@codesourcery.com>
1142
1143         * read.c (convert_to_bignum): Add sign parameter. Use it
1144         instead of X_unsigned to determine sign of resulting bignum.
1145         (emit_expr): Pass extra argument to convert_to_bignum.
1146         (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1147         X_extrabit to convert_to_bignum.
1148         (parse_bitfield_cons): Set X_extrabit.
1149         * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1150         Initialise X_extrabit field as appropriate.
1151         (add_to_result): New.
1152         (subtract_from_result): New.
1153         (expr): Use above.
1154         * expr.h (expressionS): Add X_extrabit field.
1155
1156 2013-04-10  Jan Beulich <jbeulich@suse.com>
1157
1158         * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1159         register being PC when is_t or writeback, and use distinct
1160         diagnostic for the latter case.
1161
1162 2013-04-10  Jan Beulich <jbeulich@suse.com>
1163
1164         * gas/config/tc-arm.c (parse_operands): Re-write
1165         po_barrier_or_imm().
1166         (do_barrier): Remove bogus constraint().
1167         (do_t_barrier): Remove.
1168
1169 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1170
1171         * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1172         ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1173         ATmega2564RFR2
1174         * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1175
1176 2013-04-09  Jan Beulich <jbeulich@suse.com>
1177
1178         * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1179         Use local variable Rt in more places.
1180         (do_vmsr): Accept all control registers.
1181
1182 2013-04-09  Jan Beulich <jbeulich@suse.com>
1183
1184         * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1185         if there was none specified for moves between scalar and core
1186         register.
1187
1188 2013-04-09  Jan Beulich <jbeulich@suse.com>
1189
1190         * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1191         NEON_ALL_LANES case.
1192
1193 2013-04-08  Jan Beulich <jbeulich@suse.com>
1194
1195         * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1196         PC-relative VSTR.
1197
1198 2013-04-08  Jan Beulich <jbeulich@suse.com>
1199
1200         * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1201         entry to sp_fiq.
1202
1203 2013-04-03  Alan Modra  <amodra@gmail.com>
1204
1205         * doc/as.texinfo: Add support to generate man options for h8300.
1206         * doc/c-h8300.texi: Likewise.
1207
1208 2013-03-28  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
1209
1210         * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1211         Cortex-A57.
1212
1213 2013-03-27  Alexis Deruelle  <alexis.deruelle@gmail.com>
1214
1215         PR binutils/15068
1216         * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1217
1218 2013-03-26  Nick Clifton  <nickc@redhat.com>
1219
1220         PR gas/15295
1221         * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1222         start of the file each time.
1223
1224         PR gas/15178
1225         * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1226         FreeBSD targets.
1227
1228 2013-03-26  Douglas B Rupp  <rupp@gnat.com>
1229
1230         * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1231         after fixup.
1232
1233 2013-03-21  Will Newton  <will.newton@linaro.org>
1234
1235         * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1236         pc-relative str instructions in Thumb mode.
1237
1238 2013-03-21  Michael Schewe  <michael.schewe@gmx.net>
1239
1240         * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1241         @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1242         R_H8_DISP32A16.
1243         * config/tc-h8300.h: Remove duplicated defines.
1244
1245 2013-03-21  Senthil Kumar Selvaraj  <senthil_kumar.selvaraj@atmel.com>
1246
1247         PR gas/15282
1248         * tc-avr.c (mcu_has_3_byte_pc): New function.
1249         (tc_cfi_frame_initial_instructions): Call it to find return
1250         address size.
1251
1252 2013-03-20  Alexis Deruelle  <alexis.deruelle@gmail.com>
1253
1254         PR gas/15095
1255         * config/tc-tic6x.c (tic6x_try_encode): Handle
1256         tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1257         encode register pair numbers when required.
1258
1259 2013-03-15  Will Newton  <will.newton@linaro.org>
1260
1261         * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1262         in vstr in Thumb mode for pre-ARMv7 cores.
1263
1264 2013-03-14  Andreas Schwab  <schwab@suse.de>
1265
1266         * doc/c-arc.texi (ARC Directives): Revert last change and use
1267         @itemize instead of @table.
1268         * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1269
1270 2013-03-14  Nick Clifton  <nickc@redhat.com>
1271
1272         PR gas/15273
1273         * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1274         NULL message, instead just check ARM_CPU_IS_ANY directly.
1275
1276 2013-03-14  Nick Clifton  <nickc@redhat.com>
1277
1278         PR gas/15212
1279         * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1280         for table format.
1281         * doc/c-arm.texi (ARM-Instruction-Set): Likewise.  Also add text
1282         to the @item directives.
1283         (ARM-Neon-Alignment): Move to correct place in the document.
1284         * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1285         formatting.
1286         * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1287         @smallexample.
1288
1289 2013-03-12  Sebastian Huber <sebastian.huber@embedded-brains.de>
1290
1291         * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case.  Add 'o'
1292         case.  Add default BAD_CASE to switch.
1293
1294 2013-03-11  Sebastian Huber <sebastian.huber@embedded-brains.de>
1295
1296         * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1297         (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1298
1299 2013-03-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1300
1301         * config/tc-arm.c (crc_ext_armv8): New feature set.
1302         (UNPRED_REG): New macro.
1303         (do_crc32_1): New function.
1304         (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1305         do_crc32ch, do_crc32cw): Likewise.
1306         (TUEc): New macro.
1307         (insns): Add entries for crc32 mnemonics.
1308         (arm_extensions): Add entry for crc.
1309
1310 2013-03-08  Chung-Lin Tang  <cltang@codesourcery.com>
1311
1312         * write.h (struct fix): Add fx_dot_frag field.
1313         (dot_frag): Declare.
1314         * write.c (dot_frag): New variable.
1315         (fix_new_internal): Set fx_dot_frag field with dot_frag.
1316         (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1317         * expr.c (expr): Save value of frag_now in dot_frag when setting
1318         dot_value.
1319         * read.c (emit_expr): Likewise. Delete comments.
1320
1321 2013-03-07  H.J. Lu  <hongjiu.lu@intel.com>
1322
1323         * config/tc-i386.c (flag_code_names): Removed.
1324         (i386_index_check): Rewrote.
1325
1326 2013-03-05  Yufeng Zhang  <yufeng.zhang@arm.com>
1327
1328         * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1329         add comment.
1330         (aarch64_double_precision_fmovable): New function.
1331         (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1332         function; handle hexadecimal representation of IEEE754 encoding.
1333         (parse_operands): Update the call to parse_aarch64_imm_float.
1334
1335 2013-02-28  H.J. Lu  <hongjiu.lu@intel.com>
1336
1337         * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1338         (check_hle): Updated.
1339         (md_assemble): Likewise.
1340         (parse_insn): Likewise.
1341
1342 2013-02-28  H.J. Lu  <hongjiu.lu@intel.com>
1343
1344         * config/tc-i386.c (_i386_insn): Add rep_prefix.
1345         (md_assemble): Check if REP prefix is OK.
1346         (parse_insn): Remove expecting_string_instruction.  Set
1347         i.rep_prefix.
1348
1349 2013-02-28  Yufeng Zhang  <yufeng.zhang@arm.com>
1350
1351         * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1352
1353 2013-02-28  Yufeng Zhang  <yufeng.zhang@arm.com>
1354
1355         * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1356         for system registers.
1357
1358 2013-02-27  DJ Delorie  <dj@redhat.com>
1359
1360         * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1361         (rl78_op): Handle %code().
1362         (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1363         (tc_gen_reloc): Likwise; convert to a computed reloc.
1364         (md_apply_fix): Likewise.
1365
1366 2013-02-25  Kaushik Phatak  <Kaushik.Phatak@kpitcummins.com>
1367
1368         * config/rl78-parse.y: Fix encoding of DIVWU insn.
1369
1370 2013-02-25  Terry Guo  <terry.guo@arm.com>
1371
1372         * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1373         * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1374         list of accepted CPUs.
1375
1376 2013-02-19  H.J. Lu  <hongjiu.lu@intel.com>
1377
1378         PR gas/15159
1379         * config/tc-i386.c (cpu_arch): Add ".smap".
1380
1381         * doc/c-i386.texi: Document smap.
1382
1383 2013-02-18  Maciej W. Rozycki  <macro@codesourcery.com>
1384
1385         * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1386         mips_assembling_insn appropriately.
1387         (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1388
1389 2013-02-18  Maciej W. Rozycki  <macro@codesourcery.com>
1390
1391         * config/tc-mips.c (append_insn): Correct indentation, remove
1392         extraneous braces.
1393
1394 2013-02-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
1395
1396         * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1397
1398 2013-02-15  Sebastian Huber  <sebastian.huber@embedded-brains.de>
1399
1400         * configure.tgt: Add nios2-*-rtems*.
1401
1402 2013-02-14  Yufeng Zhang  <yufeng.zhang@arm.com>
1403
1404         * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1405         NULL.
1406
1407 2013-02-09  Jürgen Urban  <JuergenUrban@gmx.de>
1408
1409         * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1410         (macro): Use it.  Assert that trunc.w.s is not used for r5900.
1411
1412 2013-02-08  Yi-Hsiu, Hsu  <ahsu@marvell.com>
1413
1414         * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1415         core.
1416
1417 2013-02-06  Sandra Loosemore  <sandra@codesourcery.com>
1418             Andrew Jenner <andrew@codesourcery.com>
1419
1420         Based on patches from Altera Corporation.
1421
1422         * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1423         (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1424         * Makefile.in: Regenerated.
1425         * configure.tgt: Add case for nios2*-linux*.
1426         * config/obj-elf.c: Conditionally include elf/nios2.h.
1427         * config/tc-nios2.c: New file.
1428         * config/tc-nios2.h: New file.
1429         * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1430         * doc/Makefile.in: Regenerated.
1431         * doc/all.texi: Set NIOSII.
1432         * doc/as.texinfo (Overview): Add Nios II options.
1433         (Machine Dependencies): Include c-nios2.texi.
1434         * doc/c-nios2.texi: New file.
1435         * NEWS: Note Altera Nios II support.
1436
1437 2013-02-06  Alan Modra  <amodra@gmail.com>
1438
1439         PR gas/14255
1440         * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1441         Don't skip fixups with fx_subsy non-NULL.
1442         * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1443         with fx_subsy non-NULL.
1444
1445 2013-02-04  H.J. Lu  <hongjiu.lu@intel.com>
1446
1447         * doc/c-metag.texi: Add "@c man" markers.
1448
1449 2013-02-04  Alan Modra  <amodra@gmail.com>
1450
1451         * write.c (fixup_segment): Return void.  Delete seg_reloc_count
1452         related code.
1453         (TC_ADJUST_RELOC_COUNT): Delete.
1454         * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1455
1456 2013-02-04  Alan Modra  <amodra@gmail.com>
1457
1458         * po/POTFILES.in: Regenerate.
1459
1460 2013-01-30  Markos Chandras  <markos.chandras@imgtec.com>
1461
1462         * config/tc-metag.c: Make SWAP instruction less permissive with
1463         its operands.
1464
1465 2013-01-29  DJ Delorie  <dj@redhat.com>
1466
1467         * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1468         relocs in .word/.etc statements.
1469
1470 2013-01-29  Roland McGrath  <mcgrathr@google.com>
1471
1472         * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1473         immediate value for 8-bit offset" error so it shows line info.
1474
1475 2013-01-24  Joseph Myers  <joseph@codesourcery.com>
1476
1477         * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1478         for 64-bit output.
1479
1480 2013-01-24  Nick Clifton  <nickc@redhat.com>
1481
1482         * config/tc-v850.c: Add support for e3v5 architecture.
1483         * doc/c-v850.texi: Mention new support.
1484
1485 2013-01-23  Nick Clifton  <nickc@redhat.com>
1486
1487         PR gas/15039
1488         * config/tc-avr.c: Include dwarf2dbg.h.
1489
1490 2013-01-18  H.J. Lu  <hongjiu.lu@intel.com>
1491
1492         * config/tc-i386.c (reloc): Support size relocation only for ELF.
1493         (tc_i386_fix_adjustable): Likewise.
1494         (lex_got): Likewise.
1495         (tc_gen_reloc): Likewise.
1496
1497 2013-01-17  Yufeng Zhang  <yufeng.zhang@arm.com>
1498
1499         * config/tc-aarch64.c (output_operand_error_record): Change to output
1500         the out-of-range error message as value-expected message if there is
1501         only one single value in the expected range.
1502         (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1503         LSL #0 as a programmer-friendly feature.
1504
1505 2013-01-16  H.J. Lu  <hongjiu.lu@intel.com>
1506
1507         * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1508         (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1509         BFD_RELOC_64_SIZE relocations.
1510         (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1511         for it.
1512         (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1513         relocations against local symbols.
1514
1515 2013-01-16  Alan Modra  <amodra@gmail.com>
1516
1517         * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1518         finding some sort of toc syntax error, and break to avoid
1519         compiler uninit warning.
1520
1521 2013-01-15  H.J. Lu  <hongjiu.lu@intel.com>
1522
1523         PR gas/15019
1524         * config/tc-i386.c (lex_got): Increment length by 1 if the
1525         relocation token is removed.
1526
1527 2013-01-15  Nick Clifton  <nickc@redhat.com>
1528
1529         * config/tc-v850.c (md_assemble): Allow signed values for
1530         V850E_IMMEDIATE.
1531
1532 2013-01-11  Sean Keys  <skeys@ipdatasys.com>
1533
1534         * config/tc-xgate.c (md_begin): Fix mistake made when going from
1535         git to cvs.
1536
1537 2013-01-10  Peter Bergner <bergner@vnet.ibm.com>
1538
1539         * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1540         * doc/c-ppc.texi (PowerPC-Opts):  Likewise.
1541         * config/tc-ppc.c (md_show_usage): Likewise.
1542         (ppc_handle_align): Handle power8's group ending nop.
1543
1544 2013-01-10  Sean Keys  <skeys@ipdatasys.com>
1545
1546         * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1547         that the assember exits after the opcodes have been printed.
1548
1549 2013-01-10  H.J. Lu  <hongjiu.lu@intel.com>
1550
1551         * app.c: Remove trailing white spaces.
1552         * as.c: Likewise.
1553         * as.h: Likewise.
1554         * cond.c: Likewise.
1555         * dw2gencfi.c: Likewise.
1556         * dwarf2dbg.h: Likewise.
1557         * ecoff.c: Likewise.
1558         * input-file.c: Likewise.
1559         * itbl-lex.h: Likewise.
1560         * output-file.c: Likewise.
1561         * read.c: Likewise.
1562         * sb.c: Likewise.
1563         * subsegs.c: Likewise.
1564         * symbols.c: Likewise.
1565         * write.c: Likewise.
1566         * config/tc-i386.c: Likewise.
1567         * doc/Makefile.am: Likewise.
1568         * doc/Makefile.in: Likewise.
1569         * doc/c-aarch64.texi: Likewise.
1570         * doc/c-alpha.texi: Likewise.
1571         * doc/c-arc.texi: Likewise.
1572         * doc/c-arm.texi: Likewise.
1573         * doc/c-avr.texi: Likewise.
1574         * doc/c-bfin.texi: Likewise.
1575         * doc/c-cr16.texi: Likewise.
1576         * doc/c-d10v.texi: Likewise.
1577         * doc/c-d30v.texi: Likewise.
1578         * doc/c-h8300.texi: Likewise.
1579         * doc/c-hppa.texi: Likewise.
1580         * doc/c-i370.texi: Likewise.
1581         * doc/c-i386.texi: Likewise.
1582         * doc/c-i860.texi: Likewise.
1583         * doc/c-m32c.texi: Likewise.
1584         * doc/c-m32r.texi: Likewise.
1585         * doc/c-m68hc11.texi: Likewise.
1586         * doc/c-m68k.texi: Likewise.
1587         * doc/c-microblaze.texi: Likewise.
1588         * doc/c-mips.texi: Likewise.
1589         * doc/c-msp430.texi: Likewise.
1590         * doc/c-mt.texi: Likewise.
1591         * doc/c-s390.texi: Likewise.
1592         * doc/c-score.texi: Likewise.
1593         * doc/c-sh.texi: Likewise.
1594         * doc/c-sh64.texi: Likewise.
1595         * doc/c-tic54x.texi: Likewise.
1596         * doc/c-tic6x.texi: Likewise.
1597         * doc/c-v850.texi: Likewise.
1598         * doc/c-xc16x.texi: Likewise.
1599         * doc/c-xgate.texi: Likewise.
1600         * doc/c-xtensa.texi: Likewise.
1601         * doc/c-z80.texi: Likewise.
1602         * doc/internals.texi: Likewise.
1603
1604 2013-01-10  Roland McGrath  <mcgrathr@google.com>
1605
1606         * hash.c (hash_new_sized): Make it global.
1607         * hash.h: Declare it.
1608         * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1609         pass a small size.
1610
1611 2013-01-10  Will Newton <will.newton@imgtec.com>
1612
1613         * Makefile.am: Add Meta.
1614         * Makefile.in: Regenerate.
1615         * config/tc-metag.c: New file.
1616         * config/tc-metag.h: New file.
1617         * configure.tgt: Add Meta.
1618         * doc/Makefile.am: Add Meta.
1619         * doc/Makefile.in: Regenerate.
1620         * doc/all.texi: Add Meta.
1621         * doc/as.texiinfo: Document Meta options.
1622         * doc/c-metag.texi: New file.
1623
1624 2013-01-09  Steve Ellcey  <sellcey@mips.com>
1625
1626         * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1627         calls.
1628         * config/tc-mips.c (internalError): Remove, replace with abort.
1629
1630 2013-01-08  Yufeng Zhang  <yufeng.zhang@arm.com>
1631
1632         * config/tc-aarch64.c (parse_operands): Change to compare the result
1633         of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1634
1635 2013-01-07  Nick Clifton  <nickc@redhat.com>
1636
1637         PR gas/14887
1638         * config/tc-arm.c (skip_past_char): Skip whitespace before the
1639         anticipated character.
1640         * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1641         here as it is no longer needed.
1642
1643 2013-01-06  Andreas Schwab  <schwab@linux-m68k.org>
1644
1645         * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1646         * doc/c-score.texi (SCORE-Opts): Likewise.
1647         * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1648
1649 2013-01-04  Juergen Urban <JuergenUrban@gmx.de>
1650
1651         * config/tc-mips.c: Add support for MIPS r5900.
1652         Add M_LQ_AB and M_SQ_AB to support large values for instructions
1653         lq and sq.
1654         (can_swap_branch_p, get_append_method): Detect some conditional
1655         short loops to fix a bug on the r5900 by NOP in the branch delay
1656         slot.
1657         (M_MUL): Support 3 operands in multu on r5900.
1658         (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1659         (s_mipsset): Force 32 bit floating point on r5900.
1660         (mips_ip): Check parameter range of instructions mfps and mtps on
1661         r5900.
1662         * configure.in: Detect CPU type when target string contains r5900
1663         (e.g. mips64r5900el-linux-gnu).
1664
1665 2013-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1666
1667         * as.c (parse_args): Update copyright year to 2013.
1668
1669 2013-01-02  Yufeng Zhang  <yufeng.zhang@arm.com>
1670
1671         * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1672         and "cortex57".
1673
1674 2013-01-02  Nick Clifton  <nickc@redhat.com>
1675
1676         PR gas/14987
1677         * config/tc-arm.c (parse_address_main): Skip whitespace before a
1678         closing bracket.
1679
1680 For older changes see ChangeLog-2012
1681 \f
1682 Copyright (C) 2013 Free Software Foundation, Inc.
1683
1684 Copying and distribution of this file, with or without modification,
1685 are permitted in any medium without royalty provided the copyright
1686 notice and this notice are preserved.
1687
1688 Local Variables:
1689 mode: change-log
1690 left-margin: 8
1691 fill-column: 74
1692 version-control: never
1693 End: