1 2013-09-04 Tristan Gingold <gingold@adacore.com>
3 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
6 2013-09-04 Roland McGrath <mcgrathr@google.com>
9 * config/tc-arm.c (T16_32_TAB): Add _udf.
10 (do_t_udf): New function.
13 2013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
15 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
16 assembler errors at correct position.
18 2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
21 * config/tc-ia64.c: Fix typos.
22 * config/tc-sparc.c: Likewise.
23 * config/tc-z80.c: Likewise.
24 * doc/c-i386.texi: Likewise.
25 * doc/c-m32r.texi: Likewise.
27 2013-08-23 Will Newton <will.newton@linaro.org>
29 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
30 for pre-indexed addressing modes.
32 2013-08-21 Alan Modra <amodra@gmail.com>
34 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
35 range check label number for use with fb_low_counter array.
37 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
39 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
40 (mips_parse_argument_token, validate_micromips_insn, md_begin)
41 (check_regno, match_float_constant, check_completed_insn, append_insn)
42 (match_insn, match_mips16_insn, match_insns, macro_start)
43 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
44 (mips16_ip, mips_set_option_string, md_parse_option)
45 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
46 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
47 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
48 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
49 Start error messages with a lower-case letter. Do not end error
50 messages with a period. Wrap long messages to 80 character-lines.
51 Use "cannot" instead of "can't" and "can not".
53 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
55 * config/tc-mips.c (imm_expr): Expand comment.
56 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
59 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
61 * config/tc-mips.c (imm2_expr): Delete.
62 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
64 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
66 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
67 (macro): Remove M_DEXT and M_DINS handling.
69 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
71 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
72 lax_max with lax_match.
73 (match_int_operand): Update accordingly. Don't report an error
74 for !lax_match-only cases.
75 (match_insn): Replace more_alts with lax_match and use it to
76 initialize the mips_arg_info field. Add a complete_p parameter.
77 Handle implicit VU0 suffixes here.
78 (match_invalid_for_isa, match_insns, match_mips16_insns): New
80 (mips_ip, mips16_ip): Use them.
82 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
84 * config/tc-mips.c (match_expression): Report uses of registers here.
85 Add a "must be an immediate expression" error. Handle elided offsets
87 (match_int_operand): ...here.
89 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
91 * config/tc-mips.c (mips_arg_info): Remove soft_match.
92 (match_out_of_range, match_not_constant): New functions.
93 (match_const_int): Remove fallback parameter and check for soft_match.
94 Use match_not_constant.
95 (match_mapped_int_operand, match_addiusp_operand)
96 (match_perf_reg_operand, match_save_restore_list_operand)
97 (match_mdmx_imm_reg_operand): Update accordingly. Use
98 match_out_of_range and set_insn_error* instead of as_bad.
99 (match_int_operand): Likewise. Use match_not_constant in the
100 !allows_nonconst case.
101 (match_float_constant): Report invalid float constants.
102 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
103 match_float_constant to check for invalid constants. Fail the
104 match if match_const_int or match_float_constant return false.
105 (mips_ip): Update accordingly.
106 (mips16_ip): Likewise. Undo null termination of instruction name
107 once lookup is complete.
109 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
111 * config/tc-mips.c (mips_insn_error_format): New enum.
112 (mips_insn_error): New struct.
113 (insn_error): Change to a mips_insn_error.
114 (clear_insn_error, set_insn_error_format, set_insn_error)
115 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
117 (mips_parse_argument_token, md_assemble, match_insn)
118 (match_mips16_insn): Use them instead of manipulating insn_error
120 (mips_ip, mips16_ip): Likewise. Simplify control flow.
122 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
124 * config/tc-mips.c (normalize_constant_expr): Move further up file.
125 (normalize_address_expr): Likewise.
126 (match_insn, match_mips16_insn): New functions, split out from...
127 (mips_ip, mips16_ip): ...here.
129 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
131 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
133 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
134 for optional operands.
136 2013-08-16 Alan Modra <amodra@gmail.com>
138 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
141 2013-08-16 Alan Modra <amodra@gmail.com>
143 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
145 2013-08-14 David Edelsohn <dje.gcc@gmail.com>
147 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
148 argument as alignment.
150 2013-08-09 Nick Clifton <nickc@redhat.com>
152 * config/tc-rl78.c (elf_flags): New variable.
153 (enum options): Add OPTION_G10.
154 (md_longopts): Add mg10.
155 (md_parse_option): Parse -mg10.
156 (rl78_elf_final_processing): New function.
157 * config/tc-rl78.c (tc_final_processing): Define.
158 * doc/c-rl78.texi: Document -mg10 option.
160 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
162 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
163 suffixes to be elided too.
164 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
165 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
168 2013-08-05 John Tytgat <john@bass-software.com>
170 * po/POTFILES.in: Regenerate.
172 2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
173 Konrad Eisele <konrad@gaisler.com>
175 * config/tc-sparc.c (sparc_arch_types): Add leon.
176 (sparc_arch): Move sparc4 around and add leon.
177 (sparc_target_format): Document -Aleon.
178 * doc/c-sparc.texi: Likewise.
180 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
182 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
184 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
185 Richard Sandiford <rdsandiford@googlemail.com>
187 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
188 (RWARN): Bump to 0x8000000.
189 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
190 (RTYPE_R5900_ACC): New register types.
191 (RTYPE_MASK): Include them.
192 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
194 (reg_names): Include them.
195 (mips_parse_register_1): New function, split out from...
196 (mips_parse_register): ...here. Add a channels_ptr parameter.
197 Look for VU0 channel suffixes when nonnull.
198 (reg_lookup): Update the call to mips_parse_register.
199 (mips_parse_vu0_channels): New function.
200 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
201 (mips_operand_token): Add a "channels" field to the union.
202 Extend the comment above "ch" to OT_DOUBLE_CHAR.
203 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
204 (mips_parse_argument_token): Handle channel suffixes here too.
205 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
206 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
208 (md_begin): Register $vfN and $vfI registers.
209 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
210 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
211 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
212 (match_vu0_suffix_operand): New function.
213 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
214 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
215 (mips_lookup_insn): New function.
216 (mips_ip): Use it. Allow "+K" operands to be elided at the end
217 of an instruction. Handle '#' sequences.
219 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
221 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
222 values and use it instead of sreg, treg, xreg, etc.
224 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
226 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
227 and mips_int_operand_max.
228 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
230 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
231 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
232 instead of mips16_immed_operand.
234 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
236 * config/tc-mips.c (mips16_macro): Don't use move_register.
237 (mips16_ip): Allow macros to use 'p'.
239 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
241 * config/tc-mips.c (MAX_OPERANDS): New macro.
242 (mips_operand_array): New structure.
243 (mips_operands, mips16_operands, micromips_operands): New arrays.
244 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
245 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
246 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
247 (micromips_to_32_reg_q_map): Delete.
248 (insn_operands, insn_opno, insn_extract_operand): New functions.
249 (validate_mips_insn): Take a mips_operand_array as argument and
250 use it to build up a list of operands. Extend to handle INSN_MACRO
252 (validate_mips16_insn): New function.
253 (validate_micromips_insn): Take a mips_operand_array as argument.
255 (md_begin): Initialize mips_operands, mips16_operands and
256 micromips_operands. Call validate_mips_insn and
257 validate_micromips_insn for macro instructions too.
258 Call validate_mips16_insn for MIPS16 instructions.
259 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
261 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
262 them. Handle INSN_UDI.
263 (get_append_method): Use gpr_read_mask.
265 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
267 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
268 flags for MIPS16 and non-MIPS16 instructions.
269 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
270 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
271 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
272 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
273 and non-MIPS16 instructions. Fix formatting.
275 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
277 * config/tc-mips.c (reg_needs_delay): Move later in file.
279 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
281 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
282 Alexander Ivchenko <alexander.ivchenko@intel.com>
283 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
284 Sergey Lega <sergey.s.lega@intel.com>
285 Anna Tikhonova <anna.tikhonova@intel.com>
286 Ilya Tocar <ilya.tocar@intel.com>
287 Andrey Turetskiy <andrey.turetskiy@intel.com>
288 Ilya Verbin <ilya.verbin@intel.com>
289 Kirill Yukhin <kirill.yukhin@intel.com>
290 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
292 * config/tc-i386-intel.c (O_zmmword_ptr): New.
293 (i386_types): Add zmmword.
294 (i386_intel_simplify_register): Allow regzmm.
295 (i386_intel_simplify): Handle zmmwords.
296 (i386_intel_operand): Handle RC/SAE, vector operations and
298 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
299 (struct RC_Operation): New.
300 (struct Mask_Operation): New.
301 (struct Broadcast_Operation): New.
302 (vex_prefix): Size of bytes increased to 4 to support EVEX
304 (enum i386_error): Add new error codes: unsupported_broadcast,
305 broadcast_not_on_src_operand, broadcast_needed,
306 unsupported_masking, mask_not_on_destination, no_default_mask,
307 unsupported_rc_sae, rc_sae_operand_not_last_imm,
308 invalid_register_operand, try_vector_disp8.
309 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
310 rounding, broadcast, memshift.
311 (struct RC_name): New.
312 (RC_NamesTable): New.
315 (extra_symbol_chars): Add '{'.
316 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
317 (i386_operand_type): Add regzmm, regmask and vec_disp8.
318 (match_mem_size): Handle zmmwords.
319 (operand_type_match): Handle zmm-registers.
320 (mode_from_disp_size): Handle vec_disp8.
321 (fits_in_vec_disp8): New.
322 (md_begin): Handle {} properly.
323 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
324 (build_vex_prefix): Handle vrex.
325 (build_evex_prefix): New.
326 (process_immext): Adjust to properly handle EVEX.
327 (md_assemble): Add EVEX encoding support.
328 (swap_2_operands): Correctly handle operands with masking,
329 broadcasting or RC/SAE.
330 (check_VecOperands): Support EVEX features.
331 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
332 (match_template): Support regzmm and handle new error codes.
333 (process_suffix): Handle zmmwords and zmm-registers.
334 (check_byte_reg): Extend to zmm-registers.
335 (process_operands): Extend to zmm-registers.
336 (build_modrm_byte): Handle EVEX.
337 (output_insn): Adjust to properly handle EVEX case.
338 (disp_size): Handle vec_disp8.
339 (output_disp): Support compressed disp8*N evex feature.
340 (output_imm): Handle RC/SAE immediates properly.
341 (check_VecOperations): New.
342 (i386_immediate): Handle EVEX features.
343 (i386_index_check): Handle zmmwords and zmm-registers.
344 (RC_SAE_immediate): New.
345 (i386_att_operand): Handle EVEX features.
346 (parse_real_register): Add a check for ZMM/Mask registers.
347 (OPTION_MEVEXLIG): New.
348 (OPTION_MEVEXWIG): New.
349 (md_longopts): Add mevexlig and mevexwig.
350 (md_parse_option): Handle mevexlig and mevexwig options.
351 (md_show_usage): Add description for mevexlig and mevexwig.
352 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
353 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
355 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
357 * config/tc-i386.c (cpu_arch): Add .sha.
358 * doc/c-i386.texi: Document sha/.sha.
360 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
361 Kirill Yukhin <kirill.yukhin@intel.com>
362 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
364 * config/tc-i386.c (BND_PREFIX): New.
365 (struct _i386_insn): Add new field bnd_prefix.
366 (add_bnd_prefix): New.
368 (i386_operand_type): Add regbnd.
369 (md_assemble): Handle BND prefixes.
370 (parse_insn): Likewise.
371 (output_branch): Likewise.
372 (output_jump): Likewise.
373 (build_modrm_byte): Handle regbnd.
374 (OPTION_MADD_BND_PREFIX): New.
375 (md_longopts): Add entry for 'madd-bnd-prefix'.
376 (md_parse_option): Handle madd-bnd-prefix option.
377 (md_show_usage): Add description for madd-bnd-prefix
379 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
381 2013-07-24 Tristan Gingold <gingold@adacore.com>
383 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
386 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
388 * config/tc-s390.c (s390_machine): Don't force the .machine
389 argument to lower case.
391 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
393 * config/tc-arm.c (s_arm_arch_extension): Improve error message
394 for invalid extension.
396 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
398 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
399 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
400 (aarch64_abi): New variable.
401 (ilp32_p): Change to be a macro.
402 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
403 (struct aarch64_option_abi_value_table): New struct.
404 (aarch64_abis): New table.
405 (aarch64_parse_abi): New function.
406 (aarch64_long_opts): Add entry for -mabi=.
407 * doc/as.texinfo (Target AArch64 options): Document -mabi.
408 * doc/c-aarch64.texi: Likewise.
410 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
412 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
415 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
417 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
419 * config/rx-parse.y: (rx_check_float_support): Add function to
420 check floating point operation support for target RX100 and
422 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
423 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
424 RX200, RX600, and RX610
426 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
428 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
430 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
432 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
433 * doc/c-avr.texi: Likewise.
435 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
437 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
438 error with older GCCs.
439 (mips16_macro_build): Dereference args.
441 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
443 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
444 New functions, split out from...
445 (reg_lookup): ...here. Remove itbl support.
446 (reglist_lookup): Delete.
447 (mips_operand_token_type): New enum.
448 (mips_operand_token): New structure.
449 (mips_operand_tokens): New variable.
450 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
451 (mips_parse_arguments): New functions.
452 (md_begin): Initialize mips_operand_tokens.
453 (mips_arg_info): Add a token field. Remove optional_reg field.
454 (match_char, match_expression): New functions.
455 (match_const_int): Use match_expression. Remove "s" argument
456 and return a boolean result. Remove O_register handling.
457 (match_regno, match_reg, match_reg_range): New functions.
458 (match_int_operand, match_mapped_int_operand, match_msb_operand)
459 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
460 (match_addiusp_operand, match_clo_clz_dest_operand)
461 (match_lwm_swm_list_operand, match_entry_exit_operand)
462 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
463 (match_tied_reg_operand): Remove "s" argument and return a boolean
464 result. Match tokens rather than text. Update calls to
465 match_const_int. Rely on match_regno to call check_regno.
466 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
467 "arg" argument. Return a boolean result.
468 (parse_float_constant): Replace with...
469 (match_float_constant): ...this new function.
470 (match_operand): Remove "s" argument and return a boolean result.
471 Update calls to subfunctions.
472 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
473 rather than string-parsing routines. Update handling of optional
474 registers for token scheme.
476 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
478 * config/tc-mips.c (parse_float_constant): Split out from...
481 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
483 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
486 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
488 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
489 (match_entry_exit_operand): New function.
490 (match_save_restore_list_operand): Likewise.
491 (match_operand): Use them.
492 (check_absolute_expr): Delete.
493 (mips16_ip): Rewrite main parsing loop to use mips_operands.
495 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
497 * config/tc-mips.c: Enable functions commented out in previous patch.
498 (SKIP_SPACE_TABS): Move further up file.
499 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
500 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
501 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
502 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
503 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
504 (micromips_imm_b_map, micromips_imm_c_map): Delete.
505 (mips_lookup_reg_pair): Delete.
506 (macro): Use report_bad_range and report_bad_field.
507 (mips_immed, expr_const_in_range): Delete.
508 (mips_ip): Rewrite main parsing loop to use new functions.
510 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
512 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
513 Change return type to bfd_boolean.
514 (report_bad_range, report_bad_field): New functions.
515 (mips_arg_info): New structure.
516 (match_const_int, convert_reg_type, check_regno, match_int_operand)
517 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
518 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
519 (match_addiusp_operand, match_clo_clz_dest_operand)
520 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
521 (match_pc_operand, match_tied_reg_operand, match_operand)
522 (check_completed_insn): New functions, commented out for now.
524 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
526 * config/tc-mips.c (insn_insert_operand): New function.
527 (macro_build, mips16_macro_build): Put null character check
528 in the for loop and convert continues to breaks. Use operand
529 structures to handle constant operands.
531 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
533 * config/tc-mips.c (validate_mips_insn): Move further up file.
534 Add insn_bits and decode_operand arguments. Use the mips_operand
535 fields to work out which bits an operand occupies. Detect double
537 (validate_micromips_insn): Move further up file. Call into
540 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
542 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
544 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
546 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
548 (macro): Update accordingly.
550 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
552 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
554 (md_assemble): Remove imm_reloc handling.
555 (mips_ip): Update commentary. Use offset_expr and offset_reloc
556 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
557 Use a temporary array rather than imm_reloc when parsing
558 constant expressions. Remove imm_reloc initialization.
559 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
560 for the relaxable field. Use a relax_char variable to track the
561 type of this field. Remove imm_reloc initialization.
563 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
565 * config/tc-mips.c (mips16_ip): Handle "I".
567 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
569 * config/tc-mips.c (mips_flag_nan2008): New variable.
570 (options): Add OPTION_NAN enum value.
571 (md_longopts): Handle it.
572 (md_parse_option): Likewise.
573 (s_nan): New function.
574 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
575 (md_show_usage): Add -mnan.
577 * doc/as.texinfo (Overview): Add -mnan.
578 * doc/c-mips.texi (MIPS Opts): Document -mnan.
579 (MIPS NaN Encodings): New node. Document .nan directive.
580 (MIPS-Dependent): List the new node.
582 2013-07-09 Tristan Gingold <gingold@adacore.com>
584 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
586 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
588 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
589 for 'A' and assume that the constant has been elided if the result
592 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
594 * config/tc-mips.c (gprel16_reloc_p): New function.
595 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
597 (offset_high_part, small_offset_p): New functions.
598 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
599 register load and store macros, handle the 16-bit offset case first.
600 If a 16-bit offset is not suitable for the instruction we're
601 generating, load it into the temporary register using
602 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
603 M_L_DAB code once the address has been constructed. For double load
604 and store macros, again handle the 16-bit offset case first.
605 If the second register cannot be accessed from the same high
606 part as the first, load it into AT using ADDRESS_ADDI_INSN.
607 Fix the handling of LD in cases where the first register is the
608 same as the base. Also handle the case where the offset is
609 not 16 bits and the second register cannot be accessed from the
610 same high part as the first. For unaligned loads and stores,
611 fuse the offbits == 12 and old "ab" handling. Apply this handling
612 whenever the second offset needs a different high part from the first.
613 Construct the offset using ADDRESS_ADDI_INSN where possible,
614 for offbits == 16 as well as offbits == 12. Use offset_reloc
615 when constructing the individual loads and stores.
616 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
617 and offset_reloc before matching against a particular opcode.
618 Handle elided 'A' constants. Allow 'A' constants to use
619 relocation operators.
621 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
623 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
624 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
625 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
627 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
629 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
630 Require the msb to be <= 31 for "+s". Check that the size is <= 31
631 for both "+s" and "+S".
633 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
635 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
636 (mips_ip, mips16_ip): Handle "+i".
638 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
640 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
641 (micromips_to_32_reg_h_map): Rename to...
642 (micromips_to_32_reg_h_map1): ...this.
643 (micromips_to_32_reg_i_map): Rename to...
644 (micromips_to_32_reg_h_map2): ...this.
645 (mips_lookup_reg_pair): New function.
646 (gpr_write_mask, macro): Adjust after above renaming.
647 (validate_micromips_insn): Remove "mi" handling.
648 (mips_ip): Likewise. Parse both registers in a pair for "mh".
650 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
652 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
653 (mips_ip): Remove "+D" and "+T" handling.
655 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
657 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
660 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
662 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
664 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
666 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
667 (aarch64_force_relocation): Likewise.
669 2013-07-02 Alan Modra <amodra@gmail.com>
671 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
673 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
675 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
676 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
677 Replace @sc{mips16} with literal `MIPS16'.
678 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
680 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
682 * config/tc-aarch64.c (reloc_table): Replace
683 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
684 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
685 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
686 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
687 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
688 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
689 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
690 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
691 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
692 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
693 (aarch64_force_relocation): Likewise.
695 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
697 * config/tc-aarch64.c (ilp32_p): New static variable.
698 (elf64_aarch64_target_format): Return the target according to the
700 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
701 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
702 (aarch64_dwarf2_addr_size): New function.
703 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
704 (DWARF2_ADDR_SIZE): New define.
706 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
708 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
710 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
712 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
714 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
716 * config/tc-mips.c (mips_set_options): Add insn32 member.
717 (mips_opts): Initialize it.
718 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
719 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
720 (md_longopts): Add "minsn32" and "mno-insn32" options.
721 (is_size_valid): Handle insn32 mode.
722 (md_assemble): Pass instruction string down to macro.
723 (brk_fmt): Add second dimension and insn32 mode initializers.
724 (mfhl_fmt): Likewise.
725 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
726 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
727 (macro_build_jalr, move_register): Handle insn32 mode.
728 (macro_build_branch_rs): Likewise.
729 (macro): Handle insn32 mode.
730 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
731 (mips_ip): Handle insn32 mode.
732 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
733 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
734 (mips_handle_align): Handle insn32 mode.
735 (md_show_usage): Add -minsn32 and -mno-insn32.
737 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
739 (-minsn32, -mno-insn32): New options.
740 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
742 (MIPS assembly options): New node. Document .set insn32 and
744 (MIPS-Dependent): List the new node.
746 2013-06-25 Nick Clifton <nickc@redhat.com>
748 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
749 the PC in indirect addressing on 430xv2 parts.
750 (msp430_operands): Add version test to hardware bug encoding
753 2013-06-24 Roland McGrath <mcgrathr@google.com>
755 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
756 so it skips whitespace before it.
757 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
759 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
760 (arm_reg_parse_multi): Skip whitespace first.
761 (parse_reg_list): Likewise.
762 (parse_vfp_reg_list): Likewise.
763 (s_arm_unwind_save_mmxwcg): Likewise.
765 2013-06-24 Nick Clifton <nickc@redhat.com>
768 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
770 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
772 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
774 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
776 * config/tc-mips.c: Assert that offsetT and valueT are at least
778 (GPR_SMIN, GPR_SMAX): New macros.
779 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
781 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
783 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
784 conditions. Remove any code deselected by them.
785 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
787 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
789 * NEWS: Note removal of ECOFF support.
790 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
791 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
792 (MULTI_CFILES): Remove config/e-mipsecoff.c.
793 * Makefile.in: Regenerate.
794 * configure.in: Remove MIPS ECOFF references.
795 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
797 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
798 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
799 (mips-*-*): ...this single case.
800 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
801 MIPS emulations to be e-mipself*.
802 * configure: Regenerate.
803 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
804 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
805 (mips-*-sysv*): Remove coff and ecoff cases.
806 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
807 * ecoff.c: Remove reference to MIPS ECOFF.
808 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
809 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
810 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
811 (mips_hi_fixup): Tweak comment.
812 (append_insn): Require a howto.
813 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
815 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
817 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
818 Use "CPU" instead of "cpu".
819 * doc/c-mips.texi: Likewise.
820 (MIPS Opts): Rename to MIPS Options.
821 (MIPS option stack): Rename to MIPS Option Stack.
822 (MIPS ASE instruction generation overrides): Rename to
823 MIPS ASE Instruction Generation Overrides (for now).
824 (MIPS floating-point): Rename to MIPS Floating-Point.
826 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
828 * doc/c-mips.texi (MIPS Macros): New section.
829 (MIPS Object): Replace with...
830 (MIPS Small Data): ...this new section.
832 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
834 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
835 Capitalize name. Use @kindex instead of @cindex for .set entries.
837 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
839 * doc/c-mips.texi (MIPS Stabs): Remove section.
841 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
843 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
844 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
845 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
846 (ISA_SUPPORTS_VIRT64_ASE): Delete.
847 (mips_ase): New structure.
848 (mips_ases): New table.
849 (FP64_ASES): New macro.
850 (mips_ase_groups): New array.
851 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
852 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
854 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
855 (md_parse_option): Use mips_ases and mips_set_ase instead of
856 separate case statements for each ASE option.
857 (mips_after_parse_args): Use FP64_ASES. Use
858 mips_check_isa_supports_ases to check the ASEs against
860 (s_mipsset): Use mips_ases and mips_set_ase instead of
861 separate if statements for each ASE option. Use
862 mips_check_isa_supports_ases, even when a non-ASE option
865 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
867 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
869 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
871 * config/tc-mips.c (md_shortopts, options, md_longopts)
872 (md_longopts_size): Move earlier in file.
874 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
876 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
877 with a single "ase" bitmask.
878 (mips_opts): Update accordingly.
879 (file_ase, file_ase_explicit): New variables.
880 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
881 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
882 (ISA_HAS_ROR): Adjust for mips_set_options change.
883 (is_opcode_valid): Take the base ase mask directly from mips_opts.
884 (mips_ip): Adjust for mips_set_options change.
885 (md_parse_option): Likewise. Update file_ase_explicit.
886 (mips_after_parse_args): Adjust for mips_set_options change.
887 Use bitmask operations to select the default ASEs. Set file_ase
888 rather than individual per-ASE variables.
889 (s_mipsset): Adjust for mips_set_options change.
890 (mips_elf_final_processing): Test file_ase rather than
891 file_ase_mdmx. Remove commented-out code.
893 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
895 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
896 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
897 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
898 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
899 (mips_after_parse_args): Use the new "ase" field to choose
901 (mips_cpu_info_table): Move ASEs from the "flags" field to the
904 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
906 * config/tc-arm.c (symbol_preemptible): New function.
907 (relax_branch): Use it.
909 2013-06-17 Catherine Moore <clm@codesourcery.com>
910 Maciej W. Rozycki <macro@codesourcery.com>
911 Chao-Ying Fu <fu@mips.com>
913 * config/tc-mips.c (mips_set_options): Add ase_eva.
914 (mips_set_options mips_opts): Add ase_eva.
915 (file_ase_eva): Declare.
916 (ISA_SUPPORTS_EVA_ASE): Define.
917 (IS_SEXT_9BIT_NUM): Define.
918 (MIPS_CPU_ASE_EVA): Define.
919 (is_opcode_valid): Add support for ase_eva.
920 (macro_build): Likewise.
922 (validate_mips_insn): Likewise.
923 (validate_micromips_insn): Likewise.
925 (options): Add OPTION_EVA and OPTION_NO_EVA.
926 (md_longopts): Add -meva and -mno-eva.
927 (md_parse_option): Process new options.
928 (mips_after_parse_args): Check for valid EVA combinations.
929 (s_mipsset): Likewise.
931 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
933 * dwarf2dbg.h (dwarf2_move_insn): Declare.
934 * dwarf2dbg.c (line_subseg): Add pmove_tail.
935 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
936 (dwarf2_gen_line_info_1): Update call accordingly.
937 (dwarf2_move_insn): New function.
938 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
940 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
944 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
947 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
948 (dwarf2_gen_line_info_1): Delete.
949 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
950 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
951 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
952 (dwarf2_directive_loc): Push previous .locs instead of generating
955 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
957 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
958 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
960 2013-06-13 Nick Clifton <nickc@redhat.com>
963 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
964 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
965 function. Generates an error if the adjusted offset is out of a
968 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
970 * config/tc-nios2.c (md_apply_fix): Mask constant
971 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
973 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
975 * config/tc-mips.c (append_insn): Don't do branch relaxation for
976 MIPS-3D instructions either.
977 (md_convert_frag): Update the COPx branch mask accordingly.
979 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
981 * doc/as.texinfo (Overview): Add --relax-branch and
983 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
986 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
988 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
991 2013-06-08 Catherine Moore <clm@codesourcery.com>
993 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
994 (is_opcode_valid_16): Pass ase value to opcode_is_member.
995 (append_insn): Change INSN_xxxx to ASE_xxxx.
997 2013-06-01 George Thomas <george.thomas@atmel.com>
999 * gas/config/tc-avr.c: Change ISA for devices with USB support to
1002 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1004 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1007 2013-05-31 Paul Brook <paul@codesourcery.com>
1009 * config/tc-mips.c (s_ehword): New.
1011 2013-05-30 Paul Brook <paul@codesourcery.com>
1013 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1015 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1017 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1018 convert relocs who have no relocatable field either. Rephrase
1019 the conditional so that the PC-relative check is only applied
1022 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1024 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1027 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1029 * config/tc-aarch64.c (reloc_table): Update to use
1030 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
1031 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1032 (md_apply_fix): Likewise.
1033 (aarch64_force_relocation): Likewise.
1035 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1037 * config/tc-arm.c (it_fsm_post_encode): Improve
1038 warning messages about deprecated IT block formats.
1040 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1042 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1043 inside fx_done condition.
1045 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1047 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1049 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1051 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1052 and clean up warning when using PRINT_OPCODE_TABLE.
1054 2013-05-20 Alan Modra <amodra@gmail.com>
1056 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1057 and data fixups performing shift/high adjust/sign extension on
1058 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1059 when writing data fixups rather than recalculating size.
1061 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1063 * doc/c-msp430.texi: Fix typo.
1065 2013-05-16 Tristan Gingold <gingold@adacore.com>
1067 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1068 are also TOC symbols.
1070 2013-05-16 Nick Clifton <nickc@redhat.com>
1072 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1073 Add -mcpu command to specify core type.
1074 * doc/c-msp430.texi: Update documentation.
1076 2013-05-09 Andrew Pinski <apinski@cavium.com>
1078 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1079 (mips_opts): Update for the new field.
1080 (file_ase_virt): New variable.
1081 (ISA_SUPPORTS_VIRT_ASE): New macro.
1082 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1083 (MIPS_CPU_ASE_VIRT): New define.
1084 (is_opcode_valid): Handle ase_virt.
1085 (macro_build): Handle "+J".
1086 (validate_mips_insn): Likewise.
1087 (mips_ip): Likewise.
1088 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1089 (md_longopts): Add mvirt and mnovirt
1090 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1091 (mips_after_parse_args): Handle ase_virt field.
1092 (s_mipsset): Handle "virt" and "novirt".
1093 (mips_elf_final_processing): Add a comment about virt ASE might need
1095 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1096 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1097 Document ".set virt" and ".set novirt".
1099 2013-05-09 Alan Modra <amodra@gmail.com>
1101 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1102 control of operand flag bits.
1104 2013-05-07 Alan Modra <amodra@gmail.com>
1106 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1107 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1108 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1109 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1110 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1111 Shift and sign-extend fieldval for use by some VLE reloc
1112 operand->insert functions.
1114 2013-05-06 Paul Brook <paul@codesourcery.com>
1115 Catherine Moore <clm@codesourcery.com>
1117 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1118 (limited_pcrel_reloc_p): Likewise.
1119 (md_apply_fix): Likewise.
1120 (tc_gen_reloc): Likewise.
1122 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1124 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1125 (mips_fix_adjustable): Adjust pc-relative check to use
1128 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1130 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1131 (s_mips_stab): Do not restrict to stabn only.
1133 2013-05-02 Nick Clifton <nickc@redhat.com>
1135 * config/tc-msp430.c: Add support for the MSP430X architecture.
1136 Add code to insert a NOP instruction after any instruction that
1137 might change the interrupt state.
1138 Add support for the LARGE memory model.
1139 Add code to initialise the .MSP430.attributes section.
1140 * config/tc-msp430.h: Add support for the MSP430X architecture.
1141 * doc/c-msp430.texi: Document the new -mL and -mN command line
1143 * NEWS: Mention support for the MSP430X architecture.
1145 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1147 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1148 alpha*-*-linux*ecoff*.
1150 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1152 * config/tc-mips.c (mips_ip): Add sizelo.
1153 For "+C", "+G", and "+H", set sizelo and compare against it.
1155 2013-04-29 Nick Clifton <nickc@redhat.com>
1157 * as.c (Options): Add -gdwarf-sections.
1158 (parse_args): Likewise.
1159 * as.h (flag_dwarf_sections): Declare.
1160 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1161 (process_entries): When -gdwarf-sections is enabled generate
1162 fragmentary .debug_line sections.
1163 (out_debug_line): Set the section for the .debug_line section end
1165 * doc/as.texinfo: Document -gdwarf-sections.
1166 * NEWS: Mention -gdwarf-sections.
1168 2013-04-26 Christian Groessler <chris@groessler.org>
1170 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1171 according to the target parameter. Don't call s_segm since s_segm
1172 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1174 (md_begin): Call s_segm according to target parameter from command
1177 2013-04-25 Alan Modra <amodra@gmail.com>
1179 * configure.in: Allow little-endian linux.
1180 * configure: Regenerate.
1182 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1184 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1185 "fstatus" control register to "eccinj".
1187 2013-04-19 Kai Tietz <ktietz@redhat.com>
1189 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1191 2013-04-15 Julian Brown <julian@codesourcery.com>
1193 * expr.c (add_to_result, subtract_from_result): Make global.
1194 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1195 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1196 subtract_from_result to handle extra bit of precision for .sleb128
1199 2013-04-10 Julian Brown <julian@codesourcery.com>
1201 * read.c (convert_to_bignum): Add sign parameter. Use it
1202 instead of X_unsigned to determine sign of resulting bignum.
1203 (emit_expr): Pass extra argument to convert_to_bignum.
1204 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1205 X_extrabit to convert_to_bignum.
1206 (parse_bitfield_cons): Set X_extrabit.
1207 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1208 Initialise X_extrabit field as appropriate.
1209 (add_to_result): New.
1210 (subtract_from_result): New.
1212 * expr.h (expressionS): Add X_extrabit field.
1214 2013-04-10 Jan Beulich <jbeulich@suse.com>
1216 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1217 register being PC when is_t or writeback, and use distinct
1218 diagnostic for the latter case.
1220 2013-04-10 Jan Beulich <jbeulich@suse.com>
1222 * gas/config/tc-arm.c (parse_operands): Re-write
1223 po_barrier_or_imm().
1224 (do_barrier): Remove bogus constraint().
1225 (do_t_barrier): Remove.
1227 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1229 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1230 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1232 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1234 2013-04-09 Jan Beulich <jbeulich@suse.com>
1236 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1237 Use local variable Rt in more places.
1238 (do_vmsr): Accept all control registers.
1240 2013-04-09 Jan Beulich <jbeulich@suse.com>
1242 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1243 if there was none specified for moves between scalar and core
1246 2013-04-09 Jan Beulich <jbeulich@suse.com>
1248 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1249 NEON_ALL_LANES case.
1251 2013-04-08 Jan Beulich <jbeulich@suse.com>
1253 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1256 2013-04-08 Jan Beulich <jbeulich@suse.com>
1258 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1261 2013-04-03 Alan Modra <amodra@gmail.com>
1263 * doc/as.texinfo: Add support to generate man options for h8300.
1264 * doc/c-h8300.texi: Likewise.
1266 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1268 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1271 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1274 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1276 2013-03-26 Nick Clifton <nickc@redhat.com>
1279 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1280 start of the file each time.
1283 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1286 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1288 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1291 2013-03-21 Will Newton <will.newton@linaro.org>
1293 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1294 pc-relative str instructions in Thumb mode.
1296 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1298 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1299 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1301 * config/tc-h8300.h: Remove duplicated defines.
1303 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1306 * tc-avr.c (mcu_has_3_byte_pc): New function.
1307 (tc_cfi_frame_initial_instructions): Call it to find return
1310 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1313 * config/tc-tic6x.c (tic6x_try_encode): Handle
1314 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1315 encode register pair numbers when required.
1317 2013-03-15 Will Newton <will.newton@linaro.org>
1319 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1320 in vstr in Thumb mode for pre-ARMv7 cores.
1322 2013-03-14 Andreas Schwab <schwab@suse.de>
1324 * doc/c-arc.texi (ARC Directives): Revert last change and use
1325 @itemize instead of @table.
1326 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1328 2013-03-14 Nick Clifton <nickc@redhat.com>
1331 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1332 NULL message, instead just check ARM_CPU_IS_ANY directly.
1334 2013-03-14 Nick Clifton <nickc@redhat.com>
1337 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1339 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1340 to the @item directives.
1341 (ARM-Neon-Alignment): Move to correct place in the document.
1342 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1344 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1347 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1349 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1350 case. Add default BAD_CASE to switch.
1352 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1354 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1355 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1357 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1359 * config/tc-arm.c (crc_ext_armv8): New feature set.
1360 (UNPRED_REG): New macro.
1361 (do_crc32_1): New function.
1362 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1363 do_crc32ch, do_crc32cw): Likewise.
1365 (insns): Add entries for crc32 mnemonics.
1366 (arm_extensions): Add entry for crc.
1368 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1370 * write.h (struct fix): Add fx_dot_frag field.
1371 (dot_frag): Declare.
1372 * write.c (dot_frag): New variable.
1373 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1374 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1375 * expr.c (expr): Save value of frag_now in dot_frag when setting
1377 * read.c (emit_expr): Likewise. Delete comments.
1379 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1381 * config/tc-i386.c (flag_code_names): Removed.
1382 (i386_index_check): Rewrote.
1384 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1386 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1388 (aarch64_double_precision_fmovable): New function.
1389 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1390 function; handle hexadecimal representation of IEEE754 encoding.
1391 (parse_operands): Update the call to parse_aarch64_imm_float.
1393 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1395 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1396 (check_hle): Updated.
1397 (md_assemble): Likewise.
1398 (parse_insn): Likewise.
1400 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1402 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1403 (md_assemble): Check if REP prefix is OK.
1404 (parse_insn): Remove expecting_string_instruction. Set
1407 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1409 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1411 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1413 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1414 for system registers.
1416 2013-02-27 DJ Delorie <dj@redhat.com>
1418 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1419 (rl78_op): Handle %code().
1420 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1421 (tc_gen_reloc): Likwise; convert to a computed reloc.
1422 (md_apply_fix): Likewise.
1424 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1426 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1428 2013-02-25 Terry Guo <terry.guo@arm.com>
1430 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1431 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1432 list of accepted CPUs.
1434 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1437 * config/tc-i386.c (cpu_arch): Add ".smap".
1439 * doc/c-i386.texi: Document smap.
1441 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1443 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1444 mips_assembling_insn appropriately.
1445 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1447 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1449 * config/tc-mips.c (append_insn): Correct indentation, remove
1452 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1454 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1456 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1458 * configure.tgt: Add nios2-*-rtems*.
1460 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1462 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1465 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1467 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1468 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1470 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1472 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1475 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1476 Andrew Jenner <andrew@codesourcery.com>
1478 Based on patches from Altera Corporation.
1480 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1481 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1482 * Makefile.in: Regenerated.
1483 * configure.tgt: Add case for nios2*-linux*.
1484 * config/obj-elf.c: Conditionally include elf/nios2.h.
1485 * config/tc-nios2.c: New file.
1486 * config/tc-nios2.h: New file.
1487 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1488 * doc/Makefile.in: Regenerated.
1489 * doc/all.texi: Set NIOSII.
1490 * doc/as.texinfo (Overview): Add Nios II options.
1491 (Machine Dependencies): Include c-nios2.texi.
1492 * doc/c-nios2.texi: New file.
1493 * NEWS: Note Altera Nios II support.
1495 2013-02-06 Alan Modra <amodra@gmail.com>
1498 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1499 Don't skip fixups with fx_subsy non-NULL.
1500 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1501 with fx_subsy non-NULL.
1503 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1505 * doc/c-metag.texi: Add "@c man" markers.
1507 2013-02-04 Alan Modra <amodra@gmail.com>
1509 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1511 (TC_ADJUST_RELOC_COUNT): Delete.
1512 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1514 2013-02-04 Alan Modra <amodra@gmail.com>
1516 * po/POTFILES.in: Regenerate.
1518 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1520 * config/tc-metag.c: Make SWAP instruction less permissive with
1523 2013-01-29 DJ Delorie <dj@redhat.com>
1525 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1526 relocs in .word/.etc statements.
1528 2013-01-29 Roland McGrath <mcgrathr@google.com>
1530 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1531 immediate value for 8-bit offset" error so it shows line info.
1533 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1535 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1538 2013-01-24 Nick Clifton <nickc@redhat.com>
1540 * config/tc-v850.c: Add support for e3v5 architecture.
1541 * doc/c-v850.texi: Mention new support.
1543 2013-01-23 Nick Clifton <nickc@redhat.com>
1546 * config/tc-avr.c: Include dwarf2dbg.h.
1548 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1550 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1551 (tc_i386_fix_adjustable): Likewise.
1552 (lex_got): Likewise.
1553 (tc_gen_reloc): Likewise.
1555 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1557 * config/tc-aarch64.c (output_operand_error_record): Change to output
1558 the out-of-range error message as value-expected message if there is
1559 only one single value in the expected range.
1560 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1561 LSL #0 as a programmer-friendly feature.
1563 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1565 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1566 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1567 BFD_RELOC_64_SIZE relocations.
1568 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1570 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1571 relocations against local symbols.
1573 2013-01-16 Alan Modra <amodra@gmail.com>
1575 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1576 finding some sort of toc syntax error, and break to avoid
1577 compiler uninit warning.
1579 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1582 * config/tc-i386.c (lex_got): Increment length by 1 if the
1583 relocation token is removed.
1585 2013-01-15 Nick Clifton <nickc@redhat.com>
1587 * config/tc-v850.c (md_assemble): Allow signed values for
1590 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1592 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1595 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1597 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1598 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1599 * config/tc-ppc.c (md_show_usage): Likewise.
1600 (ppc_handle_align): Handle power8's group ending nop.
1602 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1604 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1605 that the assember exits after the opcodes have been printed.
1607 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1609 * app.c: Remove trailing white spaces.
1613 * dw2gencfi.c: Likewise.
1614 * dwarf2dbg.h: Likewise.
1615 * ecoff.c: Likewise.
1616 * input-file.c: Likewise.
1617 * itbl-lex.h: Likewise.
1618 * output-file.c: Likewise.
1621 * subsegs.c: Likewise.
1622 * symbols.c: Likewise.
1623 * write.c: Likewise.
1624 * config/tc-i386.c: Likewise.
1625 * doc/Makefile.am: Likewise.
1626 * doc/Makefile.in: Likewise.
1627 * doc/c-aarch64.texi: Likewise.
1628 * doc/c-alpha.texi: Likewise.
1629 * doc/c-arc.texi: Likewise.
1630 * doc/c-arm.texi: Likewise.
1631 * doc/c-avr.texi: Likewise.
1632 * doc/c-bfin.texi: Likewise.
1633 * doc/c-cr16.texi: Likewise.
1634 * doc/c-d10v.texi: Likewise.
1635 * doc/c-d30v.texi: Likewise.
1636 * doc/c-h8300.texi: Likewise.
1637 * doc/c-hppa.texi: Likewise.
1638 * doc/c-i370.texi: Likewise.
1639 * doc/c-i386.texi: Likewise.
1640 * doc/c-i860.texi: Likewise.
1641 * doc/c-m32c.texi: Likewise.
1642 * doc/c-m32r.texi: Likewise.
1643 * doc/c-m68hc11.texi: Likewise.
1644 * doc/c-m68k.texi: Likewise.
1645 * doc/c-microblaze.texi: Likewise.
1646 * doc/c-mips.texi: Likewise.
1647 * doc/c-msp430.texi: Likewise.
1648 * doc/c-mt.texi: Likewise.
1649 * doc/c-s390.texi: Likewise.
1650 * doc/c-score.texi: Likewise.
1651 * doc/c-sh.texi: Likewise.
1652 * doc/c-sh64.texi: Likewise.
1653 * doc/c-tic54x.texi: Likewise.
1654 * doc/c-tic6x.texi: Likewise.
1655 * doc/c-v850.texi: Likewise.
1656 * doc/c-xc16x.texi: Likewise.
1657 * doc/c-xgate.texi: Likewise.
1658 * doc/c-xtensa.texi: Likewise.
1659 * doc/c-z80.texi: Likewise.
1660 * doc/internals.texi: Likewise.
1662 2013-01-10 Roland McGrath <mcgrathr@google.com>
1664 * hash.c (hash_new_sized): Make it global.
1665 * hash.h: Declare it.
1666 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1669 2013-01-10 Will Newton <will.newton@imgtec.com>
1671 * Makefile.am: Add Meta.
1672 * Makefile.in: Regenerate.
1673 * config/tc-metag.c: New file.
1674 * config/tc-metag.h: New file.
1675 * configure.tgt: Add Meta.
1676 * doc/Makefile.am: Add Meta.
1677 * doc/Makefile.in: Regenerate.
1678 * doc/all.texi: Add Meta.
1679 * doc/as.texiinfo: Document Meta options.
1680 * doc/c-metag.texi: New file.
1682 2013-01-09 Steve Ellcey <sellcey@mips.com>
1684 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1686 * config/tc-mips.c (internalError): Remove, replace with abort.
1688 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1690 * config/tc-aarch64.c (parse_operands): Change to compare the result
1691 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1693 2013-01-07 Nick Clifton <nickc@redhat.com>
1696 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1697 anticipated character.
1698 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1699 here as it is no longer needed.
1701 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1703 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1704 * doc/c-score.texi (SCORE-Opts): Likewise.
1705 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1707 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1709 * config/tc-mips.c: Add support for MIPS r5900.
1710 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1712 (can_swap_branch_p, get_append_method): Detect some conditional
1713 short loops to fix a bug on the r5900 by NOP in the branch delay
1715 (M_MUL): Support 3 operands in multu on r5900.
1716 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1717 (s_mipsset): Force 32 bit floating point on r5900.
1718 (mips_ip): Check parameter range of instructions mfps and mtps on
1720 * configure.in: Detect CPU type when target string contains r5900
1721 (e.g. mips64r5900el-linux-gnu).
1723 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1725 * as.c (parse_args): Update copyright year to 2013.
1727 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1729 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1732 2013-01-02 Nick Clifton <nickc@redhat.com>
1735 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1738 For older changes see ChangeLog-2012
1740 Copyright (C) 2013 Free Software Foundation, Inc.
1742 Copying and distribution of this file, with or without modification,
1743 are permitted in any medium without royalty provided the copyright
1744 notice and this notice are preserved.
1750 version-control: never