1 2006-06-08 Nigel Stephens <nigel@mips.com>
3 * config/tc-mips.c (mips_pseudo_table): Add "origin" and "repeat"
4 aliases for better compatibility with SGI tools.
6 2006-06-08 Alan Modra <amodra@bigpond.net.au>
8 * configure.in (BFDLIB, BFDVER_H, ALL_OBJ_DEPS): Delete.
9 * Makefile.am (GASLIBS): Expand @BFDLIB@.
11 (OBJS): Expand @ALL_OBJ_DEPS@. Depend on all fopen-*.h variants.
12 (obj-aout.o): Depend on $(DEP_@target_get_type@_aout)
13 (obj-coff.o, obj-ecoff.o, obj-elf.o): Similarly.
15 * dep-in.sed: Don't substitute bfdver.h. Do remove symcat.h.
16 * Makefile.in: Regenerate.
17 * doc/Makefile.in: Regenerate.
18 * configure: Regenerate.
20 2006-06-07 Joseph S. Myers <joseph@codesourcery.com>
22 * po/Make-in (pdf, ps): New dummy targets.
24 2006-06-07 Julian Brown <julian@codesourcery.com>
26 * config/tc-arm.c (stdarg.h): include.
27 (arm_it): Add uncond_value field. Add isvec and issingle to operand
29 (arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
30 REG_TYPE_NSDQ (single, double or quad vector reg).
31 (reg_expected_msgs): Update.
32 (BAD_FPU): Add macro for unsupported FPU instruction error.
33 (parse_neon_type): Support 'd' as an alias for .f64.
34 (parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
36 (parse_vfp_reg_list): Don't update first arg on error.
37 (parse_neon_mov): Support extra syntax for VFP moves.
38 (operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
39 OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
40 (parse_operands): Support isvec, issingle operands fields, new parse
42 (do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
44 (do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
45 (NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
46 (NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
47 (NEON_SHAPE_DEF): New macro. Define table of possible instruction
49 (neon_shape): Redefine in terms of above.
50 (neon_shape_class): New enumeration, table of shape classes.
51 (neon_shape_el): New enumeration. One element of a shape.
52 (neon_shape_el_size): Register widths of above, where appropriate.
53 (neon_shape_info): New struct. Info for shape table.
54 (neon_shape_tab): New array.
55 (neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
56 (neon_check_shape): Rewrite as...
57 (neon_select_shape): New function to classify instruction shapes,
58 driven by new table neon_shape_tab array.
59 (neon_quad): New function. Return 1 if shape should set Q flag in
60 instructions (or equivalent), 0 otherwise.
61 (type_chk_of_el_type): Support F64.
62 (el_type_of_type_chk): Likewise.
63 (neon_check_type): Add support for VFP type checking (VFP data
64 elements fill their containing registers).
65 (do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
66 in thumb mode for VFP instructions.
67 (do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
68 and encode the current instruction as if it were that opcode.
69 (try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
70 arguments, call function in PFN.
71 (do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
72 (do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
73 (do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
74 (do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
75 (do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
76 Redirect Neon-syntax VFP instructions to VFP instruction handlers.
77 (do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
78 (do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
79 (neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
80 (do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
81 (do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
82 (do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
83 (do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
84 (do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
85 (do_neon_swp): Use neon_select_shape not neon_check_shape. Use
87 (vfp_or_neon_is_neon): New function. Call if a mnemonic shared
88 between VFP and Neon turns out to belong to Neon. Perform
89 architecture check and fill in condition field if appropriate.
90 (do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
91 (do_neon_cvt): Add support for VFP variants of instructions.
92 (neon_cvt_flavour): Extend to cover VFP conversions.
93 (do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
95 (do_neon_ldr_str): Handle single-precision VFP load/store.
96 (do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
97 NS_NULL not NS_IGNORE.
98 (opcode_tag): Add OT_csuffixF for operands which either take a
99 conditional suffix, or have 0xF in the condition field.
100 (md_assemble): Add support for OT_csuffixF.
101 (NCE): Replace macro with...
102 (NCE_tag, NCE, NCEF): New macros.
103 (nCE): Replace macro with...
104 (nCE_tag, nCE, nCEF): New macros.
105 (insns): Add support for VFP insns or VFP versions of insns msr,
106 mrs, vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop,
107 vcvtz, vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia,
108 vldbdb, vstm, vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared
109 VFP/Neon insns together.
111 2006-06-07 Alan Modra <amodra@bigpond.net.au>
112 Ladislav Michl <ladis@linux-mips.org>
114 * app.c: Don't include headers already included by as.h.
116 * atof-generic.c: Likewise.
118 * dwarf2dbg.c: Likewise.
120 * input-file.c: Likewise.
121 * input-scrub.c: Likewise.
123 * output-file.c: Likewise.
126 * config/bfin-lex.l: Likewise.
127 * config/obj-coff.h: Likewise.
128 * config/obj-elf.h: Likewise.
129 * config/obj-som.h: Likewise.
130 * config/tc-arc.c: Likewise.
131 * config/tc-arm.c: Likewise.
132 * config/tc-avr.c: Likewise.
133 * config/tc-bfin.c: Likewise.
134 * config/tc-cris.c: Likewise.
135 * config/tc-d10v.c: Likewise.
136 * config/tc-d30v.c: Likewise.
137 * config/tc-dlx.h: Likewise.
138 * config/tc-fr30.c: Likewise.
139 * config/tc-frv.c: Likewise.
140 * config/tc-h8300.c: Likewise.
141 * config/tc-hppa.c: Likewise.
142 * config/tc-i370.c: Likewise.
143 * config/tc-i860.c: Likewise.
144 * config/tc-i960.c: Likewise.
145 * config/tc-ip2k.c: Likewise.
146 * config/tc-iq2000.c: Likewise.
147 * config/tc-m32c.c: Likewise.
148 * config/tc-m32r.c: Likewise.
149 * config/tc-maxq.c: Likewise.
150 * config/tc-mcore.c: Likewise.
151 * config/tc-mips.c: Likewise.
152 * config/tc-mmix.c: Likewise.
153 * config/tc-mn10200.c: Likewise.
154 * config/tc-mn10300.c: Likewise.
155 * config/tc-msp430.c: Likewise.
156 * config/tc-mt.c: Likewise.
157 * config/tc-ns32k.c: Likewise.
158 * config/tc-openrisc.c: Likewise.
159 * config/tc-ppc.c: Likewise.
160 * config/tc-s390.c: Likewise.
161 * config/tc-sh.c: Likewise.
162 * config/tc-sh64.c: Likewise.
163 * config/tc-sparc.c: Likewise.
164 * config/tc-tic30.c: Likewise.
165 * config/tc-tic4x.c: Likewise.
166 * config/tc-tic54x.c: Likewise.
167 * config/tc-v850.c: Likewise.
168 * config/tc-vax.c: Likewise.
169 * config/tc-xc16x.c: Likewise.
170 * config/tc-xstormy16.c: Likewise.
171 * config/tc-xtensa.c: Likewise.
172 * config/tc-z80.c: Likewise.
173 * config/tc-z8k.c: Likewise.
174 * macro.h: Don't include sb.h or ansidecl.h.
175 * sb.h: Don't include stdio.h or ansidecl.h.
176 * cond.c: Include sb.h.
177 * itbl-lex.l: Include as.h instead of other system headers.
178 * itbl-parse.y: Likewise.
179 * itbl-ops.c: Similarly.
180 * itbl-ops.h: Don't include as.h or ansidecl.h.
181 * config/bfin-defs.h: Don't include bfd.h or as.h.
182 * config/bfin-parse.y: Include as.h instead of other system headers.
184 2006-06-06 Ben Elliston <bje@au.ibm.com>
185 Anton Blanchard <anton@samba.org>
187 * config/tc-ppc.c (parse_cpu): Handle "-mpower6".
188 (md_show_usage): Document it.
189 (ppc_setup_opcodes): Test power6 opcode flag bits.
190 * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6".
192 2006-06-06 Thiemo Seufer <ths@mips.com>
193 Chao-ying Fu <fu@mips.com>
195 * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro.
196 (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete.
197 (macro_build): Update comment.
198 (mips_ip): Allow DSP64 instructions for MIPS64R2.
199 (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and
201 (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and
202 MIPS_CPU_ASE_MDMX flags for sb1.
204 2006-06-05 Thiemo Seufer <ths@mips.com>
206 * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew
208 (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate.
209 (mips_ip): Make overflowed/underflowed constant arguments in DSP
210 and MT instructions a fatal error. Use INSERT_OPERAND where
211 appropriate. Improve warnings for break and wait code overflows.
212 Use symbolic constant of OP_MASK_COPZ.
213 (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate.
215 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
217 * po/Make-in (top_builddir): Define.
219 2006-06-02 Joseph S. Myers <joseph@codesourcery.com>
221 * doc/Makefile.am (TEXI2DVI): Define.
222 * doc/Makefile.in: Regenerate.
223 * doc/c-arc.texi: Fix typo.
225 2006-06-01 Alan Modra <amodra@bigpond.net.au>
227 * config/obj-ieee.c: Delete.
228 * config/obj-ieee.h: Delete.
229 * Makefile.am (OBJ_FORMATS): Remove ieee.
230 (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly.
231 (obj-ieee.o): Remove rule.
232 * Makefile.in: Regenerate.
233 * configure.in (atof): Remove tahoe.
234 (OBJ_MAYBE_IEEE): Don't define.
235 * configure: Regenerate.
236 * config.in: Regenerate.
237 * doc/Makefile.in: Regenerate.
238 * po/POTFILES.in: Regenerate.
240 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
242 * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL
243 and LIBINTL_DEP everywhere.
245 (INCLUDES, DEP_INCLUDES): Use @INCINTL@.
246 * acinclude.m4: Include new gettext macros.
247 * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
248 Remove local code for po/Makefile.
249 * Makefile.in, configure, doc/Makefile.in: Regenerated.
251 2006-05-30 Nick Clifton <nickc@redhat.com>
253 * po/es.po: Updated Spanish translation.
255 2006-05-06 Denis Chertykov <denisc@overta.ru>
257 * doc/c-avr.texi: New file.
258 * doc/Makefile.am (CPU_DOCS): Add c-avr.texi
259 * doc/all.texi: Set AVR
260 * doc/as.texinfo: Include c-avr.texi
262 2006-05-28 Jie Zhang <jie.zhang@analog.com>
264 * config/bfin-parse.y (check_macfunc): Loose the condition of
265 calling check_multiply_halfregs ().
267 2006-05-25 Jie Zhang <jie.zhang@analog.com>
269 * config/bfin-parse.y (asm_1): Better check and deal with
270 vector and scalar Multiply 16-Bit Operands instructions.
272 2006-05-24 Nick Clifton <nickc@redhat.com>
274 * config/tc-hppa.c: Convert to ISO C90 format.
275 * config/tc-hppa.h: Likewise.
277 2006-05-24 Carlos O'Donell <carlos@systemhalted.org>
278 Randolph Chung <randolph@tausq.org>
280 * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff,
281 is_tls_ieoff, is_tls_leoff): Define.
282 (fix_new_hppa): Handle TLS.
283 (cons_fix_new_hppa): Likewise.
285 (md_apply_fix): Handle TLS relocs.
286 * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS.
288 2006-05-24 Bjoern Haase <bjoern.m.haase@web.de>
290 * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561.
292 2006-05-23 Thiemo Seufer <ths@mips.com>
293 David Ung <davidu@mips.com>
294 Nigel Stephens <nigel@mips.com>
297 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
298 (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
299 ISA_HAS_MXHC1): New macros.
300 (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
301 ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments.
302 (mips_cpu_info): Change to use combined ASE/IS_ISA flag.
303 (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
304 MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
305 (mips_after_parse_args): Change default handling of float register
306 size to account for 32bit code with 64bit FP. Better sanity checking
307 of ISA/ASE/ABI option combinations.
308 (s_mipsset): Support switching of GPR and FPR sizes via
309 .set {g,f}p={32,64,default}. Better sanity checking for .set ASE
311 (mips_elf_final_processing): We should record the use of 64bit FP
312 registers in 32bit code but we don't, because ELF header flags are
314 (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
315 extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
316 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
317 (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
318 * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
319 missing -march options. Document .set arch=CPU. Move .set smartmips
320 to ASE page. Use @code for .set FOO examples.
322 2006-05-23 Jie Zhang <jie.zhang@analog.com>
324 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
327 2006-05-23 Jie Zhang <jie.zhang@analog.com>
329 * config/bfin-defs.h (bfin_equals): Remove declaration.
330 * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
331 * config/tc-bfin.c (bfin_name_is_register): Remove.
332 (bfin_equals): Remove.
333 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
334 (bfin_name_is_register): Remove declaration.
336 2006-05-19 Thiemo Seufer <ths@mips.com>
337 Nigel Stephens <nigel@mips.com>
339 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
340 (mips_oddfpreg_ok): New function.
343 2006-05-19 Thiemo Seufer <ths@mips.com>
344 David Ung <davidu@mips.com>
346 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
347 * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
348 ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
349 (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
350 RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
351 RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
352 FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
353 N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
354 SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
355 MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
356 reg_names_o32, reg_names_n32n64): Define register classes.
357 (reg_lookup): New function, use register classes.
358 (md_begin): Reserve register names in the symbol table. Simplify
360 (mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
362 (mips16_ip): Use reg_lookup.
363 (tc_get_register): Likewise.
364 (tc_mips_regname_to_dw2regnum): New function.
366 2006-05-19 Thiemo Seufer <ths@mips.com>
368 * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
369 Un-constify string argument.
370 * config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
372 * config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
374 * config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
376 * config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
378 * config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
380 * config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
383 2006-05-19 Nathan Sidwell <nathan@codesourcery.com>
385 * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
386 cfloat/m68881 to correct architecture before using it.
388 2006-05-16 Bjoern Haase <bjoern.m.haase@web.de>
390 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate
393 2006-05-15 Paul Brook <paul@codesourcery.com>
395 * config/tc-arm.c (arm_adjust_symtab): Use
396 bfd_is_arm_special_symbol_name.
398 2006-05-15 Bob Wilson <bob.wilson@acm.org>
400 * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
401 xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
402 xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
403 Handle errors from calls to xtensa_opcode_is_* functions.
405 2006-05-14 Thiemo Seufer <ths@mips.com>
407 * config/tc-mips.c (macro_build): Test for currently active
409 (mips16_ip): Reject invalid opcodes.
411 2006-05-11 Carlos O'Donell <carlos@codesourcery.com>
413 * doc/as.texinfo: Rename "Index" to "AS Index",
414 and "ABORT" to "ABORT (COFF)".
416 2006-05-11 Paul Brook <paul@codesourcery.com>
418 * config/tc-arm.c (parse_half): New function.
419 (operand_parse_code): Remove OP_Iffff. Add OP_HALF.
420 (parse_operands): Ditto.
421 (do_mov16): Reject invalid relocations.
422 (do_t_mov16): Ditto. Use Thumb reloc numbers.
423 (insns): Replace Iffff with HALF.
424 (md_apply_fix): Add MOVW and MOVT relocs.
425 (tc_gen_reloc): Ditto.
426 * doc/c-arm.texi: Document relocation operators
428 2006-05-11 Paul Brook <paul@codesourcery.com>
430 * config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
432 2006-05-11 Thiemo Seufer <ths@mips.com>
434 * config/tc-mips.c (append_insn): Don't check the range of j or
437 2006-05-11 Pedro Alves <pedro_alves@portugalmail.pt>
439 * config/tc-arm.c (md_pcrel_from_section): Force a bias for
440 relocs against external symbols for WinCE targets.
441 (md_apply_fix): Likewise.
443 2006-05-09 David Ung <davidu@mips.com>
445 * config/tc-mips.c (append_insn): Only warn about an out-of-range
448 2006-05-09 Nick Clifton <nickc@redhat.com>
450 * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups
451 against symbols which are not going to be placed into the symbol
454 2006-05-09 Ben Elliston <bje@au.ibm.com>
456 * expr.c (operand): Remove `if (0 && ..)' statement and
457 subsequently unused target_op label. Collapse `if (1 || ..)'
459 * app.c (do_scrub_chars): Remove unused case 0, as it is handled
460 separately above the switch.
462 2006-05-08 Nick Clifton <nickc@redhat.com>
465 * config/tc-msp430.c (line_separator_character): Define as |.
467 2006-05-08 Thiemo Seufer <ths@mips.com>
468 Nigel Stephens <nigel@mips.com>
469 David Ung <davidu@mips.com>
471 * config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
472 (mips_opts): Likewise.
473 (file_ase_smartmips): New variable.
474 (ISA_HAS_ROR): SmartMIPS implements rotate instructions.
475 (macro_build): Handle SmartMIPS instructions.
477 (md_longopts): Add argument handling for smartmips.
478 (md_parse_options, mips_after_parse_args): Likewise.
479 (s_mipsset): Add .set smartmips support.
480 (md_show_usage): Document -msmartmips/-mno-smartmips.
481 * doc/as.texinfo: Document -msmartmips/-mno-smartmips and
483 * doc/c-mips.texi: Likewise.
485 2006-05-08 Alan Modra <amodra@bigpond.net.au>
487 * write.c (relax_segment): Add pass count arg. Don't error on
488 negative org/space on first two passes.
489 (relax_seg_info): New struct.
490 (relax_seg, write_object_file): Adjust.
491 * write.h (relax_segment): Update prototype.
493 2006-05-05 Julian Brown <julian@codesourcery.com>
495 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
497 (do_neon_mov): Enable several VMOV variants for VFP. Add suitable
498 architecture version checks.
499 (insns): Allow overlapping instructions to be used in VFP mode.
501 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
504 * config/obj-elf.c (obj_elf_change_section): Allow user
505 specified SHF_ALPHA_GPREL.
507 2006-05-05 Bjoern Haase <bjoern.m.haase@web.de>
509 * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups
510 for PMEM related expressions.
512 2006-05-05 Nick Clifton <nickc@redhat.com>
515 * dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro. Handles the
516 insertion of a directory separator character into a string at a
517 given offset. Uses heuristics to decide when to use a backslash
518 character rather than a forward-slash character.
519 (dwarf2_directive_loc): Use the macro.
520 (out_debug_info): Likewise.
522 2006-05-05 Thiemo Seufer <ths@mips.com>
523 David Ung <davidu@mips.com>
525 * config/tc-mips.c (macro_build): Add case 'k' to handle cache
527 (macro): Add new case M_CACHE_AB.
529 2006-05-04 Kazu Hirata <kazu@codesourcery.com>
531 * config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
532 (opcode_lookup): Issue a warning for opcode with
533 OT_cinfix3_deprecated. Otherwise treat OT_cinfix3_deprecated
534 identical to OT_cinfix3.
535 (TxC3w, TC3w, tC3w): New.
536 (insns): Use tC3w and TC3w for comparison instructions with
539 2006-05-04 Alan Modra <amodra@bigpond.net.au>
541 * subsegs.h (struct frchain): Delete frch_seg.
542 (frchain_root): Delete.
543 (seg_info): Define as macro.
544 * subsegs.c (frchain_root): Delete.
545 (abs_seg_info, und_seg_info, absolute_frchain): Delete.
546 (subsegs_begin, subseg_change): Adjust for above.
547 (subseg_set_rest): Likewise. Add new frchain structs to seginfo
548 rather than to one big list.
549 (subseg_get): Don't special case abs, und sections.
550 (subseg_new, subseg_force_new): Don't set frchainP here.
552 (subsegs_print_statistics): Adjust frag chain control list traversal.
553 * debug.c (dmp_frags): Likewise.
554 * dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
555 at frchain_root. Make use of known frchain ordering.
556 (last_frag_for_seg): Likewise.
557 (get_frag_fix): Likewise. Add seg param.
558 (process_entries, out_debug_aranges): Adjust get_frag_fix calls.
559 * write.c (chain_frchains_together_1): Adjust for struct frchain.
560 (SUB_SEGMENT_ALIGN): Likewise.
561 (subsegs_finish): Adjust frchain list traversal.
562 * config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
563 (xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
564 (xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
565 (xtensa_fix_b_j_loop_end_frags): Likewise.
566 (xtensa_fix_close_loop_end_frags): Likewise.
567 (xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
568 (retrieve_segment_info): Delete frch_seg initialisation.
570 2006-05-03 Alan Modra <amodra@bigpond.net.au>
572 * subsegs.c (subseg_get): Don't call obj_sec_set_private_data.
573 * config/obj-elf.h (obj_sec_set_private_data): Delete.
574 * config/tc-hppa.c (tc_gen_reloc): Don't use bfd_abs_symbol.
575 * config/tc-mn10300.c (tc_gen_reloc): Likewise.
577 2006-05-02 Joseph Myers <joseph@codesourcery.com>
579 * config/tc-arm.c (do_iwmmxt_wldstbh): Don't multiply offset by 4
581 (md_apply_fix3): Multiply offset by 4 here for
582 BFD_RELOC_ARM_CP_OFF_IMM_S2 and BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
584 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
585 Jan Beulich <jbeulich@novell.com>
587 * config/tc-i386.c (output_invalid_buf): Change size for
589 * config/tc-tic30.c (output_invalid_buf): Likewise.
591 * config/tc-i386.c (output_invalid): Cast none-ascii char to
593 * config/tc-tic30.c (output_invalid): Likewise.
595 2006-05-02 Daniel Jacobowitz <dan@codesourcery.com>
597 * doc/Makefile.am (AM_MAKEINFOFLAGS): New.
598 (TEXI2POD): Use AM_MAKEINFOFLAGS.
599 (asconfig.texi): Don't set top_srcdir.
600 * doc/as.texinfo: Don't use top_srcdir.
601 * aclocal.m4, Makefile.in, doc/Makefile.in: Regenerated.
603 2006-05-02 H.J. Lu <hongjiu.lu@intel.com>
605 * config/tc-i386.c (output_invalid_buf): Change size to 16.
606 * config/tc-tic30.c (output_invalid_buf): Likewise.
608 * config/tc-i386.c (output_invalid): Use snprintf instead of
610 * config/tc-ia64.c (declare_register_set): Likewise.
611 (emit_one_bundle): Likewise.
612 (check_dependencies): Likewise.
613 * config/tc-tic30.c (output_invalid): Likewise.
615 2006-05-02 Paul Brook <paul@codesourcery.com>
617 * config/tc-arm.c (arm_optimize_expr): New function.
618 * config/tc-arm.h (md_optimize_expr): Define
619 (arm_optimize_expr): Add prototype.
620 (TC_FORCE_RELOCATION_SUB_SAME): Define.
622 2006-05-02 Ben Elliston <bje@au.ibm.com>
624 * config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS): Make single bit
627 * sb.h (sb_list_vector): Move to sb.c.
628 * sb.c (free_list): Use type of sb_list_vector directly.
629 (sb_build): Fix off-by-one error in assertion about `size'.
631 2006-05-01 Ben Elliston <bje@au.ibm.com>
633 * listing.c (listing_listing): Remove useless loop.
634 * macro.c (macro_expand): Remove is_positional local variable.
635 * read.c (s_comm_internal): Simplify `if' condition 1 || x -> 1
636 and simplify surrounding expressions, where possible.
637 (assign_symbol): Likewise.
638 (s_weakref): Likewise.
639 * symbols.c (colon): Likewise.
641 2006-05-01 James Lemke <jwlemke@wasabisystems.com>
643 * subsegs.c (subseg_set_rest): Always set seginfp->frchainP if NULL.
645 2006-04-30 Thiemo Seufer <ths@mips.com>
646 David Ung <davidu@mips.com>
648 * config/tc-mips.c (validate_mips_insn): Handling of udi cases.
649 (mips_immed): New table that records various handling of udi
650 instruction patterns.
651 (mips_ip): Adds udi handling.
653 2006-04-28 Alan Modra <amodra@bigpond.net.au>
655 * dwarf2dbg.c (get_line_subseg): Attach new struct line_seg to end
656 of list rather than beginning.
658 2006-04-26 Julian Brown <julian@codesourcery.com>
660 * gas/config/tc-arm.c (neon_is_quarter_float): Move, and rename to...
661 (is_quarter_float): Rename from above. Simplify slightly.
662 (parse_qfloat_immediate): Parse a "quarter precision" floating-point
664 (parse_neon_mov): Parse floating-point constants.
665 (neon_qfloat_bits): Fix encoding.
666 (neon_cmode_for_move_imm): Tweak to use floating-point encoding in
667 preference to integer encoding when using the F32 type.
669 2006-04-26 Julian Brown <julian@codesourcery.com>
671 * config/tc-arm.c (neon_el_type): Make NT_invtype be the zero (so
672 zero-initialising structures containing it will lead to invalid types).
673 (arm_it): Add vectype to each operand.
674 (NTA_HASTYPE, NTA_HASINDEX): Constants used in neon_typed_alias
676 (neon_typed_alias): New structure. Extra information for typed
678 (reg_entry): Add neon type info field.
679 (arm_reg_parse): Remove RTYPE argument (revert to previous arguments).
680 Break out alternative syntax for coprocessor registers, etc. into...
681 (arm_reg_alt_syntax): New function. Alternate syntax handling broken
682 out from arm_reg_parse.
683 (parse_neon_type): Move. Return SUCCESS/FAIL.
684 (first_error): New function. Call to ensure first error which occurs is
686 (parse_neon_operand_type): Parse exactly one type.
687 (NEON_ALL_LANES, NEON_INTERLEAVE_LANES): Move.
688 (parse_typed_reg_or_scalar): New function. Handle core of both
689 arm_typed_reg_parse and parse_scalar.
690 (arm_typed_reg_parse): Parse a register with an optional type.
691 (NEON_SCALAR_REG, NEON_SCALAR_INDEX): Extract parts of parse_scalar
693 (parse_scalar): Parse a Neon scalar with optional type.
694 (parse_reg_list): Use first_error.
695 (parse_vfp_reg_list): Use arm_typed_reg_parse instead of arm_reg_parse.
696 (neon_alias_types_same): New function. Return true if two (alias) types
698 (parse_neon_el_struct_list): Use parse_typed_reg_or_scalar. Return type
700 (insert_reg_alias): Return new reg_entry not void.
701 (insert_neon_reg_alias): New function. Insert type/index information as
702 well as register for alias.
703 (create_neon_reg_alias): New function. Parse .dn/.qn directives and
704 make typed register aliases accordingly.
705 (s_dn, s_qn): New functions. Handle incorrectly used .dn/.qn at start
707 (s_unreq): Delete type information if present.
708 (s_arm_unwind_save_mmxwr): Remove arg 3 from arm_reg_parse calls.
709 (s_arm_unwind_save_mmxwcg): Likewise.
710 (s_arm_unwind_movsp): Likewise.
711 (s_arm_unwind_setfp): Likewise.
712 (parse_shift): Likewise.
713 (parse_shifter_operand): Likewise.
714 (parse_address): Likewise.
715 (parse_tb): Likewise.
716 (tc_arm_regname_to_dw2regnum): Likewise.
717 (md_pseudo_table): Add dn, qn.
718 (parse_neon_mov): Handle typed operands.
719 (parse_operands): Likewise.
720 (neon_type_mask): Add N_SIZ.
721 (N_ALLMODS): New macro.
722 (neon_check_shape): Fix typo in NS_DDD_QQQ case. Use first_error.
723 (el_type_of_type_chk): Add some safeguards.
724 (modify_types_allowed): Fix logic bug.
725 (neon_check_type): Handle operands with types.
726 (neon_three_same): Remove redundant optional arg handling.
727 (do_neon_dyadic_i64_su, do_neon_shl_imm, do_neon_qshl_imm)
728 (do_neon_logic, do_neon_qdmulh, do_neon_fcmp_absolute)
729 (do_neon_step): Adjust accordingly.
730 (neon_cmode_for_logic_imm): Use first_error.
731 (do_neon_bitfield): Call neon_check_type.
732 (neon_dyadic): Rename to...
733 (neon_dyadic_misc): ...this. New name for neon_dyadic. Add bitfield
734 to allow modification of type of the destination.
735 (do_neon_dyadic_if_su, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
736 (do_neon_addsub_if_i, do_neon_mul): Adjust accordingly.
737 (do_neon_compare): Make destination be an untyped bitfield.
738 (neon_scalar_for_mul): Use NEON_SCALAR_REG, NEON_SCALAR_INDEX.
739 (neon_mul_mac): Return early in case of errors.
740 (neon_move_immediate): Use first_error.
741 (neon_mac_reg_scalar_long): Fix type to include scalar.
742 (do_neon_dup): Likewise.
743 (do_neon_mov): Likewise (in several places).
744 (do_neon_tbl_tbx): Fix type.
745 (do_neon_ld_st_interleave, neon_alignment_bit, do_neon_ld_st_lane)
746 (do_neon_ld_dup): Exit early in case of errors and/or use
748 (opcode_lookup): Update for parse_neon_type returning SUCCESS/FAIL.
749 Handle .dn/.qn directives.
750 (REGDEF): Add zero for reg_entry neon field.
752 2006-04-26 Julian Brown <julian@codesourcery.com>
754 * config/tc-arm.c (limits.h): Include.
755 (fpu_arch_vfp_v3, fpu_vfp_ext_v3, fpu_neon_ext_v1)
756 (fpu_vfp_v3_or_neon_ext): Declare constants.
757 (neon_el_type): New enumeration of types for Neon vector elements.
758 (neon_type_el): New struct. Define type and size of a vector element.
759 (NEON_MAX_TYPE_ELS): Define constant. The maximum number of types per
761 (neon_type): Define struct. The type of an instruction.
762 (arm_it): Add 'vectype' for the current instruction.
763 (isscalar, immisalign, regisimm, isquad): New predicates for operands.
764 (vfp_sp_reg_pos): Rename to...
765 (vfp_reg_pos): ...this, and add VFP_REG_Dd, VFP_REG_Dm, VFP_REG_Dn
767 (arm_reg_type): Add REG_TYPE_NQ (Neon Q register) and REG_TYPE_NDQ
768 (Neon D or Q register).
769 (reg_expected_msgs): Sync with above. Allow VFD to mean VFP or Neon D
771 (GE_OPT_PREFIX_BIG): Define constant, for use in...
772 (my_get_expression): Allow above constant as argument to accept
773 64-bit constants with optional prefix.
774 (arm_reg_parse): Add extra argument to return the specific type of
775 register in when either a D or Q register (REG_TYPE_NDQ) is
776 requested. Can be NULL.
777 (parse_scalar): New function. Parse Neon scalar (vector reg and index).
778 (parse_reg_list): Update for new arm_reg_parse args.
779 (parse_vfp_reg_list): Allow parsing of Neon D/Q register lists.
780 (parse_neon_el_struct_list): New function. Parse element/structure
781 register lists for VLD<n>/VST<n> instructions.
782 (s_arm_unwind_save_vfp): Update for new parse_vfp_reg_list args.
783 (s_arm_unwind_save_mmxwr): Likewise.
784 (s_arm_unwind_save_mmxwcg): Likewise.
785 (s_arm_unwind_movsp): Likewise.
786 (s_arm_unwind_setfp): Likewise.
787 (parse_big_immediate): New function. Parse an immediate, which may be
788 64 bits wide. Put results in inst.operands[i].
789 (parse_shift): Update for new arm_reg_parse args.
790 (parse_address): Likewise. Add parsing of alignment specifiers.
791 (parse_neon_mov): Parse the operands of a VMOV instruction.
792 (operand_parse_code): Add OP_RND, OP_RNQ, OP_RNDQ, OP_RNSC, OP_NRDLST,
793 OP_NSTRLST, OP_NILO, OP_RNDQ_I0, OP_RR_RNSC, OP_RNDQ_RNSC, OP_RND_RNSC,
794 OP_VMOV, OP_RNDQ_IMVNb, OP_RNDQ_I63b, OP_I0, OP_I16z, OP_I32z, OP_I64,
795 OP_I64z, OP_oI32b, OP_oRND, OP_oRNQ, OP_oRNDQ.
796 (parse_operands): Handle new codes above.
797 (encode_arm_vfp_sp_reg): Rename to...
798 (encode_arm_vfp_reg): ...this. Handle D regs (0-31) too. Complain if
799 selected VFP version only supports D0-D15.
800 (do_vfp_sp_monadic, do_vfp_sp_dyadic, do_vfp_sp_compare_z)
801 (do_vfp_dp_sp_cvt, do_vfp_reg_from_sp, do_vfp_reg2_from_sp2)
802 (do_vfp_sp_from_reg, do_vfp_sp2_from_reg2, do_vfp_sp_ldst)
803 (do_vfp_dp_ldst, vfp_sp_ldstm, vfp_dp_ldstm): Update for new
804 encode_arm_vfp_reg name, and allow 32 D regs.
805 (do_vfp_dp_rd_rm, do_vfp_dp_rn_rd, do_vfp_dp_rd_rn, do_vfp_dp_rd_rn_rm)
806 (do_vfp_rm_rd_rn): New functions to encode VFP insns allowing 32 D
808 (do_vfp_sp_const, do_vfp_dp_const, vfp_conv, do_vfp_sp_conv_16)
809 (do_vfp_dp_conv_16, do_vfp_sp_conv_32, do_vfp_dp_conv_32): Handle
810 constant-load and conversion insns introduced with VFPv3.
811 (neon_tab_entry): New struct.
812 (NEON_ENC_TAB): Bit patterns for overloaded Neon instructions, and
813 those which are the targets of pseudo-instructions.
814 (neon_opc): Enumerate opcodes, use as indices into...
815 (neon_enc_tab): ...this. Hold data from NEON_ENC_TAB.
816 (NEON_ENC_INTEGER, NEON_ENC_ARMREG, NEON_ENC_POLY, NEON_ENC_FLOAT)
817 (NEON_ENC_SCALAR, NEON_ENC_IMMED, NEON_ENC_INTERLV, NEON_ENC_LANE)
818 (NEON_ENC_DUP): Define meaningful helper macros to look up values in
820 (neon_shape): Enumerate shapes (permitted register widths, etc.) for
822 (neon_type_mask): New. Compact type representation for type checking.
823 (N_SU_ALL, N_SU_32, N_SU_16_64, N_SUF_32, N_I_ALL, N_IF_32): Common
824 permitted type combinations.
825 (N_IGNORE_TYPE): New macro.
826 (neon_check_shape): New function. Check an instruction shape for
827 multiple alternatives. Return the specific shape for the current
829 (neon_modify_type_size): New function. Modify a vector type and size,
830 depending on the bit mask in argument 1.
831 (neon_type_promote): New function. Convert a given "key" type (of an
832 operand) into the correct type for a different operand, based on a bit
834 (type_chk_of_el_type): New function. Convert a type and size into the
835 compact representation used for type checking.
836 (el_type_of_type_ckh): New function. Reverse of above (only when a
837 single bit is set in the bit mask).
838 (modify_types_allowed): New function. Alter a mask of allowed types
839 based on a bit mask of modifications.
840 (neon_check_type): New function. Check the type of the current
841 instruction against the variable argument list. The "key" type of the
842 instruction is returned.
843 (neon_dp_fixup): New function. Fill in and modify instruction bits for
844 a Neon data-processing instruction depending on whether we're in ARM
845 mode or Thumb-2 mode.
846 (neon_logbits): New function.
847 (neon_three_same, neon_two_same, do_neon_dyadic_i_su)
848 (do_neon_dyadic_i64_su, neon_imm_shift, do_neon_shl_imm)
849 (do_neon_qshl_imm, neon_cmode_for_logic_imm, neon_bits_same_in_bytes)
850 (neon_squash_bits, neon_is_quarter_float, neon_qfloat_bits)
851 (neon_cmode_for_move_imm, neon_write_immbits, neon_invert_size)
852 (do_neon_logic, do_neon_bitfield, neon_dyadic, do_neon_dyadic_if_su)
853 (do_neon_dyadic_if_su_d, do_neon_dyadic_if_i, do_neon_dyadic_if_i_d)
854 (do_neon_addsub_if_i, neon_exchange_operands, neon_compare)
855 (do_neon_cmp, do_neon_cmp_inv, do_neon_ceq, neon_scalar_for_mul)
856 (neon_mul_mac, do_neon_mac_maybe_scalar, do_neon_tst, do_neon_mul)
857 (do_neon_qdmulh, do_neon_fcmp_absolute, do_neon_fcmp_absolute_inv)
858 (do_neon_step, do_neon_abs_neg, do_neon_sli, do_neon_sri)
859 (do_neon_qshlu_imm, do_neon_qmovn, do_neon_qmovun)
860 (do_neon_rshift_sat_narrow, do_neon_rshift_sat_narrow_u, do_neon_movn)
861 (do_neon_rshift_narrow, do_neon_shll, neon_cvt_flavour, do_neon_cvt)
862 (neon_move_immediate, do_neon_mvn, neon_mixed_length)
863 (do_neon_dyadic_long, do_neon_abal, neon_mac_reg_scalar_long)
864 (do_neon_mac_maybe_scalar_long, do_neon_dyadic_wide, do_neon_vmull)
865 (do_neon_ext, do_neon_rev, do_neon_dup, do_neon_mov)
866 (do_neon_rshift_round_imm, do_neon_movl, do_neon_trn, do_neon_zip_uzp)
867 (do_neon_sat_abs_neg, do_neon_pair_long, do_neon_recip_est)
868 (do_neon_cls, do_neon_clz, do_neon_cnt, do_neon_swp, do_neon_tbl_tbx)
869 (do_neon_ldm_stm, do_neon_ldr_str, do_neon_ld_st_interleave)
870 (neon_alignment_bit, do_neon_ld_st_lane, do_neon_ld_dup)
871 (do_neon_ldx_stx): New functions. Neon bit encoding and encoding
873 (parse_neon_type): New function. Parse Neon type specifier.
874 (opcode_lookup): Allow parsing of Neon type specifiers.
875 (REGNUM2, REGSETH, REGSET2): New macros.
876 (reg_names): Add new VFPv3 and Neon registers.
877 (NUF, nUF, NCE, nCE): New macros for opcode table.
878 (insns): More VFP registers allowed in fcpyd, fmdhr, fmdlr, fmrdh,
879 fmrdl, fabsd, fnegd, fsqrtd, faddd, fsubd, fmuld, fdivd, fmacd, fmscd,
880 fnmuld, fnmacd, fnmscd, fcmpd, fcmpzd, fcmped, fcmpezd, fmdrr, fmrrd.
881 Add Neon instructions vaba, vhadd, vrhadd, vhsub, vqadd, vqsub, vrshl,
882 vqrshl, vshl, vqshl{u}, vand, vbic, vorr, vorn, veor, vbsl, vbit, vbif,
883 vabd, vmax, vmin, vcge, vcgt, vclt, vcle, vceq, vpmax, vpmin, vmla,
884 vmls, vpadd, vadd, vsub, vtst, vmul, vqdmulh, vqrdmulh, vacge, vacgt,
885 vaclt, vacle, vrecps, vrsqrts, vabs, vneg, v{r}shr, v{r}sra, vsli,
886 vsri, vqshrn, vq{r}shr{u}n, v{r}shrn, vshll, vcvt, vmov, vmvn, vabal,
887 vabdl, vaddl, vsubl, vmlal, vmlsl, vaddw, vsubw, v{r}addhn, v{r}subhn,
888 vqdmlal, vqdmlsl, vqdmull, vmull, vext, vrev64, vrev32, vrev16, vdup,
889 vmovl, v{q}movn, vzip, vuzp, vqabs, vqneg, vpadal, vpaddl, vrecpe,
890 vrsqrte, vcls, vclz, vcnt, vswp, vtrn, vtbl, vtbx, vldm, vstm, vldr,
891 vstr, vld[1234], vst[1234], fconst[sd], f[us][lh]to[sd],
893 (tc_arm_regname_to_dw2regnum): Update for arm_reg_parse args.
894 (arm_cpu_option_table): Add Neon and VFPv3 to Cortex-A8.
895 (arm_option_cpu_value): Add vfp3 and neon.
896 (aeabi_set_public_attributes): Support VFPv3 and NEON attributes. Fix
899 2006-04-25 Bob Wilson <bob.wilson@acm.org>
901 * config/xtensa-relax.c (widen_spec_list): Use new "WIDE.<opcode>"
902 syntax instead of hardcoded opcodes with ".w18" suffixes.
903 (wide_branch_opcode): New.
904 (build_transition): Use it to check for wide branch opcodes with
905 either ".w18" or ".w15" suffixes.
907 2006-04-25 Bob Wilson <bob.wilson@acm.org>
909 * config/tc-xtensa.c (xtensa_create_literal_symbol,
910 xg_assemble_literal, xg_assemble_literal_space): Do not set the
911 frag's is_literal flag.
913 2006-04-25 Bob Wilson <bob.wilson@acm.org>
915 * config/xtensa-relax.c (XCHAL_HAVE_WIDE_BRANCHES): Provide default.
917 2006-04-23 Kazu Hirata <kazu@codesourcery.com>
919 * config/obj-coff.c, config/tc-arm.c, config/tc-bfin.c,
920 config/tc-cris.c, config/tc-crx.c, config/tc-i386.c,
921 config/tc-ia64.c, config/tc-maxq.c, config/tc-maxq.h,
922 config/tc-mips.c, config/tc-msp430.c, config/tc-sh.c,
923 config/tc-tic4x.c, config/tc-xtensa.c: Fix comment typos.
925 2005-04-20 Paul Brook <paul@codesourcery.com>
927 * config/tc-arm.c (s_arm_arch, s_arm_cpu, s_arm_fpu): Enable for
929 (md_pseudo_table): Enable .arch, .cpu and .fpu for all targets.
931 2006-04-19 Alan Modra <amodra@bigpond.net.au>
933 * Makefile.am (CPU_TYPES): Add maxq and mt. Sort.
934 (CPU_OBJ_VALID): Change sense of COFF test to default to invalid.
935 Make some cpus unsupported on ELF. Run "make dep-am".
936 * Makefile.in: Regenerate.
938 2006-04-19 Alan Modra <amodra@bigpond.net.au>
940 * configure.in (--enable-targets): Indent help message.
941 * configure: Regenerate.
943 2006-04-18 H.J. Lu <hongjiu.lu@intel.com>
946 * config/tc-i386.c (i386_immediate): Check illegal immediate
949 2006-04-18 Alan Modra <amodra@bigpond.net.au>
951 * config/tc-i386.c: Formatting.
952 (output_disp, output_imm): ISO C90 params.
954 * frags.c (frag_offset_fixed_p): Constify args.
955 * frags.h (frag_offset_fixed_p): Ditto.
957 * config/tc-dlx.h (tc_coff_symbol_emit_hook): Delete.
958 (COFF_MAGIC): Delete.
960 * config/tc-xc16x.h (TC_LINKRELAX_FIXUP): Delete.
962 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
964 * po/POTFILES.in: Regenerated.
966 2006-04-16 Mark Mitchell <mark@codesourcery.com>
968 * doc/as.texinfo: Mention that some .type syntaxes are not
969 supported on all architectures.
971 2006-04-14 Sterling Augustine <sterling@tensilica.com>
973 * config/tc-xtensa.c (emit_single_op): Do not relax MOVI
974 instructions when such transformations have been disabled.
976 2006-04-10 Sterling Augustine <sterling@tensilica.com>
978 * config/tc-xtensa.c (xg_assemble_vliw_tokens): Record loop target
979 symbols in RELAX[_CHECK]_ALIGN_NEXT_OPCODE frags.
980 (xtensa_fix_close_loop_end_frags): Use the recorded values instead of
981 decoding the loop instructions. Remove current_offset variable.
982 (xtensa_fix_short_loop_frags): Likewise.
983 (min_bytes_to_other_loop_end): Remove current_offset argument.
985 2006-04-09 Arnold Metselaar <arnold.metselaar@planet.nl>
987 * config/tc-z80.c (z80_optimize_expr): Removed.
988 * config/tc-z80.h (z80_optimize_expr, md_optimize_expr): Removed.
990 2006-04-07 Joerg Wunsch <j.gnu@uriah.heep.sax.de>
992 * gas/config/tc-avr.c (mcu_types): Add support for attiny261,
993 attiny461, attiny861, attiny25, attiny45, attiny85,attiny24,
994 attiny44, attiny84, at90pwm2, at90pwm3, atmega164, atmega324,
995 atmega644, atmega329, atmega3290, atmega649, atmega6490,
996 atmega406, atmega640, atmega1280, atmega1281, at90can32,
997 at90can64, at90usb646, at90usb647, at90usb1286 and
999 Move atmega48 and atmega88 from AVR_ISA_M8 to AVR_ISA_PWMx.
1001 2006-04-07 Paul Brook <paul@codesourcery.com>
1003 * config/tc-arm.c (parse_operands): Set default error message.
1005 2006-04-07 Paul Brook <paul@codesourcery.com>
1007 * config/tc-arm.c (parse_tb): Set inst.error before returning FAIL.
1009 2006-04-07 Paul Brook <paul@codesourcery.com>
1011 * config/tc-arm.c (md_apply_fix): Set H bit on blx instruction.
1013 2006-04-07 Paul Brook <paul@codesourcery.com>
1015 * config/tc-arm.c (THUMB2_LOAD_BIT): Define.
1016 (move_or_literal_pool): Handle Thumb-2 instructions.
1017 (do_t_ldst): Call move_or_literal_pool for =N addressing modes.
1019 2006-04-07 Alan Modra <amodra@bigpond.net.au>
1022 * config/tc-i386.c (match_template): Move 64-bit operand tests
1025 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
1027 * po/Make-in: Add install-html target.
1028 * Makefile.am: Add install-html and install-html-recursive targets.
1029 * Makefile.in: Regenerate.
1030 * configure.in: AC_SUBST datarootdir, docdir, htmldir.
1031 * configure: Regenerate.
1032 * doc/Makefile.am: Add install-html and install-html-am targets.
1033 * doc/Makefile.in: Regenerate.
1035 2006-04-06 Alan Modra <amodra@bigpond.net.au>
1037 * frags.c (frag_offset_fixed_p): Reinitialise offset before
1040 2006-04-05 Richard Sandiford <richard@codesourcery.com>
1041 Daniel Jacobowitz <dan@codesourcery.com>
1043 * config/tc-sparc.c (sparc_target_format): Handle TE_VXWORKS.
1044 (GOTT_BASE, GOTT_INDEX): New.
1045 (tc_gen_reloc): Don't alter relocations against GOTT_BASE and
1046 GOTT_INDEX when generating VxWorks PIC.
1047 * configure.tgt (sparc*-*-vxworks*): Remove this special case;
1048 use the generic *-*-vxworks* stanza instead.
1050 2006-04-04 Alan Modra <amodra@bigpond.net.au>
1053 * frags.c (frag_offset_fixed_p): New function.
1054 * frags.h (frag_offset_fixed_p): Declare.
1055 * expr.c (expr): Use frag_offset_fixed_p when simplifying subtraction.
1056 (resolve_expression): Likewise.
1058 2006-04-03 Sterling Augustine <sterling@tensilica.com>
1060 * config/tc-xtensa.c (init_op_placement_info_table): Check for formats
1061 of the same length but different numbers of slots.
1063 2006-03-30 Andreas Schwab <schwab@suse.de>
1065 * configure.in: Fix help string for --enable-targets option.
1066 * configure: Regenerate.
1068 2006-03-28 Nathan Sidwell <nathan@codesourcery.com>
1070 * gas/config/tc-m68k.c (find_cf_chip): Merge into ...
1071 (m68k_ip): ... here. Use for all chips. Protect against buffer
1072 overrun and avoid excessive copying.
1074 * config/tc-m68k.c (m68000_control_regs, m68010_control_regs,
1075 m68020_control_regs, m68040_control_regs, m68060_control_regs,
1076 mcf_control_regs, mcf5208_control_regs, mcf5213_control_regs,
1077 mcf5329_control_regs, mcf5249_control_regs, mcf528x_control_regs,
1078 mcfv4e_control_regs, m68010_control_regs): Rename and reorder to ...
1079 (m68000_ctrl, m68010_ctrl, m68020_ctrl, m68040_ctrl, m68060_ctrl,
1080 mcf_ctrl, mcf5208_ctrl, mcf5213_ctrl, mcf5235_ctrl, mcf5249_ctrl,
1081 mcf5216_ctrl, mcf5250_ctrl, mcf5271_ctrl, mcf5272_ctrl,
1082 mcf5282_ctrl, mcfv4e_ctrl): ... these.
1083 (mcf5275_ctrl, mcf5329_ctrl, mcf5373_ctrl): New.
1084 (struct m68k_cpu): Change chip field to control_regs.
1085 (current_chip): Remove.
1086 (control_regs): New.
1087 (m68k_archs, m68k_extensions): Adjust.
1088 (m68k_cpus): Reorder to be in cpu number order. Adjust.
1089 (CPU_ALLOW_MC, CPU_ALLOW_NEGATION): Remove.
1090 (find_cf_chip): Reimplement for new organization of cpu table.
1091 (select_control_regs): Remove.
1093 (struct save_opts): Save control regs, not chip.
1094 (s_save, s_restore): Adjust.
1095 (m68k_lookup_cpu): Give deprecated warning when necessary.
1096 (m68k_init_arch): Adjust.
1097 (md_show_usage): Adjust for new cpu table organization.
1099 2006-03-25 Bernd Schmidt <bernd.schmidt@analog.com>
1101 * config/bfin-defs.h (Expr_Node_Type enum): Add Expr_Node_GOT_Reloc.
1102 * config/bfin-lex.l: Recognize GOT17M4 and FUNCDESC_GOT17M4.
1103 * config/bfin-parse.y: Include "libbfd.h", "elf/common.h" and
1105 (GOT17M4, FUNCDESC_GOT17M4): New tokens of type <value>.
1106 (any_gotrel): New rule.
1107 (got): Use it, and create Expr_Node_GOT_Reloc nodes.
1108 * config/tc-bfin.c: Include "libbfd.h", "elf/common.h" and
1110 (DEFAULT_FLAGS, bfin_flags, bfin_pic_flag): New.
1111 (bfin_pic_ptr): New function.
1112 (md_pseudo_table): Add it for ".picptr".
1113 (OPTION_FDPIC): New macro.
1114 (md_longopts): Add -mfdpic.
1115 (md_parse_option): Handle it.
1116 (md_begin): Set BFD flags.
1117 (md_apply_fix3, bfin_fix_adjustable): Handle new relocs.
1118 (bfin_gen_ldstidxi): Adjust to match the trees that the parser gives
1120 * Makefile.am (bfin-parse.o): Update dependencies.
1121 (DEPTC_bfin_elf): Likewise.
1122 * Makefile.in: Regenerate.
1124 2006-03-25 Richard Sandiford <richard@codesourcery.com>
1126 * config/tc-m68k.c (m68k_cpus): Change cpu_cf5208 entries to use
1127 mcfemac instead of mcfmac.
1129 2006-03-23 Michael Matz <matz@suse.de>
1131 * config/tc-i386.c (type_names): Correct placement of 'static'.
1132 (reloc): Map some more relocs to their 64 bit counterpart when
1134 (output_insn): Work around breakage if DEBUG386 is defined.
1135 (output_disp): A BFD_RELOC_64 with GOT_symbol as operand also
1136 needs to be mapped to BFD_RELOC_X86_64_GOTPC64 or
1137 BFD_RELOC_X86_64_GOTPC32. Also x86-64 handles pcrel addressing
1138 different from i386.
1139 (output_imm): Ditto.
1140 (lex_got): Recognize @PLTOFF and @GOTPLT. Make @GOT accept also
1142 (md_convert_frag): Jumps can now be larger than 2GB away, error
1144 (tc_gen_reloc): New relocs are passed through. BFD_RELOC_64
1145 and BFD_RELOC_64_PCREL are mapped to BFD_RELOC_X86_64_GOTPC64.
1147 2006-03-22 Richard Sandiford <richard@codesourcery.com>
1148 Daniel Jacobowitz <dan@codesourcery.com>
1149 Phil Edwards <phil@codesourcery.com>
1150 Zack Weinberg <zack@codesourcery.com>
1151 Mark Mitchell <mark@codesourcery.com>
1152 Nathan Sidwell <nathan@codesourcery.com>
1154 * config/tc-mips.c (mips_target_format): Handle vxworks targets.
1155 (md_begin): Complain about -G being used for PIC. Don't change
1156 the text, data and bss alignments on VxWorks.
1157 (reloc_needs_lo_p): Don't return true for R_MIPS_GOT16 when
1158 generating VxWorks PIC.
1159 (load_address): Extend SVR4_PIC handling to VXWORKS_PIC.
1160 (macro): Likewise, but do not treat la $25 specially for
1161 VxWorks PIC, and do not handle jal.
1162 (OPTION_MVXWORKS_PIC): New macro.
1163 (md_longopts): Add -mvxworks-pic.
1164 (md_parse_option): Don't complain about using PIC and -G together here.
1165 Handle OPTION_MVXWORKS_PIC.
1166 (md_estimate_size_before_relax): Always use the first relaxation
1167 sequence on VxWorks.
1168 * config/tc-mips.h (VXWORKS_PIC): New.
1170 2006-03-21 Paul Brook <paul@codesourcery.com>
1172 * config/tc-arm.c (md_apply_fix): Fix typo in offset mask.
1174 2006-03-21 Sterling Augustine <sterling@tensilica.com>
1176 * config/tc-xtensa.c (enforce_three_byte_loop_align): New flag.
1177 (xtensa_setup_hw_workarounds): Set this new flag for older hardware.
1178 (get_loop_align_size): New.
1179 (xtensa_end): Skip xtensa_mark_narrow_branches when not aligning.
1180 (xtensa_mark_zcl_first_insns): Prevent widening of first loop frag.
1181 (get_text_align_power): Rewrite to handle inputs in the range 2-8.
1182 (get_noop_aligned_address): Use get_loop_align_size.
1183 (get_aligned_diff): Likewise.
1185 2006-03-21 Paul Brook <paul@codesourcery.com>
1187 * config/tc-arm.c (insns): Correct opcodes for ldrbt and strbt.
1189 2006-03-20 Paul Brook <paul@codesourcery.com>
1191 * config/tc-arm.c (BAD_BRANCH, BAD_NOT_IT): Define.
1192 (do_t_branch): Encode branches inside IT blocks as unconditional.
1193 (do_t_cps): New function.
1194 (do_t_blx, do_t_bkpt, do_t_branch23, do_t_bx, do_t_bxj, do_t_cpsi,
1195 do_t_czb, do_t_it, do_t_setend, do_t_tb): Add IT constaints.
1196 (opcode_lookup): Allow conditional suffixes on all instructions in
1198 (md_assemble): Advance condexec state before checking for errors.
1199 (insns): Use do_t_cps.
1201 2006-03-20 Paul Brook <paul@codesourcery.com>
1203 * config/tc-arm.c (output_relax_insn): Call dwarf2_emit_insn before
1204 outputting the insn.
1206 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1208 * config/tc-vax.c: Update copyright year.
1209 * config/tc-vax.h: Likewise.
1211 2006-03-18 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1213 * config/tc-vax.c (md_chars_to_number): Used only locally, so
1215 * config/tc-vax.h (md_chars_to_number): Remove obsolete declaration.
1217 2006-03-17 Paul Brook <paul@codesourcery.com>
1219 * config/tc-arm.c (insns): Add ldm and stm.
1221 2006-03-17 Ben Elliston <bje@au.ibm.com>
1224 * doc/as.texinfo (Ident): Document this directive more thoroughly.
1226 2006-03-16 Paul Brook <paul@codesourcery.com>
1228 * config/tc-arm.c (insns): Add "svc".
1230 2006-03-13 Bob Wilson <bob.wilson@acm.org>
1232 * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar
1233 flag and avoid double underscore prefixes.
1235 2006-03-10 Paul Brook <paul@codesourcery.com>
1237 * config/tc-arm.c (md_begin): Handle EABIv5.
1238 (arm_eabis): Add EF_ARM_EABI_VER5.
1239 * doc/c-arm.texi: Document -meabi=5.
1241 2006-03-10 Ben Elliston <bje@au.ibm.com>
1243 * app.c (do_scrub_chars): Simplify string handling.
1245 2006-03-07 Richard Sandiford <richard@codesourcery.com>
1246 Daniel Jacobowitz <dan@codesourcery.com>
1247 Zack Weinberg <zack@codesourcery.com>
1248 Nathan Sidwell <nathan@codesourcery.com>
1249 Paul Brook <paul@codesourcery.com>
1250 Ricardo Anguiano <anguiano@codesourcery.com>
1251 Phil Edwards <phil@codesourcery.com>
1253 * config/tc-arm.c (md_apply_fix): Install a value of zero into a
1254 BFD_RELOC_ARM_OFFSET_IMM field if we're going to generate a RELA
1256 (tc_gen_reloc): Keep the original fx_offset for RELA pc-relative
1257 relocs, but adjust by md_pcrel_from_section. Create R_ARM_ABS12
1258 relocations for BFD_RELOC_ARM_OFFSET_IMM on RELA targets.
1260 2006-03-06 Bob Wilson <bob.wilson@acm.org>
1262 * config/tc-xtensa.c (xtensa_post_relax_hook): Generate literal tables
1263 even when using the text-section-literals option.
1265 2006-03-06 Nathan Sidwell <nathan@codesourcery.com>
1267 * config/tc-m68k.c (m68k_extensions): Allow 'float' on both m68k
1269 (m68k_ip): <case 'J'> Check we have some control regs.
1270 (md_parse_option): Allow raw arch switch.
1271 (m68k_init_arch): Better detection of arch/cpu mismatch. Detect
1272 whether 68881 or cfloat was meant by -mfloat.
1273 (md_show_usage): Adjust extension display.
1274 (m68k_elf_final_processing): Adjust.
1276 2006-03-03 Bjoern Haase <bjoern.m.haase@web.de>
1278 * config/tc-avr.c (avr_mod_hash_value): New function.
1279 (md_apply_fix, exp_mod): Use BFD_RELOC_HH8_LDI and
1280 BFD_RELOC_MS8_LDI for hlo8() and hhi8()
1281 (md_begin): Set linkrelax variable to 1, use avr_mod_hash_value
1282 instead of int avr_ldi_expression: use avr_mod_hash_value instead
1284 (tc_gen_reloc): Handle substractions of symbols, if possible do
1285 fixups, abort otherwise.
1286 * config/tc-avr.h (TC_LINKRELAX_FIXUP, TC_VALIDATE_FIX,
1287 tc_fix_adjustable): Define.
1289 2006-03-02 James E Wilson <wilson@specifix.com>
1291 * config/tc-ia64.c (emit_one_bundle): For IA64_OPCODE_LAST, if we
1292 change the template, then clear md.slot[curr].end_of_insn_group.
1294 2006-02-28 Jan Beulich <jbeulich@novell.com>
1296 * macro.c (get_any_string): Don't insert quotes for <>-quoted input.
1298 2006-02-28 Jan Beulich <jbeulich@novell.com>
1301 * macro.c (getstring): Don't treat parentheses special anymore.
1302 (get_any_string): Don't consider '(' and ')' as quoting anymore.
1303 Special-case '(', ')', '[', and ']' when dealing with non-quoting
1306 2006-02-28 Mat <mat@csail.mit.edu>
1308 * dwarf2dbg.c (get_filenum): Don't inadvertently decrease files_in_use.
1310 2006-02-27 Jakub Jelinek <jakub@redhat.com>
1312 * dw2gencfi.c (struct fde_entry, struct cie_entry): Add signal_frame
1314 (CFI_signal_frame): Define.
1315 (cfi_pseudo_table): Add .cfi_signal_frame.
1316 (dot_cfi): Handle CFI_signal_frame.
1317 (output_cie): Handle cie->signal_frame.
1318 (select_cie_for_fde): Don't share CIE if signal_frame flag is
1319 different. Copy signal_frame from FDE to newly created CIE.
1320 * doc/as.texinfo: Document .cfi_signal_frame.
1322 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
1324 * doc/Makefile.am: Add html target.
1325 * doc/Makefile.in: Regenerate.
1326 * po/Make-in: Add html target.
1328 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
1330 * config/tc-i386.c (output_insn): Support Intel Merom New
1333 * config/tc-i386.h (CpuMNI): New.
1334 (CpuUnknownFlags): Add CpuMNI.
1336 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
1338 * config/tc-sparc.c (priv_reg_table): Add entry for "gl".
1339 (hpriv_reg_table): New table for hyperprivileged registers.
1340 (sparc_ip): New cases '$' and '%' for wrhpr/rdhpr hyperprivileged
1343 2006-02-24 DJ Delorie <dj@redhat.com>
1345 * config/tc-m32c.h (md_apply_fix): Define to m32c_apply_fix.
1346 (tc_gen_reloc): Don't define.
1347 * config/tc-m32c.c (rl_for, relaxable): New convenience macros.
1348 (OPTION_LINKRELAX): New.
1349 (md_longopts): Add it.
1351 (md_parse_options): Set it.
1352 (md_assemble): Emit relaxation relocs as needed.
1353 (md_convert_frag): Emit relaxation relocs as needed.
1354 (md_cgen_lookup_reloc): Add LAB_8_8 and LAB_8_16.
1355 (m32c_apply_fix): New.
1356 (tc_gen_reloc): New.
1357 (m32c_force_relocation): Force out jump relocs when relaxing.
1358 (m32c_fix_adjustable): Return false if relaxing.
1360 2006-02-24 Paul Brook <paul@codesourcery.com>
1362 * config/arm/tc-arm.c (arm_ext_v6_notm, arm_ext_div, arm_ext_v7,
1363 arm_ext_v7a, arm_ext_v7r, arm_ext_v7m): New variables.
1364 (struct asm_barrier_opt): Define.
1365 (arm_v7m_psr_hsh, arm_barrier_opt_hsh): New variables.
1366 (parse_psr): Accept V7M psr names.
1367 (parse_barrier): New function.
1368 (enum operand_parse_code): Add OP_oBARRIER.
1369 (parse_operands): Implement OP_oBARRIER.
1370 (do_barrier): New function.
1371 (do_dbg, do_pli, do_t_barrier, do_t_dbg, do_t_div): New functions.
1372 (do_t_cpsi): Add V7M restrictions.
1373 (do_t_mrs, do_t_msr): Validate V7M variants.
1374 (md_assemble): Check for NULL variants.
1375 (v7m_psrs, barrier_opt_names): New tables.
1376 (insns): Add V7 instructions. Mark V6 instructions absent from V7M.
1377 (md_begin): Initialize arm_v7m_psr_hsh and arm_barrier_opt_hsh.
1378 (arm_cpu_option_table): Add Cortex-M3, R4 and A8.
1379 (arm_arch_option_table): Add armv7, armv7a, armv7r and armv7m.
1380 (struct cpu_arch_ver_table): Define.
1381 (cpu_arch_ver): New.
1382 (aeabi_set_public_attributes): Use cpu_arch_ver. Set
1383 Tag_CPU_arch_profile.
1384 * doc/c-arm.texi: Document new cpu and arch options.
1386 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1388 * config/tc-ia64.c (operand_match): Handle IA64_OPND_IMMU5b.
1390 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
1392 * config/tc-ia64.c: Update copyright years.
1394 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
1396 * config/tc-ia64.c (specify_resource): Add the rule 17 from
1399 2005-02-22 Paul Brook <paul@codesourcery.com>
1401 * config/tc-arm.c (do_pld): Remove incorrect write to
1403 (encode_thumb32_addr_mode): Use correct operand.
1405 2006-02-21 Paul Brook <paul@codesourcery.com>
1407 * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.
1409 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
1410 Anil Paranjape <anilp1@kpitcummins.com>
1411 Shilin Shakti <shilins@kpitcummins.com>
1413 * Makefile.am: Add xc16x related entry.
1414 * Makefile.in: Regenerate.
1415 * configure.in: Added xc16x related entry.
1416 * configure: Regenerate.
1417 * config/tc-xc16x.h: New file
1418 * config/tc-xc16x.c: New file
1419 * doc/c-xc16x.texi: New file for xc16x
1420 * doc/all.texi: Entry for xc16x
1421 * doc/Makefile.texi: Added c-xc16x.texi
1422 * NEWS: Announce the support for the new target.
1424 2006-02-16 Nick Hudson <nick.hudson@dsl.pipex.com>
1426 * configure.tgt: set emulation for mips-*-netbsd*
1428 2006-02-14 Jakub Jelinek <jakub@redhat.com>
1430 * config.in: Rebuilt.
1432 2006-02-13 Bob Wilson <bob.wilson@acm.org>
1434 * config/tc-xtensa.c (xg_add_opcode_fix): Number operands starting
1435 from 1, not 0, in error messages.
1436 (md_assemble): Simplify special-case check for ENTRY instructions.
1437 (tinsn_has_invalid_symbolic_operands): Do not include opcode and
1438 operand in error message.
1440 2006-02-13 Joseph S. Myers <joseph@codesourcery.com>
1442 * configure.tgt (arm-*-linux-gnueabi*): Change to
1445 2006-02-10 Nick Clifton <nickc@redhat.com>
1447 * config/tc-crx.c (check_range): Ensure that the sign bit of a
1448 32-bit value is propagated into the upper bits of a 64-bit long.
1450 * config/tc-arc.c (init_opcode_tables): Fix cast.
1451 (arc_extoper, md_operand): Likewise.
1453 2006-02-09 David Heine <dlheine@tensilica.com>
1455 * config/tc-xtensa.c (xg_assembly_relax): Increment steps_taken for
1456 each relaxation step.
1458 2006-02-09 Eric Botcazou <ebotcazou@libertysurf.fr>
1460 * configure.in (CHECK_DECLS): Add vsnprintf.
1461 * configure: Regenerate.
1462 * messages.c (errno.h, stdarg.h, varargs.h, va_list): Do not
1463 include/declare here, but...
1464 * as.h: Move code detecting VARARGS idiom to the top.
1465 (errno.h, stdarg.h, varargs.h, va_list): ...here.
1466 (vsnprintf): Declare if not already declared.
1468 2006-02-08 H.J. Lu <hongjiu.lu@intel.com>
1470 * as.c (close_output_file): New.
1471 (main): Register close_output_file with xatexit before
1472 dump_statistics. Don't call output_file_close.
1474 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
1476 * config/tc-m68k.c (mcf5208_control_regs, mcf5213_control_regs,
1477 mcf5329_control_regs): New.
1478 (not_current_architecture, selected_arch, selected_cpu): New.
1479 (m68k_archs, m68k_extensions): New.
1480 (archs): Renamed to ...
1481 (m68k_cpus): ... here. Adjust.
1483 (md_pseudo_table): Add arch and cpu directives.
1484 (find_cf_chip, m68k_ip): Adjust table scanning.
1485 (no_68851, no_68881): Remove.
1486 (md_assemble): Lazily initialize.
1487 (select_control_regs): Adjust cpu names. Add 5208, 5213, 5329.
1488 (md_init_after_args): Move functionality to m68k_init_arch.
1489 (mri_chip): Adjust table scanning.
1490 (md_parse_option): Reimplement 'm' processing to add -march & -mcpu
1491 options with saner parsing.
1492 (m68k_lookup_cpu, m68k_set_arch, m68k_set_cpu, m68k_set_extension,
1493 m68k_init_arch): New.
1494 (s_m68k_cpu, s_m68k_arch): New.
1495 (md_show_usage): Adjust.
1496 (m68k_elf_final_processing): Set CF EF flags.
1497 * config/tc-m68k.h (m68k_init_after_args): Remove.
1498 (tc_init_after_args): Remove.
1499 * doc/c-m68k.texi (M68K-Opts): Document -march, -mcpu options.
1500 (M68k-Directives): Document .arch and .cpu directives.
1502 2006-02-05 Arnold Metselaar <arnold.metselaar@planet.nl>
1504 * config/tc-z80.c (z80_start_line_hook): allow .equ and .defl as
1505 synonyms for equ and defl.
1506 (z80_cons_fix_new): New function.
1507 (emit_byte): Disallow relative jumps to absolute locations.
1508 (emit_data): Only handle defb, prototype changed, because defb is
1509 now handled as pseudo-op rather than an instruction.
1510 (instab): Entries for defb,defw,db,dw moved from here...
1511 (md_pseudo_table): ... to here, use generic cons() for defw,dw.
1512 Add entries for def24,def32,d24,d32.
1513 (md_assemble): Improved error handling.
1514 (md_apply_fix): New case BFD_RELOC_24, set fixP->fx_no_overflow to one.
1515 * config/tc-z80.h (TC_CONS_FIX_NEW): Define.
1516 (z80_cons_fix_new): Declare.
1517 * doc/c-z80.texi (defb, db): Mention warning on overflow.
1518 (def24,d24,def32,d32): New pseudo-ops.
1520 2006-02-02 Paul Brook <paul@codesourcery.com>
1522 * config/tc-arm.c (do_shift): Remove Thumb-1 constraint.
1524 2005-02-02 Paul Brook <paul@codesourcery.com>
1526 * config/tc-arm.c (T2_OPCODE_MASK, T2_DATA_OP_SHIFT, T2_OPCODE_AND,
1527 T2_OPCODE_BIC, T2_OPCODE_ORR, T2_OPCODE_ORN, T2_OPCODE_EOR,
1528 T2_OPCODE_ADD, T2_OPCODE_ADC, T2_OPCODE_SBC, T2_OPCODE_SUB,
1529 T2_OPCODE_RSB): Define.
1530 (thumb32_negate_data_op): New function.
1531 (md_apply_fix): Use it.
1533 2006-01-31 Bob Wilson <bob.wilson@acm.org>
1535 * config/xtensa-istack.h (TInsn): Remove record_fix and sub_symbol
1537 * config/tc-xtensa.h (xtensa_frag_type): Remove slot_sub_symbols field.
1538 * config/tc-xtensa.c (md_apply_fix): Check for unexpected uses of
1540 (relaxation_requirements): Add pfinish_frag argument and use it to
1541 replace setting tinsn->record_fix fields.
1542 (xg_assemble_vliw_tokens): Adjust calls to relaxation_requirements
1543 and vinsn_to_insnbuf. Remove references to record_fix and
1544 slot_sub_symbols fields.
1545 (xtensa_mark_narrow_branches): Delete unused code.
1546 (is_narrow_branch_guaranteed_in_range): Handle expr that is not just
1548 (convert_frag_immed): Adjust vinsn_to_insnbuf call and do not set
1550 (tinsn_immed_from_frag): Remove code for handling slot_sub_symbols.
1551 (vinsn_to_insnbuf): Change use of record_fixup argument, replacing use
1552 of the record_fix field. Simplify error messages for unexpected
1554 (set_expr_symbol_offset_diff): Delete.
1556 2006-01-31 Paul Brook <paul@codesourcery.com>
1558 * config/tc-arm.c (arm_reg_parse): Check if reg is non-NULL.
1560 2006-01-31 Paul Brook <paul@codesourcery.com>
1561 Richard Earnshaw <rearnsha@arm.com>
1563 * config/tc-arm.c: Use arm_feature_set.
1564 (arm_ext_*, arm_arch_full, arm_arch_t2, arm_arch_none,
1565 arm_cext_iwmmxt, arm_cext_xscale, arm_cext_maverick, fpu_fpa_ext_v1,
1566 fpu_fpa_ext_v2, fpu_vfp_ext_v1xd, fpu_vfp_ext_v1, fpu_vfp_ext_v2):
1569 (md_atof, opcode_select, opcode_select, md_assemble, md_assemble,
1570 md_begin, arm_parse_extension, arm_parse_cpu, arm_parse_arch,
1571 arm_parse_fpu, arm_parse_float_abi, aeabi_set_public_attributes,
1572 s_arm_cpu, s_arm_arch, s_arm_fpu): Use macros for accessing CPU
1574 (arm_legacy_option_table, arm_option_cpu_value_table): New types.
1575 (arm_opts): Move old cpu/arch options from here...
1576 (arm_legacy_opts): ... to here.
1577 (md_parse_option): Search arm_legacy_opts.
1578 (arm_cpus, arm_archs, arm_extensions, arm_fpus)
1579 (arm_float_abis, arm_eabis): Make const.
1581 2006-01-25 Bob Wilson <bob.wilson@acm.org>
1583 * config/tc-xtensa.c (md_apply_fix): Set value to zero for PLT relocs.
1585 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1587 * config/bfin-parse.y (asm_1): Check value range for 16 bit immediate
1588 in load immediate intruction.
1590 2006-01-21 Jie Zhang <jie.zhang@analog.com>
1592 * config/bfin-parse.y (value_match): Use correct conversion
1593 specifications in template string for __FILE__ and __LINE__.
1597 2006-01-18 Alexandre Oliva <aoliva@redhat.com>
1599 Introduce TLS descriptors for i386 and x86_64.
1600 * config/tc-i386.c (tc_i386_fix_adjustable): Handle
1601 BFD_RELOC_386_TLS_GOTDESC, BFD_RELOC_386_TLS_DESC_CALL,
1602 BFD_RELOC_X86_64_GOTPC32_TLSDESC, BFD_RELOC_X86_64_TLSDESC_CALL.
1603 (optimize_disp): Emit fix up for BFD_RELOC_386_TLS_DESC_CALL and
1604 BFD_RELOC_X86_64_TLSDESC_CALL immediately, and clear the
1606 (build_modrm_byte): Set up zero modrm for TLS desc calls.
1607 (lex_got): Handle @tlsdesc and @tlscall.
1608 (md_apply_fix, tc_gen_reloc): Handle the new relocations.
1610 2006-01-11 Nick Clifton <nickc@redhat.com>
1612 Fixes for building on 64-bit hosts:
1613 * config/tc-avr.c (mod_index): New union to allow conversion
1614 between pointers and integers.
1615 (md_begin, avr_ldi_expression): Use it.
1616 * config/tc-i370.c (md_assemble): Add cast for argument to print
1618 * config/tc-tic54x.c (subsym_substitute): Likewise.
1619 * config/tc-mn10200.c (md_assemble): Use a union to convert the
1620 opindex field of fr_cgen structure into a pointer so that it can
1621 be stored in a frag.
1622 * config/tc-mn10300.c (md_assemble): Likewise.
1623 * config/tc-frv.c (frv_debug_tomcat): Use %p to print pointer
1625 * config/tc-v850.c: Replace uses of (int) casts with correct
1628 2006-01-09 H.J. Lu <hongjiu.lu@intel.com>
1631 * symbols.c (snapshot_symbol): Don't change a defined symbol.
1633 2006-01-03 Hans-Peter Nilsson <hp@bitrange.com>
1636 * config/tc-mmix.c (mmix_handle_mmixal): Don't treat #[0-9][FB] as
1637 a local-label reference.
1639 For older changes see ChangeLog-2005
1645 version-control: never
projects / deliverable / binutils-gdb.git / blob