1 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
3 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
5 (macro): Update accordingly.
7 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
9 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
11 (md_assemble): Remove imm_reloc handling.
12 (mips_ip): Update commentary. Use offset_expr and offset_reloc
13 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
14 Use a temporary array rather than imm_reloc when parsing
15 constant expressions. Remove imm_reloc initialization.
16 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
17 for the relaxable field. Use a relax_char variable to track the
18 type of this field. Remove imm_reloc initialization.
20 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
22 * config/tc-mips.c (mips16_ip): Handle "I".
24 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
26 * config/tc-mips.c (mips_flag_nan2008): New variable.
27 (options): Add OPTION_NAN enum value.
28 (md_longopts): Handle it.
29 (md_parse_option): Likewise.
30 (s_nan): New function.
31 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
32 (md_show_usage): Add -mnan.
34 * doc/as.texinfo (Overview): Add -mnan.
35 * doc/c-mips.texi (MIPS Opts): Document -mnan.
36 (MIPS NaN Encodings): New node. Document .nan directive.
37 (MIPS-Dependent): List the new node.
39 2013-07-09 Tristan Gingold <gingold@adacore.com>
41 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
43 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
45 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
46 for 'A' and assume that the constant has been elided if the result
49 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
51 * config/tc-mips.c (gprel16_reloc_p): New function.
52 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
54 (offset_high_part, small_offset_p): New functions.
55 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
56 register load and store macros, handle the 16-bit offset case first.
57 If a 16-bit offset is not suitable for the instruction we're
58 generating, load it into the temporary register using
59 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
60 M_L_DAB code once the address has been constructed. For double load
61 and store macros, again handle the 16-bit offset case first.
62 If the second register cannot be accessed from the same high
63 part as the first, load it into AT using ADDRESS_ADDI_INSN.
64 Fix the handling of LD in cases where the first register is the
65 same as the base. Also handle the case where the offset is
66 not 16 bits and the second register cannot be accessed from the
67 same high part as the first. For unaligned loads and stores,
68 fuse the offbits == 12 and old "ab" handling. Apply this handling
69 whenever the second offset needs a different high part from the first.
70 Construct the offset using ADDRESS_ADDI_INSN where possible,
71 for offbits == 16 as well as offbits == 12. Use offset_reloc
72 when constructing the individual loads and stores.
73 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
74 and offset_reloc before matching against a particular opcode.
75 Handle elided 'A' constants. Allow 'A' constants to use
78 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
80 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
81 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
82 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
84 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
86 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
87 Require the msb to be <= 31 for "+s". Check that the size is <= 31
88 for both "+s" and "+S".
90 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
92 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
93 (mips_ip, mips16_ip): Handle "+i".
95 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
97 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
98 (micromips_to_32_reg_h_map): Rename to...
99 (micromips_to_32_reg_h_map1): ...this.
100 (micromips_to_32_reg_i_map): Rename to...
101 (micromips_to_32_reg_h_map2): ...this.
102 (mips_lookup_reg_pair): New function.
103 (gpr_write_mask, macro): Adjust after above renaming.
104 (validate_micromips_insn): Remove "mi" handling.
105 (mips_ip): Likewise. Parse both registers in a pair for "mh".
107 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
109 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
110 (mips_ip): Remove "+D" and "+T" handling.
112 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
114 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
117 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
119 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
121 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
123 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
124 (aarch64_force_relocation): Likewise.
126 2013-07-02 Alan Modra <amodra@gmail.com>
128 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
130 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
132 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
133 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
134 Replace @sc{mips16} with literal `MIPS16'.
135 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
137 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
139 * config/tc-aarch64.c (reloc_table): Replace
140 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
141 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
142 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
143 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
144 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
145 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
146 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
147 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
148 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
149 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
150 (aarch64_force_relocation): Likewise.
152 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
154 * config/tc-aarch64.c (ilp32_p): New static variable.
155 (elf64_aarch64_target_format): Return the target according to the
157 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
158 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
159 (aarch64_dwarf2_addr_size): New function.
160 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
161 (DWARF2_ADDR_SIZE): New define.
163 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
165 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
167 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
169 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
171 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
173 * config/tc-mips.c (mips_set_options): Add insn32 member.
174 (mips_opts): Initialize it.
175 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
176 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
177 (md_longopts): Add "minsn32" and "mno-insn32" options.
178 (is_size_valid): Handle insn32 mode.
179 (md_assemble): Pass instruction string down to macro.
180 (brk_fmt): Add second dimension and insn32 mode initializers.
181 (mfhl_fmt): Likewise.
182 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
183 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
184 (macro_build_jalr, move_register): Handle insn32 mode.
185 (macro_build_branch_rs): Likewise.
186 (macro): Handle insn32 mode.
187 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
188 (mips_ip): Handle insn32 mode.
189 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
190 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
191 (mips_handle_align): Handle insn32 mode.
192 (md_show_usage): Add -minsn32 and -mno-insn32.
194 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
196 (-minsn32, -mno-insn32): New options.
197 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
199 (MIPS assembly options): New node. Document .set insn32 and
201 (MIPS-Dependent): List the new node.
203 2013-06-25 Nick Clifton <nickc@redhat.com>
205 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
206 the PC in indirect addressing on 430xv2 parts.
207 (msp430_operands): Add version test to hardware bug encoding
210 2013-06-24 Roland McGrath <mcgrathr@google.com>
212 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
213 so it skips whitespace before it.
214 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
216 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
217 (arm_reg_parse_multi): Skip whitespace first.
218 (parse_reg_list): Likewise.
219 (parse_vfp_reg_list): Likewise.
220 (s_arm_unwind_save_mmxwcg): Likewise.
222 2013-06-24 Nick Clifton <nickc@redhat.com>
225 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
227 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
229 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
231 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
233 * config/tc-mips.c: Assert that offsetT and valueT are at least
235 (GPR_SMIN, GPR_SMAX): New macros.
236 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
238 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
240 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
241 conditions. Remove any code deselected by them.
242 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
244 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
246 * NEWS: Note removal of ECOFF support.
247 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
248 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
249 (MULTI_CFILES): Remove config/e-mipsecoff.c.
250 * Makefile.in: Regenerate.
251 * configure.in: Remove MIPS ECOFF references.
252 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
254 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
255 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
256 (mips-*-*): ...this single case.
257 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
258 MIPS emulations to be e-mipself*.
259 * configure: Regenerate.
260 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
261 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
262 (mips-*-sysv*): Remove coff and ecoff cases.
263 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
264 * ecoff.c: Remove reference to MIPS ECOFF.
265 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
266 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
267 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
268 (mips_hi_fixup): Tweak comment.
269 (append_insn): Require a howto.
270 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
272 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
274 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
275 Use "CPU" instead of "cpu".
276 * doc/c-mips.texi: Likewise.
277 (MIPS Opts): Rename to MIPS Options.
278 (MIPS option stack): Rename to MIPS Option Stack.
279 (MIPS ASE instruction generation overrides): Rename to
280 MIPS ASE Instruction Generation Overrides (for now).
281 (MIPS floating-point): Rename to MIPS Floating-Point.
283 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
285 * doc/c-mips.texi (MIPS Macros): New section.
286 (MIPS Object): Replace with...
287 (MIPS Small Data): ...this new section.
289 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
291 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
292 Capitalize name. Use @kindex instead of @cindex for .set entries.
294 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
296 * doc/c-mips.texi (MIPS Stabs): Remove section.
298 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
300 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
301 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
302 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
303 (ISA_SUPPORTS_VIRT64_ASE): Delete.
304 (mips_ase): New structure.
305 (mips_ases): New table.
306 (FP64_ASES): New macro.
307 (mips_ase_groups): New array.
308 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
309 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
311 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
312 (md_parse_option): Use mips_ases and mips_set_ase instead of
313 separate case statements for each ASE option.
314 (mips_after_parse_args): Use FP64_ASES. Use
315 mips_check_isa_supports_ases to check the ASEs against
317 (s_mipsset): Use mips_ases and mips_set_ase instead of
318 separate if statements for each ASE option. Use
319 mips_check_isa_supports_ases, even when a non-ASE option
322 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
324 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
326 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
328 * config/tc-mips.c (md_shortopts, options, md_longopts)
329 (md_longopts_size): Move earlier in file.
331 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
333 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
334 with a single "ase" bitmask.
335 (mips_opts): Update accordingly.
336 (file_ase, file_ase_explicit): New variables.
337 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
338 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
339 (ISA_HAS_ROR): Adjust for mips_set_options change.
340 (is_opcode_valid): Take the base ase mask directly from mips_opts.
341 (mips_ip): Adjust for mips_set_options change.
342 (md_parse_option): Likewise. Update file_ase_explicit.
343 (mips_after_parse_args): Adjust for mips_set_options change.
344 Use bitmask operations to select the default ASEs. Set file_ase
345 rather than individual per-ASE variables.
346 (s_mipsset): Adjust for mips_set_options change.
347 (mips_elf_final_processing): Test file_ase rather than
348 file_ase_mdmx. Remove commented-out code.
350 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
352 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
353 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
354 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
355 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
356 (mips_after_parse_args): Use the new "ase" field to choose
358 (mips_cpu_info_table): Move ASEs from the "flags" field to the
361 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
363 * config/tc-arm.c (symbol_preemptible): New function.
364 (relax_branch): Use it.
366 2013-06-17 Catherine Moore <clm@codesourcery.com>
367 Maciej W. Rozycki <macro@codesourcery.com>
368 Chao-Ying Fu <fu@mips.com>
370 * config/tc-mips.c (mips_set_options): Add ase_eva.
371 (mips_set_options mips_opts): Add ase_eva.
372 (file_ase_eva): Declare.
373 (ISA_SUPPORTS_EVA_ASE): Define.
374 (IS_SEXT_9BIT_NUM): Define.
375 (MIPS_CPU_ASE_EVA): Define.
376 (is_opcode_valid): Add support for ase_eva.
377 (macro_build): Likewise.
379 (validate_mips_insn): Likewise.
380 (validate_micromips_insn): Likewise.
382 (options): Add OPTION_EVA and OPTION_NO_EVA.
383 (md_longopts): Add -meva and -mno-eva.
384 (md_parse_option): Process new options.
385 (mips_after_parse_args): Check for valid EVA combinations.
386 (s_mipsset): Likewise.
388 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
390 * dwarf2dbg.h (dwarf2_move_insn): Declare.
391 * dwarf2dbg.c (line_subseg): Add pmove_tail.
392 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
393 (dwarf2_gen_line_info_1): Update call accordingly.
394 (dwarf2_move_insn): New function.
395 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
397 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
401 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
404 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
405 (dwarf2_gen_line_info_1): Delete.
406 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
407 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
408 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
409 (dwarf2_directive_loc): Push previous .locs instead of generating
412 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
414 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
415 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
417 2013-06-13 Nick Clifton <nickc@redhat.com>
420 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
421 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
422 function. Generates an error if the adjusted offset is out of a
425 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
427 * config/tc-nios2.c (md_apply_fix): Mask constant
428 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
430 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
432 * config/tc-mips.c (append_insn): Don't do branch relaxation for
433 MIPS-3D instructions either.
434 (md_convert_frag): Update the COPx branch mask accordingly.
436 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
438 * doc/as.texinfo (Overview): Add --relax-branch and
440 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
443 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
445 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
448 2013-06-08 Catherine Moore <clm@codesourcery.com>
450 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
451 (is_opcode_valid_16): Pass ase value to opcode_is_member.
452 (append_insn): Change INSN_xxxx to ASE_xxxx.
454 2013-06-01 George Thomas <george.thomas@atmel.com>
456 * gas/config/tc-avr.c: Change ISA for devices with USB support to
459 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
461 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
464 2013-05-31 Paul Brook <paul@codesourcery.com>
467 * config/tc-mips.c (s_ehword): New.
469 2013-05-30 Paul Brook <paul@codesourcery.com>
471 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
473 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
475 * write.c (resolve_reloc_expr_symbols): On REL targets don't
476 convert relocs who have no relocatable field either. Rephrase
477 the conditional so that the PC-relative check is only applied
480 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
482 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
485 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
487 * config/tc-aarch64.c (reloc_table): Update to use
488 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
489 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
490 (md_apply_fix): Likewise.
491 (aarch64_force_relocation): Likewise.
493 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
495 * config/tc-arm.c (it_fsm_post_encode): Improve
496 warning messages about deprecated IT block formats.
498 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
500 * config/tc-aarch64.c (md_apply_fix): Move value range checking
501 inside fx_done condition.
503 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
505 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
507 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
509 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
510 and clean up warning when using PRINT_OPCODE_TABLE.
512 2013-05-20 Alan Modra <amodra@gmail.com>
514 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
515 and data fixups performing shift/high adjust/sign extension on
516 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
517 when writing data fixups rather than recalculating size.
519 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
521 * doc/c-msp430.texi: Fix typo.
523 2013-05-16 Tristan Gingold <gingold@adacore.com>
525 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
526 are also TOC symbols.
528 2013-05-16 Nick Clifton <nickc@redhat.com>
530 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
531 Add -mcpu command to specify core type.
532 * doc/c-msp430.texi: Update documentation.
534 2013-05-09 Andrew Pinski <apinski@cavium.com>
536 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
537 (mips_opts): Update for the new field.
538 (file_ase_virt): New variable.
539 (ISA_SUPPORTS_VIRT_ASE): New macro.
540 (ISA_SUPPORTS_VIRT64_ASE): New macro.
541 (MIPS_CPU_ASE_VIRT): New define.
542 (is_opcode_valid): Handle ase_virt.
543 (macro_build): Handle "+J".
544 (validate_mips_insn): Likewise.
546 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
547 (md_longopts): Add mvirt and mnovirt
548 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
549 (mips_after_parse_args): Handle ase_virt field.
550 (s_mipsset): Handle "virt" and "novirt".
551 (mips_elf_final_processing): Add a comment about virt ASE might need
553 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
554 * doc/c-mips.texi: Document -mvirt and -mno-virt.
555 Document ".set virt" and ".set novirt".
557 2013-05-09 Alan Modra <amodra@gmail.com>
559 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
560 control of operand flag bits.
562 2013-05-07 Alan Modra <amodra@gmail.com>
564 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
565 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
566 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
567 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
568 (md_apply_fix): Set fx_no_overflow for assorted relocations.
569 Shift and sign-extend fieldval for use by some VLE reloc
570 operand->insert functions.
572 2013-05-06 Paul Brook <paul@codesourcery.com>
573 Catherine Moore <clm@codesourcery.com>
575 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
576 (limited_pcrel_reloc_p): Likewise.
577 (md_apply_fix): Likewise.
578 (tc_gen_reloc): Likewise.
580 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
582 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
583 (mips_fix_adjustable): Adjust pc-relative check to use
586 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
588 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
589 (s_mips_stab): Do not restrict to stabn only.
591 2013-05-02 Nick Clifton <nickc@redhat.com>
593 * config/tc-msp430.c: Add support for the MSP430X architecture.
594 Add code to insert a NOP instruction after any instruction that
595 might change the interrupt state.
596 Add support for the LARGE memory model.
597 Add code to initialise the .MSP430.attributes section.
598 * config/tc-msp430.h: Add support for the MSP430X architecture.
599 * doc/c-msp430.texi: Document the new -mL and -mN command line
601 * NEWS: Mention support for the MSP430X architecture.
603 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
605 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
606 alpha*-*-linux*ecoff*.
608 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
610 * config/tc-mips.c (mips_ip): Add sizelo.
611 For "+C", "+G", and "+H", set sizelo and compare against it.
613 2013-04-29 Nick Clifton <nickc@redhat.com>
615 * as.c (Options): Add -gdwarf-sections.
616 (parse_args): Likewise.
617 * as.h (flag_dwarf_sections): Declare.
618 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
619 (process_entries): When -gdwarf-sections is enabled generate
620 fragmentary .debug_line sections.
621 (out_debug_line): Set the section for the .debug_line section end
623 * doc/as.texinfo: Document -gdwarf-sections.
624 * NEWS: Mention -gdwarf-sections.
626 2013-04-26 Christian Groessler <chris@groessler.org>
628 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
629 according to the target parameter. Don't call s_segm since s_segm
630 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
632 (md_begin): Call s_segm according to target parameter from command
635 2013-04-25 Alan Modra <amodra@gmail.com>
637 * configure.in: Allow little-endian linux.
638 * configure: Regenerate.
640 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
642 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
643 "fstatus" control register to "eccinj".
645 2013-04-19 Kai Tietz <ktietz@redhat.com>
647 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
649 2013-04-15 Julian Brown <julian@codesourcery.com>
651 * expr.c (add_to_result, subtract_from_result): Make global.
652 * expr.h (add_to_result, subtract_from_result): Add prototypes.
653 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
654 subtract_from_result to handle extra bit of precision for .sleb128
657 2013-04-10 Julian Brown <julian@codesourcery.com>
659 * read.c (convert_to_bignum): Add sign parameter. Use it
660 instead of X_unsigned to determine sign of resulting bignum.
661 (emit_expr): Pass extra argument to convert_to_bignum.
662 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
663 X_extrabit to convert_to_bignum.
664 (parse_bitfield_cons): Set X_extrabit.
665 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
666 Initialise X_extrabit field as appropriate.
667 (add_to_result): New.
668 (subtract_from_result): New.
670 * expr.h (expressionS): Add X_extrabit field.
672 2013-04-10 Jan Beulich <jbeulich@suse.com>
674 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
675 register being PC when is_t or writeback, and use distinct
676 diagnostic for the latter case.
678 2013-04-10 Jan Beulich <jbeulich@suse.com>
680 * gas/config/tc-arm.c (parse_operands): Re-write
682 (do_barrier): Remove bogus constraint().
683 (do_t_barrier): Remove.
685 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
687 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
688 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
690 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
692 2013-04-09 Jan Beulich <jbeulich@suse.com>
694 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
695 Use local variable Rt in more places.
696 (do_vmsr): Accept all control registers.
698 2013-04-09 Jan Beulich <jbeulich@suse.com>
700 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
701 if there was none specified for moves between scalar and core
704 2013-04-09 Jan Beulich <jbeulich@suse.com>
706 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
709 2013-04-08 Jan Beulich <jbeulich@suse.com>
711 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
714 2013-04-08 Jan Beulich <jbeulich@suse.com>
716 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
719 2013-04-03 Alan Modra <amodra@gmail.com>
721 * doc/as.texinfo: Add support to generate man options for h8300.
722 * doc/c-h8300.texi: Likewise.
724 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
726 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
729 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
732 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
734 2013-03-26 Nick Clifton <nickc@redhat.com>
737 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
738 start of the file each time.
741 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
744 2013-03-26 Douglas B Rupp <rupp@gnat.com>
746 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
749 2013-03-21 Will Newton <will.newton@linaro.org>
751 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
752 pc-relative str instructions in Thumb mode.
754 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
756 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
757 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
759 * config/tc-h8300.h: Remove duplicated defines.
761 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
764 * tc-avr.c (mcu_has_3_byte_pc): New function.
765 (tc_cfi_frame_initial_instructions): Call it to find return
768 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
771 * config/tc-tic6x.c (tic6x_try_encode): Handle
772 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
773 encode register pair numbers when required.
775 2013-03-15 Will Newton <will.newton@linaro.org>
777 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
778 in vstr in Thumb mode for pre-ARMv7 cores.
780 2013-03-14 Andreas Schwab <schwab@suse.de>
782 * doc/c-arc.texi (ARC Directives): Revert last change and use
783 @itemize instead of @table.
784 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
786 2013-03-14 Nick Clifton <nickc@redhat.com>
789 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
790 NULL message, instead just check ARM_CPU_IS_ANY directly.
792 2013-03-14 Nick Clifton <nickc@redhat.com>
795 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
797 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
798 to the @item directives.
799 (ARM-Neon-Alignment): Move to correct place in the document.
800 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
802 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
805 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
807 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
808 case. Add default BAD_CASE to switch.
810 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
812 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
813 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
815 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
817 * config/tc-arm.c (crc_ext_armv8): New feature set.
818 (UNPRED_REG): New macro.
819 (do_crc32_1): New function.
820 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
821 do_crc32ch, do_crc32cw): Likewise.
823 (insns): Add entries for crc32 mnemonics.
824 (arm_extensions): Add entry for crc.
826 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
828 * write.h (struct fix): Add fx_dot_frag field.
830 * write.c (dot_frag): New variable.
831 (fix_new_internal): Set fx_dot_frag field with dot_frag.
832 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
833 * expr.c (expr): Save value of frag_now in dot_frag when setting
835 * read.c (emit_expr): Likewise. Delete comments.
837 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
839 * config/tc-i386.c (flag_code_names): Removed.
840 (i386_index_check): Rewrote.
842 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
844 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
846 (aarch64_double_precision_fmovable): New function.
847 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
848 function; handle hexadecimal representation of IEEE754 encoding.
849 (parse_operands): Update the call to parse_aarch64_imm_float.
851 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
853 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
854 (check_hle): Updated.
855 (md_assemble): Likewise.
856 (parse_insn): Likewise.
858 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
860 * config/tc-i386.c (_i386_insn): Add rep_prefix.
861 (md_assemble): Check if REP prefix is OK.
862 (parse_insn): Remove expecting_string_instruction. Set
865 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
867 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
869 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
871 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
872 for system registers.
874 2013-02-27 DJ Delorie <dj@redhat.com>
876 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
877 (rl78_op): Handle %code().
878 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
879 (tc_gen_reloc): Likwise; convert to a computed reloc.
880 (md_apply_fix): Likewise.
882 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
884 * config/rl78-parse.y: Fix encoding of DIVWU insn.
886 2013-02-25 Terry Guo <terry.guo@arm.com>
888 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
889 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
890 list of accepted CPUs.
892 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
895 * config/tc-i386.c (cpu_arch): Add ".smap".
897 * doc/c-i386.texi: Document smap.
899 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
901 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
902 mips_assembling_insn appropriately.
903 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
905 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
907 * config/tc-mips.c (append_insn): Correct indentation, remove
910 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
912 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
914 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
916 * configure.tgt: Add nios2-*-rtems*.
918 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
920 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
923 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
925 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
926 (macro): Use it. Assert that trunc.w.s is not used for r5900.
928 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
930 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
933 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
934 Andrew Jenner <andrew@codesourcery.com>
936 Based on patches from Altera Corporation.
938 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
939 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
940 * Makefile.in: Regenerated.
941 * configure.tgt: Add case for nios2*-linux*.
942 * config/obj-elf.c: Conditionally include elf/nios2.h.
943 * config/tc-nios2.c: New file.
944 * config/tc-nios2.h: New file.
945 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
946 * doc/Makefile.in: Regenerated.
947 * doc/all.texi: Set NIOSII.
948 * doc/as.texinfo (Overview): Add Nios II options.
949 (Machine Dependencies): Include c-nios2.texi.
950 * doc/c-nios2.texi: New file.
951 * NEWS: Note Altera Nios II support.
953 2013-02-06 Alan Modra <amodra@gmail.com>
956 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
957 Don't skip fixups with fx_subsy non-NULL.
958 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
959 with fx_subsy non-NULL.
961 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
963 * doc/c-metag.texi: Add "@c man" markers.
965 2013-02-04 Alan Modra <amodra@gmail.com>
967 * write.c (fixup_segment): Return void. Delete seg_reloc_count
969 (TC_ADJUST_RELOC_COUNT): Delete.
970 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
972 2013-02-04 Alan Modra <amodra@gmail.com>
974 * po/POTFILES.in: Regenerate.
976 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
978 * config/tc-metag.c: Make SWAP instruction less permissive with
981 2013-01-29 DJ Delorie <dj@redhat.com>
983 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
984 relocs in .word/.etc statements.
986 2013-01-29 Roland McGrath <mcgrathr@google.com>
988 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
989 immediate value for 8-bit offset" error so it shows line info.
991 2013-01-24 Joseph Myers <joseph@codesourcery.com>
993 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
996 2013-01-24 Nick Clifton <nickc@redhat.com>
998 * config/tc-v850.c: Add support for e3v5 architecture.
999 * doc/c-v850.texi: Mention new support.
1001 2013-01-23 Nick Clifton <nickc@redhat.com>
1004 * config/tc-avr.c: Include dwarf2dbg.h.
1006 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1008 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1009 (tc_i386_fix_adjustable): Likewise.
1010 (lex_got): Likewise.
1011 (tc_gen_reloc): Likewise.
1013 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1015 * config/tc-aarch64.c (output_operand_error_record): Change to output
1016 the out-of-range error message as value-expected message if there is
1017 only one single value in the expected range.
1018 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1019 LSL #0 as a programmer-friendly feature.
1021 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1023 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1024 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1025 BFD_RELOC_64_SIZE relocations.
1026 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1028 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1029 relocations against local symbols.
1031 2013-01-16 Alan Modra <amodra@gmail.com>
1033 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1034 finding some sort of toc syntax error, and break to avoid
1035 compiler uninit warning.
1037 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1040 * config/tc-i386.c (lex_got): Increment length by 1 if the
1041 relocation token is removed.
1043 2013-01-15 Nick Clifton <nickc@redhat.com>
1045 * config/tc-v850.c (md_assemble): Allow signed values for
1048 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1050 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1053 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1055 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1056 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1057 * config/tc-ppc.c (md_show_usage): Likewise.
1058 (ppc_handle_align): Handle power8's group ending nop.
1060 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1062 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1063 that the assember exits after the opcodes have been printed.
1065 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1067 * app.c: Remove trailing white spaces.
1071 * dw2gencfi.c: Likewise.
1072 * dwarf2dbg.h: Likewise.
1073 * ecoff.c: Likewise.
1074 * input-file.c: Likewise.
1075 * itbl-lex.h: Likewise.
1076 * output-file.c: Likewise.
1079 * subsegs.c: Likewise.
1080 * symbols.c: Likewise.
1081 * write.c: Likewise.
1082 * config/tc-i386.c: Likewise.
1083 * doc/Makefile.am: Likewise.
1084 * doc/Makefile.in: Likewise.
1085 * doc/c-aarch64.texi: Likewise.
1086 * doc/c-alpha.texi: Likewise.
1087 * doc/c-arc.texi: Likewise.
1088 * doc/c-arm.texi: Likewise.
1089 * doc/c-avr.texi: Likewise.
1090 * doc/c-bfin.texi: Likewise.
1091 * doc/c-cr16.texi: Likewise.
1092 * doc/c-d10v.texi: Likewise.
1093 * doc/c-d30v.texi: Likewise.
1094 * doc/c-h8300.texi: Likewise.
1095 * doc/c-hppa.texi: Likewise.
1096 * doc/c-i370.texi: Likewise.
1097 * doc/c-i386.texi: Likewise.
1098 * doc/c-i860.texi: Likewise.
1099 * doc/c-m32c.texi: Likewise.
1100 * doc/c-m32r.texi: Likewise.
1101 * doc/c-m68hc11.texi: Likewise.
1102 * doc/c-m68k.texi: Likewise.
1103 * doc/c-microblaze.texi: Likewise.
1104 * doc/c-mips.texi: Likewise.
1105 * doc/c-msp430.texi: Likewise.
1106 * doc/c-mt.texi: Likewise.
1107 * doc/c-s390.texi: Likewise.
1108 * doc/c-score.texi: Likewise.
1109 * doc/c-sh.texi: Likewise.
1110 * doc/c-sh64.texi: Likewise.
1111 * doc/c-tic54x.texi: Likewise.
1112 * doc/c-tic6x.texi: Likewise.
1113 * doc/c-v850.texi: Likewise.
1114 * doc/c-xc16x.texi: Likewise.
1115 * doc/c-xgate.texi: Likewise.
1116 * doc/c-xtensa.texi: Likewise.
1117 * doc/c-z80.texi: Likewise.
1118 * doc/internals.texi: Likewise.
1120 2013-01-10 Roland McGrath <mcgrathr@google.com>
1122 * hash.c (hash_new_sized): Make it global.
1123 * hash.h: Declare it.
1124 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1127 2013-01-10 Will Newton <will.newton@imgtec.com>
1129 * Makefile.am: Add Meta.
1130 * Makefile.in: Regenerate.
1131 * config/tc-metag.c: New file.
1132 * config/tc-metag.h: New file.
1133 * configure.tgt: Add Meta.
1134 * doc/Makefile.am: Add Meta.
1135 * doc/Makefile.in: Regenerate.
1136 * doc/all.texi: Add Meta.
1137 * doc/as.texiinfo: Document Meta options.
1138 * doc/c-metag.texi: New file.
1140 2013-01-09 Steve Ellcey <sellcey@mips.com>
1142 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1144 * config/tc-mips.c (internalError): Remove, replace with abort.
1146 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1148 * config/tc-aarch64.c (parse_operands): Change to compare the result
1149 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1151 2013-01-07 Nick Clifton <nickc@redhat.com>
1154 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1155 anticipated character.
1156 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1157 here as it is no longer needed.
1159 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1161 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1162 * doc/c-score.texi (SCORE-Opts): Likewise.
1163 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1165 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1167 * config/tc-mips.c: Add support for MIPS r5900.
1168 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1170 (can_swap_branch_p, get_append_method): Detect some conditional
1171 short loops to fix a bug on the r5900 by NOP in the branch delay
1173 (M_MUL): Support 3 operands in multu on r5900.
1174 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1175 (s_mipsset): Force 32 bit floating point on r5900.
1176 (mips_ip): Check parameter range of instructions mfps and mtps on
1178 * configure.in: Detect CPU type when target string contains r5900
1179 (e.g. mips64r5900el-linux-gnu).
1181 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1183 * as.c (parse_args): Update copyright year to 2013.
1185 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1187 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1190 2013-01-02 Nick Clifton <nickc@redhat.com>
1193 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1196 For older changes see ChangeLog-2012
1198 Copyright (C) 2013 Free Software Foundation, Inc.
1200 Copying and distribution of this file, with or without modification,
1201 are permitted in any medium without royalty provided the copyright
1202 notice and this notice are preserved.
1208 version-control: never