1 2013-11-19 Yufeng Zhang <yufeng.zhang@arm.com>
5 2013-11-19 Nick Clifton <nickc@redhat.com>
7 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messages
8 for deprecated system registers when parsing pstate fields.
10 2013-11-19 Nick Clifton <nickc@redhat.com>
12 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messages
13 for deprecated system registers when parsing pstate fields.
15 2013-11-19 Catherine Moore <clm@codesourcery.com>
17 * config/tc-mips.c (mips_fix_pmc_rm7000): Declare.
18 (options): Add OPTION_FIX_PMC_RM7000 and OPTION_NO_FIX_PMC_RM7000.
19 (md_longopts): Add mfix-pmc-rm7000 and mno-fix-pmc-rm7000.
21 (INSN_DMULTU): Define.
22 (insns_between): Detect PMC RM7000 errata.
23 (md_parse_option): Supprt OPTION_FIX_PMC_RM7000 and
24 OPTION_NO_FIX_PMC_RM7000.
25 * doc/as.texinfo: Document new options.
26 * doc/c-mips.texi: Likewise.
28 2013-11-19 Alexey Makhalov <makhaloff@gmail.com>
31 * app.c (do_scrub_chars): Only insert a newline character if
32 end-of-file has been reached.
34 2013-11-18 H.J. Lu <hongjiu.lu@intel.com>
36 * config/tc-i386.c (lex_got): Add a dummy "int bnd_prefix"
39 2013-11-18 Renlin Li <Renlin.Li@arm.com>
41 * config/tc-arm.c (arm_archs): New armv7ve architecture option.
42 (arm_cpus): Replace ARM_ARCH_V7A_IDIV_MP_SEC_VIRT with
43 ARM_ARCH_V7VE for cortex-a7, cortex-a12 and cortex-a15.
44 (cpu_arch_ver): Likewise.
45 * doc/c-arm.texi: Document armv7ve.
47 2013-11-18 Zhenqiang Chen <zhenqiang.chen@linaro.org>
49 * config/tc-aarch64.c (parse_sys_reg): Support
50 S2_<op1>_<Cn>_<Cm>_<op2>.
52 2013-11-18 Yufeng Zhang <yufeng.zhang@arm.com>
56 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
58 * config/tc-aarch64.c (set_other_error): New function.
59 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
60 the variable to which it points with 'o'.
61 (parse_operands): Update; check for write to read-only system
62 registers or read from write-only ones.
64 2013-11-17 H.J. Lu <hongjiu.lu@intel.com>
66 * config/tc-i386.c (reloc): Add an argument, bnd_prefix, to
67 indicate if instruction has the BND prefix. Return
68 BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if
69 bnd_prefix isn't zero.
70 (output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var
72 (output_jump): Update reloc call.
73 (output_interseg_jump): Likewise.
74 (output_disp): Likewise.
75 (output_imm): Likewise.
76 (x86_cons_fix_new): Likewise.
77 (lex_got): Add an argument, bnd_prefix, to indicate if
78 instruction has the BND prefix. Use BFD_RELOC_X86_64_PLT32_BND
80 (x86_cons): Update lex_got call.
81 (i386_immediate): Likewise.
82 (i386_displacement): Likewise.
83 (md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and
84 BFD_RELOC_X86_64_PLT32_BND.
85 (tc_gen_reloc): Likewise.
86 * config/tc-i386-intel.c (i386_operator): Update lex_got call.
88 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
90 * config/tc-aarch64.c (set_other_error): New function.
91 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
92 the variable to which it points with 'o'.
93 (parse_operands): Update; check for write to read-only system
94 registers or read from write-only ones.
96 2013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
98 * config/tc-i386.c (check_VecOperands): Reorder checks.
100 2013-11-11 Catherine Moore <clm@codesourcery.com>
102 * config/mips/tc-mips.c (convert_reg_type): Use
103 INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY.
104 (reg_needs_delay): Likewise.
105 (insns_between): Likewise.
107 2013-11-08 Jan-Benedict Glaw <jbglaw@lug-owl.de
109 * config/tc-ppc.c (ppc_elf_localentry): Add cast.
111 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
113 * config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg;
114 call aarch64_sys_reg_deprecated_p and warn about the deprecated
117 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
119 * config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
121 2013-11-05 Will Newton <will.newton@linaro.org>
124 * config/tc-aarch64.c (parse_operands): Avoid trying to
125 parse a vector register as an immediate.
127 2013-11-04 Jan Beulich <jbeulich@suse.com>
129 * config/tc-i386.c (check_long_reg): Correct comment indentation.
130 (check_qword_reg): Correct comment and its indentation.
131 (check_word_reg): Extend comment and correct its indentation. Also
132 check for 64-bit register.
134 2013-10-30 Ulrich Weigand <uweigand@de.ibm.com>
136 * config/tc-ppc.c (md_pseudo_table): Add .localentry.
137 (ppc_elf_localentry): New function.
138 (ppc_force_relocation): Force relocs on all branches to localenty
140 (ppc_fix_adjustable): Don't reduce such symbols to section+offset.
142 2013-10-30 Alan Modra <amodra@gmail.com>
144 * config/tc-ppc.c: Include elf/ppc64.h.
145 (ppc_abiversion): New variable.
146 (md_pseudo_table): Add .abiversion.
147 (ppc_elf_abiversion, ppc_elf_end): New functions.
148 * config/tc-ppc.h (md_end): Define.
150 2013-10-30 Alan Modra <amodra@gmail.com>
152 * config/tc-ppc.c (SEX16): Don't mask.
153 (REPORT_OVERFLOW_HI): Define as zero.
154 (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
155 @tprel@high, and @tprel@higha modifiers.
156 (md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
157 Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
159 (md_apply_fix): Similarly.
161 2013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
163 * config/tc-mips.c (fpr_read_mask): Test MSA registers.
164 (fpr_write_mask): Test MSA registers.
165 (can_swap_branch_p): Check fpr write followed by fpr read.
167 2013-10-18 Nick Clifton <nickc@redhat.com>
169 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
171 2013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
172 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
174 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
175 (md_longopts): Add mmsa and mno-msa.
176 (mips_ases): Add msa.
177 (RTYPE_MASK): Update.
178 (RTYPE_MSA): New define.
179 (OT_REG_ELEMENT): Replace with...
180 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
181 (mips_operand_token): Replace reg_element with index.
182 (mips_parse_argument_token): Treat vector indices as separate tokens.
183 Handle register indices.
184 (md_begin): Add MSA register names.
185 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
186 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
187 (match_mdmx_imm_reg_operand): Update accordingly.
188 (match_imm_index_operand): New function.
189 (match_reg_index_operand): New function.
190 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
191 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
192 (md_show_usage): Print -mmsa and -mno-msa.
193 * doc/as.texinfo: Document -mmsa and -mno-msa.
194 * doc/c-mips.texi: Document -mmsa and -mno-msa.
195 Document .set msa and .set nomsa.
197 2013-10-14 Nick Clifton <nickc@redhat.com>
199 * read.c (add_include_dir): Use xrealloc.
200 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
201 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
203 2013-10-13 Sandra Loosemore <sandra@codesourcery.com>
205 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
206 also test/refer to "sstatus". Reformat the warning message.
208 2013-10-10 Sean Keys <skeys@ipdatasys.com>
210 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
212 2013-10-10 Jan Beulich <jbeulich@suse.com>
214 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
215 swapping for bndmk, bndldx, and bndstx.
217 2013-10-09 Nick Clifton <nickc@redhat.com>
220 * config/tc-epiphany.c (md_convert_frag): Add missing break
224 * config/tc-mn10200.c (md_convert_frag): Add missing break
227 2013-10-08 Jan Beulich <jbeulich@suse.com>
229 * tc-i386.c (check_word_reg): Remove misplaced "else".
230 (check_long_reg): Restore symmetry with check_word_reg.
232 2013-10-08 Jan Beulich <jbeulich@suse.com>
234 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
237 2013-10-08 Nick Clifton <nickc@redhat.com>
239 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
240 for "<foo>a". Issue error messages for unrecognised or corrrupt
243 2013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
245 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
248 2013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
250 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
251 * doc/c-i386.texi: Add -march=bdver4 option.
253 2013-09-20 Alan Modra <amodra@gmail.com>
255 * configure: Regenerate.
257 2013-09-18 Tristan Gingold <gingold@adacore.com>
259 * NEWS: Add marker for 2.24.
261 2013-09-18 Nick Clifton <nickc@redhat.com>
263 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
264 (move_data): New variable.
265 (md_parse_option): Parse -md.
266 (msp430_section): New function. Catch references to the .bss or
267 .data sections and generate a special symbol for use by the libcrt
269 (md_pseudo_table): Intercept .section directives.
270 (md_longopt): Add -md
271 (md_show_usage): Likewise.
272 (msp430_operands): Generate a warning message if a NOP is inserted
273 into the instruction stream.
274 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
276 2013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
278 * config/tc-mips.c (mips_elf_final_processing): Set
279 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
281 2013-09-16 Will Newton <will.newton@linaro.org>
283 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
284 disallowing element size 64 with interleave other than 1.
286 2013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
288 * config/tc-mips.c (match_insn): Set error when $31 is used for
291 2013-09-04 Tristan Gingold <gingold@adacore.com>
293 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
296 2013-09-04 Roland McGrath <mcgrathr@google.com>
299 * config/tc-arm.c (T16_32_TAB): Add _udf.
300 (do_t_udf): New function.
303 2013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
305 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
306 assembler errors at correct position.
308 2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
311 * config/tc-ia64.c: Fix typos.
312 * config/tc-sparc.c: Likewise.
313 * config/tc-z80.c: Likewise.
314 * doc/c-i386.texi: Likewise.
315 * doc/c-m32r.texi: Likewise.
317 2013-08-23 Will Newton <will.newton@linaro.org>
319 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
320 for pre-indexed addressing modes.
322 2013-08-21 Alan Modra <amodra@gmail.com>
324 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
325 range check label number for use with fb_low_counter array.
327 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
329 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
330 (mips_parse_argument_token, validate_micromips_insn, md_begin)
331 (check_regno, match_float_constant, check_completed_insn, append_insn)
332 (match_insn, match_mips16_insn, match_insns, macro_start)
333 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
334 (mips16_ip, mips_set_option_string, md_parse_option)
335 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
336 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
337 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
338 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
339 Start error messages with a lower-case letter. Do not end error
340 messages with a period. Wrap long messages to 80 character-lines.
341 Use "cannot" instead of "can't" and "can not".
343 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
345 * config/tc-mips.c (imm_expr): Expand comment.
346 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
349 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
351 * config/tc-mips.c (imm2_expr): Delete.
352 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
354 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
356 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
357 (macro): Remove M_DEXT and M_DINS handling.
359 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
361 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
362 lax_max with lax_match.
363 (match_int_operand): Update accordingly. Don't report an error
364 for !lax_match-only cases.
365 (match_insn): Replace more_alts with lax_match and use it to
366 initialize the mips_arg_info field. Add a complete_p parameter.
367 Handle implicit VU0 suffixes here.
368 (match_invalid_for_isa, match_insns, match_mips16_insns): New
370 (mips_ip, mips16_ip): Use them.
372 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
374 * config/tc-mips.c (match_expression): Report uses of registers here.
375 Add a "must be an immediate expression" error. Handle elided offsets
377 (match_int_operand): ...here.
379 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
381 * config/tc-mips.c (mips_arg_info): Remove soft_match.
382 (match_out_of_range, match_not_constant): New functions.
383 (match_const_int): Remove fallback parameter and check for soft_match.
384 Use match_not_constant.
385 (match_mapped_int_operand, match_addiusp_operand)
386 (match_perf_reg_operand, match_save_restore_list_operand)
387 (match_mdmx_imm_reg_operand): Update accordingly. Use
388 match_out_of_range and set_insn_error* instead of as_bad.
389 (match_int_operand): Likewise. Use match_not_constant in the
390 !allows_nonconst case.
391 (match_float_constant): Report invalid float constants.
392 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
393 match_float_constant to check for invalid constants. Fail the
394 match if match_const_int or match_float_constant return false.
395 (mips_ip): Update accordingly.
396 (mips16_ip): Likewise. Undo null termination of instruction name
397 once lookup is complete.
399 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
401 * config/tc-mips.c (mips_insn_error_format): New enum.
402 (mips_insn_error): New struct.
403 (insn_error): Change to a mips_insn_error.
404 (clear_insn_error, set_insn_error_format, set_insn_error)
405 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
407 (mips_parse_argument_token, md_assemble, match_insn)
408 (match_mips16_insn): Use them instead of manipulating insn_error
410 (mips_ip, mips16_ip): Likewise. Simplify control flow.
412 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
414 * config/tc-mips.c (normalize_constant_expr): Move further up file.
415 (normalize_address_expr): Likewise.
416 (match_insn, match_mips16_insn): New functions, split out from...
417 (mips_ip, mips16_ip): ...here.
419 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
421 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
423 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
424 for optional operands.
426 2013-08-16 Alan Modra <amodra@gmail.com>
428 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
431 2013-08-16 Alan Modra <amodra@gmail.com>
433 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
435 2013-08-14 David Edelsohn <dje.gcc@gmail.com>
437 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
438 argument as alignment.
440 2013-08-09 Nick Clifton <nickc@redhat.com>
442 * config/tc-rl78.c (elf_flags): New variable.
443 (enum options): Add OPTION_G10.
444 (md_longopts): Add mg10.
445 (md_parse_option): Parse -mg10.
446 (rl78_elf_final_processing): New function.
447 * config/tc-rl78.c (tc_final_processing): Define.
448 * doc/c-rl78.texi: Document -mg10 option.
450 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
452 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
453 suffixes to be elided too.
454 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
455 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
458 2013-08-05 John Tytgat <john@bass-software.com>
460 * po/POTFILES.in: Regenerate.
462 2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
463 Konrad Eisele <konrad@gaisler.com>
465 * config/tc-sparc.c (sparc_arch_types): Add leon.
466 (sparc_arch): Move sparc4 around and add leon.
467 (sparc_target_format): Document -Aleon.
468 * doc/c-sparc.texi: Likewise.
470 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
472 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
474 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
475 Richard Sandiford <rdsandiford@googlemail.com>
477 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
478 (RWARN): Bump to 0x8000000.
479 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
480 (RTYPE_R5900_ACC): New register types.
481 (RTYPE_MASK): Include them.
482 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
484 (reg_names): Include them.
485 (mips_parse_register_1): New function, split out from...
486 (mips_parse_register): ...here. Add a channels_ptr parameter.
487 Look for VU0 channel suffixes when nonnull.
488 (reg_lookup): Update the call to mips_parse_register.
489 (mips_parse_vu0_channels): New function.
490 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
491 (mips_operand_token): Add a "channels" field to the union.
492 Extend the comment above "ch" to OT_DOUBLE_CHAR.
493 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
494 (mips_parse_argument_token): Handle channel suffixes here too.
495 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
496 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
498 (md_begin): Register $vfN and $vfI registers.
499 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
500 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
501 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
502 (match_vu0_suffix_operand): New function.
503 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
504 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
505 (mips_lookup_insn): New function.
506 (mips_ip): Use it. Allow "+K" operands to be elided at the end
507 of an instruction. Handle '#' sequences.
509 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
511 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
512 values and use it instead of sreg, treg, xreg, etc.
514 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
516 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
517 and mips_int_operand_max.
518 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
520 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
521 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
522 instead of mips16_immed_operand.
524 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
526 * config/tc-mips.c (mips16_macro): Don't use move_register.
527 (mips16_ip): Allow macros to use 'p'.
529 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
531 * config/tc-mips.c (MAX_OPERANDS): New macro.
532 (mips_operand_array): New structure.
533 (mips_operands, mips16_operands, micromips_operands): New arrays.
534 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
535 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
536 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
537 (micromips_to_32_reg_q_map): Delete.
538 (insn_operands, insn_opno, insn_extract_operand): New functions.
539 (validate_mips_insn): Take a mips_operand_array as argument and
540 use it to build up a list of operands. Extend to handle INSN_MACRO
542 (validate_mips16_insn): New function.
543 (validate_micromips_insn): Take a mips_operand_array as argument.
545 (md_begin): Initialize mips_operands, mips16_operands and
546 micromips_operands. Call validate_mips_insn and
547 validate_micromips_insn for macro instructions too.
548 Call validate_mips16_insn for MIPS16 instructions.
549 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
551 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
552 them. Handle INSN_UDI.
553 (get_append_method): Use gpr_read_mask.
555 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
557 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
558 flags for MIPS16 and non-MIPS16 instructions.
559 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
560 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
561 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
562 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
563 and non-MIPS16 instructions. Fix formatting.
565 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
567 * config/tc-mips.c (reg_needs_delay): Move later in file.
569 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
571 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
572 Alexander Ivchenko <alexander.ivchenko@intel.com>
573 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
574 Sergey Lega <sergey.s.lega@intel.com>
575 Anna Tikhonova <anna.tikhonova@intel.com>
576 Ilya Tocar <ilya.tocar@intel.com>
577 Andrey Turetskiy <andrey.turetskiy@intel.com>
578 Ilya Verbin <ilya.verbin@intel.com>
579 Kirill Yukhin <kirill.yukhin@intel.com>
580 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
582 * config/tc-i386-intel.c (O_zmmword_ptr): New.
583 (i386_types): Add zmmword.
584 (i386_intel_simplify_register): Allow regzmm.
585 (i386_intel_simplify): Handle zmmwords.
586 (i386_intel_operand): Handle RC/SAE, vector operations and
588 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
589 (struct RC_Operation): New.
590 (struct Mask_Operation): New.
591 (struct Broadcast_Operation): New.
592 (vex_prefix): Size of bytes increased to 4 to support EVEX
594 (enum i386_error): Add new error codes: unsupported_broadcast,
595 broadcast_not_on_src_operand, broadcast_needed,
596 unsupported_masking, mask_not_on_destination, no_default_mask,
597 unsupported_rc_sae, rc_sae_operand_not_last_imm,
598 invalid_register_operand, try_vector_disp8.
599 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
600 rounding, broadcast, memshift.
601 (struct RC_name): New.
602 (RC_NamesTable): New.
605 (extra_symbol_chars): Add '{'.
606 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
607 (i386_operand_type): Add regzmm, regmask and vec_disp8.
608 (match_mem_size): Handle zmmwords.
609 (operand_type_match): Handle zmm-registers.
610 (mode_from_disp_size): Handle vec_disp8.
611 (fits_in_vec_disp8): New.
612 (md_begin): Handle {} properly.
613 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
614 (build_vex_prefix): Handle vrex.
615 (build_evex_prefix): New.
616 (process_immext): Adjust to properly handle EVEX.
617 (md_assemble): Add EVEX encoding support.
618 (swap_2_operands): Correctly handle operands with masking,
619 broadcasting or RC/SAE.
620 (check_VecOperands): Support EVEX features.
621 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
622 (match_template): Support regzmm and handle new error codes.
623 (process_suffix): Handle zmmwords and zmm-registers.
624 (check_byte_reg): Extend to zmm-registers.
625 (process_operands): Extend to zmm-registers.
626 (build_modrm_byte): Handle EVEX.
627 (output_insn): Adjust to properly handle EVEX case.
628 (disp_size): Handle vec_disp8.
629 (output_disp): Support compressed disp8*N evex feature.
630 (output_imm): Handle RC/SAE immediates properly.
631 (check_VecOperations): New.
632 (i386_immediate): Handle EVEX features.
633 (i386_index_check): Handle zmmwords and zmm-registers.
634 (RC_SAE_immediate): New.
635 (i386_att_operand): Handle EVEX features.
636 (parse_real_register): Add a check for ZMM/Mask registers.
637 (OPTION_MEVEXLIG): New.
638 (OPTION_MEVEXWIG): New.
639 (md_longopts): Add mevexlig and mevexwig.
640 (md_parse_option): Handle mevexlig and mevexwig options.
641 (md_show_usage): Add description for mevexlig and mevexwig.
642 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
643 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
645 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
647 * config/tc-i386.c (cpu_arch): Add .sha.
648 * doc/c-i386.texi: Document sha/.sha.
650 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
651 Kirill Yukhin <kirill.yukhin@intel.com>
652 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
654 * config/tc-i386.c (BND_PREFIX): New.
655 (struct _i386_insn): Add new field bnd_prefix.
656 (add_bnd_prefix): New.
658 (i386_operand_type): Add regbnd.
659 (md_assemble): Handle BND prefixes.
660 (parse_insn): Likewise.
661 (output_branch): Likewise.
662 (output_jump): Likewise.
663 (build_modrm_byte): Handle regbnd.
664 (OPTION_MADD_BND_PREFIX): New.
665 (md_longopts): Add entry for 'madd-bnd-prefix'.
666 (md_parse_option): Handle madd-bnd-prefix option.
667 (md_show_usage): Add description for madd-bnd-prefix
669 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
671 2013-07-24 Tristan Gingold <gingold@adacore.com>
673 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
676 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
678 * config/tc-s390.c (s390_machine): Don't force the .machine
679 argument to lower case.
681 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
683 * config/tc-arm.c (s_arm_arch_extension): Improve error message
684 for invalid extension.
686 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
688 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
689 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
690 (aarch64_abi): New variable.
691 (ilp32_p): Change to be a macro.
692 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
693 (struct aarch64_option_abi_value_table): New struct.
694 (aarch64_abis): New table.
695 (aarch64_parse_abi): New function.
696 (aarch64_long_opts): Add entry for -mabi=.
697 * doc/as.texinfo (Target AArch64 options): Document -mabi.
698 * doc/c-aarch64.texi: Likewise.
700 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
702 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
705 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
707 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
709 * config/rx-parse.y: (rx_check_float_support): Add function to
710 check floating point operation support for target RX100 and
712 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
713 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
714 RX200, RX600, and RX610
716 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
718 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
720 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
722 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
723 * doc/c-avr.texi: Likewise.
725 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
727 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
728 error with older GCCs.
729 (mips16_macro_build): Dereference args.
731 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
733 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
734 New functions, split out from...
735 (reg_lookup): ...here. Remove itbl support.
736 (reglist_lookup): Delete.
737 (mips_operand_token_type): New enum.
738 (mips_operand_token): New structure.
739 (mips_operand_tokens): New variable.
740 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
741 (mips_parse_arguments): New functions.
742 (md_begin): Initialize mips_operand_tokens.
743 (mips_arg_info): Add a token field. Remove optional_reg field.
744 (match_char, match_expression): New functions.
745 (match_const_int): Use match_expression. Remove "s" argument
746 and return a boolean result. Remove O_register handling.
747 (match_regno, match_reg, match_reg_range): New functions.
748 (match_int_operand, match_mapped_int_operand, match_msb_operand)
749 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
750 (match_addiusp_operand, match_clo_clz_dest_operand)
751 (match_lwm_swm_list_operand, match_entry_exit_operand)
752 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
753 (match_tied_reg_operand): Remove "s" argument and return a boolean
754 result. Match tokens rather than text. Update calls to
755 match_const_int. Rely on match_regno to call check_regno.
756 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
757 "arg" argument. Return a boolean result.
758 (parse_float_constant): Replace with...
759 (match_float_constant): ...this new function.
760 (match_operand): Remove "s" argument and return a boolean result.
761 Update calls to subfunctions.
762 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
763 rather than string-parsing routines. Update handling of optional
764 registers for token scheme.
766 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
768 * config/tc-mips.c (parse_float_constant): Split out from...
771 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
773 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
776 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
778 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
779 (match_entry_exit_operand): New function.
780 (match_save_restore_list_operand): Likewise.
781 (match_operand): Use them.
782 (check_absolute_expr): Delete.
783 (mips16_ip): Rewrite main parsing loop to use mips_operands.
785 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
787 * config/tc-mips.c: Enable functions commented out in previous patch.
788 (SKIP_SPACE_TABS): Move further up file.
789 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
790 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
791 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
792 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
793 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
794 (micromips_imm_b_map, micromips_imm_c_map): Delete.
795 (mips_lookup_reg_pair): Delete.
796 (macro): Use report_bad_range and report_bad_field.
797 (mips_immed, expr_const_in_range): Delete.
798 (mips_ip): Rewrite main parsing loop to use new functions.
800 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
802 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
803 Change return type to bfd_boolean.
804 (report_bad_range, report_bad_field): New functions.
805 (mips_arg_info): New structure.
806 (match_const_int, convert_reg_type, check_regno, match_int_operand)
807 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
808 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
809 (match_addiusp_operand, match_clo_clz_dest_operand)
810 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
811 (match_pc_operand, match_tied_reg_operand, match_operand)
812 (check_completed_insn): New functions, commented out for now.
814 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
816 * config/tc-mips.c (insn_insert_operand): New function.
817 (macro_build, mips16_macro_build): Put null character check
818 in the for loop and convert continues to breaks. Use operand
819 structures to handle constant operands.
821 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
823 * config/tc-mips.c (validate_mips_insn): Move further up file.
824 Add insn_bits and decode_operand arguments. Use the mips_operand
825 fields to work out which bits an operand occupies. Detect double
827 (validate_micromips_insn): Move further up file. Call into
830 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
832 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
834 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
836 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
838 (macro): Update accordingly.
840 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
842 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
844 (md_assemble): Remove imm_reloc handling.
845 (mips_ip): Update commentary. Use offset_expr and offset_reloc
846 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
847 Use a temporary array rather than imm_reloc when parsing
848 constant expressions. Remove imm_reloc initialization.
849 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
850 for the relaxable field. Use a relax_char variable to track the
851 type of this field. Remove imm_reloc initialization.
853 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
855 * config/tc-mips.c (mips16_ip): Handle "I".
857 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
859 * config/tc-mips.c (mips_flag_nan2008): New variable.
860 (options): Add OPTION_NAN enum value.
861 (md_longopts): Handle it.
862 (md_parse_option): Likewise.
863 (s_nan): New function.
864 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
865 (md_show_usage): Add -mnan.
867 * doc/as.texinfo (Overview): Add -mnan.
868 * doc/c-mips.texi (MIPS Opts): Document -mnan.
869 (MIPS NaN Encodings): New node. Document .nan directive.
870 (MIPS-Dependent): List the new node.
872 2013-07-09 Tristan Gingold <gingold@adacore.com>
874 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
876 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
878 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
879 for 'A' and assume that the constant has been elided if the result
882 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
884 * config/tc-mips.c (gprel16_reloc_p): New function.
885 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
887 (offset_high_part, small_offset_p): New functions.
888 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
889 register load and store macros, handle the 16-bit offset case first.
890 If a 16-bit offset is not suitable for the instruction we're
891 generating, load it into the temporary register using
892 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
893 M_L_DAB code once the address has been constructed. For double load
894 and store macros, again handle the 16-bit offset case first.
895 If the second register cannot be accessed from the same high
896 part as the first, load it into AT using ADDRESS_ADDI_INSN.
897 Fix the handling of LD in cases where the first register is the
898 same as the base. Also handle the case where the offset is
899 not 16 bits and the second register cannot be accessed from the
900 same high part as the first. For unaligned loads and stores,
901 fuse the offbits == 12 and old "ab" handling. Apply this handling
902 whenever the second offset needs a different high part from the first.
903 Construct the offset using ADDRESS_ADDI_INSN where possible,
904 for offbits == 16 as well as offbits == 12. Use offset_reloc
905 when constructing the individual loads and stores.
906 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
907 and offset_reloc before matching against a particular opcode.
908 Handle elided 'A' constants. Allow 'A' constants to use
909 relocation operators.
911 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
913 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
914 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
915 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
917 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
919 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
920 Require the msb to be <= 31 for "+s". Check that the size is <= 31
921 for both "+s" and "+S".
923 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
925 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
926 (mips_ip, mips16_ip): Handle "+i".
928 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
930 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
931 (micromips_to_32_reg_h_map): Rename to...
932 (micromips_to_32_reg_h_map1): ...this.
933 (micromips_to_32_reg_i_map): Rename to...
934 (micromips_to_32_reg_h_map2): ...this.
935 (mips_lookup_reg_pair): New function.
936 (gpr_write_mask, macro): Adjust after above renaming.
937 (validate_micromips_insn): Remove "mi" handling.
938 (mips_ip): Likewise. Parse both registers in a pair for "mh".
940 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
942 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
943 (mips_ip): Remove "+D" and "+T" handling.
945 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
947 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
950 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
952 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
954 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
956 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
957 (aarch64_force_relocation): Likewise.
959 2013-07-02 Alan Modra <amodra@gmail.com>
961 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
963 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
965 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
966 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
967 Replace @sc{mips16} with literal `MIPS16'.
968 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
970 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
972 * config/tc-aarch64.c (reloc_table): Replace
973 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
974 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
975 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
976 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
977 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
978 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
979 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
980 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
981 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
982 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
983 (aarch64_force_relocation): Likewise.
985 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
987 * config/tc-aarch64.c (ilp32_p): New static variable.
988 (elf64_aarch64_target_format): Return the target according to the
990 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
991 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
992 (aarch64_dwarf2_addr_size): New function.
993 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
994 (DWARF2_ADDR_SIZE): New define.
996 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
998 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
1000 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
1002 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
1004 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
1006 * config/tc-mips.c (mips_set_options): Add insn32 member.
1007 (mips_opts): Initialize it.
1008 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
1009 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
1010 (md_longopts): Add "minsn32" and "mno-insn32" options.
1011 (is_size_valid): Handle insn32 mode.
1012 (md_assemble): Pass instruction string down to macro.
1013 (brk_fmt): Add second dimension and insn32 mode initializers.
1014 (mfhl_fmt): Likewise.
1015 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
1016 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
1017 (macro_build_jalr, move_register): Handle insn32 mode.
1018 (macro_build_branch_rs): Likewise.
1019 (macro): Handle insn32 mode.
1020 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
1021 (mips_ip): Handle insn32 mode.
1022 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
1023 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
1024 (mips_handle_align): Handle insn32 mode.
1025 (md_show_usage): Add -minsn32 and -mno-insn32.
1027 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
1028 -mno-insn32 options.
1029 (-minsn32, -mno-insn32): New options.
1030 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
1032 (MIPS assembly options): New node. Document .set insn32 and
1034 (MIPS-Dependent): List the new node.
1036 2013-06-25 Nick Clifton <nickc@redhat.com>
1038 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
1039 the PC in indirect addressing on 430xv2 parts.
1040 (msp430_operands): Add version test to hardware bug encoding
1043 2013-06-24 Roland McGrath <mcgrathr@google.com>
1045 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
1046 so it skips whitespace before it.
1047 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
1049 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
1050 (arm_reg_parse_multi): Skip whitespace first.
1051 (parse_reg_list): Likewise.
1052 (parse_vfp_reg_list): Likewise.
1053 (s_arm_unwind_save_mmxwcg): Likewise.
1055 2013-06-24 Nick Clifton <nickc@redhat.com>
1058 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
1060 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1062 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
1064 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1066 * config/tc-mips.c: Assert that offsetT and valueT are at least
1068 (GPR_SMIN, GPR_SMAX): New macros.
1069 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
1071 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1073 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
1074 conditions. Remove any code deselected by them.
1075 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
1077 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1079 * NEWS: Note removal of ECOFF support.
1080 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
1081 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
1082 (MULTI_CFILES): Remove config/e-mipsecoff.c.
1083 * Makefile.in: Regenerate.
1084 * configure.in: Remove MIPS ECOFF references.
1085 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
1087 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
1088 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
1089 (mips-*-*): ...this single case.
1090 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
1091 MIPS emulations to be e-mipself*.
1092 * configure: Regenerate.
1093 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
1094 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
1095 (mips-*-sysv*): Remove coff and ecoff cases.
1096 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
1097 * ecoff.c: Remove reference to MIPS ECOFF.
1098 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
1099 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
1100 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
1101 (mips_hi_fixup): Tweak comment.
1102 (append_insn): Require a howto.
1103 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
1105 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1107 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
1108 Use "CPU" instead of "cpu".
1109 * doc/c-mips.texi: Likewise.
1110 (MIPS Opts): Rename to MIPS Options.
1111 (MIPS option stack): Rename to MIPS Option Stack.
1112 (MIPS ASE instruction generation overrides): Rename to
1113 MIPS ASE Instruction Generation Overrides (for now).
1114 (MIPS floating-point): Rename to MIPS Floating-Point.
1116 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1118 * doc/c-mips.texi (MIPS Macros): New section.
1119 (MIPS Object): Replace with...
1120 (MIPS Small Data): ...this new section.
1122 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1124 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
1125 Capitalize name. Use @kindex instead of @cindex for .set entries.
1127 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1129 * doc/c-mips.texi (MIPS Stabs): Remove section.
1131 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
1133 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
1134 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
1135 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
1136 (ISA_SUPPORTS_VIRT64_ASE): Delete.
1137 (mips_ase): New structure.
1138 (mips_ases): New table.
1139 (FP64_ASES): New macro.
1140 (mips_ase_groups): New array.
1141 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
1142 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
1144 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
1145 (md_parse_option): Use mips_ases and mips_set_ase instead of
1146 separate case statements for each ASE option.
1147 (mips_after_parse_args): Use FP64_ASES. Use
1148 mips_check_isa_supports_ases to check the ASEs against
1150 (s_mipsset): Use mips_ases and mips_set_ase instead of
1151 separate if statements for each ASE option. Use
1152 mips_check_isa_supports_ases, even when a non-ASE option
1155 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
1157 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
1159 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1161 * config/tc-mips.c (md_shortopts, options, md_longopts)
1162 (md_longopts_size): Move earlier in file.
1164 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1166 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1167 with a single "ase" bitmask.
1168 (mips_opts): Update accordingly.
1169 (file_ase, file_ase_explicit): New variables.
1170 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1171 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1172 (ISA_HAS_ROR): Adjust for mips_set_options change.
1173 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1174 (mips_ip): Adjust for mips_set_options change.
1175 (md_parse_option): Likewise. Update file_ase_explicit.
1176 (mips_after_parse_args): Adjust for mips_set_options change.
1177 Use bitmask operations to select the default ASEs. Set file_ase
1178 rather than individual per-ASE variables.
1179 (s_mipsset): Adjust for mips_set_options change.
1180 (mips_elf_final_processing): Test file_ase rather than
1181 file_ase_mdmx. Remove commented-out code.
1183 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1185 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1186 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1187 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1188 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1189 (mips_after_parse_args): Use the new "ase" field to choose
1191 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1194 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
1196 * config/tc-arm.c (symbol_preemptible): New function.
1197 (relax_branch): Use it.
1199 2013-06-17 Catherine Moore <clm@codesourcery.com>
1200 Maciej W. Rozycki <macro@codesourcery.com>
1201 Chao-Ying Fu <fu@mips.com>
1203 * config/tc-mips.c (mips_set_options): Add ase_eva.
1204 (mips_set_options mips_opts): Add ase_eva.
1205 (file_ase_eva): Declare.
1206 (ISA_SUPPORTS_EVA_ASE): Define.
1207 (IS_SEXT_9BIT_NUM): Define.
1208 (MIPS_CPU_ASE_EVA): Define.
1209 (is_opcode_valid): Add support for ase_eva.
1210 (macro_build): Likewise.
1212 (validate_mips_insn): Likewise.
1213 (validate_micromips_insn): Likewise.
1214 (mips_ip): Likewise.
1215 (options): Add OPTION_EVA and OPTION_NO_EVA.
1216 (md_longopts): Add -meva and -mno-eva.
1217 (md_parse_option): Process new options.
1218 (mips_after_parse_args): Check for valid EVA combinations.
1219 (s_mipsset): Likewise.
1221 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1223 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1224 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1225 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1226 (dwarf2_gen_line_info_1): Update call accordingly.
1227 (dwarf2_move_insn): New function.
1228 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1230 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1234 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1237 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1238 (dwarf2_gen_line_info_1): Delete.
1239 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1240 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1241 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1242 (dwarf2_directive_loc): Push previous .locs instead of generating
1245 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1247 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1248 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1250 2013-06-13 Nick Clifton <nickc@redhat.com>
1253 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1254 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1255 function. Generates an error if the adjusted offset is out of a
1258 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1260 * config/tc-nios2.c (md_apply_fix): Mask constant
1261 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1263 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1265 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1266 MIPS-3D instructions either.
1267 (md_convert_frag): Update the COPx branch mask accordingly.
1269 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1271 * doc/as.texinfo (Overview): Add --relax-branch and
1273 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1276 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1278 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1281 2013-06-08 Catherine Moore <clm@codesourcery.com>
1283 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1284 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1285 (append_insn): Change INSN_xxxx to ASE_xxxx.
1287 2013-06-01 George Thomas <george.thomas@atmel.com>
1289 * gas/config/tc-avr.c: Change ISA for devices with USB support to
1292 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1294 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1297 2013-05-31 Paul Brook <paul@codesourcery.com>
1299 * config/tc-mips.c (s_ehword): New.
1301 2013-05-30 Paul Brook <paul@codesourcery.com>
1303 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1305 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1307 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1308 convert relocs who have no relocatable field either. Rephrase
1309 the conditional so that the PC-relative check is only applied
1312 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1314 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1317 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1319 * config/tc-aarch64.c (reloc_table): Update to use
1320 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
1321 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1322 (md_apply_fix): Likewise.
1323 (aarch64_force_relocation): Likewise.
1325 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1327 * config/tc-arm.c (it_fsm_post_encode): Improve
1328 warning messages about deprecated IT block formats.
1330 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1332 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1333 inside fx_done condition.
1335 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1337 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1339 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1341 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1342 and clean up warning when using PRINT_OPCODE_TABLE.
1344 2013-05-20 Alan Modra <amodra@gmail.com>
1346 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1347 and data fixups performing shift/high adjust/sign extension on
1348 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1349 when writing data fixups rather than recalculating size.
1351 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1353 * doc/c-msp430.texi: Fix typo.
1355 2013-05-16 Tristan Gingold <gingold@adacore.com>
1357 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1358 are also TOC symbols.
1360 2013-05-16 Nick Clifton <nickc@redhat.com>
1362 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1363 Add -mcpu command to specify core type.
1364 * doc/c-msp430.texi: Update documentation.
1366 2013-05-09 Andrew Pinski <apinski@cavium.com>
1368 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1369 (mips_opts): Update for the new field.
1370 (file_ase_virt): New variable.
1371 (ISA_SUPPORTS_VIRT_ASE): New macro.
1372 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1373 (MIPS_CPU_ASE_VIRT): New define.
1374 (is_opcode_valid): Handle ase_virt.
1375 (macro_build): Handle "+J".
1376 (validate_mips_insn): Likewise.
1377 (mips_ip): Likewise.
1378 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1379 (md_longopts): Add mvirt and mnovirt
1380 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1381 (mips_after_parse_args): Handle ase_virt field.
1382 (s_mipsset): Handle "virt" and "novirt".
1383 (mips_elf_final_processing): Add a comment about virt ASE might need
1385 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1386 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1387 Document ".set virt" and ".set novirt".
1389 2013-05-09 Alan Modra <amodra@gmail.com>
1391 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1392 control of operand flag bits.
1394 2013-05-07 Alan Modra <amodra@gmail.com>
1396 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1397 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1398 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1399 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1400 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1401 Shift and sign-extend fieldval for use by some VLE reloc
1402 operand->insert functions.
1404 2013-05-06 Paul Brook <paul@codesourcery.com>
1405 Catherine Moore <clm@codesourcery.com>
1407 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1408 (limited_pcrel_reloc_p): Likewise.
1409 (md_apply_fix): Likewise.
1410 (tc_gen_reloc): Likewise.
1412 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1414 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1415 (mips_fix_adjustable): Adjust pc-relative check to use
1418 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1420 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1421 (s_mips_stab): Do not restrict to stabn only.
1423 2013-05-02 Nick Clifton <nickc@redhat.com>
1425 * config/tc-msp430.c: Add support for the MSP430X architecture.
1426 Add code to insert a NOP instruction after any instruction that
1427 might change the interrupt state.
1428 Add support for the LARGE memory model.
1429 Add code to initialise the .MSP430.attributes section.
1430 * config/tc-msp430.h: Add support for the MSP430X architecture.
1431 * doc/c-msp430.texi: Document the new -mL and -mN command line
1433 * NEWS: Mention support for the MSP430X architecture.
1435 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1437 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1438 alpha*-*-linux*ecoff*.
1440 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1442 * config/tc-mips.c (mips_ip): Add sizelo.
1443 For "+C", "+G", and "+H", set sizelo and compare against it.
1445 2013-04-29 Nick Clifton <nickc@redhat.com>
1447 * as.c (Options): Add -gdwarf-sections.
1448 (parse_args): Likewise.
1449 * as.h (flag_dwarf_sections): Declare.
1450 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1451 (process_entries): When -gdwarf-sections is enabled generate
1452 fragmentary .debug_line sections.
1453 (out_debug_line): Set the section for the .debug_line section end
1455 * doc/as.texinfo: Document -gdwarf-sections.
1456 * NEWS: Mention -gdwarf-sections.
1458 2013-04-26 Christian Groessler <chris@groessler.org>
1460 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1461 according to the target parameter. Don't call s_segm since s_segm
1462 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1464 (md_begin): Call s_segm according to target parameter from command
1467 2013-04-25 Alan Modra <amodra@gmail.com>
1469 * configure.in: Allow little-endian linux.
1470 * configure: Regenerate.
1472 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1474 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1475 "fstatus" control register to "eccinj".
1477 2013-04-19 Kai Tietz <ktietz@redhat.com>
1479 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1481 2013-04-15 Julian Brown <julian@codesourcery.com>
1483 * expr.c (add_to_result, subtract_from_result): Make global.
1484 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1485 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1486 subtract_from_result to handle extra bit of precision for .sleb128
1489 2013-04-10 Julian Brown <julian@codesourcery.com>
1491 * read.c (convert_to_bignum): Add sign parameter. Use it
1492 instead of X_unsigned to determine sign of resulting bignum.
1493 (emit_expr): Pass extra argument to convert_to_bignum.
1494 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1495 X_extrabit to convert_to_bignum.
1496 (parse_bitfield_cons): Set X_extrabit.
1497 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1498 Initialise X_extrabit field as appropriate.
1499 (add_to_result): New.
1500 (subtract_from_result): New.
1502 * expr.h (expressionS): Add X_extrabit field.
1504 2013-04-10 Jan Beulich <jbeulich@suse.com>
1506 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1507 register being PC when is_t or writeback, and use distinct
1508 diagnostic for the latter case.
1510 2013-04-10 Jan Beulich <jbeulich@suse.com>
1512 * gas/config/tc-arm.c (parse_operands): Re-write
1513 po_barrier_or_imm().
1514 (do_barrier): Remove bogus constraint().
1515 (do_t_barrier): Remove.
1517 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1519 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1520 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1522 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1524 2013-04-09 Jan Beulich <jbeulich@suse.com>
1526 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1527 Use local variable Rt in more places.
1528 (do_vmsr): Accept all control registers.
1530 2013-04-09 Jan Beulich <jbeulich@suse.com>
1532 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1533 if there was none specified for moves between scalar and core
1536 2013-04-09 Jan Beulich <jbeulich@suse.com>
1538 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1539 NEON_ALL_LANES case.
1541 2013-04-08 Jan Beulich <jbeulich@suse.com>
1543 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1546 2013-04-08 Jan Beulich <jbeulich@suse.com>
1548 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1551 2013-04-03 Alan Modra <amodra@gmail.com>
1553 * doc/as.texinfo: Add support to generate man options for h8300.
1554 * doc/c-h8300.texi: Likewise.
1556 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1558 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1561 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1564 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1566 2013-03-26 Nick Clifton <nickc@redhat.com>
1569 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1570 start of the file each time.
1573 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1576 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1578 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1581 2013-03-21 Will Newton <will.newton@linaro.org>
1583 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1584 pc-relative str instructions in Thumb mode.
1586 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1588 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1589 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1591 * config/tc-h8300.h: Remove duplicated defines.
1593 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1596 * tc-avr.c (mcu_has_3_byte_pc): New function.
1597 (tc_cfi_frame_initial_instructions): Call it to find return
1600 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1603 * config/tc-tic6x.c (tic6x_try_encode): Handle
1604 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1605 encode register pair numbers when required.
1607 2013-03-15 Will Newton <will.newton@linaro.org>
1609 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1610 in vstr in Thumb mode for pre-ARMv7 cores.
1612 2013-03-14 Andreas Schwab <schwab@suse.de>
1614 * doc/c-arc.texi (ARC Directives): Revert last change and use
1615 @itemize instead of @table.
1616 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1618 2013-03-14 Nick Clifton <nickc@redhat.com>
1621 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1622 NULL message, instead just check ARM_CPU_IS_ANY directly.
1624 2013-03-14 Nick Clifton <nickc@redhat.com>
1627 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1629 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1630 to the @item directives.
1631 (ARM-Neon-Alignment): Move to correct place in the document.
1632 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1634 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1637 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1639 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1640 case. Add default BAD_CASE to switch.
1642 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1644 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1645 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1647 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1649 * config/tc-arm.c (crc_ext_armv8): New feature set.
1650 (UNPRED_REG): New macro.
1651 (do_crc32_1): New function.
1652 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1653 do_crc32ch, do_crc32cw): Likewise.
1655 (insns): Add entries for crc32 mnemonics.
1656 (arm_extensions): Add entry for crc.
1658 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1660 * write.h (struct fix): Add fx_dot_frag field.
1661 (dot_frag): Declare.
1662 * write.c (dot_frag): New variable.
1663 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1664 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1665 * expr.c (expr): Save value of frag_now in dot_frag when setting
1667 * read.c (emit_expr): Likewise. Delete comments.
1669 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1671 * config/tc-i386.c (flag_code_names): Removed.
1672 (i386_index_check): Rewrote.
1674 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1676 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1678 (aarch64_double_precision_fmovable): New function.
1679 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1680 function; handle hexadecimal representation of IEEE754 encoding.
1681 (parse_operands): Update the call to parse_aarch64_imm_float.
1683 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1685 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1686 (check_hle): Updated.
1687 (md_assemble): Likewise.
1688 (parse_insn): Likewise.
1690 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1692 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1693 (md_assemble): Check if REP prefix is OK.
1694 (parse_insn): Remove expecting_string_instruction. Set
1697 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1699 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1701 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1703 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1704 for system registers.
1706 2013-02-27 DJ Delorie <dj@redhat.com>
1708 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1709 (rl78_op): Handle %code().
1710 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1711 (tc_gen_reloc): Likwise; convert to a computed reloc.
1712 (md_apply_fix): Likewise.
1714 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1716 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1718 2013-02-25 Terry Guo <terry.guo@arm.com>
1720 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1721 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1722 list of accepted CPUs.
1724 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1727 * config/tc-i386.c (cpu_arch): Add ".smap".
1729 * doc/c-i386.texi: Document smap.
1731 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1733 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1734 mips_assembling_insn appropriately.
1735 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1737 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1739 * config/tc-mips.c (append_insn): Correct indentation, remove
1742 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1744 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1746 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1748 * configure.tgt: Add nios2-*-rtems*.
1750 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1752 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1755 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1757 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1758 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1760 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1762 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1765 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1766 Andrew Jenner <andrew@codesourcery.com>
1768 Based on patches from Altera Corporation.
1770 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1771 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1772 * Makefile.in: Regenerated.
1773 * configure.tgt: Add case for nios2*-linux*.
1774 * config/obj-elf.c: Conditionally include elf/nios2.h.
1775 * config/tc-nios2.c: New file.
1776 * config/tc-nios2.h: New file.
1777 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1778 * doc/Makefile.in: Regenerated.
1779 * doc/all.texi: Set NIOSII.
1780 * doc/as.texinfo (Overview): Add Nios II options.
1781 (Machine Dependencies): Include c-nios2.texi.
1782 * doc/c-nios2.texi: New file.
1783 * NEWS: Note Altera Nios II support.
1785 2013-02-06 Alan Modra <amodra@gmail.com>
1788 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1789 Don't skip fixups with fx_subsy non-NULL.
1790 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1791 with fx_subsy non-NULL.
1793 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1795 * doc/c-metag.texi: Add "@c man" markers.
1797 2013-02-04 Alan Modra <amodra@gmail.com>
1799 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1801 (TC_ADJUST_RELOC_COUNT): Delete.
1802 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1804 2013-02-04 Alan Modra <amodra@gmail.com>
1806 * po/POTFILES.in: Regenerate.
1808 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1810 * config/tc-metag.c: Make SWAP instruction less permissive with
1813 2013-01-29 DJ Delorie <dj@redhat.com>
1815 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1816 relocs in .word/.etc statements.
1818 2013-01-29 Roland McGrath <mcgrathr@google.com>
1820 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1821 immediate value for 8-bit offset" error so it shows line info.
1823 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1825 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1828 2013-01-24 Nick Clifton <nickc@redhat.com>
1830 * config/tc-v850.c: Add support for e3v5 architecture.
1831 * doc/c-v850.texi: Mention new support.
1833 2013-01-23 Nick Clifton <nickc@redhat.com>
1836 * config/tc-avr.c: Include dwarf2dbg.h.
1838 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1840 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1841 (tc_i386_fix_adjustable): Likewise.
1842 (lex_got): Likewise.
1843 (tc_gen_reloc): Likewise.
1845 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1847 * config/tc-aarch64.c (output_operand_error_record): Change to output
1848 the out-of-range error message as value-expected message if there is
1849 only one single value in the expected range.
1850 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1851 LSL #0 as a programmer-friendly feature.
1853 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1855 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1856 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1857 BFD_RELOC_64_SIZE relocations.
1858 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1860 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1861 relocations against local symbols.
1863 2013-01-16 Alan Modra <amodra@gmail.com>
1865 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1866 finding some sort of toc syntax error, and break to avoid
1867 compiler uninit warning.
1869 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1872 * config/tc-i386.c (lex_got): Increment length by 1 if the
1873 relocation token is removed.
1875 2013-01-15 Nick Clifton <nickc@redhat.com>
1877 * config/tc-v850.c (md_assemble): Allow signed values for
1880 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1882 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1885 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1887 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1888 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1889 * config/tc-ppc.c (md_show_usage): Likewise.
1890 (ppc_handle_align): Handle power8's group ending nop.
1892 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1894 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1895 that the assember exits after the opcodes have been printed.
1897 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1899 * app.c: Remove trailing white spaces.
1903 * dw2gencfi.c: Likewise.
1904 * dwarf2dbg.h: Likewise.
1905 * ecoff.c: Likewise.
1906 * input-file.c: Likewise.
1907 * itbl-lex.h: Likewise.
1908 * output-file.c: Likewise.
1911 * subsegs.c: Likewise.
1912 * symbols.c: Likewise.
1913 * write.c: Likewise.
1914 * config/tc-i386.c: Likewise.
1915 * doc/Makefile.am: Likewise.
1916 * doc/Makefile.in: Likewise.
1917 * doc/c-aarch64.texi: Likewise.
1918 * doc/c-alpha.texi: Likewise.
1919 * doc/c-arc.texi: Likewise.
1920 * doc/c-arm.texi: Likewise.
1921 * doc/c-avr.texi: Likewise.
1922 * doc/c-bfin.texi: Likewise.
1923 * doc/c-cr16.texi: Likewise.
1924 * doc/c-d10v.texi: Likewise.
1925 * doc/c-d30v.texi: Likewise.
1926 * doc/c-h8300.texi: Likewise.
1927 * doc/c-hppa.texi: Likewise.
1928 * doc/c-i370.texi: Likewise.
1929 * doc/c-i386.texi: Likewise.
1930 * doc/c-i860.texi: Likewise.
1931 * doc/c-m32c.texi: Likewise.
1932 * doc/c-m32r.texi: Likewise.
1933 * doc/c-m68hc11.texi: Likewise.
1934 * doc/c-m68k.texi: Likewise.
1935 * doc/c-microblaze.texi: Likewise.
1936 * doc/c-mips.texi: Likewise.
1937 * doc/c-msp430.texi: Likewise.
1938 * doc/c-mt.texi: Likewise.
1939 * doc/c-s390.texi: Likewise.
1940 * doc/c-score.texi: Likewise.
1941 * doc/c-sh.texi: Likewise.
1942 * doc/c-sh64.texi: Likewise.
1943 * doc/c-tic54x.texi: Likewise.
1944 * doc/c-tic6x.texi: Likewise.
1945 * doc/c-v850.texi: Likewise.
1946 * doc/c-xc16x.texi: Likewise.
1947 * doc/c-xgate.texi: Likewise.
1948 * doc/c-xtensa.texi: Likewise.
1949 * doc/c-z80.texi: Likewise.
1950 * doc/internals.texi: Likewise.
1952 2013-01-10 Roland McGrath <mcgrathr@google.com>
1954 * hash.c (hash_new_sized): Make it global.
1955 * hash.h: Declare it.
1956 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1959 2013-01-10 Will Newton <will.newton@imgtec.com>
1961 * Makefile.am: Add Meta.
1962 * Makefile.in: Regenerate.
1963 * config/tc-metag.c: New file.
1964 * config/tc-metag.h: New file.
1965 * configure.tgt: Add Meta.
1966 * doc/Makefile.am: Add Meta.
1967 * doc/Makefile.in: Regenerate.
1968 * doc/all.texi: Add Meta.
1969 * doc/as.texiinfo: Document Meta options.
1970 * doc/c-metag.texi: New file.
1972 2013-01-09 Steve Ellcey <sellcey@mips.com>
1974 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1976 * config/tc-mips.c (internalError): Remove, replace with abort.
1978 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1980 * config/tc-aarch64.c (parse_operands): Change to compare the result
1981 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1983 2013-01-07 Nick Clifton <nickc@redhat.com>
1986 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1987 anticipated character.
1988 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1989 here as it is no longer needed.
1991 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1993 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1994 * doc/c-score.texi (SCORE-Opts): Likewise.
1995 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1997 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1999 * config/tc-mips.c: Add support for MIPS r5900.
2000 Add M_LQ_AB and M_SQ_AB to support large values for instructions
2002 (can_swap_branch_p, get_append_method): Detect some conditional
2003 short loops to fix a bug on the r5900 by NOP in the branch delay
2005 (M_MUL): Support 3 operands in multu on r5900.
2006 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
2007 (s_mipsset): Force 32 bit floating point on r5900.
2008 (mips_ip): Check parameter range of instructions mfps and mtps on
2010 * configure.in: Detect CPU type when target string contains r5900
2011 (e.g. mips64r5900el-linux-gnu).
2013 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
2015 * as.c (parse_args): Update copyright year to 2013.
2017 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
2019 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
2022 2013-01-02 Nick Clifton <nickc@redhat.com>
2025 * config/tc-arm.c (parse_address_main): Skip whitespace before a
2028 For older changes see ChangeLog-2012
2030 Copyright (C) 2013 Free Software Foundation, Inc.
2032 Copying and distribution of this file, with or without modification,
2033 are permitted in any medium without royalty provided the copyright
2034 notice and this notice are preserved.
2040 version-control: never